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[mirror_ubuntu-eoan-kernel.git] / arch / arc / kernel / setup.c
1 /*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9 #include <linux/seq_file.h>
10 #include <linux/fs.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/clk-provider.h>
17 #include <linux/of_fdt.h>
18 #include <linux/of_platform.h>
19 #include <linux/cache.h>
20 #include <asm/sections.h>
21 #include <asm/arcregs.h>
22 #include <asm/tlb.h>
23 #include <asm/setup.h>
24 #include <asm/page.h>
25 #include <asm/irq.h>
26 #include <asm/unwind.h>
27 #include <asm/clk.h>
28 #include <asm/mach_desc.h>
29 #include <asm/smp.h>
30
31 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
32
33 unsigned int intr_to_DE_cnt;
34
35 /* Part of U-boot ABI: see head.S */
36 int __initdata uboot_tag;
37 char __initdata *uboot_arg;
38
39 const struct machine_desc *machine_desc;
40
41 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
42
43 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
44
45 static void read_arc_build_cfg_regs(void)
46 {
47 struct bcr_perip uncached_space;
48 struct bcr_generic bcr;
49 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
50 unsigned long perip_space;
51 FIX_PTR(cpu);
52
53 READ_BCR(AUX_IDENTITY, cpu->core);
54 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
55
56 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
57 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
58
59 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
60 if (uncached_space.ver < 3)
61 perip_space = uncached_space.start << 24;
62 else
63 perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
64
65 BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
66
67 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
68
69 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
70 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
71 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
72 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
73 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
74
75 /* Note that we read the CCM BCRs independent of kernel config
76 * This is to catch the cases where user doesn't know that
77 * CCMs are present in hardware build
78 */
79 {
80 struct bcr_iccm iccm;
81 struct bcr_dccm dccm;
82 struct bcr_dccm_base dccm_base;
83 unsigned int bcr_32bit_val;
84
85 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
86 if (bcr_32bit_val) {
87 iccm = *((struct bcr_iccm *)&bcr_32bit_val);
88 cpu->iccm.base_addr = iccm.base << 16;
89 cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
90 }
91
92 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
93 if (bcr_32bit_val) {
94 dccm = *((struct bcr_dccm *)&bcr_32bit_val);
95 cpu->dccm.sz = 0x800 << (dccm.sz);
96
97 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
98 cpu->dccm.base_addr = dccm_base.addr << 8;
99 }
100 }
101
102 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
103
104 read_decode_mmu_bcr();
105 read_decode_cache_bcr();
106
107 if (is_isa_arcompact()) {
108 struct bcr_fp_arcompact sp, dp;
109 struct bcr_bpu_arcompact bpu;
110
111 READ_BCR(ARC_REG_FP_BCR, sp);
112 READ_BCR(ARC_REG_DPFP_BCR, dp);
113 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
114 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
115
116 READ_BCR(ARC_REG_BPU_BCR, bpu);
117 cpu->bpu.ver = bpu.ver;
118 cpu->bpu.full = bpu.fam ? 1 : 0;
119 if (bpu.ent) {
120 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
121 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
122 }
123 } else {
124 struct bcr_fp_arcv2 spdp;
125 struct bcr_bpu_arcv2 bpu;
126
127 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
128 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
129 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
130
131 READ_BCR(ARC_REG_BPU_BCR, bpu);
132 cpu->bpu.ver = bpu.ver;
133 cpu->bpu.full = bpu.ft;
134 cpu->bpu.num_cache = 256 << bpu.bce;
135 cpu->bpu.num_pred = 2048 << bpu.pte;
136 }
137
138 READ_BCR(ARC_REG_AP_BCR, bcr);
139 cpu->extn.ap = bcr.ver ? 1 : 0;
140
141 READ_BCR(ARC_REG_SMART_BCR, bcr);
142 cpu->extn.smart = bcr.ver ? 1 : 0;
143
144 READ_BCR(ARC_REG_RTT_BCR, bcr);
145 cpu->extn.rtt = bcr.ver ? 1 : 0;
146
147 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
148 }
149
150 static const struct cpuinfo_data arc_cpu_tbl[] = {
151 #ifdef CONFIG_ISA_ARCOMPACT
152 { {0x20, "ARC 600" }, 0x2F},
153 { {0x30, "ARC 700" }, 0x33},
154 { {0x34, "ARC 700 R4.10"}, 0x34},
155 { {0x35, "ARC 700 R4.11"}, 0x35},
156 #else
157 { {0x50, "ARC HS38 R2.0"}, 0x51},
158 { {0x52, "ARC HS38 R2.1"}, 0x52},
159 #endif
160 { {0x00, NULL } }
161 };
162
163 #define IS_AVAIL1(v, s) ((v) ? s : "")
164 #define IS_USED_RUN(v) ((v) ? "" : "(not used) ")
165 #define IS_USED_CFG(cfg) IS_USED_RUN(IS_ENABLED(cfg))
166 #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg))
167
168 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
169 {
170 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
171 struct bcr_identity *core = &cpu->core;
172 const struct cpuinfo_data *tbl;
173 char *isa_nm;
174 int i, be, atomic;
175 int n = 0;
176
177 FIX_PTR(cpu);
178
179 if (is_isa_arcompact()) {
180 isa_nm = "ARCompact";
181 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
182
183 atomic = cpu->isa.atomic1;
184 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
185 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
186 } else {
187 isa_nm = "ARCv2";
188 be = cpu->isa.be;
189 atomic = cpu->isa.atomic;
190 }
191
192 n += scnprintf(buf + n, len - n,
193 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
194 core->family, core->cpu_id, core->chip_id);
195
196 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
197 if ((core->family >= tbl->info.id) &&
198 (core->family <= tbl->up_range)) {
199 n += scnprintf(buf + n, len - n,
200 "processor [%d]\t: %s (%s ISA) %s\n",
201 cpu_id, tbl->info.str, isa_nm,
202 IS_AVAIL1(be, "[Big-Endian]"));
203 break;
204 }
205 }
206
207 if (tbl->info.id == 0)
208 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
209
210 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
211 (unsigned int)(arc_get_core_freq() / 1000000),
212 (unsigned int)(arc_get_core_freq() / 10000) % 100);
213
214 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
215 IS_AVAIL1(cpu->timers.t0, "Timer0 "),
216 IS_AVAIL1(cpu->timers.t1, "Timer1 "),
217 IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
218 CONFIG_ARC_HAS_RTC));
219
220 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
221 IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
222 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
223 IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
224
225 if (i)
226 n += scnprintf(buf + n, len - n, "\n\t\t: ");
227
228 if (cpu->extn_mpy.ver) {
229 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
230 n += scnprintf(buf + n, len - n, "mpy ");
231 } else {
232 int opt = 2; /* stock MPY/MPYH */
233
234 if (cpu->extn_mpy.dsp) /* OPT 7-9 */
235 opt = cpu->extn_mpy.dsp + 6;
236
237 n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
238 }
239 n += scnprintf(buf + n, len - n, "%s",
240 IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
241 }
242
243 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
244 IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
245 IS_AVAIL1(cpu->extn.norm, "norm "),
246 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
247 IS_AVAIL1(cpu->extn.swap, "swap "),
248 IS_AVAIL1(cpu->extn.minmax, "minmax "),
249 IS_AVAIL1(cpu->extn.crc, "crc "),
250 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
251
252 if (cpu->bpu.ver)
253 n += scnprintf(buf + n, len - n,
254 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
255 IS_AVAIL1(cpu->bpu.full, "full"),
256 IS_AVAIL1(!cpu->bpu.full, "partial"),
257 cpu->bpu.num_cache, cpu->bpu.num_pred);
258
259 return buf;
260 }
261
262 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
263 {
264 int n = 0;
265 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
266
267 FIX_PTR(cpu);
268
269 n += scnprintf(buf + n, len - n,
270 "Vector Table\t: %#x\nUncached Base\t: %#x\n",
271 cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
272
273 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
274 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
275 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
276 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
277
278 if (cpu->extn.debug)
279 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
280 IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
281 IS_AVAIL1(cpu->extn.smart, "smaRT "),
282 IS_AVAIL1(cpu->extn.rtt, "RTT "));
283
284 if (cpu->dccm.sz || cpu->iccm.sz)
285 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
286 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
287 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
288
289 n += scnprintf(buf + n, len - n,
290 "OS ABI [v3]\t: no-legacy-syscalls\n");
291
292 return buf;
293 }
294
295 static void arc_chk_core_config(void)
296 {
297 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
298 int fpu_enabled;
299
300 if (!cpu->timers.t0)
301 panic("Timer0 is not present!\n");
302
303 if (!cpu->timers.t1)
304 panic("Timer1 is not present!\n");
305
306 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
307 panic("RTC is not present\n");
308
309 #ifdef CONFIG_ARC_HAS_DCCM
310 /*
311 * DCCM can be arbit placed in hardware.
312 * Make sure it's placement/sz matches what Linux is built with
313 */
314 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
315 panic("Linux built with incorrect DCCM Base address\n");
316
317 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
318 panic("Linux built with incorrect DCCM Size\n");
319 #endif
320
321 #ifdef CONFIG_ARC_HAS_ICCM
322 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
323 panic("Linux built with incorrect ICCM Size\n");
324 #endif
325
326 /*
327 * FP hardware/software config sanity
328 * -If hardware contains DPFP, kernel needs to save/restore FPU state
329 * -If not, it will crash trying to save/restore the non-existant regs
330 *
331 * (only DPDP checked since SP has no arch visible regs)
332 */
333 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
334
335 if (cpu->extn.fpu_dp && !fpu_enabled)
336 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
337 else if (!cpu->extn.fpu_dp && fpu_enabled)
338 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
339
340 if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
341 !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
342 panic("llock/scond livelock workaround missing\n");
343 }
344
345 /*
346 * Initialize and setup the processor core
347 * This is called by all the CPUs thus should not do special case stuff
348 * such as only for boot CPU etc
349 */
350
351 void setup_processor(void)
352 {
353 char str[512];
354 int cpu_id = smp_processor_id();
355
356 read_arc_build_cfg_regs();
357 arc_init_IRQ();
358
359 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
360
361 arc_mmu_init();
362 arc_cache_init();
363
364 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
365 printk(arc_platform_smp_cpuinfo());
366
367 arc_chk_core_config();
368 }
369
370 static inline int is_kernel(unsigned long addr)
371 {
372 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
373 return 1;
374 return 0;
375 }
376
377 void __init setup_arch(char **cmdline_p)
378 {
379 #ifdef CONFIG_ARC_UBOOT_SUPPORT
380 /* make sure that uboot passed pointer to cmdline/dtb is valid */
381 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
382 panic("Invalid uboot arg\n");
383
384 /* See if u-boot passed an external Device Tree blob */
385 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
386 if (!machine_desc)
387 #endif
388 {
389 /* No, so try the embedded one */
390 machine_desc = setup_machine_fdt(__dtb_start);
391 if (!machine_desc)
392 panic("Embedded DT invalid\n");
393
394 /*
395 * If we are here, it is established that @uboot_arg didn't
396 * point to DT blob. Instead if u-boot says it is cmdline,
397 * Appent to embedded DT cmdline.
398 * setup_machine_fdt() would have populated @boot_command_line
399 */
400 if (uboot_tag == 1) {
401 /* Ensure a whitespace between the 2 cmdlines */
402 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
403 strlcat(boot_command_line, uboot_arg,
404 COMMAND_LINE_SIZE);
405 }
406 }
407
408 /* Save unparsed command line copy for /proc/cmdline */
409 *cmdline_p = boot_command_line;
410
411 /* To force early parsing of things like mem=xxx */
412 parse_early_param();
413
414 /* Platform/board specific: e.g. early console registration */
415 if (machine_desc->init_early)
416 machine_desc->init_early();
417
418 setup_processor();
419 smp_init_cpus();
420 setup_arch_memory();
421
422 /* copy flat DT out of .init and then unflatten it */
423 unflatten_and_copy_device_tree();
424
425 /* Can be issue if someone passes cmd line arg "ro"
426 * But that is unlikely so keeping it as it is
427 */
428 root_mountflags &= ~MS_RDONLY;
429
430 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
431 conswitchp = &dummy_con;
432 #endif
433
434 arc_unwind_init();
435 arc_unwind_setup();
436 }
437
438 static int __init customize_machine(void)
439 {
440 of_clk_init(NULL);
441 /*
442 * Traverses flattened DeviceTree - registering platform devices
443 * (if any) complete with their resources
444 */
445 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
446
447 if (machine_desc->init_machine)
448 machine_desc->init_machine();
449
450 return 0;
451 }
452 arch_initcall(customize_machine);
453
454 static int __init init_late_machine(void)
455 {
456 if (machine_desc->init_late)
457 machine_desc->init_late();
458
459 return 0;
460 }
461 late_initcall(init_late_machine);
462 /*
463 * Get CPU information for use by the procfs.
464 */
465
466 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
467 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
468
469 static int show_cpuinfo(struct seq_file *m, void *v)
470 {
471 char *str;
472 int cpu_id = ptr_to_cpu(v);
473
474 if (!cpu_online(cpu_id)) {
475 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
476 goto done;
477 }
478
479 str = (char *)__get_free_page(GFP_TEMPORARY);
480 if (!str)
481 goto done;
482
483 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
484
485 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
486 loops_per_jiffy / (500000 / HZ),
487 (loops_per_jiffy / (5000 / HZ)) % 100);
488
489 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
490 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
491 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
492 seq_printf(m, arc_platform_smp_cpuinfo());
493
494 free_page((unsigned long)str);
495 done:
496 seq_printf(m, "\n");
497
498 return 0;
499 }
500
501 static void *c_start(struct seq_file *m, loff_t *pos)
502 {
503 /*
504 * Callback returns cpu-id to iterator for show routine, NULL to stop.
505 * However since NULL is also a valid cpu-id (0), we use a round-about
506 * way to pass it w/o having to kmalloc/free a 2 byte string.
507 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
508 */
509 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
510 }
511
512 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
513 {
514 ++*pos;
515 return c_start(m, pos);
516 }
517
518 static void c_stop(struct seq_file *m, void *v)
519 {
520 }
521
522 const struct seq_operations cpuinfo_op = {
523 .start = c_start,
524 .next = c_next,
525 .stop = c_stop,
526 .show = show_cpuinfo
527 };
528
529 static DEFINE_PER_CPU(struct cpu, cpu_topology);
530
531 static int __init topology_init(void)
532 {
533 int cpu;
534
535 for_each_present_cpu(cpu)
536 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
537
538 return 0;
539 }
540
541 subsys_initcall(topology_init);