arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   5         select ARCH_HAS_DEVMEM_IS_ALLOWED
   6         select ARCH_HAS_ELF_RANDOMIZE
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_HAVE_CUSTOM_GPIO_H
   9         select ARCH_HAS_GCOV_PROFILE_ALL
  10         select ARCH_MIGHT_HAVE_PC_PARPORT
  11         select ARCH_SUPPORTS_ATOMIC_RMW
  12         select ARCH_USE_BUILTIN_BSWAP
  13         select ARCH_USE_CMPXCHG_LOCKREF
  14         select ARCH_WANT_IPC_PARSE_VERSION
  15         select BUILDTIME_EXTABLE_SORT if MMU
  16         select CLONE_BACKWARDS
  17         select CPU_PM if (SUSPEND || CPU_IDLE)
  18         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
  19         select EDAC_SUPPORT
  20         select EDAC_ATOMIC_SCRUB
  21         select GENERIC_ALLOCATOR
  22         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
  23         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  24         select GENERIC_EARLY_IOREMAP
  25         select GENERIC_IDLE_POLL_SETUP
  26         select GENERIC_IRQ_PROBE
  27         select GENERIC_IRQ_SHOW
  28         select GENERIC_IRQ_SHOW_LEVEL
  29         select GENERIC_PCI_IOMAP
  30         select GENERIC_SCHED_CLOCK
  31         select GENERIC_SMP_IDLE_THREAD
  32         select GENERIC_STRNCPY_FROM_USER
  33         select GENERIC_STRNLEN_USER
  34         select HANDLE_DOMAIN_IRQ
  35         select HARDIRQS_SW_RESEND
  36         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
  37         select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
  38         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
  39         select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
  40         select HAVE_ARCH_MMAP_RND_BITS if MMU
  41         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
  42         select HAVE_ARCH_TRACEHOOK
  43         select HAVE_ARM_SMCCC if CPU_V7
  44         select HAVE_BPF_JIT
  45         select HAVE_CC_STACKPROTECTOR
  46         select HAVE_CONTEXT_TRACKING
  47         select HAVE_C_RECORDMCOUNT
  48         select HAVE_DEBUG_KMEMLEAK
  49         select HAVE_DMA_API_DEBUG
  50         select HAVE_DMA_ATTRS
  51         select HAVE_DMA_CONTIGUOUS if MMU
  52         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU
  53         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
  54         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  55         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  56         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  57         select HAVE_GENERIC_DMA_COHERENT
  58         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  59         select HAVE_IDE if PCI || ISA || PCMCIA
  60         select HAVE_IRQ_TIME_ACCOUNTING
  61         select HAVE_KERNEL_GZIP
  62         select HAVE_KERNEL_LZ4
  63         select HAVE_KERNEL_LZMA
  64         select HAVE_KERNEL_LZO
  65         select HAVE_KERNEL_XZ
  66         select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
  67         select HAVE_KRETPROBES if (HAVE_KPROBES)
  68         select HAVE_MEMBLOCK
  69         select HAVE_MOD_ARCH_SPECIFIC
  70         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  71         select HAVE_OPTPROBES if !THUMB2_KERNEL
  72         select HAVE_PERF_EVENTS
  73         select HAVE_PERF_REGS
  74         select HAVE_PERF_USER_STACK_DUMP
  75         select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
  76         select HAVE_REGS_AND_STACK_ACCESS_API
  77         select HAVE_SYSCALL_TRACEPOINTS
  78         select HAVE_UID16
  79         select HAVE_VIRT_CPU_ACCOUNTING_GEN
  80         select IRQ_FORCED_THREADING
  81         select MODULES_USE_ELF_REL
  82         select NO_BOOTMEM
  83         select OF_EARLY_FLATTREE if OF
  84         select OF_RESERVED_MEM if OF
  85         select OLD_SIGACTION
  86         select OLD_SIGSUSPEND3
  87         select PERF_USE_VMALLOC
  88         select RTC_LIB
  89         select SYS_SUPPORTS_APM_EMULATION
  90         # Above selects are sorted alphabetically; please add new ones
  91         # according to that.  Thanks.
  92         help
  93           The ARM series is a line of low-power-consumption RISC chip designs
  94           licensed by ARM Ltd and targeted at embedded applications and
  95           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  96           manufactured, but legacy ARM-based PC hardware remains popular in
  97           Europe.  There is an ARM Linux project with a web page at
  98           <http://www.arm.linux.org.uk/>.
  99
 100 config ARM_HAS_SG_CHAIN
 101         select ARCH_HAS_SG_CHAIN
 102         bool
 103
 104 config NEED_SG_DMA_LENGTH
 105         bool
 106
 107 config ARM_DMA_USE_IOMMU
 108         bool
 109         select ARM_HAS_SG_CHAIN
 110         select NEED_SG_DMA_LENGTH
 111
 112 if ARM_DMA_USE_IOMMU
 113
 114 config ARM_DMA_IOMMU_ALIGNMENT
 115         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
 116         range 4 9
 117         default 8
 118         help
 119           DMA mapping framework by default aligns all buffers to the smallest
 120           PAGE_SIZE order which is greater than or equal to the requested buffer
 121           size. This works well for buffers up to a few hundreds kilobytes, but
 122           for larger buffers it just a waste of address space. Drivers which has
 123           relatively small addressing window (like 64Mib) might run out of
 124           virtual space with just a few allocations.
 125
 126           With this parameter you can specify the maximum PAGE_SIZE order for
 127           DMA IOMMU buffers. Larger buffers will be aligned only to this
 128           specified order. The order is expressed as a power of two multiplied
 129           by the PAGE_SIZE.
 130
 131 endif
 132
 133 config MIGHT_HAVE_PCI
 134         bool
 135
 136 config SYS_SUPPORTS_APM_EMULATION
 137         bool
 138
 139 config HAVE_TCM
 140         bool
 141         select GENERIC_ALLOCATOR
 142
 143 config HAVE_PROC_CPU
 144         bool
 145
 146 config NO_IOPORT_MAP
 147         bool
 148
 149 config EISA
 150         bool
 151         ---help---
 152           The Extended Industry Standard Architecture (EISA) bus was
 153           developed as an open alternative to the IBM MicroChannel bus.
 154
 155           The EISA bus provided some of the features of the IBM MicroChannel
 156           bus while maintaining backward compatibility with cards made for
 157           the older ISA bus.  The EISA bus saw limited use between 1988 and
 158           1995 when it was made obsolete by the PCI bus.
 159
 160           Say Y here if you are building a kernel for an EISA-based machine.
 161
 162           Otherwise, say N.
 163
 164 config SBUS
 165         bool
 166
 167 config STACKTRACE_SUPPORT
 168         bool
 169         default y
 170
 171 config LOCKDEP_SUPPORT
 172         bool
 173         default y
 174
 175 config TRACE_IRQFLAGS_SUPPORT
 176         bool
 177         default !CPU_V7M
 178
 179 config RWSEM_XCHGADD_ALGORITHM
 180         bool
 181         default y
 182
 183 config ARCH_HAS_ILOG2_U32
 184         bool
 185
 186 config ARCH_HAS_ILOG2_U64
 187         bool
 188
 189 config ARCH_HAS_BANDGAP
 190         bool
 191
 192 config FIX_EARLYCON_MEM
 193         def_bool y if MMU
 194
 195 config GENERIC_HWEIGHT
 196         bool
 197         default y
 198
 199 config GENERIC_CALIBRATE_DELAY
 200         bool
 201         default y
 202
 203 config ARCH_MAY_HAVE_PC_FDC
 204         bool
 205
 206 config ZONE_DMA
 207         bool
 208
 209 config NEED_DMA_MAP_STATE
 210        def_bool y
 211
 212 config ARCH_SUPPORTS_UPROBES
 213         def_bool y
 214
 215 config ARCH_HAS_DMA_SET_COHERENT_MASK
 216         bool
 217
 218 config GENERIC_ISA_DMA
 219         bool
 220
 221 config FIQ
 222         bool
 223
 224 config NEED_RET_TO_USER
 225         bool
 226
 227 config ARCH_MTD_XIP
 228         bool
 229
 230 config VECTORS_BASE
 231         hex
 232         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 233         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 234         default 0x00000000
 235         help
 236           The base address of exception vectors.  This must be two pages
 237           in size.
 238
 239 config ARM_PATCH_PHYS_VIRT
 240         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 241         default y
 242         depends on !XIP_KERNEL && MMU
 243         depends on !ARCH_REALVIEW || !SPARSEMEM
 244         help
 245           Patch phys-to-virt and virt-to-phys translation functions at
 246           boot and module load time according to the position of the
 247           kernel in system memory.
 248
 249           This can only be used with non-XIP MMU kernels where the base
 250           of physical memory is at a 16MB boundary.
 251
 252           Only disable this option if you know that you do not require
 253           this feature (eg, building a kernel for a single machine) and
 254           you need to shrink the kernel to the minimal size.
 255
 256 config NEED_MACH_IO_H
 257         bool
 258         help
 259           Select this when mach/io.h is required to provide special
 260           definitions for this platform.  The need for mach/io.h should
 261           be avoided when possible.
 262
 263 config NEED_MACH_MEMORY_H
 264         bool
 265         help
 266           Select this when mach/memory.h is required to provide special
 267           definitions for this platform.  The need for mach/memory.h should
 268           be avoided when possible.
 269
 270 config PHYS_OFFSET
 271         hex "Physical address of main memory" if MMU
 272         depends on !ARM_PATCH_PHYS_VIRT
 273         default DRAM_BASE if !MMU
 274         default 0x00000000 if ARCH_EBSA110 || \
 275                         ARCH_FOOTBRIDGE || \
 276                         ARCH_INTEGRATOR || \
 277                         ARCH_IOP13XX || \
 278                         ARCH_KS8695 || \
 279                         (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
 280         default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
 281         default 0x20000000 if ARCH_S5PV210
 282         default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
 283         default 0xc0000000 if ARCH_SA1100
 284         help
 285           Please provide the physical address corresponding to the
 286           location of main memory in your system.
 287
 288 config GENERIC_BUG
 289         def_bool y
 290         depends on BUG
 291
 292 config PGTABLE_LEVELS
 293         int
 294         default 3 if ARM_LPAE
 295         default 2
 296
 297 source "init/Kconfig"
 298
 299 source "kernel/Kconfig.freezer"
 300
 301 menu "System Type"
 302
 303 config MMU
 304         bool "MMU-based Paged Memory Management Support"
 305         default y
 306         help
 307           Select if you want MMU-based virtualised addressing space
 308           support by paged memory management. If unsure, say 'Y'.
 309
 310 config ARCH_MMAP_RND_BITS_MIN
 311         default 8
 312
 313 config ARCH_MMAP_RND_BITS_MAX
 314         default 14 if PAGE_OFFSET=0x40000000
 315         default 15 if PAGE_OFFSET=0x80000000
 316         default 16
 317
 318 #
 319 # The "ARM system type" choice list is ordered alphabetically by option
 320 # text.  Please add new entries in the option alphabetic order.
 321 #
 322 choice
 323         prompt "ARM system type"
 324         default ARCH_VERSATILE if !MMU
 325         default ARCH_MULTIPLATFORM if MMU
 326
 327 config ARCH_MULTIPLATFORM
 328         bool "Allow multiple platforms to be selected"
 329         depends on MMU
 330         select ARCH_WANT_OPTIONAL_GPIOLIB
 331         select ARM_HAS_SG_CHAIN
 332         select ARM_PATCH_PHYS_VIRT
 333         select AUTO_ZRELADDR
 334         select CLKSRC_OF
 335         select COMMON_CLK
 336         select GENERIC_CLOCKEVENTS
 337         select MIGHT_HAVE_PCI
 338         select MULTI_IRQ_HANDLER
 339         select SPARSE_IRQ
 340         select USE_OF
 341
 342 config ARM_SINGLE_ARMV7M
 343         bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
 344         depends on !MMU
 345         select ARCH_WANT_OPTIONAL_GPIOLIB
 346         select ARM_NVIC
 347         select AUTO_ZRELADDR
 348         select CLKSRC_OF
 349         select COMMON_CLK
 350         select CPU_V7M
 351         select GENERIC_CLOCKEVENTS
 352         select NO_IOPORT_MAP
 353         select SPARSE_IRQ
 354         select USE_OF
 355
 356 config ARCH_REALVIEW
 357         bool "ARM Ltd. RealView family"
 358         select ARCH_WANT_OPTIONAL_GPIOLIB
 359         select ARM_AMBA
 360         select ARM_TIMER_SP804
 361         select COMMON_CLK
 362         select COMMON_CLK_VERSATILE
 363         select GENERIC_CLOCKEVENTS
 364         select GPIO_PL061 if GPIOLIB
 365         select ICST
 366         select NEED_MACH_MEMORY_H
 367         select PLAT_VERSATILE
 368         select PLAT_VERSATILE_SCHED_CLOCK
 369         help
 370           This enables support for ARM Ltd RealView boards.
 371
 372 config ARCH_VERSATILE
 373         bool "ARM Ltd. Versatile family"
 374         select ARCH_WANT_OPTIONAL_GPIOLIB
 375         select ARM_AMBA
 376         select ARM_TIMER_SP804
 377         select ARM_VIC
 378         select CLKDEV_LOOKUP
 379         select GENERIC_CLOCKEVENTS
 380         select HAVE_MACH_CLKDEV
 381         select ICST
 382         select PLAT_VERSATILE
 383         select PLAT_VERSATILE_CLOCK
 384         select PLAT_VERSATILE_SCHED_CLOCK
 385         select VERSATILE_FPGA_IRQ
 386         help
 387           This enables support for ARM Ltd Versatile board.
 388
 389 config ARCH_CLPS711X
 390         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 391         select ARCH_REQUIRE_GPIOLIB
 392         select AUTO_ZRELADDR
 393         select CLKSRC_MMIO
 394         select COMMON_CLK
 395         select CPU_ARM720T
 396         select GENERIC_CLOCKEVENTS
 397         select MFD_SYSCON
 398         select SOC_BUS
 399         help
 400           Support for Cirrus Logic 711x/721x/731x based boards.
 401
 402 config ARCH_GEMINI
 403         bool "Cortina Systems Gemini"
 404         select ARCH_REQUIRE_GPIOLIB
 405         select CLKSRC_MMIO
 406         select CPU_FA526
 407         select GENERIC_CLOCKEVENTS
 408         help
 409           Support for the Cortina Systems Gemini family SoCs
 410
 411 config ARCH_EBSA110
 412         bool "EBSA-110"
 413         select ARCH_USES_GETTIMEOFFSET
 414         select CPU_SA110
 415         select ISA
 416         select NEED_MACH_IO_H
 417         select NEED_MACH_MEMORY_H
 418         select NO_IOPORT_MAP
 419         help
 420           This is an evaluation board for the StrongARM processor available
 421           from Digital. It has limited hardware on-board, including an
 422           Ethernet interface, two PCMCIA sockets, two serial ports and a
 423           parallel port.
 424
 425 config ARCH_EP93XX
 426         bool "EP93xx-based"
 427         select ARCH_HAS_HOLES_MEMORYMODEL
 428         select ARCH_REQUIRE_GPIOLIB
 429         select ARM_AMBA
 430         select ARM_PATCH_PHYS_VIRT
 431         select ARM_VIC
 432         select AUTO_ZRELADDR
 433         select CLKDEV_LOOKUP
 434         select CLKSRC_MMIO
 435         select CPU_ARM920T
 436         select GENERIC_CLOCKEVENTS
 437         help
 438           This enables support for the Cirrus EP93xx series of CPUs.
 439
 440 config ARCH_FOOTBRIDGE
 441         bool "FootBridge"
 442         select CPU_SA110
 443         select FOOTBRIDGE
 444         select GENERIC_CLOCKEVENTS
 445         select HAVE_IDE
 446         select NEED_MACH_IO_H if !MMU
 447         select NEED_MACH_MEMORY_H
 448         help
 449           Support for systems based on the DC21285 companion chip
 450           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 451
 452 config ARCH_NETX
 453         bool "Hilscher NetX based"
 454         select ARM_VIC
 455         select CLKSRC_MMIO
 456         select CPU_ARM926T
 457         select GENERIC_CLOCKEVENTS
 458         help
 459           This enables support for systems based on the Hilscher NetX Soc
 460
 461 config ARCH_IOP13XX
 462         bool "IOP13xx-based"
 463         depends on MMU
 464         select CPU_XSC3
 465         select NEED_MACH_MEMORY_H
 466         select NEED_RET_TO_USER
 467         select PCI
 468         select PLAT_IOP
 469         select VMSPLIT_1G
 470         select SPARSE_IRQ
 471         help
 472           Support for Intel's IOP13XX (XScale) family of processors.
 473
 474 config ARCH_IOP32X
 475         bool "IOP32x-based"
 476         depends on MMU
 477         select ARCH_REQUIRE_GPIOLIB
 478         select CPU_XSCALE
 479         select GPIO_IOP
 480         select NEED_RET_TO_USER
 481         select PCI
 482         select PLAT_IOP
 483         help
 484           Support for Intel's 80219 and IOP32X (XScale) family of
 485           processors.
 486
 487 config ARCH_IOP33X
 488         bool "IOP33x-based"
 489         depends on MMU
 490         select ARCH_REQUIRE_GPIOLIB
 491         select CPU_XSCALE
 492         select GPIO_IOP
 493         select NEED_RET_TO_USER
 494         select PCI
 495         select PLAT_IOP
 496         help
 497           Support for Intel's IOP33X (XScale) family of processors.
 498
 499 config ARCH_IXP4XX
 500         bool "IXP4xx-based"
 501         depends on MMU
 502         select ARCH_HAS_DMA_SET_COHERENT_MASK
 503         select ARCH_REQUIRE_GPIOLIB
 504         select ARCH_SUPPORTS_BIG_ENDIAN
 505         select CLKSRC_MMIO
 506         select CPU_XSCALE
 507         select DMABOUNCE if PCI
 508         select GENERIC_CLOCKEVENTS
 509         select MIGHT_HAVE_PCI
 510         select NEED_MACH_IO_H
 511         select USB_EHCI_BIG_ENDIAN_DESC
 512         select USB_EHCI_BIG_ENDIAN_MMIO
 513         help
 514           Support for Intel's IXP4XX (XScale) family of processors.
 515
 516 config ARCH_DOVE
 517         bool "Marvell Dove"
 518         select ARCH_REQUIRE_GPIOLIB
 519         select CPU_PJ4
 520         select GENERIC_CLOCKEVENTS
 521         select MIGHT_HAVE_PCI
 522         select MVEBU_MBUS
 523         select PINCTRL
 524         select PINCTRL_DOVE
 525         select PLAT_ORION_LEGACY
 526         help
 527           Support for the Marvell Dove SoC 88AP510
 528
 529 config ARCH_MV78XX0
 530         bool "Marvell MV78xx0"
 531         select ARCH_REQUIRE_GPIOLIB
 532         select CPU_FEROCEON
 533         select GENERIC_CLOCKEVENTS
 534         select MVEBU_MBUS
 535         select PCI
 536         select PLAT_ORION_LEGACY
 537         help
 538           Support for the following Marvell MV78xx0 series SoCs:
 539           MV781x0, MV782x0.
 540
 541 config ARCH_ORION5X
 542         bool "Marvell Orion"
 543         depends on MMU
 544         select ARCH_REQUIRE_GPIOLIB
 545         select CPU_FEROCEON
 546         select GENERIC_CLOCKEVENTS
 547         select MVEBU_MBUS
 548         select PCI
 549         select PLAT_ORION_LEGACY
 550         select MULTI_IRQ_HANDLER
 551         help
 552           Support for the following Marvell Orion 5x series SoCs:
 553           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 554           Orion-2 (5281), Orion-1-90 (6183).
 555
 556 config ARCH_MMP
 557         bool "Marvell PXA168/910/MMP2"
 558         depends on MMU
 559         select ARCH_REQUIRE_GPIOLIB
 560         select CLKDEV_LOOKUP
 561         select GENERIC_ALLOCATOR
 562         select GENERIC_CLOCKEVENTS
 563         select GPIO_PXA
 564         select IRQ_DOMAIN
 565         select MULTI_IRQ_HANDLER
 566         select PINCTRL
 567         select PLAT_PXA
 568         select SPARSE_IRQ
 569         help
 570           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 571
 572 config ARCH_KS8695
 573         bool "Micrel/Kendin KS8695"
 574         select ARCH_REQUIRE_GPIOLIB
 575         select CLKSRC_MMIO
 576         select CPU_ARM922T
 577         select GENERIC_CLOCKEVENTS
 578         select NEED_MACH_MEMORY_H
 579         help
 580           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 581           System-on-Chip devices.
 582
 583 config ARCH_W90X900
 584         bool "Nuvoton W90X900 CPU"
 585         select ARCH_REQUIRE_GPIOLIB
 586         select CLKDEV_LOOKUP
 587         select CLKSRC_MMIO
 588         select CPU_ARM926T
 589         select GENERIC_CLOCKEVENTS
 590         help
 591           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 592           At present, the w90x900 has been renamed nuc900, regarding
 593           the ARM series product line, you can login the following
 594           link address to know more.
 595
 596           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 597                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 598
 599 config ARCH_LPC32XX
 600         bool "NXP LPC32XX"
 601         select ARCH_REQUIRE_GPIOLIB
 602         select ARM_AMBA
 603         select CLKDEV_LOOKUP
 604         select CLKSRC_MMIO
 605         select CPU_ARM926T
 606         select GENERIC_CLOCKEVENTS
 607         select HAVE_IDE
 608         select USE_OF
 609         help
 610           Support for the NXP LPC32XX family of processors
 611
 612 config ARCH_PXA
 613         bool "PXA2xx/PXA3xx-based"
 614         depends on MMU
 615         select ARCH_MTD_XIP
 616         select ARCH_REQUIRE_GPIOLIB
 617         select ARM_CPU_SUSPEND if PM
 618         select AUTO_ZRELADDR
 619         select COMMON_CLK
 620         select CLKDEV_LOOKUP
 621         select CLKSRC_PXA
 622         select CLKSRC_MMIO
 623         select CLKSRC_OF
 624         select GENERIC_CLOCKEVENTS
 625         select GPIO_PXA
 626         select HAVE_IDE
 627         select IRQ_DOMAIN
 628         select MULTI_IRQ_HANDLER
 629         select PLAT_PXA
 630         select SPARSE_IRQ
 631         help
 632           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 633
 634 config ARCH_RPC
 635         bool "RiscPC"
 636         depends on MMU
 637         select ARCH_ACORN
 638         select ARCH_MAY_HAVE_PC_FDC
 639         select ARCH_SPARSEMEM_ENABLE
 640         select ARCH_USES_GETTIMEOFFSET
 641         select CPU_SA110
 642         select FIQ
 643         select HAVE_IDE
 644         select HAVE_PATA_PLATFORM
 645         select ISA_DMA_API
 646         select NEED_MACH_IO_H
 647         select NEED_MACH_MEMORY_H
 648         select NO_IOPORT_MAP
 649         select VIRT_TO_BUS
 650         help
 651           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 652           CD-ROM interface, serial and parallel port, and the floppy drive.
 653
 654 config ARCH_SA1100
 655         bool "SA1100-based"
 656         select ARCH_MTD_XIP
 657         select ARCH_REQUIRE_GPIOLIB
 658         select ARCH_SPARSEMEM_ENABLE
 659         select CLKDEV_LOOKUP
 660         select CLKSRC_MMIO
 661         select CLKSRC_PXA
 662         select CLKSRC_OF if OF
 663         select CPU_FREQ
 664         select CPU_SA1100
 665         select GENERIC_CLOCKEVENTS
 666         select HAVE_IDE
 667         select IRQ_DOMAIN
 668         select ISA
 669         select MULTI_IRQ_HANDLER
 670         select NEED_MACH_MEMORY_H
 671         select SPARSE_IRQ
 672         help
 673           Support for StrongARM 11x0 based boards.
 674
 675 config ARCH_S3C24XX
 676         bool "Samsung S3C24XX SoCs"
 677         select ARCH_REQUIRE_GPIOLIB
 678         select ATAGS
 679         select CLKDEV_LOOKUP
 680         select CLKSRC_SAMSUNG_PWM
 681         select GENERIC_CLOCKEVENTS
 682         select GPIO_SAMSUNG
 683         select HAVE_S3C2410_I2C if I2C
 684         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 685         select HAVE_S3C_RTC if RTC_CLASS
 686         select MULTI_IRQ_HANDLER
 687         select NEED_MACH_IO_H
 688         select SAMSUNG_ATAGS
 689         help
 690           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 691           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 692           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 693           Samsung SMDK2410 development board (and derivatives).
 694
 695 config ARCH_S3C64XX
 696         bool "Samsung S3C64XX"
 697         select ARCH_REQUIRE_GPIOLIB
 698         select ARM_AMBA
 699         select ARM_VIC
 700         select ATAGS
 701         select CLKDEV_LOOKUP
 702         select CLKSRC_SAMSUNG_PWM
 703         select COMMON_CLK_SAMSUNG
 704         select CPU_V6K
 705         select GENERIC_CLOCKEVENTS
 706         select GPIO_SAMSUNG
 707         select HAVE_S3C2410_I2C if I2C
 708         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 709         select HAVE_TCM
 710         select NO_IOPORT_MAP
 711         select PLAT_SAMSUNG
 712         select PM_GENERIC_DOMAINS if PM
 713         select S3C_DEV_NAND
 714         select S3C_GPIO_TRACK
 715         select SAMSUNG_ATAGS
 716         select SAMSUNG_WAKEMASK
 717         select SAMSUNG_WDT_RESET
 718         help
 719           Samsung S3C64XX series based systems
 720
 721 config ARCH_DAVINCI
 722         bool "TI DaVinci"
 723         select ARCH_HAS_HOLES_MEMORYMODEL
 724         select ARCH_REQUIRE_GPIOLIB
 725         select CLKDEV_LOOKUP
 726         select GENERIC_ALLOCATOR
 727         select GENERIC_CLOCKEVENTS
 728         select GENERIC_IRQ_CHIP
 729         select HAVE_IDE
 730         select USE_OF
 731         select ZONE_DMA
 732         help
 733           Support for TI's DaVinci platform.
 734
 735 config ARCH_OMAP1
 736         bool "TI OMAP1"
 737         depends on MMU
 738         select ARCH_HAS_HOLES_MEMORYMODEL
 739         select ARCH_OMAP
 740         select ARCH_REQUIRE_GPIOLIB
 741         select CLKDEV_LOOKUP
 742         select CLKSRC_MMIO
 743         select GENERIC_CLOCKEVENTS
 744         select GENERIC_IRQ_CHIP
 745         select HAVE_IDE
 746         select IRQ_DOMAIN
 747         select MULTI_IRQ_HANDLER
 748         select NEED_MACH_IO_H if PCCARD
 749         select NEED_MACH_MEMORY_H
 750         select SPARSE_IRQ
 751         help
 752           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 753
 754 endchoice
 755
 756 menu "Multiple platform selection"
 757         depends on ARCH_MULTIPLATFORM
 758
 759 comment "CPU Core family selection"
 760
 761 config ARCH_MULTI_V4
 762         bool "ARMv4 based platforms (FA526)"
 763         depends on !ARCH_MULTI_V6_V7
 764         select ARCH_MULTI_V4_V5
 765         select CPU_FA526
 766
 767 config ARCH_MULTI_V4T
 768         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 769         depends on !ARCH_MULTI_V6_V7
 770         select ARCH_MULTI_V4_V5
 771         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
 772                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
 773                 CPU_ARM925T || CPU_ARM940T)
 774
 775 config ARCH_MULTI_V5
 776         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 777         depends on !ARCH_MULTI_V6_V7
 778         select ARCH_MULTI_V4_V5
 779         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
 780                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
 781                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
 782
 783 config ARCH_MULTI_V4_V5
 784         bool
 785
 786 config ARCH_MULTI_V6
 787         bool "ARMv6 based platforms (ARM11)"
 788         select ARCH_MULTI_V6_V7
 789         select CPU_V6K
 790
 791 config ARCH_MULTI_V7
 792         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 793         default y
 794         select ARCH_MULTI_V6_V7
 795         select CPU_V7
 796         select HAVE_SMP
 797
 798 config ARCH_MULTI_V6_V7
 799         bool
 800         select MIGHT_HAVE_CACHE_L2X0
 801
 802 config ARCH_MULTI_CPU_AUTO
 803         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 804         select ARCH_MULTI_V5
 805
 806 endmenu
 807
 808 config ARCH_VIRT
 809         bool "Dummy Virtual Machine"
 810         depends on ARCH_MULTI_V7
 811         select ARM_AMBA
 812         select ARM_GIC
 813         select ARM_GIC_V2M if PCI_MSI
 814         select ARM_GIC_V3
 815         select ARM_PSCI
 816         select HAVE_ARM_ARCH_TIMER
 817
 818 #
 819 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 820 # Kconfigs may be included either alphabetically (according to the
 821 # plat- suffix) or along side the corresponding mach-* source.
 822 #
 823 source "arch/arm/mach-mvebu/Kconfig"
 824
 825 source "arch/arm/mach-alpine/Kconfig"
 826
 827 source "arch/arm/mach-asm9260/Kconfig"
 828
 829 source "arch/arm/mach-at91/Kconfig"
 830
 831 source "arch/arm/mach-axxia/Kconfig"
 832
 833 source "arch/arm/mach-bcm/Kconfig"
 834
 835 source "arch/arm/mach-berlin/Kconfig"
 836
 837 source "arch/arm/mach-clps711x/Kconfig"
 838
 839 source "arch/arm/mach-cns3xxx/Kconfig"
 840
 841 source "arch/arm/mach-davinci/Kconfig"
 842
 843 source "arch/arm/mach-digicolor/Kconfig"
 844
 845 source "arch/arm/mach-dove/Kconfig"
 846
 847 source "arch/arm/mach-ep93xx/Kconfig"
 848
 849 source "arch/arm/mach-footbridge/Kconfig"
 850
 851 source "arch/arm/mach-gemini/Kconfig"
 852
 853 source "arch/arm/mach-highbank/Kconfig"
 854
 855 source "arch/arm/mach-hisi/Kconfig"
 856
 857 source "arch/arm/mach-integrator/Kconfig"
 858
 859 source "arch/arm/mach-iop32x/Kconfig"
 860
 861 source "arch/arm/mach-iop33x/Kconfig"
 862
 863 source "arch/arm/mach-iop13xx/Kconfig"
 864
 865 source "arch/arm/mach-ixp4xx/Kconfig"
 866
 867 source "arch/arm/mach-keystone/Kconfig"
 868
 869 source "arch/arm/mach-ks8695/Kconfig"
 870
 871 source "arch/arm/mach-meson/Kconfig"
 872
 873 source "arch/arm/mach-moxart/Kconfig"
 874
 875 source "arch/arm/mach-mv78xx0/Kconfig"
 876
 877 source "arch/arm/mach-imx/Kconfig"
 878
 879 source "arch/arm/mach-mediatek/Kconfig"
 880
 881 source "arch/arm/mach-mxs/Kconfig"
 882
 883 source "arch/arm/mach-netx/Kconfig"
 884
 885 source "arch/arm/mach-nomadik/Kconfig"
 886
 887 source "arch/arm/mach-nspire/Kconfig"
 888
 889 source "arch/arm/plat-omap/Kconfig"
 890
 891 source "arch/arm/mach-omap1/Kconfig"
 892
 893 source "arch/arm/mach-omap2/Kconfig"
 894
 895 source "arch/arm/mach-orion5x/Kconfig"
 896
 897 source "arch/arm/mach-picoxcell/Kconfig"
 898
 899 source "arch/arm/mach-pxa/Kconfig"
 900 source "arch/arm/plat-pxa/Kconfig"
 901
 902 source "arch/arm/mach-mmp/Kconfig"
 903
 904 source "arch/arm/mach-qcom/Kconfig"
 905
 906 source "arch/arm/mach-realview/Kconfig"
 907
 908 source "arch/arm/mach-rockchip/Kconfig"
 909
 910 source "arch/arm/mach-sa1100/Kconfig"
 911
 912 source "arch/arm/mach-socfpga/Kconfig"
 913
 914 source "arch/arm/mach-spear/Kconfig"
 915
 916 source "arch/arm/mach-sti/Kconfig"
 917
 918 source "arch/arm/mach-s3c24xx/Kconfig"
 919
 920 source "arch/arm/mach-s3c64xx/Kconfig"
 921
 922 source "arch/arm/mach-s5pv210/Kconfig"
 923
 924 source "arch/arm/mach-exynos/Kconfig"
 925 source "arch/arm/plat-samsung/Kconfig"
 926
 927 source "arch/arm/mach-shmobile/Kconfig"
 928
 929 source "arch/arm/mach-sunxi/Kconfig"
 930
 931 source "arch/arm/mach-prima2/Kconfig"
 932
 933 source "arch/arm/mach-tegra/Kconfig"
 934
 935 source "arch/arm/mach-u300/Kconfig"
 936
 937 source "arch/arm/mach-uniphier/Kconfig"
 938
 939 source "arch/arm/mach-ux500/Kconfig"
 940
 941 source "arch/arm/mach-versatile/Kconfig"
 942
 943 source "arch/arm/mach-vexpress/Kconfig"
 944 source "arch/arm/plat-versatile/Kconfig"
 945
 946 source "arch/arm/mach-vt8500/Kconfig"
 947
 948 source "arch/arm/mach-w90x900/Kconfig"
 949
 950 source "arch/arm/mach-zx/Kconfig"
 951
 952 source "arch/arm/mach-zynq/Kconfig"
 953
 954 # ARMv7-M architecture
 955 config ARCH_EFM32
 956         bool "Energy Micro efm32"
 957         depends on ARM_SINGLE_ARMV7M
 958         select ARCH_REQUIRE_GPIOLIB
 959         help
 960           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
 961           processors.
 962
 963 config ARCH_LPC18XX
 964         bool "NXP LPC18xx/LPC43xx"
 965         depends on ARM_SINGLE_ARMV7M
 966         select ARCH_HAS_RESET_CONTROLLER
 967         select ARM_AMBA
 968         select CLKSRC_LPC32XX
 969         select PINCTRL
 970         help
 971           Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
 972           high performance microcontrollers.
 973
 974 config ARCH_STM32
 975         bool "STMicrolectronics STM32"
 976         depends on ARM_SINGLE_ARMV7M
 977         select ARCH_HAS_RESET_CONTROLLER
 978         select ARMV7M_SYSTICK
 979         select CLKSRC_STM32
 980         select RESET_CONTROLLER
 981         help
 982           Support for STMicroelectronics STM32 processors.
 983
 984 # Definitions to make life easier
 985 config ARCH_ACORN
 986         bool
 987
 988 config PLAT_IOP
 989         bool
 990         select GENERIC_CLOCKEVENTS
 991
 992 config PLAT_ORION
 993         bool
 994         select CLKSRC_MMIO
 995         select COMMON_CLK
 996         select GENERIC_IRQ_CHIP
 997         select IRQ_DOMAIN
 998
 999 config PLAT_ORION_LEGACY
1000         bool
1001         select PLAT_ORION
1002
1003 config PLAT_PXA
1004         bool
1005
1006 config PLAT_VERSATILE
1007         bool
1008
1009 source "arch/arm/firmware/Kconfig"
1010
1011 source arch/arm/mm/Kconfig
1012
1013 config IWMMXT
1014         bool "Enable iWMMXt support"
1015         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1016         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1017         help
1018           Enable support for iWMMXt context switching at run time if
1019           running on a CPU that supports it.
1020
1021 config MULTI_IRQ_HANDLER
1022         bool
1023         help
1024           Allow each machine to specify it's own IRQ handler at run time.
1025
1026 if !MMU
1027 source "arch/arm/Kconfig-nommu"
1028 endif
1029
1030 config PJ4B_ERRATA_4742
1031         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1032         depends on CPU_PJ4B && MACH_ARMADA_370
1033         default y
1034         help
1035           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1036           Event (WFE) IDLE states, a specific timing sensitivity exists between
1037           the retiring WFI/WFE instructions and the newly issued subsequent
1038           instructions.  This sensitivity can result in a CPU hang scenario.
1039           Workaround:
1040           The software must insert either a Data Synchronization Barrier (DSB)
1041           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1042           instruction
1043
1044 config ARM_ERRATA_326103
1045         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1046         depends on CPU_V6
1047         help
1048           Executing a SWP instruction to read-only memory does not set bit 11
1049           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1050           treat the access as a read, preventing a COW from occurring and
1051           causing the faulting task to livelock.
1052
1053 config ARM_ERRATA_411920
1054         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1055         depends on CPU_V6 || CPU_V6K
1056         help
1057           Invalidation of the Instruction Cache operation can
1058           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1059           It does not affect the MPCore. This option enables the ARM Ltd.
1060           recommended workaround.
1061
1062 config ARM_ERRATA_430973
1063         bool "ARM errata: Stale prediction on replaced interworking branch"
1064         depends on CPU_V7
1065         help
1066           This option enables the workaround for the 430973 Cortex-A8
1067           r1p* erratum. If a code sequence containing an ARM/Thumb
1068           interworking branch is replaced with another code sequence at the
1069           same virtual address, whether due to self-modifying code or virtual
1070           to physical address re-mapping, Cortex-A8 does not recover from the
1071           stale interworking branch prediction. This results in Cortex-A8
1072           executing the new code sequence in the incorrect ARM or Thumb state.
1073           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1074           and also flushes the branch target cache at every context switch.
1075           Note that setting specific bits in the ACTLR register may not be
1076           available in non-secure mode.
1077
1078 config ARM_ERRATA_458693
1079         bool "ARM errata: Processor deadlock when a false hazard is created"
1080         depends on CPU_V7
1081         depends on !ARCH_MULTIPLATFORM
1082         help
1083           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1084           erratum. For very specific sequences of memory operations, it is
1085           possible for a hazard condition intended for a cache line to instead
1086           be incorrectly associated with a different cache line. This false
1087           hazard might then cause a processor deadlock. The workaround enables
1088           the L1 caching of the NEON accesses and disables the PLD instruction
1089           in the ACTLR register. Note that setting specific bits in the ACTLR
1090           register may not be available in non-secure mode.
1091
1092 config ARM_ERRATA_460075
1093         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1094         depends on CPU_V7
1095         depends on !ARCH_MULTIPLATFORM
1096         help
1097           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1098           erratum. Any asynchronous access to the L2 cache may encounter a
1099           situation in which recent store transactions to the L2 cache are lost
1100           and overwritten with stale memory contents from external memory. The
1101           workaround disables the write-allocate mode for the L2 cache via the
1102           ACTLR register. Note that setting specific bits in the ACTLR register
1103           may not be available in non-secure mode.
1104
1105 config ARM_ERRATA_742230
1106         bool "ARM errata: DMB operation may be faulty"
1107         depends on CPU_V7 && SMP
1108         depends on !ARCH_MULTIPLATFORM
1109         help
1110           This option enables the workaround for the 742230 Cortex-A9
1111           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1112           between two write operations may not ensure the correct visibility
1113           ordering of the two writes. This workaround sets a specific bit in
1114           the diagnostic register of the Cortex-A9 which causes the DMB
1115           instruction to behave as a DSB, ensuring the correct behaviour of
1116           the two writes.
1117
1118 config ARM_ERRATA_742231
1119         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1120         depends on CPU_V7 && SMP
1121         depends on !ARCH_MULTIPLATFORM
1122         help
1123           This option enables the workaround for the 742231 Cortex-A9
1124           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1125           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1126           accessing some data located in the same cache line, may get corrupted
1127           data due to bad handling of the address hazard when the line gets
1128           replaced from one of the CPUs at the same time as another CPU is
1129           accessing it. This workaround sets specific bits in the diagnostic
1130           register of the Cortex-A9 which reduces the linefill issuing
1131           capabilities of the processor.
1132
1133 config ARM_ERRATA_643719
1134         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1135         depends on CPU_V7 && SMP
1136         default y
1137         help
1138           This option enables the workaround for the 643719 Cortex-A9 (prior to
1139           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1140           register returns zero when it should return one. The workaround
1141           corrects this value, ensuring cache maintenance operations which use
1142           it behave as intended and avoiding data corruption.
1143
1144 config ARM_ERRATA_720789
1145         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1146         depends on CPU_V7
1147         help
1148           This option enables the workaround for the 720789 Cortex-A9 (prior to
1149           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1150           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1151           As a consequence of this erratum, some TLB entries which should be
1152           invalidated are not, resulting in an incoherency in the system page
1153           tables. The workaround changes the TLB flushing routines to invalidate
1154           entries regardless of the ASID.
1155
1156 config ARM_ERRATA_743622
1157         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1158         depends on CPU_V7
1159         depends on !ARCH_MULTIPLATFORM
1160         help
1161           This option enables the workaround for the 743622 Cortex-A9
1162           (r2p*) erratum. Under very rare conditions, a faulty
1163           optimisation in the Cortex-A9 Store Buffer may lead to data
1164           corruption. This workaround sets a specific bit in the diagnostic
1165           register of the Cortex-A9 which disables the Store Buffer
1166           optimisation, preventing the defect from occurring. This has no
1167           visible impact on the overall performance or power consumption of the
1168           processor.
1169
1170 config ARM_ERRATA_751472
1171         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1172         depends on CPU_V7
1173         depends on !ARCH_MULTIPLATFORM
1174         help
1175           This option enables the workaround for the 751472 Cortex-A9 (prior
1176           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1177           completion of a following broadcasted operation if the second
1178           operation is received by a CPU before the ICIALLUIS has completed,
1179           potentially leading to corrupted entries in the cache or TLB.
1180
1181 config ARM_ERRATA_754322
1182         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1183         depends on CPU_V7
1184         help
1185           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1186           r3p*) erratum. A speculative memory access may cause a page table walk
1187           which starts prior to an ASID switch but completes afterwards. This
1188           can populate the micro-TLB with a stale entry which may be hit with
1189           the new ASID. This workaround places two dsb instructions in the mm
1190           switching code so that no page table walks can cross the ASID switch.
1191
1192 config ARM_ERRATA_754327
1193         bool "ARM errata: no automatic Store Buffer drain"
1194         depends on CPU_V7 && SMP
1195         help
1196           This option enables the workaround for the 754327 Cortex-A9 (prior to
1197           r2p0) erratum. The Store Buffer does not have any automatic draining
1198           mechanism and therefore a livelock may occur if an external agent
1199           continuously polls a memory location waiting to observe an update.
1200           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1201           written polling loops from denying visibility of updates to memory.
1202
1203 config ARM_ERRATA_364296
1204         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1205         depends on CPU_V6
1206         help
1207           This options enables the workaround for the 364296 ARM1136
1208           r0p2 erratum (possible cache data corruption with
1209           hit-under-miss enabled). It sets the undocumented bit 31 in
1210           the auxiliary control register and the FI bit in the control
1211           register, thus disabling hit-under-miss without putting the
1212           processor into full low interrupt latency mode. ARM11MPCore
1213           is not affected.
1214
1215 config ARM_ERRATA_764369
1216         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1217         depends on CPU_V7 && SMP
1218         help
1219           This option enables the workaround for erratum 764369
1220           affecting Cortex-A9 MPCore with two or more processors (all
1221           current revisions). Under certain timing circumstances, a data
1222           cache line maintenance operation by MVA targeting an Inner
1223           Shareable memory region may fail to proceed up to either the
1224           Point of Coherency or to the Point of Unification of the
1225           system. This workaround adds a DSB instruction before the
1226           relevant cache maintenance functions and sets a specific bit
1227           in the diagnostic control register of the SCU.
1228
1229 config ARM_ERRATA_775420
1230        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1231        depends on CPU_V7
1232        help
1233          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1234          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1235          operation aborts with MMU exception, it might cause the processor
1236          to deadlock. This workaround puts DSB before executing ISB if
1237          an abort may occur on cache maintenance.
1238
1239 config ARM_ERRATA_798181
1240         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1241         depends on CPU_V7 && SMP
1242         help
1243           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1244           adequately shooting down all use of the old entries. This
1245           option enables the Linux kernel workaround for this erratum
1246           which sends an IPI to the CPUs that are running the same ASID
1247           as the one being invalidated.
1248
1249 config ARM_ERRATA_773022
1250         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1251         depends on CPU_V7
1252         help
1253           This option enables the workaround for the 773022 Cortex-A15
1254           (up to r0p4) erratum. In certain rare sequences of code, the
1255           loop buffer may deliver incorrect instructions. This
1256           workaround disables the loop buffer to avoid the erratum.
1257
1258 endmenu
1259
1260 source "arch/arm/common/Kconfig"
1261
1262 menu "Bus support"
1263
1264 config ISA
1265         bool
1266         help
1267           Find out whether you have ISA slots on your motherboard.  ISA is the
1268           name of a bus system, i.e. the way the CPU talks to the other stuff
1269           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1270           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1271           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1272
1273 # Select ISA DMA controller support
1274 config ISA_DMA
1275         bool
1276         select ISA_DMA_API
1277
1278 # Select ISA DMA interface
1279 config ISA_DMA_API
1280         bool
1281
1282 config PCI
1283         bool "PCI support" if MIGHT_HAVE_PCI
1284         help
1285           Find out whether you have a PCI motherboard. PCI is the name of a
1286           bus system, i.e. the way the CPU talks to the other stuff inside
1287           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1288           VESA. If you have PCI, say Y, otherwise N.
1289
1290 config PCI_DOMAINS
1291         bool
1292         depends on PCI
1293
1294 config PCI_DOMAINS_GENERIC
1295         def_bool PCI_DOMAINS
1296
1297 config PCI_NANOENGINE
1298         bool "BSE nanoEngine PCI support"
1299         depends on SA1100_NANOENGINE
1300         help
1301           Enable PCI on the BSE nanoEngine board.
1302
1303 config PCI_SYSCALL
1304         def_bool PCI
1305
1306 config PCI_HOST_ITE8152
1307         bool
1308         depends on PCI && MACH_ARMCORE
1309         default y
1310         select DMABOUNCE
1311
1312 source "drivers/pci/Kconfig"
1313 source "drivers/pci/pcie/Kconfig"
1314
1315 source "drivers/pcmcia/Kconfig"
1316
1317 endmenu
1318
1319 menu "Kernel Features"
1320
1321 config HAVE_SMP
1322         bool
1323         help
1324           This option should be selected by machines which have an SMP-
1325           capable CPU.
1326
1327           The only effect of this option is to make the SMP-related
1328           options available to the user for configuration.
1329
1330 config SMP
1331         bool "Symmetric Multi-Processing"
1332         depends on CPU_V6K || CPU_V7
1333         depends on GENERIC_CLOCKEVENTS
1334         depends on HAVE_SMP
1335         depends on MMU || ARM_MPU
1336         select IRQ_WORK
1337         help
1338           This enables support for systems with more than one CPU. If you have
1339           a system with only one CPU, say N. If you have a system with more
1340           than one CPU, say Y.
1341
1342           If you say N here, the kernel will run on uni- and multiprocessor
1343           machines, but will use only one CPU of a multiprocessor machine. If
1344           you say Y here, the kernel will run on many, but not all,
1345           uniprocessor machines. On a uniprocessor machine, the kernel
1346           will run faster if you say N here.
1347
1348           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1349           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1350           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1351
1352           If you don't know what to do here, say N.
1353
1354 config SMP_ON_UP
1355         bool "Allow booting SMP kernel on uniprocessor systems"
1356         depends on SMP && !XIP_KERNEL && MMU
1357         default y
1358         help
1359           SMP kernels contain instructions which fail on non-SMP processors.
1360           Enabling this option allows the kernel to modify itself to make
1361           these instructions safe.  Disabling it allows about 1K of space
1362           savings.
1363
1364           If you don't know what to do here, say Y.
1365
1366 config ARM_CPU_TOPOLOGY
1367         bool "Support cpu topology definition"
1368         depends on SMP && CPU_V7
1369         default y
1370         help
1371           Support ARM cpu topology definition. The MPIDR register defines
1372           affinity between processors which is then used to describe the cpu
1373           topology of an ARM System.
1374
1375 config SCHED_MC
1376         bool "Multi-core scheduler support"
1377         depends on ARM_CPU_TOPOLOGY
1378         help
1379           Multi-core scheduler support improves the CPU scheduler's decision
1380           making when dealing with multi-core CPU chips at a cost of slightly
1381           increased overhead in some places. If unsure say N here.
1382
1383 config SCHED_SMT
1384         bool "SMT scheduler support"
1385         depends on ARM_CPU_TOPOLOGY
1386         help
1387           Improves the CPU scheduler's decision making when dealing with
1388           MultiThreading at a cost of slightly increased overhead in some
1389           places. If unsure say N here.
1390
1391 config HAVE_ARM_SCU
1392         bool
1393         help
1394           This option enables support for the ARM system coherency unit
1395
1396 config HAVE_ARM_ARCH_TIMER
1397         bool "Architected timer support"
1398         depends on CPU_V7
1399         select ARM_ARCH_TIMER
1400         select GENERIC_CLOCKEVENTS
1401         help
1402           This option enables support for the ARM architected timer
1403
1404 config HAVE_ARM_TWD
1405         bool
1406         select CLKSRC_OF if OF
1407         help
1408           This options enables support for the ARM timer and watchdog unit
1409
1410 config MCPM
1411         bool "Multi-Cluster Power Management"
1412         depends on CPU_V7 && SMP
1413         help
1414           This option provides the common power management infrastructure
1415           for (multi-)cluster based systems, such as big.LITTLE based
1416           systems.
1417
1418 config MCPM_QUAD_CLUSTER
1419         bool
1420         depends on MCPM
1421         help
1422           To avoid wasting resources unnecessarily, MCPM only supports up
1423           to 2 clusters by default.
1424           Platforms with 3 or 4 clusters that use MCPM must select this
1425           option to allow the additional clusters to be managed.
1426
1427 config BIG_LITTLE
1428         bool "big.LITTLE support (Experimental)"
1429         depends on CPU_V7 && SMP
1430         select MCPM
1431         help
1432           This option enables support selections for the big.LITTLE
1433           system architecture.
1434
1435 config BL_SWITCHER
1436         bool "big.LITTLE switcher support"
1437         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
1438         select ARM_CPU_SUSPEND
1439         select CPU_PM
1440         help
1441           The big.LITTLE "switcher" provides the core functionality to
1442           transparently handle transition between a cluster of A15's
1443           and a cluster of A7's in a big.LITTLE system.
1444
1445 config BL_SWITCHER_DUMMY_IF
1446         tristate "Simple big.LITTLE switcher user interface"
1447         depends on BL_SWITCHER && DEBUG_KERNEL
1448         help
1449           This is a simple and dummy char dev interface to control
1450           the big.LITTLE switcher core code.  It is meant for
1451           debugging purposes only.
1452
1453 choice
1454         prompt "Memory split"
1455         depends on MMU
1456         default VMSPLIT_3G
1457         help
1458           Select the desired split between kernel and user memory.
1459
1460           If you are not absolutely sure what you are doing, leave this
1461           option alone!
1462
1463         config VMSPLIT_3G
1464                 bool "3G/1G user/kernel split"
1465         config VMSPLIT_3G_OPT
1466                 bool "3G/1G user/kernel split (for full 1G low memory)"
1467         config VMSPLIT_2G
1468                 bool "2G/2G user/kernel split"
1469         config VMSPLIT_1G
1470                 bool "1G/3G user/kernel split"
1471 endchoice
1472
1473 config PAGE_OFFSET
1474         hex
1475         default PHYS_OFFSET if !MMU
1476         default 0x40000000 if VMSPLIT_1G
1477         default 0x80000000 if VMSPLIT_2G
1478         default 0xB0000000 if VMSPLIT_3G_OPT
1479         default 0xC0000000
1480
1481 config NR_CPUS
1482         int "Maximum number of CPUs (2-32)"
1483         range 2 32
1484         depends on SMP
1485         default "4"
1486
1487 config HOTPLUG_CPU
1488         bool "Support for hot-pluggable CPUs"
1489         depends on SMP
1490         help
1491           Say Y here to experiment with turning CPUs off and on.  CPUs
1492           can be controlled through /sys/devices/system/cpu.
1493
1494 config ARM_PSCI
1495         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1496         depends on HAVE_ARM_SMCCC
1497         select ARM_PSCI_FW
1498         help
1499           Say Y here if you want Linux to communicate with system firmware
1500           implementing the PSCI specification for CPU-centric power
1501           management operations described in ARM document number ARM DEN
1502           0022A ("Power State Coordination Interface System Software on
1503           ARM processors").
1504
1505 # The GPIO number here must be sorted by descending number. In case of
1506 # a multiplatform kernel, we just want the highest value required by the
1507 # selected platforms.
1508 config ARCH_NR_GPIO
1509         int
1510         default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
1511                 ARCH_ZYNQ
1512         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1513                 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
1514         default 416 if ARCH_SUNXI
1515         default 392 if ARCH_U8500
1516         default 352 if ARCH_VT8500
1517         default 288 if ARCH_ROCKCHIP
1518         default 264 if MACH_H4700
1519         default 0
1520         help
1521           Maximum number of GPIOs in the system.
1522
1523           If unsure, leave the default value.
1524
1525 source kernel/Kconfig.preempt
1526
1527 config HZ_FIXED
1528         int
1529         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1530                 ARCH_S5PV210 || ARCH_EXYNOS4
1531         default 128 if SOC_AT91RM9200
1532         default 0
1533
1534 choice
1535         depends on HZ_FIXED = 0
1536         prompt "Timer frequency"
1537
1538 config HZ_100
1539         bool "100 Hz"
1540
1541 config HZ_200
1542         bool "200 Hz"
1543
1544 config HZ_250
1545         bool "250 Hz"
1546
1547 config HZ_300
1548         bool "300 Hz"
1549
1550 config HZ_500
1551         bool "500 Hz"
1552
1553 config HZ_1000
1554         bool "1000 Hz"
1555
1556 endchoice
1557
1558 config HZ
1559         int
1560         default HZ_FIXED if HZ_FIXED != 0
1561         default 100 if HZ_100
1562         default 200 if HZ_200
1563         default 250 if HZ_250
1564         default 300 if HZ_300
1565         default 500 if HZ_500
1566         default 1000
1567
1568 config SCHED_HRTICK
1569         def_bool HIGH_RES_TIMERS
1570
1571 config THUMB2_KERNEL
1572         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1573         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1574         default y if CPU_THUMBONLY
1575         select AEABI
1576         select ARM_ASM_UNIFIED
1577         select ARM_UNWIND
1578         help
1579           By enabling this option, the kernel will be compiled in
1580           Thumb-2 mode. A compiler/assembler that understand the unified
1581           ARM-Thumb syntax is needed.
1582
1583           If unsure, say N.
1584
1585 config THUMB2_AVOID_R_ARM_THM_JUMP11
1586         bool "Work around buggy Thumb-2 short branch relocations in gas"
1587         depends on THUMB2_KERNEL && MODULES
1588         default y
1589         help
1590           Various binutils versions can resolve Thumb-2 branches to
1591           locally-defined, preemptible global symbols as short-range "b.n"
1592           branch instructions.
1593
1594           This is a problem, because there's no guarantee the final
1595           destination of the symbol, or any candidate locations for a
1596           trampoline, are within range of the branch.  For this reason, the
1597           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1598           relocation in modules at all, and it makes little sense to add
1599           support.
1600
1601           The symptom is that the kernel fails with an "unsupported
1602           relocation" error when loading some modules.
1603
1604           Until fixed tools are available, passing
1605           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1606           code which hits this problem, at the cost of a bit of extra runtime
1607           stack usage in some cases.
1608
1609           The problem is described in more detail at:
1610               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1611
1612           Only Thumb-2 kernels are affected.
1613
1614           Unless you are sure your tools don't have this problem, say Y.
1615
1616 config ARM_ASM_UNIFIED
1617         bool
1618
1619 config ARM_PATCH_IDIV
1620         bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
1621         depends on CPU_32v7 && !XIP_KERNEL
1622         default y
1623         help
1624           The ARM compiler inserts calls to __aeabi_idiv() and
1625           __aeabi_uidiv() when it needs to perform division on signed
1626           and unsigned integers. Some v7 CPUs have support for the sdiv
1627           and udiv instructions that can be used to implement those
1628           functions.
1629
1630           Enabling this option allows the kernel to modify itself to
1631           replace the first two instructions of these library functions
1632           with the sdiv or udiv plus "bx lr" instructions when the CPU
1633           it is running on supports them. Typically this will be faster
1634           and less power intensive than running the original library
1635           code to do integer division.
1636
1637 config AEABI
1638         bool "Use the ARM EABI to compile the kernel"
1639         help
1640           This option allows for the kernel to be compiled using the latest
1641           ARM ABI (aka EABI).  This is only useful if you are using a user
1642           space environment that is also compiled with EABI.
1643
1644           Since there are major incompatibilities between the legacy ABI and
1645           EABI, especially with regard to structure member alignment, this
1646           option also changes the kernel syscall calling convention to
1647           disambiguate both ABIs and allow for backward compatibility support
1648           (selected with CONFIG_OABI_COMPAT).
1649
1650           To use this you need GCC version 4.0.0 or later.
1651
1652 config OABI_COMPAT
1653         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1654         depends on AEABI && !THUMB2_KERNEL
1655         help
1656           This option preserves the old syscall interface along with the
1657           new (ARM EABI) one. It also provides a compatibility layer to
1658           intercept syscalls that have structure arguments which layout
1659           in memory differs between the legacy ABI and the new ARM EABI
1660           (only for non "thumb" binaries). This option adds a tiny
1661           overhead to all syscalls and produces a slightly larger kernel.
1662
1663           The seccomp filter system will not be available when this is
1664           selected, since there is no way yet to sensibly distinguish
1665           between calling conventions during filtering.
1666
1667           If you know you'll be using only pure EABI user space then you
1668           can say N here. If this option is not selected and you attempt
1669           to execute a legacy ABI binary then the result will be
1670           UNPREDICTABLE (in fact it can be predicted that it won't work
1671           at all). If in doubt say N.
1672
1673 config ARCH_HAS_HOLES_MEMORYMODEL
1674         bool
1675
1676 config ARCH_SPARSEMEM_ENABLE
1677         bool
1678
1679 config ARCH_SPARSEMEM_DEFAULT
1680         def_bool ARCH_SPARSEMEM_ENABLE
1681
1682 config ARCH_SELECT_MEMORY_MODEL
1683         def_bool ARCH_SPARSEMEM_ENABLE
1684
1685 config HAVE_ARCH_PFN_VALID
1686         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1687
1688 config HAVE_GENERIC_RCU_GUP
1689         def_bool y
1690         depends on ARM_LPAE
1691
1692 config HIGHMEM
1693         bool "High Memory Support"
1694         depends on MMU
1695         help
1696           The address space of ARM processors is only 4 Gigabytes large
1697           and it has to accommodate user address space, kernel address
1698           space as well as some memory mapped IO. That means that, if you
1699           have a large amount of physical memory and/or IO, not all of the
1700           memory can be "permanently mapped" by the kernel. The physical
1701           memory that is not permanently mapped is called "high memory".
1702
1703           Depending on the selected kernel/user memory split, minimum
1704           vmalloc space and actual amount of RAM, you may not need this
1705           option which should result in a slightly faster kernel.
1706
1707           If unsure, say n.
1708
1709 config HIGHPTE
1710         bool "Allocate 2nd-level pagetables from highmem" if EXPERT
1711         depends on HIGHMEM
1712         default y
1713         help
1714           The VM uses one page of physical memory for each page table.
1715           For systems with a lot of processes, this can use a lot of
1716           precious low memory, eventually leading to low memory being
1717           consumed by page tables.  Setting this option will allow
1718           user-space 2nd level page tables to reside in high memory.
1719
1720 config CPU_SW_DOMAIN_PAN
1721         bool "Enable use of CPU domains to implement privileged no-access"
1722         depends on MMU && !ARM_LPAE
1723         default y
1724         help
1725           Increase kernel security by ensuring that normal kernel accesses
1726           are unable to access userspace addresses.  This can help prevent
1727           use-after-free bugs becoming an exploitable privilege escalation
1728           by ensuring that magic values (such as LIST_POISON) will always
1729           fault when dereferenced.
1730
1731           CPUs with low-vector mappings use a best-efforts implementation.
1732           Their lower 1MB needs to remain accessible for the vectors, but
1733           the remainder of userspace will become appropriately inaccessible.
1734
1735 config HW_PERF_EVENTS
1736         def_bool y
1737         depends on ARM_PMU
1738
1739 config SYS_SUPPORTS_HUGETLBFS
1740        def_bool y
1741        depends on ARM_LPAE
1742
1743 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1744        def_bool y
1745        depends on ARM_LPAE
1746
1747 config ARCH_WANT_GENERAL_HUGETLB
1748         def_bool y
1749
1750 config ARM_MODULE_PLTS
1751         bool "Use PLTs to allow module memory to spill over into vmalloc area"
1752         depends on MODULES
1753         help
1754           Allocate PLTs when loading modules so that jumps and calls whose
1755           targets are too far away for their relative offsets to be encoded
1756           in the instructions themselves can be bounced via veneers in the
1757           module's PLT. This allows modules to be allocated in the generic
1758           vmalloc area after the dedicated module memory area has been
1759           exhausted. The modules will use slightly more memory, but after
1760           rounding up to page size, the actual memory footprint is usually
1761           the same.
1762
1763           Say y if you are getting out of memory errors while loading modules
1764
1765 source "mm/Kconfig"
1766
1767 config FORCE_MAX_ZONEORDER
1768         int "Maximum zone order"
1769         default "12" if SOC_AM33XX
1770         default "9" if SA1111 || ARCH_EFM32
1771         default "11"
1772         help
1773           The kernel memory allocator divides physically contiguous memory
1774           blocks into "zones", where each zone is a power of two number of
1775           pages.  This option selects the largest power of two that the kernel
1776           keeps in the memory allocator.  If you need to allocate very large
1777           blocks of physically contiguous memory, then you may need to
1778           increase this value.
1779
1780           This config option is actually maximum order plus one. For example,
1781           a value of 11 means that the largest free memory block is 2^10 pages.
1782
1783 config ALIGNMENT_TRAP
1784         bool
1785         depends on CPU_CP15_MMU
1786         default y if !ARCH_EBSA110
1787         select HAVE_PROC_CPU if PROC_FS
1788         help
1789           ARM processors cannot fetch/store information which is not
1790           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1791           address divisible by 4. On 32-bit ARM processors, these non-aligned
1792           fetch/store instructions will be emulated in software if you say
1793           here, which has a severe performance impact. This is necessary for
1794           correct operation of some network protocols. With an IP-only
1795           configuration it is safe to say N, otherwise say Y.
1796
1797 config UACCESS_WITH_MEMCPY
1798         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1799         depends on MMU
1800         default y if CPU_FEROCEON
1801         help
1802           Implement faster copy_to_user and clear_user methods for CPU
1803           cores where a 8-word STM instruction give significantly higher
1804           memory write throughput than a sequence of individual 32bit stores.
1805
1806           A possible side effect is a slight increase in scheduling latency
1807           between threads sharing the same address space if they invoke
1808           such copy operations with large buffers.
1809
1810           However, if the CPU data cache is using a write-allocate mode,
1811           this option is unlikely to provide any performance gain.
1812
1813 config SECCOMP
1814         bool
1815         prompt "Enable seccomp to safely compute untrusted bytecode"
1816         ---help---
1817           This kernel feature is useful for number crunching applications
1818           that may need to compute untrusted bytecode during their
1819           execution. By using pipes or other transports made available to
1820           the process as file descriptors supporting the read/write
1821           syscalls, it's possible to isolate those applications in
1822           their own address space using seccomp. Once seccomp is
1823           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1824           and the task is only allowed to execute a few safe syscalls
1825           defined by each seccomp mode.
1826
1827 config SWIOTLB
1828         def_bool y
1829
1830 config IOMMU_HELPER
1831         def_bool SWIOTLB
1832
1833 config PARAVIRT
1834         bool "Enable paravirtualization code"
1835         help
1836           This changes the kernel so it can modify itself when it is run
1837           under a hypervisor, potentially improving performance significantly
1838           over full virtualization.
1839
1840 config PARAVIRT_TIME_ACCOUNTING
1841         bool "Paravirtual steal time accounting"
1842         select PARAVIRT
1843         default n
1844         help
1845           Select this option to enable fine granularity task steal time
1846           accounting. Time spent executing other tasks in parallel with
1847           the current vCPU is discounted from the vCPU power. To account for
1848           that, there can be a small performance impact.
1849
1850           If in doubt, say N here.
1851
1852 config XEN_DOM0
1853         def_bool y
1854         depends on XEN
1855
1856 config XEN
1857         bool "Xen guest support on ARM"
1858         depends on ARM && AEABI && OF
1859         depends on CPU_V7 && !CPU_V6
1860         depends on !GENERIC_ATOMIC64
1861         depends on MMU
1862         select ARCH_DMA_ADDR_T_64BIT
1863         select ARM_PSCI
1864         select SWIOTLB_XEN
1865         select PARAVIRT
1866         help
1867           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1868
1869 endmenu
1870
1871 menu "Boot options"
1872
1873 config USE_OF
1874         bool "Flattened Device Tree support"
1875         select IRQ_DOMAIN
1876         select OF
1877         help
1878           Include support for flattened device tree machine descriptions.
1879
1880 config ATAGS
1881         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1882         default y
1883         help
1884           This is the traditional way of passing data to the kernel at boot
1885           time. If you are solely relying on the flattened device tree (or
1886           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1887           to remove ATAGS support from your kernel binary.  If unsure,
1888           leave this to y.
1889
1890 config DEPRECATED_PARAM_STRUCT
1891         bool "Provide old way to pass kernel parameters"
1892         depends on ATAGS
1893         help
1894           This was deprecated in 2001 and announced to live on for 5 years.
1895           Some old boot loaders still use this way.
1896
1897 # Compressed boot loader in ROM.  Yes, we really want to ask about
1898 # TEXT and BSS so we preserve their values in the config files.
1899 config ZBOOT_ROM_TEXT
1900         hex "Compressed ROM boot loader base address"
1901         default "0"
1902         help
1903           The physical address at which the ROM-able zImage is to be
1904           placed in the target.  Platforms which normally make use of
1905           ROM-able zImage formats normally set this to a suitable
1906           value in their defconfig file.
1907
1908           If ZBOOT_ROM is not enabled, this has no effect.
1909
1910 config ZBOOT_ROM_BSS
1911         hex "Compressed ROM boot loader BSS address"
1912         default "0"
1913         help
1914           The base address of an area of read/write memory in the target
1915           for the ROM-able zImage which must be available while the
1916           decompressor is running. It must be large enough to hold the
1917           entire decompressed kernel plus an additional 128 KiB.
1918           Platforms which normally make use of ROM-able zImage formats
1919           normally set this to a suitable value in their defconfig file.
1920
1921           If ZBOOT_ROM is not enabled, this has no effect.
1922
1923 config ZBOOT_ROM
1924         bool "Compressed boot loader in ROM/flash"
1925         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1926         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1927         help
1928           Say Y here if you intend to execute your compressed kernel image
1929           (zImage) directly from ROM or flash.  If unsure, say N.
1930
1931 config ARM_APPENDED_DTB
1932         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1933         depends on OF
1934         help
1935           With this option, the boot code will look for a device tree binary
1936           (DTB) appended to zImage
1937           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1938
1939           This is meant as a backward compatibility convenience for those
1940           systems with a bootloader that can't be upgraded to accommodate
1941           the documented boot protocol using a device tree.
1942
1943           Beware that there is very little in terms of protection against
1944           this option being confused by leftover garbage in memory that might
1945           look like a DTB header after a reboot if no actual DTB is appended
1946           to zImage.  Do not leave this option active in a production kernel
1947           if you don't intend to always append a DTB.  Proper passing of the
1948           location into r2 of a bootloader provided DTB is always preferable
1949           to this option.
1950
1951 config ARM_ATAG_DTB_COMPAT
1952         bool "Supplement the appended DTB with traditional ATAG information"
1953         depends on ARM_APPENDED_DTB
1954         help
1955           Some old bootloaders can't be updated to a DTB capable one, yet
1956           they provide ATAGs with memory configuration, the ramdisk address,
1957           the kernel cmdline string, etc.  Such information is dynamically
1958           provided by the bootloader and can't always be stored in a static
1959           DTB.  To allow a device tree enabled kernel to be used with such
1960           bootloaders, this option allows zImage to extract the information
1961           from the ATAG list and store it at run time into the appended DTB.
1962
1963 choice
1964         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1965         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1966
1967 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1968         bool "Use bootloader kernel arguments if available"
1969         help
1970           Uses the command-line options passed by the boot loader instead of
1971           the device tree bootargs property. If the boot loader doesn't provide
1972           any, the device tree bootargs property will be used.
1973
1974 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1975         bool "Extend with bootloader kernel arguments"
1976         help
1977           The command-line arguments provided by the boot loader will be
1978           appended to the the device tree bootargs property.
1979
1980 endchoice
1981
1982 config CMDLINE
1983         string "Default kernel command string"
1984         default ""
1985         help
1986           On some architectures (EBSA110 and CATS), there is currently no way
1987           for the boot loader to pass arguments to the kernel. For these
1988           architectures, you should supply some command-line options at build
1989           time by entering them here. As a minimum, you should specify the
1990           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1991
1992 choice
1993         prompt "Kernel command line type" if CMDLINE != ""
1994         default CMDLINE_FROM_BOOTLOADER
1995         depends on ATAGS
1996
1997 config CMDLINE_FROM_BOOTLOADER
1998         bool "Use bootloader kernel arguments if available"
1999         help
2000           Uses the command-line options passed by the boot loader. If
2001           the boot loader doesn't provide any, the default kernel command
2002           string provided in CMDLINE will be used.
2003
2004 config CMDLINE_EXTEND
2005         bool "Extend bootloader kernel arguments"
2006         help
2007           The command-line arguments provided by the boot loader will be
2008           appended to the default kernel command string.
2009
2010 config CMDLINE_FORCE
2011         bool "Always use the default kernel command string"
2012         help
2013           Always use the default kernel command string, even if the boot
2014           loader passes other arguments to the kernel.
2015           This is useful if you cannot or don't want to change the
2016           command-line options your boot loader passes to the kernel.
2017 endchoice
2018
2019 config XIP_KERNEL
2020         bool "Kernel Execute-In-Place from ROM"
2021         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
2022         help
2023           Execute-In-Place allows the kernel to run from non-volatile storage
2024           directly addressable by the CPU, such as NOR flash. This saves RAM
2025           space since the text section of the kernel is not loaded from flash
2026           to RAM.  Read-write sections, such as the data section and stack,
2027           are still copied to RAM.  The XIP kernel is not compressed since
2028           it has to run directly from flash, so it will take more space to
2029           store it.  The flash address used to link the kernel object files,
2030           and for storing it, is configuration dependent. Therefore, if you
2031           say Y here, you must know the proper physical address where to
2032           store the kernel image depending on your own flash memory usage.
2033
2034           Also note that the make target becomes "make xipImage" rather than
2035           "make zImage" or "make Image".  The final kernel binary to put in
2036           ROM memory will be arch/arm/boot/xipImage.
2037
2038           If unsure, say N.
2039
2040 config XIP_PHYS_ADDR
2041         hex "XIP Kernel Physical Location"
2042         depends on XIP_KERNEL
2043         default "0x00080000"
2044         help
2045           This is the physical address in your flash memory the kernel will
2046           be linked for and stored to.  This address is dependent on your
2047           own flash usage.
2048
2049 config KEXEC
2050         bool "Kexec system call (EXPERIMENTAL)"
2051         depends on (!SMP || PM_SLEEP_SMP)
2052         depends on !CPU_V7M
2053         select KEXEC_CORE
2054         help
2055           kexec is a system call that implements the ability to shutdown your
2056           current kernel, and to start another kernel.  It is like a reboot
2057           but it is independent of the system firmware.   And like a reboot
2058           you can start any kernel with it, not just Linux.
2059
2060           It is an ongoing process to be certain the hardware in a machine
2061           is properly shutdown, so do not be surprised if this code does not
2062           initially work for you.
2063
2064 config ATAGS_PROC
2065         bool "Export atags in procfs"
2066         depends on ATAGS && KEXEC
2067         default y
2068         help
2069           Should the atags used to boot the kernel be exported in an "atags"
2070           file in procfs. Useful with kexec.
2071
2072 config CRASH_DUMP
2073         bool "Build kdump crash kernel (EXPERIMENTAL)"
2074         help
2075           Generate crash dump after being started by kexec. This should
2076           be normally only set in special crash dump kernels which are
2077           loaded in the main kernel with kexec-tools into a specially
2078           reserved region and then later executed after a crash by
2079           kdump/kexec. The crash dump kernel must be compiled to a
2080           memory address not used by the main kernel
2081
2082           For more details see Documentation/kdump/kdump.txt
2083
2084 config AUTO_ZRELADDR
2085         bool "Auto calculation of the decompressed kernel image address"
2086         help
2087           ZRELADDR is the physical address where the decompressed kernel
2088           image will be placed. If AUTO_ZRELADDR is selected, the address
2089           will be determined at run-time by masking the current IP with
2090           0xf8000000. This assumes the zImage being placed in the first 128MB
2091           from start of memory.
2092
2093 config EFI_STUB
2094         bool
2095
2096 config EFI
2097         bool "UEFI runtime support"
2098         depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
2099         select UCS2_STRING
2100         select EFI_PARAMS_FROM_FDT
2101         select EFI_STUB
2102         select EFI_ARMSTUB
2103         select EFI_RUNTIME_WRAPPERS
2104         ---help---
2105           This option provides support for runtime services provided
2106           by UEFI firmware (such as non-volatile variables, realtime
2107           clock, and platform reset). A UEFI stub is also provided to
2108           allow the kernel to be booted as an EFI application. This
2109           is only useful for kernels that may run on systems that have
2110           UEFI firmware.
2111
2112 endmenu
2113
2114 menu "CPU Power Management"
2115
2116 source "drivers/cpufreq/Kconfig"
2117
2118 source "drivers/cpuidle/Kconfig"
2119
2120 endmenu
2121
2122 menu "Floating point emulation"
2123
2124 comment "At least one emulation must be selected"
2125
2126 config FPE_NWFPE
2127         bool "NWFPE math emulation"
2128         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2129         ---help---
2130           Say Y to include the NWFPE floating point emulator in the kernel.
2131           This is necessary to run most binaries. Linux does not currently
2132           support floating point hardware so you need to say Y here even if
2133           your machine has an FPA or floating point co-processor podule.
2134
2135           You may say N here if you are going to load the Acorn FPEmulator
2136           early in the bootup.
2137
2138 config FPE_NWFPE_XP
2139         bool "Support extended precision"
2140         depends on FPE_NWFPE
2141         help
2142           Say Y to include 80-bit support in the kernel floating-point
2143           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2144           Note that gcc does not generate 80-bit operations by default,
2145           so in most cases this option only enlarges the size of the
2146           floating point emulator without any good reason.
2147
2148           You almost surely want to say N here.
2149
2150 config FPE_FASTFPE
2151         bool "FastFPE math emulation (EXPERIMENTAL)"
2152         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2153         ---help---
2154           Say Y here to include the FAST floating point emulator in the kernel.
2155           This is an experimental much faster emulator which now also has full
2156           precision for the mantissa.  It does not support any exceptions.
2157           It is very simple, and approximately 3-6 times faster than NWFPE.
2158
2159           It should be sufficient for most programs.  It may be not suitable
2160           for scientific calculations, but you have to check this for yourself.
2161           If you do not feel you need a faster FP emulation you should better
2162           choose NWFPE.
2163
2164 config VFP
2165         bool "VFP-format floating point maths"
2166         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2167         help
2168           Say Y to include VFP support code in the kernel. This is needed
2169           if your hardware includes a VFP unit.
2170
2171           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2172           release notes and additional status information.
2173
2174           Say N if your target does not have VFP hardware.
2175
2176 config VFPv3
2177         bool
2178         depends on VFP
2179         default y if CPU_V7
2180
2181 config NEON
2182         bool "Advanced SIMD (NEON) Extension support"
2183         depends on VFPv3 && CPU_V7
2184         help
2185           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2186           Extension.
2187
2188 config KERNEL_MODE_NEON
2189         bool "Support for NEON in kernel mode"
2190         depends on NEON && AEABI
2191         help
2192           Say Y to include support for NEON in kernel mode.
2193
2194 endmenu
2195
2196 menu "Userspace binary formats"
2197
2198 source "fs/Kconfig.binfmt"
2199
2200 endmenu
2201
2202 menu "Power management options"
2203
2204 source "kernel/power/Kconfig"
2205
2206 config ARCH_SUSPEND_POSSIBLE
2207         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2208                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2209         def_bool y
2210
2211 config ARM_CPU_SUSPEND
2212         def_bool PM_SLEEP
2213
2214 config ARCH_HIBERNATION_POSSIBLE
2215         bool
2216         depends on MMU
2217         default y if ARCH_SUSPEND_POSSIBLE
2218
2219 endmenu
2220
2221 source "net/Kconfig"
2222
2223 source "drivers/Kconfig"
2224
2225 source "drivers/firmware/Kconfig"
2226
2227 source "fs/Kconfig"
2228
2229 source "arch/arm/Kconfig.debug"
2230
2231 source "security/Kconfig"
2232
2233 source "crypto/Kconfig"
2234 if CRYPTO
2235 source "arch/arm/crypto/Kconfig"
2236 endif
2237
2238 source "lib/Kconfig"
2239
2240 source "arch/arm/kvm/Kconfig"