arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  20         select HAVE_GENERIC_DMA_COHERENT
  21         select HAVE_KERNEL_GZIP
  22         select HAVE_KERNEL_LZO
  23         select HAVE_KERNEL_LZMA
  24         select HAVE_IRQ_WORK
  25         select HAVE_PERF_EVENTS
  26         select PERF_USE_VMALLOC
  27         select HAVE_REGS_AND_STACK_ACCESS_API
  28         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  29         select HAVE_C_RECORDMCOUNT
  30         select HAVE_GENERIC_HARDIRQS
  31         select HAVE_SPARSE_IRQ
  32         select GENERIC_IRQ_SHOW
  33         select CPU_PM if (SUSPEND || CPU_IDLE)
  34         select GENERIC_PCI_IOMAP
  35         help
  36           The ARM series is a line of low-power-consumption RISC chip designs
  37           licensed by ARM Ltd and targeted at embedded applications and
  38           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  39           manufactured, but legacy ARM-based PC hardware remains popular in
  40           Europe.  There is an ARM Linux project with a web page at
  41           <http://www.arm.linux.org.uk/>.
  42
  43 config ARM_HAS_SG_CHAIN
  44         bool
  45
  46 config HAVE_PWM
  47         bool
  48
  49 config MIGHT_HAVE_PCI
  50         bool
  51
  52 config SYS_SUPPORTS_APM_EMULATION
  53         bool
  54
  55 config HAVE_SCHED_CLOCK
  56         bool
  57
  58 config GENERIC_GPIO
  59         bool
  60
  61 config ARCH_USES_GETTIMEOFFSET
  62         bool
  63         default n
  64
  65 config GENERIC_CLOCKEVENTS
  66         bool
  67
  68 config GENERIC_CLOCKEVENTS_BROADCAST
  69         bool
  70         depends on GENERIC_CLOCKEVENTS
  71         default y if SMP
  72
  73 config KTIME_SCALAR
  74         bool
  75         default y
  76
  77 config HAVE_TCM
  78         bool
  79         select GENERIC_ALLOCATOR
  80
  81 config HAVE_PROC_CPU
  82         bool
  83
  84 config NO_IOPORT
  85         bool
  86
  87 config EISA
  88         bool
  89         ---help---
  90           The Extended Industry Standard Architecture (EISA) bus was
  91           developed as an open alternative to the IBM MicroChannel bus.
  92
  93           The EISA bus provided some of the features of the IBM MicroChannel
  94           bus while maintaining backward compatibility with cards made for
  95           the older ISA bus.  The EISA bus saw limited use between 1988 and
  96           1995 when it was made obsolete by the PCI bus.
  97
  98           Say Y here if you are building a kernel for an EISA-based machine.
  99
 100           Otherwise, say N.
 101
 102 config SBUS
 103         bool
 104
 105 config MCA
 106         bool
 107         help
 108           MicroChannel Architecture is found in some IBM PS/2 machines and
 109           laptops.  It is a bus system similar to PCI or ISA. See
 110           <file:Documentation/mca.txt> (and especially the web page given
 111           there) before attempting to build an MCA bus kernel.
 112
 113 config STACKTRACE_SUPPORT
 114         bool
 115         default y
 116
 117 config HAVE_LATENCYTOP_SUPPORT
 118         bool
 119         depends on !SMP
 120         default y
 121
 122 config LOCKDEP_SUPPORT
 123         bool
 124         default y
 125
 126 config TRACE_IRQFLAGS_SUPPORT
 127         bool
 128         default y
 129
 130 config HARDIRQS_SW_RESEND
 131         bool
 132         default y
 133
 134 config GENERIC_IRQ_PROBE
 135         bool
 136         default y
 137
 138 config GENERIC_LOCKBREAK
 139         bool
 140         default y
 141         depends on SMP && PREEMPT
 142
 143 config RWSEM_GENERIC_SPINLOCK
 144         bool
 145         default y
 146
 147 config RWSEM_XCHGADD_ALGORITHM
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U32
 151         bool
 152
 153 config ARCH_HAS_ILOG2_U64
 154         bool
 155
 156 config ARCH_HAS_CPUFREQ
 157         bool
 158         help
 159           Internal node to signify that the ARCH has CPUFREQ support
 160           and that the relevant menu configurations are displayed for
 161           it.
 162
 163 config ARCH_HAS_CPU_IDLE_WAIT
 164        def_bool y
 165
 166 config GENERIC_HWEIGHT
 167         bool
 168         default y
 169
 170 config GENERIC_CALIBRATE_DELAY
 171         bool
 172         default y
 173
 174 config ARCH_MAY_HAVE_PC_FDC
 175         bool
 176
 177 config ZONE_DMA
 178         bool
 179
 180 config NEED_DMA_MAP_STATE
 181        def_bool y
 182
 183 config GENERIC_ISA_DMA
 184         bool
 185
 186 config FIQ
 187         bool
 188
 189 config ARCH_MTD_XIP
 190         bool
 191
 192 config VECTORS_BASE
 193         hex
 194         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 195         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 196         default 0x00000000
 197         help
 198           The base address of exception vectors.
 199
 200 config ARM_PATCH_PHYS_VIRT
 201         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 202         default y
 203         depends on !XIP_KERNEL && MMU
 204         depends on !ARCH_REALVIEW || !SPARSEMEM
 205         help
 206           Patch phys-to-virt and virt-to-phys translation functions at
 207           boot and module load time according to the position of the
 208           kernel in system memory.
 209
 210           This can only be used with non-XIP MMU kernels where the base
 211           of physical memory is at a 16MB boundary.
 212
 213           Only disable this option if you know that you do not require
 214           this feature (eg, building a kernel for a single machine) and
 215           you need to shrink the kernel to the minimal size.
 216
 217 config NEED_MACH_MEMORY_H
 218         bool
 219         help
 220           Select this when mach/memory.h is required to provide special
 221           definitions for this platform.  The need for mach/memory.h should
 222           be avoided when possible.
 223
 224 config PHYS_OFFSET
 225         hex "Physical address of main memory" if MMU
 226         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 227         default DRAM_BASE if !MMU
 228         help
 229           Please provide the physical address corresponding to the
 230           location of main memory in your system.
 231
 232 config GENERIC_BUG
 233         def_bool y
 234         depends on BUG
 235
 236 source "init/Kconfig"
 237
 238 source "kernel/Kconfig.freezer"
 239
 240 menu "System Type"
 241
 242 config MMU
 243         bool "MMU-based Paged Memory Management Support"
 244         default y
 245         help
 246           Select if you want MMU-based virtualised addressing space
 247           support by paged memory management. If unsure, say 'Y'.
 248
 249 #
 250 # The "ARM system type" choice list is ordered alphabetically by option
 251 # text.  Please add new entries in the option alphabetic order.
 252 #
 253 choice
 254         prompt "ARM system type"
 255         default ARCH_VERSATILE
 256
 257 config ARCH_INTEGRATOR
 258         bool "ARM Ltd. Integrator family"
 259         select ARM_AMBA
 260         select ARCH_HAS_CPUFREQ
 261         select CLKDEV_LOOKUP
 262         select HAVE_MACH_CLKDEV
 263         select HAVE_TCM
 264         select ICST
 265         select GENERIC_CLOCKEVENTS
 266         select PLAT_VERSATILE
 267         select PLAT_VERSATILE_FPGA_IRQ
 268         select NEED_MACH_MEMORY_H
 269         help
 270           Support for ARM's Integrator platform.
 271
 272 config ARCH_REALVIEW
 273         bool "ARM Ltd. RealView family"
 274         select ARM_AMBA
 275         select CLKDEV_LOOKUP
 276         select HAVE_MACH_CLKDEV
 277         select ICST
 278         select GENERIC_CLOCKEVENTS
 279         select ARCH_WANT_OPTIONAL_GPIOLIB
 280         select PLAT_VERSATILE
 281         select PLAT_VERSATILE_CLCD
 282         select ARM_TIMER_SP804
 283         select GPIO_PL061 if GPIOLIB
 284         select NEED_MACH_MEMORY_H
 285         help
 286           This enables support for ARM Ltd RealView boards.
 287
 288 config ARCH_VERSATILE
 289         bool "ARM Ltd. Versatile family"
 290         select ARM_AMBA
 291         select ARM_VIC
 292         select CLKDEV_LOOKUP
 293         select HAVE_MACH_CLKDEV
 294         select ICST
 295         select GENERIC_CLOCKEVENTS
 296         select ARCH_WANT_OPTIONAL_GPIOLIB
 297         select PLAT_VERSATILE
 298         select PLAT_VERSATILE_CLCD
 299         select PLAT_VERSATILE_FPGA_IRQ
 300         select ARM_TIMER_SP804
 301         help
 302           This enables support for ARM Ltd Versatile board.
 303
 304 config ARCH_VEXPRESS
 305         bool "ARM Ltd. Versatile Express family"
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select HAVE_MACH_CLKDEV
 311         select GENERIC_CLOCKEVENTS
 312         select HAVE_CLK
 313         select HAVE_PATA_PLATFORM
 314         select ICST
 315         select PLAT_VERSATILE
 316         select PLAT_VERSATILE_CLCD
 317         help
 318           This enables support for the ARM Ltd Versatile Express boards.
 319
 320 config ARCH_AT91
 321         bool "Atmel AT91"
 322         select ARCH_REQUIRE_GPIOLIB
 323         select HAVE_CLK
 324         select CLKDEV_LOOKUP
 325         help
 326           This enables support for systems based on the Atmel AT91RM9200,
 327           AT91SAM9 and AT91CAP9 processors.
 328
 329 config ARCH_BCMRING
 330         bool "Broadcom BCMRING"
 331         depends on MMU
 332         select CPU_V6
 333         select ARM_AMBA
 334         select ARM_TIMER_SP804
 335         select CLKDEV_LOOKUP
 336         select GENERIC_CLOCKEVENTS
 337         select ARCH_WANT_OPTIONAL_GPIOLIB
 338         help
 339           Support for Broadcom's BCMRing platform.
 340
 341 config ARCH_HIGHBANK
 342         bool "Calxeda Highbank-based"
 343         select ARCH_WANT_OPTIONAL_GPIOLIB
 344         select ARM_AMBA
 345         select ARM_GIC
 346         select ARM_TIMER_SP804
 347         select CACHE_L2X0
 348         select CLKDEV_LOOKUP
 349         select CPU_V7
 350         select GENERIC_CLOCKEVENTS
 351         select HAVE_ARM_SCU
 352         select HAVE_SMP
 353         select USE_OF
 354         help
 355           Support for the Calxeda Highbank SoC based boards.
 356
 357 config ARCH_CLPS711X
 358         bool "Cirrus Logic CLPS711x/EP721x-based"
 359         select CPU_ARM720T
 360         select ARCH_USES_GETTIMEOFFSET
 361         select NEED_MACH_MEMORY_H
 362         help
 363           Support for Cirrus Logic 711x/721x based boards.
 364
 365 config ARCH_CNS3XXX
 366         bool "Cavium Networks CNS3XXX family"
 367         select CPU_V6K
 368         select GENERIC_CLOCKEVENTS
 369         select ARM_GIC
 370         select MIGHT_HAVE_CACHE_L2X0
 371         select MIGHT_HAVE_PCI
 372         select PCI_DOMAINS if PCI
 373         help
 374           Support for Cavium Networks CNS3XXX platform.
 375
 376 config ARCH_GEMINI
 377         bool "Cortina Systems Gemini"
 378         select CPU_FA526
 379         select ARCH_REQUIRE_GPIOLIB
 380         select ARCH_USES_GETTIMEOFFSET
 381         help
 382           Support for the Cortina Systems Gemini family SoCs
 383
 384 config ARCH_PRIMA2
 385         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 386         select CPU_V7
 387         select NO_IOPORT
 388         select GENERIC_CLOCKEVENTS
 389         select CLKDEV_LOOKUP
 390         select GENERIC_IRQ_CHIP
 391         select MIGHT_HAVE_CACHE_L2X0
 392         select USE_OF
 393         select ZONE_DMA
 394         help
 395           Support for CSR SiRFSoC ARM Cortex A9 Platform
 396
 397 config ARCH_EBSA110
 398         bool "EBSA-110"
 399         select CPU_SA110
 400         select ISA
 401         select NO_IOPORT
 402         select ARCH_USES_GETTIMEOFFSET
 403         select NEED_MACH_MEMORY_H
 404         help
 405           This is an evaluation board for the StrongARM processor available
 406           from Digital. It has limited hardware on-board, including an
 407           Ethernet interface, two PCMCIA sockets, two serial ports and a
 408           parallel port.
 409
 410 config ARCH_EP93XX
 411         bool "EP93xx-based"
 412         select CPU_ARM920T
 413         select ARM_AMBA
 414         select ARM_VIC
 415         select CLKDEV_LOOKUP
 416         select ARCH_REQUIRE_GPIOLIB
 417         select ARCH_HAS_HOLES_MEMORYMODEL
 418         select ARCH_USES_GETTIMEOFFSET
 419         select NEED_MACH_MEMORY_H
 420         help
 421           This enables support for the Cirrus EP93xx series of CPUs.
 422
 423 config ARCH_FOOTBRIDGE
 424         bool "FootBridge"
 425         select CPU_SA110
 426         select FOOTBRIDGE
 427         select GENERIC_CLOCKEVENTS
 428         select HAVE_IDE
 429         select NEED_MACH_MEMORY_H
 430         help
 431           Support for systems based on the DC21285 companion chip
 432           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 433
 434 config ARCH_MXC
 435         bool "Freescale MXC/iMX-based"
 436         select GENERIC_CLOCKEVENTS
 437         select ARCH_REQUIRE_GPIOLIB
 438         select CLKDEV_LOOKUP
 439         select CLKSRC_MMIO
 440         select GENERIC_IRQ_CHIP
 441         select HAVE_SCHED_CLOCK
 442         select MULTI_IRQ_HANDLER
 443         help
 444           Support for Freescale MXC/iMX-based family of processors
 445
 446 config ARCH_MXS
 447         bool "Freescale MXS-based"
 448         select GENERIC_CLOCKEVENTS
 449         select ARCH_REQUIRE_GPIOLIB
 450         select CLKDEV_LOOKUP
 451         select CLKSRC_MMIO
 452         select HAVE_CLK_PREPARE
 453         help
 454           Support for Freescale MXS-based family of processors
 455
 456 config ARCH_NETX
 457         bool "Hilscher NetX based"
 458         select CLKSRC_MMIO
 459         select CPU_ARM926T
 460         select ARM_VIC
 461         select GENERIC_CLOCKEVENTS
 462         help
 463           This enables support for systems based on the Hilscher NetX Soc
 464
 465 config ARCH_H720X
 466         bool "Hynix HMS720x-based"
 467         select CPU_ARM720T
 468         select ISA_DMA_API
 469         select ARCH_USES_GETTIMEOFFSET
 470         help
 471           This enables support for systems based on the Hynix HMS720x
 472
 473 config ARCH_IOP13XX
 474         bool "IOP13xx-based"
 475         depends on MMU
 476         select CPU_XSC3
 477         select PLAT_IOP
 478         select PCI
 479         select ARCH_SUPPORTS_MSI
 480         select VMSPLIT_1G
 481         select NEED_MACH_MEMORY_H
 482         help
 483           Support for Intel's IOP13XX (XScale) family of processors.
 484
 485 config ARCH_IOP32X
 486         bool "IOP32x-based"
 487         depends on MMU
 488         select CPU_XSCALE
 489         select PLAT_IOP
 490         select PCI
 491         select ARCH_REQUIRE_GPIOLIB
 492         help
 493           Support for Intel's 80219 and IOP32X (XScale) family of
 494           processors.
 495
 496 config ARCH_IOP33X
 497         bool "IOP33x-based"
 498         depends on MMU
 499         select CPU_XSCALE
 500         select PLAT_IOP
 501         select PCI
 502         select ARCH_REQUIRE_GPIOLIB
 503         help
 504           Support for Intel's IOP33X (XScale) family of processors.
 505
 506 config ARCH_IXP23XX
 507         bool "IXP23XX-based"
 508         depends on MMU
 509         select CPU_XSC3
 510         select PCI
 511         select ARCH_USES_GETTIMEOFFSET
 512         select NEED_MACH_MEMORY_H
 513         help
 514           Support for Intel's IXP23xx (XScale) family of processors.
 515
 516 config ARCH_IXP2000
 517         bool "IXP2400/2800-based"
 518         depends on MMU
 519         select CPU_XSCALE
 520         select PCI
 521         select ARCH_USES_GETTIMEOFFSET
 522         select NEED_MACH_MEMORY_H
 523         help
 524           Support for Intel's IXP2400/2800 (XScale) family of processors.
 525
 526 config ARCH_IXP4XX
 527         bool "IXP4xx-based"
 528         depends on MMU
 529         select CLKSRC_MMIO
 530         select CPU_XSCALE
 531         select GENERIC_GPIO
 532         select GENERIC_CLOCKEVENTS
 533         select HAVE_SCHED_CLOCK
 534         select MIGHT_HAVE_PCI
 535         select DMABOUNCE if PCI
 536         help
 537           Support for Intel's IXP4XX (XScale) family of processors.
 538
 539 config ARCH_DOVE
 540         bool "Marvell Dove"
 541         select CPU_V7
 542         select PCI
 543         select ARCH_REQUIRE_GPIOLIB
 544         select GENERIC_CLOCKEVENTS
 545         select PLAT_ORION
 546         help
 547           Support for the Marvell Dove SoC 88AP510
 548
 549 config ARCH_KIRKWOOD
 550         bool "Marvell Kirkwood"
 551         select CPU_FEROCEON
 552         select PCI
 553         select ARCH_REQUIRE_GPIOLIB
 554         select GENERIC_CLOCKEVENTS
 555         select PLAT_ORION
 556         help
 557           Support for the following Marvell Kirkwood series SoCs:
 558           88F6180, 88F6192 and 88F6281.
 559
 560 config ARCH_LPC32XX
 561         bool "NXP LPC32XX"
 562         select CLKSRC_MMIO
 563         select CPU_ARM926T
 564         select ARCH_REQUIRE_GPIOLIB
 565         select HAVE_IDE
 566         select ARM_AMBA
 567         select USB_ARCH_HAS_OHCI
 568         select CLKDEV_LOOKUP
 569         select GENERIC_CLOCKEVENTS
 570         help
 571           Support for the NXP LPC32XX family of processors
 572
 573 config ARCH_MV78XX0
 574         bool "Marvell MV78xx0"
 575         select CPU_FEROCEON
 576         select PCI
 577         select ARCH_REQUIRE_GPIOLIB
 578         select GENERIC_CLOCKEVENTS
 579         select PLAT_ORION
 580         help
 581           Support for the following Marvell MV78xx0 series SoCs:
 582           MV781x0, MV782x0.
 583
 584 config ARCH_ORION5X
 585         bool "Marvell Orion"
 586         depends on MMU
 587         select CPU_FEROCEON
 588         select PCI
 589         select ARCH_REQUIRE_GPIOLIB
 590         select GENERIC_CLOCKEVENTS
 591         select PLAT_ORION
 592         help
 593           Support for the following Marvell Orion 5x series SoCs:
 594           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 595           Orion-2 (5281), Orion-1-90 (6183).
 596
 597 config ARCH_MMP
 598         bool "Marvell PXA168/910/MMP2"
 599         depends on MMU
 600         select ARCH_REQUIRE_GPIOLIB
 601         select CLKDEV_LOOKUP
 602         select GENERIC_CLOCKEVENTS
 603         select GPIO_PXA
 604         select HAVE_SCHED_CLOCK
 605         select TICK_ONESHOT
 606         select PLAT_PXA
 607         select SPARSE_IRQ
 608         select GENERIC_ALLOCATOR
 609         help
 610           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 611
 612 config ARCH_KS8695
 613         bool "Micrel/Kendin KS8695"
 614         select CPU_ARM922T
 615         select ARCH_REQUIRE_GPIOLIB
 616         select ARCH_USES_GETTIMEOFFSET
 617         select NEED_MACH_MEMORY_H
 618         help
 619           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 620           System-on-Chip devices.
 621
 622 config ARCH_W90X900
 623         bool "Nuvoton W90X900 CPU"
 624         select CPU_ARM926T
 625         select ARCH_REQUIRE_GPIOLIB
 626         select CLKDEV_LOOKUP
 627         select CLKSRC_MMIO
 628         select GENERIC_CLOCKEVENTS
 629         help
 630           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 631           At present, the w90x900 has been renamed nuc900, regarding
 632           the ARM series product line, you can login the following
 633           link address to know more.
 634
 635           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 636                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 637
 638 config ARCH_TEGRA
 639         bool "NVIDIA Tegra"
 640         select CLKDEV_LOOKUP
 641         select CLKSRC_MMIO
 642         select GENERIC_CLOCKEVENTS
 643         select GENERIC_GPIO
 644         select HAVE_CLK
 645         select HAVE_SCHED_CLOCK
 646         select HAVE_SMP
 647         select MIGHT_HAVE_CACHE_L2X0
 648         select ARCH_HAS_CPUFREQ
 649         help
 650           This enables support for NVIDIA Tegra based systems (Tegra APX,
 651           Tegra 6xx and Tegra 2 series).
 652
 653 config ARCH_PICOXCELL
 654         bool "Picochip picoXcell"
 655         select ARCH_REQUIRE_GPIOLIB
 656         select ARM_PATCH_PHYS_VIRT
 657         select ARM_VIC
 658         select CPU_V6K
 659         select DW_APB_TIMER
 660         select GENERIC_CLOCKEVENTS
 661         select GENERIC_GPIO
 662         select HAVE_SCHED_CLOCK
 663         select HAVE_TCM
 664         select NO_IOPORT
 665         select SPARSE_IRQ
 666         select USE_OF
 667         help
 668           This enables support for systems based on the Picochip picoXcell
 669           family of Femtocell devices.  The picoxcell support requires device tree
 670           for all boards.
 671
 672 config ARCH_PNX4008
 673         bool "Philips Nexperia PNX4008 Mobile"
 674         select CPU_ARM926T
 675         select CLKDEV_LOOKUP
 676         select ARCH_USES_GETTIMEOFFSET
 677         help
 678           This enables support for Philips PNX4008 mobile platform.
 679
 680 config ARCH_PXA
 681         bool "PXA2xx/PXA3xx-based"
 682         depends on MMU
 683         select ARCH_MTD_XIP
 684         select ARCH_HAS_CPUFREQ
 685         select CLKDEV_LOOKUP
 686         select CLKSRC_MMIO
 687         select ARCH_REQUIRE_GPIOLIB
 688         select GENERIC_CLOCKEVENTS
 689         select GPIO_PXA
 690         select HAVE_SCHED_CLOCK
 691         select TICK_ONESHOT
 692         select PLAT_PXA
 693         select SPARSE_IRQ
 694         select AUTO_ZRELADDR
 695         select MULTI_IRQ_HANDLER
 696         select ARM_CPU_SUSPEND if PM
 697         select HAVE_IDE
 698         help
 699           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 700
 701 config ARCH_MSM
 702         bool "Qualcomm MSM"
 703         select HAVE_CLK
 704         select GENERIC_CLOCKEVENTS
 705         select ARCH_REQUIRE_GPIOLIB
 706         select CLKDEV_LOOKUP
 707         help
 708           Support for Qualcomm MSM/QSD based systems.  This runs on the
 709           apps processor of the MSM/QSD and depends on a shared memory
 710           interface to the modem processor which runs the baseband
 711           stack and controls some vital subsystems
 712           (clock and power control, etc).
 713
 714 config ARCH_SHMOBILE
 715         bool "Renesas SH-Mobile / R-Mobile"
 716         select HAVE_CLK
 717         select CLKDEV_LOOKUP
 718         select HAVE_MACH_CLKDEV
 719         select HAVE_SMP
 720         select GENERIC_CLOCKEVENTS
 721         select MIGHT_HAVE_CACHE_L2X0
 722         select NO_IOPORT
 723         select SPARSE_IRQ
 724         select MULTI_IRQ_HANDLER
 725         select PM_GENERIC_DOMAINS if PM
 726         select NEED_MACH_MEMORY_H
 727         help
 728           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 729
 730 config ARCH_RPC
 731         bool "RiscPC"
 732         select ARCH_ACORN
 733         select FIQ
 734         select TIMER_ACORN
 735         select ARCH_MAY_HAVE_PC_FDC
 736         select HAVE_PATA_PLATFORM
 737         select ISA_DMA_API
 738         select NO_IOPORT
 739         select ARCH_SPARSEMEM_ENABLE
 740         select ARCH_USES_GETTIMEOFFSET
 741         select HAVE_IDE
 742         select NEED_MACH_MEMORY_H
 743         help
 744           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 745           CD-ROM interface, serial and parallel port, and the floppy drive.
 746
 747 config ARCH_SA1100
 748         bool "SA1100-based"
 749         select CLKSRC_MMIO
 750         select CPU_SA1100
 751         select ISA
 752         select ARCH_SPARSEMEM_ENABLE
 753         select ARCH_MTD_XIP
 754         select ARCH_HAS_CPUFREQ
 755         select CPU_FREQ
 756         select GENERIC_CLOCKEVENTS
 757         select CLKDEV_LOOKUP
 758         select HAVE_SCHED_CLOCK
 759         select TICK_ONESHOT
 760         select ARCH_REQUIRE_GPIOLIB
 761         select HAVE_IDE
 762         select NEED_MACH_MEMORY_H
 763         help
 764           Support for StrongARM 11x0 based boards.
 765
 766 config ARCH_S3C2410
 767         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 768         select GENERIC_GPIO
 769         select ARCH_HAS_CPUFREQ
 770         select HAVE_CLK
 771         select CLKDEV_LOOKUP
 772         select ARCH_USES_GETTIMEOFFSET
 773         select HAVE_S3C2410_I2C if I2C
 774         help
 775           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 776           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 777           the Samsung SMDK2410 development board (and derivatives).
 778
 779           Note, the S3C2416 and the S3C2450 are so close that they even share
 780           the same SoC ID code. This means that there is no separate machine
 781           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 782
 783 config ARCH_S3C64XX
 784         bool "Samsung S3C64XX"
 785         select PLAT_SAMSUNG
 786         select CPU_V6
 787         select ARM_VIC
 788         select HAVE_CLK
 789         select HAVE_TCM
 790         select CLKDEV_LOOKUP
 791         select NO_IOPORT
 792         select ARCH_USES_GETTIMEOFFSET
 793         select ARCH_HAS_CPUFREQ
 794         select ARCH_REQUIRE_GPIOLIB
 795         select SAMSUNG_CLKSRC
 796         select SAMSUNG_IRQ_VIC_TIMER
 797         select S3C_GPIO_TRACK
 798         select S3C_DEV_NAND
 799         select USB_ARCH_HAS_OHCI
 800         select SAMSUNG_GPIOLIB_4BIT
 801         select HAVE_S3C2410_I2C if I2C
 802         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 803         help
 804           Samsung S3C64XX series based systems
 805
 806 config ARCH_S5P64X0
 807         bool "Samsung S5P6440 S5P6450"
 808         select CPU_V6
 809         select GENERIC_GPIO
 810         select HAVE_CLK
 811         select CLKDEV_LOOKUP
 812         select CLKSRC_MMIO
 813         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 814         select GENERIC_CLOCKEVENTS
 815         select HAVE_SCHED_CLOCK
 816         select HAVE_S3C2410_I2C if I2C
 817         select HAVE_S3C_RTC if RTC_CLASS
 818         help
 819           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 820           SMDK6450.
 821
 822 config ARCH_S5PC100
 823         bool "Samsung S5PC100"
 824         select GENERIC_GPIO
 825         select HAVE_CLK
 826         select CLKDEV_LOOKUP
 827         select CPU_V7
 828         select ARM_L1_CACHE_SHIFT_6
 829         select ARCH_USES_GETTIMEOFFSET
 830         select HAVE_S3C2410_I2C if I2C
 831         select HAVE_S3C_RTC if RTC_CLASS
 832         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 833         help
 834           Samsung S5PC100 series based systems
 835
 836 config ARCH_S5PV210
 837         bool "Samsung S5PV210/S5PC110"
 838         select CPU_V7
 839         select ARCH_SPARSEMEM_ENABLE
 840         select ARCH_HAS_HOLES_MEMORYMODEL
 841         select GENERIC_GPIO
 842         select HAVE_CLK
 843         select CLKDEV_LOOKUP
 844         select CLKSRC_MMIO
 845         select ARM_L1_CACHE_SHIFT_6
 846         select ARCH_HAS_CPUFREQ
 847         select GENERIC_CLOCKEVENTS
 848         select HAVE_SCHED_CLOCK
 849         select HAVE_S3C2410_I2C if I2C
 850         select HAVE_S3C_RTC if RTC_CLASS
 851         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 852         select NEED_MACH_MEMORY_H
 853         help
 854           Samsung S5PV210/S5PC110 series based systems
 855
 856 config ARCH_EXYNOS
 857         bool "SAMSUNG EXYNOS"
 858         select CPU_V7
 859         select ARCH_SPARSEMEM_ENABLE
 860         select ARCH_HAS_HOLES_MEMORYMODEL
 861         select GENERIC_GPIO
 862         select HAVE_CLK
 863         select CLKDEV_LOOKUP
 864         select ARCH_HAS_CPUFREQ
 865         select GENERIC_CLOCKEVENTS
 866         select HAVE_S3C_RTC if RTC_CLASS
 867         select HAVE_S3C2410_I2C if I2C
 868         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 869         select NEED_MACH_MEMORY_H
 870         help
 871           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 872
 873 config ARCH_SHARK
 874         bool "Shark"
 875         select CPU_SA110
 876         select ISA
 877         select ISA_DMA
 878         select ZONE_DMA
 879         select PCI
 880         select ARCH_USES_GETTIMEOFFSET
 881         select NEED_MACH_MEMORY_H
 882         help
 883           Support for the StrongARM based Digital DNARD machine, also known
 884           as "Shark" (<http://www.shark-linux.de/shark.html>).
 885
 886 config ARCH_U300
 887         bool "ST-Ericsson U300 Series"
 888         depends on MMU
 889         select CLKSRC_MMIO
 890         select CPU_ARM926T
 891         select HAVE_SCHED_CLOCK
 892         select HAVE_TCM
 893         select ARM_AMBA
 894         select ARM_PATCH_PHYS_VIRT
 895         select ARM_VIC
 896         select GENERIC_CLOCKEVENTS
 897         select CLKDEV_LOOKUP
 898         select HAVE_MACH_CLKDEV
 899         select GENERIC_GPIO
 900         select ARCH_REQUIRE_GPIOLIB
 901         help
 902           Support for ST-Ericsson U300 series mobile platforms.
 903
 904 config ARCH_U8500
 905         bool "ST-Ericsson U8500 Series"
 906         select CPU_V7
 907         select ARM_AMBA
 908         select GENERIC_CLOCKEVENTS
 909         select CLKDEV_LOOKUP
 910         select ARCH_REQUIRE_GPIOLIB
 911         select ARCH_HAS_CPUFREQ
 912         select HAVE_SMP
 913         select MIGHT_HAVE_CACHE_L2X0
 914         help
 915           Support for ST-Ericsson's Ux500 architecture
 916
 917 config ARCH_NOMADIK
 918         bool "STMicroelectronics Nomadik"
 919         select ARM_AMBA
 920         select ARM_VIC
 921         select CPU_ARM926T
 922         select CLKDEV_LOOKUP
 923         select GENERIC_CLOCKEVENTS
 924         select MIGHT_HAVE_CACHE_L2X0
 925         select ARCH_REQUIRE_GPIOLIB
 926         help
 927           Support for the Nomadik platform by ST-Ericsson
 928
 929 config ARCH_DAVINCI
 930         bool "TI DaVinci"
 931         select GENERIC_CLOCKEVENTS
 932         select ARCH_REQUIRE_GPIOLIB
 933         select ZONE_DMA
 934         select HAVE_IDE
 935         select CLKDEV_LOOKUP
 936         select GENERIC_ALLOCATOR
 937         select GENERIC_IRQ_CHIP
 938         select ARCH_HAS_HOLES_MEMORYMODEL
 939         help
 940           Support for TI's DaVinci platform.
 941
 942 config ARCH_OMAP
 943         bool "TI OMAP"
 944         select HAVE_CLK
 945         select ARCH_REQUIRE_GPIOLIB
 946         select ARCH_HAS_CPUFREQ
 947         select CLKSRC_MMIO
 948         select GENERIC_CLOCKEVENTS
 949         select HAVE_SCHED_CLOCK
 950         select ARCH_HAS_HOLES_MEMORYMODEL
 951         help
 952           Support for TI's OMAP platform (OMAP1/2/3/4).
 953
 954 config PLAT_SPEAR
 955         bool "ST SPEAr"
 956         select ARM_AMBA
 957         select ARCH_REQUIRE_GPIOLIB
 958         select CLKDEV_LOOKUP
 959         select CLKSRC_MMIO
 960         select GENERIC_CLOCKEVENTS
 961         select HAVE_CLK
 962         help
 963           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 964
 965 config ARCH_VT8500
 966         bool "VIA/WonderMedia 85xx"
 967         select CPU_ARM926T
 968         select GENERIC_GPIO
 969         select ARCH_HAS_CPUFREQ
 970         select GENERIC_CLOCKEVENTS
 971         select ARCH_REQUIRE_GPIOLIB
 972         select HAVE_PWM
 973         help
 974           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 975
 976 config ARCH_ZYNQ
 977         bool "Xilinx Zynq ARM Cortex A9 Platform"
 978         select CPU_V7
 979         select GENERIC_CLOCKEVENTS
 980         select CLKDEV_LOOKUP
 981         select ARM_GIC
 982         select ARM_AMBA
 983         select ICST
 984         select MIGHT_HAVE_CACHE_L2X0
 985         select USE_OF
 986         help
 987           Support for Xilinx Zynq ARM Cortex A9 Platform
 988 endchoice
 989
 990 #
 991 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 992 # Kconfigs may be included either alphabetically (according to the
 993 # plat- suffix) or along side the corresponding mach-* source.
 994 #
 995 source "arch/arm/mach-at91/Kconfig"
 996
 997 source "arch/arm/mach-bcmring/Kconfig"
 998
 999 source "arch/arm/mach-clps711x/Kconfig"
1000
1001 source "arch/arm/mach-cns3xxx/Kconfig"
1002
1003 source "arch/arm/mach-davinci/Kconfig"
1004
1005 source "arch/arm/mach-dove/Kconfig"
1006
1007 source "arch/arm/mach-ep93xx/Kconfig"
1008
1009 source "arch/arm/mach-footbridge/Kconfig"
1010
1011 source "arch/arm/mach-gemini/Kconfig"
1012
1013 source "arch/arm/mach-h720x/Kconfig"
1014
1015 source "arch/arm/mach-integrator/Kconfig"
1016
1017 source "arch/arm/mach-iop32x/Kconfig"
1018
1019 source "arch/arm/mach-iop33x/Kconfig"
1020
1021 source "arch/arm/mach-iop13xx/Kconfig"
1022
1023 source "arch/arm/mach-ixp4xx/Kconfig"
1024
1025 source "arch/arm/mach-ixp2000/Kconfig"
1026
1027 source "arch/arm/mach-ixp23xx/Kconfig"
1028
1029 source "arch/arm/mach-kirkwood/Kconfig"
1030
1031 source "arch/arm/mach-ks8695/Kconfig"
1032
1033 source "arch/arm/mach-lpc32xx/Kconfig"
1034
1035 source "arch/arm/mach-msm/Kconfig"
1036
1037 source "arch/arm/mach-mv78xx0/Kconfig"
1038
1039 source "arch/arm/plat-mxc/Kconfig"
1040
1041 source "arch/arm/mach-mxs/Kconfig"
1042
1043 source "arch/arm/mach-netx/Kconfig"
1044
1045 source "arch/arm/mach-nomadik/Kconfig"
1046 source "arch/arm/plat-nomadik/Kconfig"
1047
1048 source "arch/arm/plat-omap/Kconfig"
1049
1050 source "arch/arm/mach-omap1/Kconfig"
1051
1052 source "arch/arm/mach-omap2/Kconfig"
1053
1054 source "arch/arm/mach-orion5x/Kconfig"
1055
1056 source "arch/arm/mach-pxa/Kconfig"
1057 source "arch/arm/plat-pxa/Kconfig"
1058
1059 source "arch/arm/mach-mmp/Kconfig"
1060
1061 source "arch/arm/mach-realview/Kconfig"
1062
1063 source "arch/arm/mach-sa1100/Kconfig"
1064
1065 source "arch/arm/plat-samsung/Kconfig"
1066 source "arch/arm/plat-s3c24xx/Kconfig"
1067 source "arch/arm/plat-s5p/Kconfig"
1068
1069 source "arch/arm/plat-spear/Kconfig"
1070
1071 if ARCH_S3C2410
1072 source "arch/arm/mach-s3c2410/Kconfig"
1073 source "arch/arm/mach-s3c2412/Kconfig"
1074 source "arch/arm/mach-s3c2416/Kconfig"
1075 source "arch/arm/mach-s3c2440/Kconfig"
1076 source "arch/arm/mach-s3c2443/Kconfig"
1077 endif
1078
1079 if ARCH_S3C64XX
1080 source "arch/arm/mach-s3c64xx/Kconfig"
1081 endif
1082
1083 source "arch/arm/mach-s5p64x0/Kconfig"
1084
1085 source "arch/arm/mach-s5pc100/Kconfig"
1086
1087 source "arch/arm/mach-s5pv210/Kconfig"
1088
1089 source "arch/arm/mach-exynos/Kconfig"
1090
1091 source "arch/arm/mach-shmobile/Kconfig"
1092
1093 source "arch/arm/mach-tegra/Kconfig"
1094
1095 source "arch/arm/mach-u300/Kconfig"
1096
1097 source "arch/arm/mach-ux500/Kconfig"
1098
1099 source "arch/arm/mach-versatile/Kconfig"
1100
1101 source "arch/arm/mach-vexpress/Kconfig"
1102 source "arch/arm/plat-versatile/Kconfig"
1103
1104 source "arch/arm/mach-vt8500/Kconfig"
1105
1106 source "arch/arm/mach-w90x900/Kconfig"
1107
1108 # Definitions to make life easier
1109 config ARCH_ACORN
1110         bool
1111
1112 config PLAT_IOP
1113         bool
1114         select GENERIC_CLOCKEVENTS
1115         select HAVE_SCHED_CLOCK
1116
1117 config PLAT_ORION
1118         bool
1119         select CLKSRC_MMIO
1120         select GENERIC_IRQ_CHIP
1121         select HAVE_SCHED_CLOCK
1122
1123 config PLAT_PXA
1124         bool
1125
1126 config PLAT_VERSATILE
1127         bool
1128
1129 config ARM_TIMER_SP804
1130         bool
1131         select CLKSRC_MMIO
1132
1133 source arch/arm/mm/Kconfig
1134
1135 config ARM_NR_BANKS
1136         int
1137         default 16 if ARCH_EP93XX
1138         default 8
1139
1140 config IWMMXT
1141         bool "Enable iWMMXt support"
1142         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1143         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1144         help
1145           Enable support for iWMMXt context switching at run time if
1146           running on a CPU that supports it.
1147
1148 config XSCALE_PMU
1149         bool
1150         depends on CPU_XSCALE
1151         default y
1152
1153 config CPU_HAS_PMU
1154         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1155                    (!ARCH_OMAP3 || OMAP3_EMU)
1156         default y
1157         bool
1158
1159 config MULTI_IRQ_HANDLER
1160         bool
1161         help
1162           Allow each machine to specify it's own IRQ handler at run time.
1163
1164 if !MMU
1165 source "arch/arm/Kconfig-nommu"
1166 endif
1167
1168 config ARM_ERRATA_411920
1169         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1170         depends on CPU_V6 || CPU_V6K
1171         help
1172           Invalidation of the Instruction Cache operation can
1173           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1174           It does not affect the MPCore. This option enables the ARM Ltd.
1175           recommended workaround.
1176
1177 config ARM_ERRATA_430973
1178         bool "ARM errata: Stale prediction on replaced interworking branch"
1179         depends on CPU_V7
1180         help
1181           This option enables the workaround for the 430973 Cortex-A8
1182           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1183           interworking branch is replaced with another code sequence at the
1184           same virtual address, whether due to self-modifying code or virtual
1185           to physical address re-mapping, Cortex-A8 does not recover from the
1186           stale interworking branch prediction. This results in Cortex-A8
1187           executing the new code sequence in the incorrect ARM or Thumb state.
1188           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1189           and also flushes the branch target cache at every context switch.
1190           Note that setting specific bits in the ACTLR register may not be
1191           available in non-secure mode.
1192
1193 config ARM_ERRATA_458693
1194         bool "ARM errata: Processor deadlock when a false hazard is created"
1195         depends on CPU_V7
1196         help
1197           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1198           erratum. For very specific sequences of memory operations, it is
1199           possible for a hazard condition intended for a cache line to instead
1200           be incorrectly associated with a different cache line. This false
1201           hazard might then cause a processor deadlock. The workaround enables
1202           the L1 caching of the NEON accesses and disables the PLD instruction
1203           in the ACTLR register. Note that setting specific bits in the ACTLR
1204           register may not be available in non-secure mode.
1205
1206 config ARM_ERRATA_460075
1207         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1208         depends on CPU_V7
1209         help
1210           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1211           erratum. Any asynchronous access to the L2 cache may encounter a
1212           situation in which recent store transactions to the L2 cache are lost
1213           and overwritten with stale memory contents from external memory. The
1214           workaround disables the write-allocate mode for the L2 cache via the
1215           ACTLR register. Note that setting specific bits in the ACTLR register
1216           may not be available in non-secure mode.
1217
1218 config ARM_ERRATA_742230
1219         bool "ARM errata: DMB operation may be faulty"
1220         depends on CPU_V7 && SMP
1221         help
1222           This option enables the workaround for the 742230 Cortex-A9
1223           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1224           between two write operations may not ensure the correct visibility
1225           ordering of the two writes. This workaround sets a specific bit in
1226           the diagnostic register of the Cortex-A9 which causes the DMB
1227           instruction to behave as a DSB, ensuring the correct behaviour of
1228           the two writes.
1229
1230 config ARM_ERRATA_742231
1231         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1232         depends on CPU_V7 && SMP
1233         help
1234           This option enables the workaround for the 742231 Cortex-A9
1235           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1236           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1237           accessing some data located in the same cache line, may get corrupted
1238           data due to bad handling of the address hazard when the line gets
1239           replaced from one of the CPUs at the same time as another CPU is
1240           accessing it. This workaround sets specific bits in the diagnostic
1241           register of the Cortex-A9 which reduces the linefill issuing
1242           capabilities of the processor.
1243
1244 config PL310_ERRATA_588369
1245         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1246         depends on CACHE_L2X0
1247         help
1248            The PL310 L2 cache controller implements three types of Clean &
1249            Invalidate maintenance operations: by Physical Address
1250            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1251            They are architecturally defined to behave as the execution of a
1252            clean operation followed immediately by an invalidate operation,
1253            both performing to the same memory location. This functionality
1254            is not correctly implemented in PL310 as clean lines are not
1255            invalidated as a result of these operations.
1256
1257 config ARM_ERRATA_720789
1258         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1259         depends on CPU_V7
1260         help
1261           This option enables the workaround for the 720789 Cortex-A9 (prior to
1262           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1263           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1264           As a consequence of this erratum, some TLB entries which should be
1265           invalidated are not, resulting in an incoherency in the system page
1266           tables. The workaround changes the TLB flushing routines to invalidate
1267           entries regardless of the ASID.
1268
1269 config PL310_ERRATA_727915
1270         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1271         depends on CACHE_L2X0
1272         help
1273           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1274           operation (offset 0x7FC). This operation runs in background so that
1275           PL310 can handle normal accesses while it is in progress. Under very
1276           rare circumstances, due to this erratum, write data can be lost when
1277           PL310 treats a cacheable write transaction during a Clean &
1278           Invalidate by Way operation.
1279
1280 config ARM_ERRATA_743622
1281         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1282         depends on CPU_V7
1283         help
1284           This option enables the workaround for the 743622 Cortex-A9
1285           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1286           optimisation in the Cortex-A9 Store Buffer may lead to data
1287           corruption. This workaround sets a specific bit in the diagnostic
1288           register of the Cortex-A9 which disables the Store Buffer
1289           optimisation, preventing the defect from occurring. This has no
1290           visible impact on the overall performance or power consumption of the
1291           processor.
1292
1293 config ARM_ERRATA_751472
1294         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1295         depends on CPU_V7
1296         help
1297           This option enables the workaround for the 751472 Cortex-A9 (prior
1298           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1299           completion of a following broadcasted operation if the second
1300           operation is received by a CPU before the ICIALLUIS has completed,
1301           potentially leading to corrupted entries in the cache or TLB.
1302
1303 config PL310_ERRATA_753970
1304         bool "PL310 errata: cache sync operation may be faulty"
1305         depends on CACHE_PL310
1306         help
1307           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1308
1309           Under some condition the effect of cache sync operation on
1310           the store buffer still remains when the operation completes.
1311           This means that the store buffer is always asked to drain and
1312           this prevents it from merging any further writes. The workaround
1313           is to replace the normal offset of cache sync operation (0x730)
1314           by another offset targeting an unmapped PL310 register 0x740.
1315           This has the same effect as the cache sync operation: store buffer
1316           drain and waiting for all buffers empty.
1317
1318 config ARM_ERRATA_754322
1319         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1320         depends on CPU_V7
1321         help
1322           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1323           r3p*) erratum. A speculative memory access may cause a page table walk
1324           which starts prior to an ASID switch but completes afterwards. This
1325           can populate the micro-TLB with a stale entry which may be hit with
1326           the new ASID. This workaround places two dsb instructions in the mm
1327           switching code so that no page table walks can cross the ASID switch.
1328
1329 config ARM_ERRATA_754327
1330         bool "ARM errata: no automatic Store Buffer drain"
1331         depends on CPU_V7 && SMP
1332         help
1333           This option enables the workaround for the 754327 Cortex-A9 (prior to
1334           r2p0) erratum. The Store Buffer does not have any automatic draining
1335           mechanism and therefore a livelock may occur if an external agent
1336           continuously polls a memory location waiting to observe an update.
1337           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1338           written polling loops from denying visibility of updates to memory.
1339
1340 config ARM_ERRATA_364296
1341         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1342         depends on CPU_V6 && !SMP
1343         help
1344           This options enables the workaround for the 364296 ARM1136
1345           r0p2 erratum (possible cache data corruption with
1346           hit-under-miss enabled). It sets the undocumented bit 31 in
1347           the auxiliary control register and the FI bit in the control
1348           register, thus disabling hit-under-miss without putting the
1349           processor into full low interrupt latency mode. ARM11MPCore
1350           is not affected.
1351
1352 config ARM_ERRATA_764369
1353         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1354         depends on CPU_V7 && SMP
1355         help
1356           This option enables the workaround for erratum 764369
1357           affecting Cortex-A9 MPCore with two or more processors (all
1358           current revisions). Under certain timing circumstances, a data
1359           cache line maintenance operation by MVA targeting an Inner
1360           Shareable memory region may fail to proceed up to either the
1361           Point of Coherency or to the Point of Unification of the
1362           system. This workaround adds a DSB instruction before the
1363           relevant cache maintenance functions and sets a specific bit
1364           in the diagnostic control register of the SCU.
1365
1366 config PL310_ERRATA_769419
1367         bool "PL310 errata: no automatic Store Buffer drain"
1368         depends on CACHE_L2X0
1369         help
1370           On revisions of the PL310 prior to r3p2, the Store Buffer does
1371           not automatically drain. This can cause normal, non-cacheable
1372           writes to be retained when the memory system is idle, leading
1373           to suboptimal I/O performance for drivers using coherent DMA.
1374           This option adds a write barrier to the cpu_idle loop so that,
1375           on systems with an outer cache, the store buffer is drained
1376           explicitly.
1377
1378 endmenu
1379
1380 source "arch/arm/common/Kconfig"
1381
1382 menu "Bus support"
1383
1384 config ARM_AMBA
1385         bool
1386
1387 config ISA
1388         bool
1389         help
1390           Find out whether you have ISA slots on your motherboard.  ISA is the
1391           name of a bus system, i.e. the way the CPU talks to the other stuff
1392           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1393           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1394           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1395
1396 # Select ISA DMA controller support
1397 config ISA_DMA
1398         bool
1399         select ISA_DMA_API
1400
1401 # Select ISA DMA interface
1402 config ISA_DMA_API
1403         bool
1404
1405 config PCI
1406         bool "PCI support" if MIGHT_HAVE_PCI
1407         help
1408           Find out whether you have a PCI motherboard. PCI is the name of a
1409           bus system, i.e. the way the CPU talks to the other stuff inside
1410           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1411           VESA. If you have PCI, say Y, otherwise N.
1412
1413 config PCI_DOMAINS
1414         bool
1415         depends on PCI
1416
1417 config PCI_NANOENGINE
1418         bool "BSE nanoEngine PCI support"
1419         depends on SA1100_NANOENGINE
1420         help
1421           Enable PCI on the BSE nanoEngine board.
1422
1423 config PCI_SYSCALL
1424         def_bool PCI
1425
1426 # Select the host bridge type
1427 config PCI_HOST_VIA82C505
1428         bool
1429         depends on PCI && ARCH_SHARK
1430         default y
1431
1432 config PCI_HOST_ITE8152
1433         bool
1434         depends on PCI && MACH_ARMCORE
1435         default y
1436         select DMABOUNCE
1437
1438 source "drivers/pci/Kconfig"
1439
1440 source "drivers/pcmcia/Kconfig"
1441
1442 endmenu
1443
1444 menu "Kernel Features"
1445
1446 source "kernel/time/Kconfig"
1447
1448 config HAVE_SMP
1449         bool
1450         help
1451           This option should be selected by machines which have an SMP-
1452           capable CPU.
1453
1454           The only effect of this option is to make the SMP-related
1455           options available to the user for configuration.
1456
1457 config SMP
1458         bool "Symmetric Multi-Processing"
1459         depends on CPU_V6K || CPU_V7
1460         depends on GENERIC_CLOCKEVENTS
1461         depends on HAVE_SMP
1462         depends on MMU
1463         select USE_GENERIC_SMP_HELPERS
1464         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1465         help
1466           This enables support for systems with more than one CPU. If you have
1467           a system with only one CPU, like most personal computers, say N. If
1468           you have a system with more than one CPU, say Y.
1469
1470           If you say N here, the kernel will run on single and multiprocessor
1471           machines, but will use only one CPU of a multiprocessor machine. If
1472           you say Y here, the kernel will run on many, but not all, single
1473           processor machines. On a single processor machine, the kernel will
1474           run faster if you say N here.
1475
1476           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1477           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1478           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1479
1480           If you don't know what to do here, say N.
1481
1482 config SMP_ON_UP
1483         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1484         depends on EXPERIMENTAL
1485         depends on SMP && !XIP_KERNEL
1486         default y
1487         help
1488           SMP kernels contain instructions which fail on non-SMP processors.
1489           Enabling this option allows the kernel to modify itself to make
1490           these instructions safe.  Disabling it allows about 1K of space
1491           savings.
1492
1493           If you don't know what to do here, say Y.
1494
1495 config ARM_CPU_TOPOLOGY
1496         bool "Support cpu topology definition"
1497         depends on SMP && CPU_V7
1498         default y
1499         help
1500           Support ARM cpu topology definition. The MPIDR register defines
1501           affinity between processors which is then used to describe the cpu
1502           topology of an ARM System.
1503
1504 config SCHED_MC
1505         bool "Multi-core scheduler support"
1506         depends on ARM_CPU_TOPOLOGY
1507         help
1508           Multi-core scheduler support improves the CPU scheduler's decision
1509           making when dealing with multi-core CPU chips at a cost of slightly
1510           increased overhead in some places. If unsure say N here.
1511
1512 config SCHED_SMT
1513         bool "SMT scheduler support"
1514         depends on ARM_CPU_TOPOLOGY
1515         help
1516           Improves the CPU scheduler's decision making when dealing with
1517           MultiThreading at a cost of slightly increased overhead in some
1518           places. If unsure say N here.
1519
1520 config HAVE_ARM_SCU
1521         bool
1522         help
1523           This option enables support for the ARM system coherency unit
1524
1525 config HAVE_ARM_TWD
1526         bool
1527         depends on SMP
1528         select TICK_ONESHOT
1529         help
1530           This options enables support for the ARM timer and watchdog unit
1531
1532 choice
1533         prompt "Memory split"
1534         default VMSPLIT_3G
1535         help
1536           Select the desired split between kernel and user memory.
1537
1538           If you are not absolutely sure what you are doing, leave this
1539           option alone!
1540
1541         config VMSPLIT_3G
1542                 bool "3G/1G user/kernel split"
1543         config VMSPLIT_2G
1544                 bool "2G/2G user/kernel split"
1545         config VMSPLIT_1G
1546                 bool "1G/3G user/kernel split"
1547 endchoice
1548
1549 config PAGE_OFFSET
1550         hex
1551         default 0x40000000 if VMSPLIT_1G
1552         default 0x80000000 if VMSPLIT_2G
1553         default 0xC0000000
1554
1555 config NR_CPUS
1556         int "Maximum number of CPUs (2-32)"
1557         range 2 32
1558         depends on SMP
1559         default "4"
1560
1561 config HOTPLUG_CPU
1562         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1563         depends on SMP && HOTPLUG && EXPERIMENTAL
1564         help
1565           Say Y here to experiment with turning CPUs off and on.  CPUs
1566           can be controlled through /sys/devices/system/cpu.
1567
1568 config LOCAL_TIMERS
1569         bool "Use local timer interrupts"
1570         depends on SMP
1571         default y
1572         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1573         help
1574           Enable support for local timers on SMP platforms, rather then the
1575           legacy IPI broadcast method.  Local timers allows the system
1576           accounting to be spread across the timer interval, preventing a
1577           "thundering herd" at every timer tick.
1578
1579 config ARCH_NR_GPIO
1580         int
1581         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1582         default 350 if ARCH_U8500
1583         default 0
1584         help
1585           Maximum number of GPIOs in the system.
1586
1587           If unsure, leave the default value.
1588
1589 source kernel/Kconfig.preempt
1590
1591 config HZ
1592         int
1593         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1594                 ARCH_S5PV210 || ARCH_EXYNOS4
1595         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1596         default AT91_TIMER_HZ if ARCH_AT91
1597         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1598         default 100
1599
1600 config THUMB2_KERNEL
1601         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1602         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1603         select AEABI
1604         select ARM_ASM_UNIFIED
1605         select ARM_UNWIND
1606         help
1607           By enabling this option, the kernel will be compiled in
1608           Thumb-2 mode. A compiler/assembler that understand the unified
1609           ARM-Thumb syntax is needed.
1610
1611           If unsure, say N.
1612
1613 config THUMB2_AVOID_R_ARM_THM_JUMP11
1614         bool "Work around buggy Thumb-2 short branch relocations in gas"
1615         depends on THUMB2_KERNEL && MODULES
1616         default y
1617         help
1618           Various binutils versions can resolve Thumb-2 branches to
1619           locally-defined, preemptible global symbols as short-range "b.n"
1620           branch instructions.
1621
1622           This is a problem, because there's no guarantee the final
1623           destination of the symbol, or any candidate locations for a
1624           trampoline, are within range of the branch.  For this reason, the
1625           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1626           relocation in modules at all, and it makes little sense to add
1627           support.
1628
1629           The symptom is that the kernel fails with an "unsupported
1630           relocation" error when loading some modules.
1631
1632           Until fixed tools are available, passing
1633           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1634           code which hits this problem, at the cost of a bit of extra runtime
1635           stack usage in some cases.
1636
1637           The problem is described in more detail at:
1638               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1639
1640           Only Thumb-2 kernels are affected.
1641
1642           Unless you are sure your tools don't have this problem, say Y.
1643
1644 config ARM_ASM_UNIFIED
1645         bool
1646
1647 config AEABI
1648         bool "Use the ARM EABI to compile the kernel"
1649         help
1650           This option allows for the kernel to be compiled using the latest
1651           ARM ABI (aka EABI).  This is only useful if you are using a user
1652           space environment that is also compiled with EABI.
1653
1654           Since there are major incompatibilities between the legacy ABI and
1655           EABI, especially with regard to structure member alignment, this
1656           option also changes the kernel syscall calling convention to
1657           disambiguate both ABIs and allow for backward compatibility support
1658           (selected with CONFIG_OABI_COMPAT).
1659
1660           To use this you need GCC version 4.0.0 or later.
1661
1662 config OABI_COMPAT
1663         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1664         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1665         default y
1666         help
1667           This option preserves the old syscall interface along with the
1668           new (ARM EABI) one. It also provides a compatibility layer to
1669           intercept syscalls that have structure arguments which layout
1670           in memory differs between the legacy ABI and the new ARM EABI
1671           (only for non "thumb" binaries). This option adds a tiny
1672           overhead to all syscalls and produces a slightly larger kernel.
1673           If you know you'll be using only pure EABI user space then you
1674           can say N here. If this option is not selected and you attempt
1675           to execute a legacy ABI binary then the result will be
1676           UNPREDICTABLE (in fact it can be predicted that it won't work
1677           at all). If in doubt say Y.
1678
1679 config ARCH_HAS_HOLES_MEMORYMODEL
1680         bool
1681
1682 config ARCH_SPARSEMEM_ENABLE
1683         bool
1684
1685 config ARCH_SPARSEMEM_DEFAULT
1686         def_bool ARCH_SPARSEMEM_ENABLE
1687
1688 config ARCH_SELECT_MEMORY_MODEL
1689         def_bool ARCH_SPARSEMEM_ENABLE
1690
1691 config HAVE_ARCH_PFN_VALID
1692         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1693
1694 config HIGHMEM
1695         bool "High Memory Support"
1696         depends on MMU
1697         help
1698           The address space of ARM processors is only 4 Gigabytes large
1699           and it has to accommodate user address space, kernel address
1700           space as well as some memory mapped IO. That means that, if you
1701           have a large amount of physical memory and/or IO, not all of the
1702           memory can be "permanently mapped" by the kernel. The physical
1703           memory that is not permanently mapped is called "high memory".
1704
1705           Depending on the selected kernel/user memory split, minimum
1706           vmalloc space and actual amount of RAM, you may not need this
1707           option which should result in a slightly faster kernel.
1708
1709           If unsure, say n.
1710
1711 config HIGHPTE
1712         bool "Allocate 2nd-level pagetables from highmem"
1713         depends on HIGHMEM
1714
1715 config HW_PERF_EVENTS
1716         bool "Enable hardware performance counter support for perf events"
1717         depends on PERF_EVENTS && CPU_HAS_PMU
1718         default y
1719         help
1720           Enable hardware performance counter support for perf events. If
1721           disabled, perf events will use software events only.
1722
1723 source "mm/Kconfig"
1724
1725 config FORCE_MAX_ZONEORDER
1726         int "Maximum zone order" if ARCH_SHMOBILE
1727         range 11 64 if ARCH_SHMOBILE
1728         default "9" if SA1111
1729         default "11"
1730         help
1731           The kernel memory allocator divides physically contiguous memory
1732           blocks into "zones", where each zone is a power of two number of
1733           pages.  This option selects the largest power of two that the kernel
1734           keeps in the memory allocator.  If you need to allocate very large
1735           blocks of physically contiguous memory, then you may need to
1736           increase this value.
1737
1738           This config option is actually maximum order plus one. For example,
1739           a value of 11 means that the largest free memory block is 2^10 pages.
1740
1741 config LEDS
1742         bool "Timer and CPU usage LEDs"
1743         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1744                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1745                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1746                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1747                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1748                    ARCH_AT91 || ARCH_DAVINCI || \
1749                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1750         help
1751           If you say Y here, the LEDs on your machine will be used
1752           to provide useful information about your current system status.
1753
1754           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1755           be able to select which LEDs are active using the options below. If
1756           you are compiling a kernel for the EBSA-110 or the LART however, the
1757           red LED will simply flash regularly to indicate that the system is
1758           still functional. It is safe to say Y here if you have a CATS
1759           system, but the driver will do nothing.
1760
1761 config LEDS_TIMER
1762         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1763                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1764                             || MACH_OMAP_PERSEUS2
1765         depends on LEDS
1766         depends on !GENERIC_CLOCKEVENTS
1767         default y if ARCH_EBSA110
1768         help
1769           If you say Y here, one of the system LEDs (the green one on the
1770           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1771           will flash regularly to indicate that the system is still
1772           operational. This is mainly useful to kernel hackers who are
1773           debugging unstable kernels.
1774
1775           The LART uses the same LED for both Timer LED and CPU usage LED
1776           functions. You may choose to use both, but the Timer LED function
1777           will overrule the CPU usage LED.
1778
1779 config LEDS_CPU
1780         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1781                         !ARCH_OMAP) \
1782                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1783                         || MACH_OMAP_PERSEUS2
1784         depends on LEDS
1785         help
1786           If you say Y here, the red LED will be used to give a good real
1787           time indication of CPU usage, by lighting whenever the idle task
1788           is not currently executing.
1789
1790           The LART uses the same LED for both Timer LED and CPU usage LED
1791           functions. You may choose to use both, but the Timer LED function
1792           will overrule the CPU usage LED.
1793
1794 config ALIGNMENT_TRAP
1795         bool
1796         depends on CPU_CP15_MMU
1797         default y if !ARCH_EBSA110
1798         select HAVE_PROC_CPU if PROC_FS
1799         help
1800           ARM processors cannot fetch/store information which is not
1801           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1802           address divisible by 4. On 32-bit ARM processors, these non-aligned
1803           fetch/store instructions will be emulated in software if you say
1804           here, which has a severe performance impact. This is necessary for
1805           correct operation of some network protocols. With an IP-only
1806           configuration it is safe to say N, otherwise say Y.
1807
1808 config UACCESS_WITH_MEMCPY
1809         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1810         depends on MMU && EXPERIMENTAL
1811         default y if CPU_FEROCEON
1812         help
1813           Implement faster copy_to_user and clear_user methods for CPU
1814           cores where a 8-word STM instruction give significantly higher
1815           memory write throughput than a sequence of individual 32bit stores.
1816
1817           A possible side effect is a slight increase in scheduling latency
1818           between threads sharing the same address space if they invoke
1819           such copy operations with large buffers.
1820
1821           However, if the CPU data cache is using a write-allocate mode,
1822           this option is unlikely to provide any performance gain.
1823
1824 config SECCOMP
1825         bool
1826         prompt "Enable seccomp to safely compute untrusted bytecode"
1827         ---help---
1828           This kernel feature is useful for number crunching applications
1829           that may need to compute untrusted bytecode during their
1830           execution. By using pipes or other transports made available to
1831           the process as file descriptors supporting the read/write
1832           syscalls, it's possible to isolate those applications in
1833           their own address space using seccomp. Once seccomp is
1834           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1835           and the task is only allowed to execute a few safe syscalls
1836           defined by each seccomp mode.
1837
1838 config CC_STACKPROTECTOR
1839         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1840         depends on EXPERIMENTAL
1841         help
1842           This option turns on the -fstack-protector GCC feature. This
1843           feature puts, at the beginning of functions, a canary value on
1844           the stack just before the return address, and validates
1845           the value just before actually returning.  Stack based buffer
1846           overflows (that need to overwrite this return address) now also
1847           overwrite the canary, which gets detected and the attack is then
1848           neutralized via a kernel panic.
1849           This feature requires gcc version 4.2 or above.
1850
1851 config DEPRECATED_PARAM_STRUCT
1852         bool "Provide old way to pass kernel parameters"
1853         help
1854           This was deprecated in 2001 and announced to live on for 5 years.
1855           Some old boot loaders still use this way.
1856
1857 endmenu
1858
1859 menu "Boot options"
1860
1861 config USE_OF
1862         bool "Flattened Device Tree support"
1863         select OF
1864         select OF_EARLY_FLATTREE
1865         select IRQ_DOMAIN
1866         help
1867           Include support for flattened device tree machine descriptions.
1868
1869 # Compressed boot loader in ROM.  Yes, we really want to ask about
1870 # TEXT and BSS so we preserve their values in the config files.
1871 config ZBOOT_ROM_TEXT
1872         hex "Compressed ROM boot loader base address"
1873         default "0"
1874         help
1875           The physical address at which the ROM-able zImage is to be
1876           placed in the target.  Platforms which normally make use of
1877           ROM-able zImage formats normally set this to a suitable
1878           value in their defconfig file.
1879
1880           If ZBOOT_ROM is not enabled, this has no effect.
1881
1882 config ZBOOT_ROM_BSS
1883         hex "Compressed ROM boot loader BSS address"
1884         default "0"
1885         help
1886           The base address of an area of read/write memory in the target
1887           for the ROM-able zImage which must be available while the
1888           decompressor is running. It must be large enough to hold the
1889           entire decompressed kernel plus an additional 128 KiB.
1890           Platforms which normally make use of ROM-able zImage formats
1891           normally set this to a suitable value in their defconfig file.
1892
1893           If ZBOOT_ROM is not enabled, this has no effect.
1894
1895 config ZBOOT_ROM
1896         bool "Compressed boot loader in ROM/flash"
1897         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1898         help
1899           Say Y here if you intend to execute your compressed kernel image
1900           (zImage) directly from ROM or flash.  If unsure, say N.
1901
1902 choice
1903         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1904         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1905         default ZBOOT_ROM_NONE
1906         help
1907           Include experimental SD/MMC loading code in the ROM-able zImage.
1908           With this enabled it is possible to write the the ROM-able zImage
1909           kernel image to an MMC or SD card and boot the kernel straight
1910           from the reset vector. At reset the processor Mask ROM will load
1911           the first part of the the ROM-able zImage which in turn loads the
1912           rest the kernel image to RAM.
1913
1914 config ZBOOT_ROM_NONE
1915         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1916         help
1917           Do not load image from SD or MMC
1918
1919 config ZBOOT_ROM_MMCIF
1920         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1921         help
1922           Load image from MMCIF hardware block.
1923
1924 config ZBOOT_ROM_SH_MOBILE_SDHI
1925         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1926         help
1927           Load image from SDHI hardware block
1928
1929 endchoice
1930
1931 config ARM_APPENDED_DTB
1932         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1933         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1934         help
1935           With this option, the boot code will look for a device tree binary
1936           (DTB) appended to zImage
1937           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1938
1939           This is meant as a backward compatibility convenience for those
1940           systems with a bootloader that can't be upgraded to accommodate
1941           the documented boot protocol using a device tree.
1942
1943           Beware that there is very little in terms of protection against
1944           this option being confused by leftover garbage in memory that might
1945           look like a DTB header after a reboot if no actual DTB is appended
1946           to zImage.  Do not leave this option active in a production kernel
1947           if you don't intend to always append a DTB.  Proper passing of the
1948           location into r2 of a bootloader provided DTB is always preferable
1949           to this option.
1950
1951 config ARM_ATAG_DTB_COMPAT
1952         bool "Supplement the appended DTB with traditional ATAG information"
1953         depends on ARM_APPENDED_DTB
1954         help
1955           Some old bootloaders can't be updated to a DTB capable one, yet
1956           they provide ATAGs with memory configuration, the ramdisk address,
1957           the kernel cmdline string, etc.  Such information is dynamically
1958           provided by the bootloader and can't always be stored in a static
1959           DTB.  To allow a device tree enabled kernel to be used with such
1960           bootloaders, this option allows zImage to extract the information
1961           from the ATAG list and store it at run time into the appended DTB.
1962
1963 config CMDLINE
1964         string "Default kernel command string"
1965         default ""
1966         help
1967           On some architectures (EBSA110 and CATS), there is currently no way
1968           for the boot loader to pass arguments to the kernel. For these
1969           architectures, you should supply some command-line options at build
1970           time by entering them here. As a minimum, you should specify the
1971           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1972
1973 choice
1974         prompt "Kernel command line type" if CMDLINE != ""
1975         default CMDLINE_FROM_BOOTLOADER
1976
1977 config CMDLINE_FROM_BOOTLOADER
1978         bool "Use bootloader kernel arguments if available"
1979         help
1980           Uses the command-line options passed by the boot loader. If
1981           the boot loader doesn't provide any, the default kernel command
1982           string provided in CMDLINE will be used.
1983
1984 config CMDLINE_EXTEND
1985         bool "Extend bootloader kernel arguments"
1986         help
1987           The command-line arguments provided by the boot loader will be
1988           appended to the default kernel command string.
1989
1990 config CMDLINE_FORCE
1991         bool "Always use the default kernel command string"
1992         help
1993           Always use the default kernel command string, even if the boot
1994           loader passes other arguments to the kernel.
1995           This is useful if you cannot or don't want to change the
1996           command-line options your boot loader passes to the kernel.
1997 endchoice
1998
1999 config XIP_KERNEL
2000         bool "Kernel Execute-In-Place from ROM"
2001         depends on !ZBOOT_ROM && !ARM_LPAE
2002         help
2003           Execute-In-Place allows the kernel to run from non-volatile storage
2004           directly addressable by the CPU, such as NOR flash. This saves RAM
2005           space since the text section of the kernel is not loaded from flash
2006           to RAM.  Read-write sections, such as the data section and stack,
2007           are still copied to RAM.  The XIP kernel is not compressed since
2008           it has to run directly from flash, so it will take more space to
2009           store it.  The flash address used to link the kernel object files,
2010           and for storing it, is configuration dependent. Therefore, if you
2011           say Y here, you must know the proper physical address where to
2012           store the kernel image depending on your own flash memory usage.
2013
2014           Also note that the make target becomes "make xipImage" rather than
2015           "make zImage" or "make Image".  The final kernel binary to put in
2016           ROM memory will be arch/arm/boot/xipImage.
2017
2018           If unsure, say N.
2019
2020 config XIP_PHYS_ADDR
2021         hex "XIP Kernel Physical Location"
2022         depends on XIP_KERNEL
2023         default "0x00080000"
2024         help
2025           This is the physical address in your flash memory the kernel will
2026           be linked for and stored to.  This address is dependent on your
2027           own flash usage.
2028
2029 config KEXEC
2030         bool "Kexec system call (EXPERIMENTAL)"
2031         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2032         help
2033           kexec is a system call that implements the ability to shutdown your
2034           current kernel, and to start another kernel.  It is like a reboot
2035           but it is independent of the system firmware.   And like a reboot
2036           you can start any kernel with it, not just Linux.
2037
2038           It is an ongoing process to be certain the hardware in a machine
2039           is properly shutdown, so do not be surprised if this code does not
2040           initially work for you.  It may help to enable device hotplugging
2041           support.
2042
2043 config ATAGS_PROC
2044         bool "Export atags in procfs"
2045         depends on KEXEC
2046         default y
2047         help
2048           Should the atags used to boot the kernel be exported in an "atags"
2049           file in procfs. Useful with kexec.
2050
2051 config CRASH_DUMP
2052         bool "Build kdump crash kernel (EXPERIMENTAL)"
2053         depends on EXPERIMENTAL
2054         help
2055           Generate crash dump after being started by kexec. This should
2056           be normally only set in special crash dump kernels which are
2057           loaded in the main kernel with kexec-tools into a specially
2058           reserved region and then later executed after a crash by
2059           kdump/kexec. The crash dump kernel must be compiled to a
2060           memory address not used by the main kernel
2061
2062           For more details see Documentation/kdump/kdump.txt
2063
2064 config AUTO_ZRELADDR
2065         bool "Auto calculation of the decompressed kernel image address"
2066         depends on !ZBOOT_ROM && !ARCH_U300
2067         help
2068           ZRELADDR is the physical address where the decompressed kernel
2069           image will be placed. If AUTO_ZRELADDR is selected, the address
2070           will be determined at run-time by masking the current IP with
2071           0xf8000000. This assumes the zImage being placed in the first 128MB
2072           from start of memory.
2073
2074 endmenu
2075
2076 menu "CPU Power Management"
2077
2078 if ARCH_HAS_CPUFREQ
2079
2080 source "drivers/cpufreq/Kconfig"
2081
2082 config CPU_FREQ_IMX
2083         tristate "CPUfreq driver for i.MX CPUs"
2084         depends on ARCH_MXC && CPU_FREQ
2085         help
2086           This enables the CPUfreq driver for i.MX CPUs.
2087
2088 config CPU_FREQ_SA1100
2089         bool
2090
2091 config CPU_FREQ_SA1110
2092         bool
2093
2094 config CPU_FREQ_INTEGRATOR
2095         tristate "CPUfreq driver for ARM Integrator CPUs"
2096         depends on ARCH_INTEGRATOR && CPU_FREQ
2097         default y
2098         help
2099           This enables the CPUfreq driver for ARM Integrator CPUs.
2100
2101           For details, take a look at <file:Documentation/cpu-freq>.
2102
2103           If in doubt, say Y.
2104
2105 config CPU_FREQ_PXA
2106         bool
2107         depends on CPU_FREQ && ARCH_PXA && PXA25x
2108         default y
2109         select CPU_FREQ_TABLE
2110         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2111
2112 config CPU_FREQ_S3C
2113         bool
2114         help
2115           Internal configuration node for common cpufreq on Samsung SoC
2116
2117 config CPU_FREQ_S3C24XX
2118         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2119         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
2120         select CPU_FREQ_S3C
2121         help
2122           This enables the CPUfreq driver for the Samsung S3C24XX family
2123           of CPUs.
2124
2125           For details, take a look at <file:Documentation/cpu-freq>.
2126
2127           If in doubt, say N.
2128
2129 config CPU_FREQ_S3C24XX_PLL
2130         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2131         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2132         help
2133           Compile in support for changing the PLL frequency from the
2134           S3C24XX series CPUfreq driver. The PLL takes time to settle
2135           after a frequency change, so by default it is not enabled.
2136
2137           This also means that the PLL tables for the selected CPU(s) will
2138           be built which may increase the size of the kernel image.
2139
2140 config CPU_FREQ_S3C24XX_DEBUG
2141         bool "Debug CPUfreq Samsung driver core"
2142         depends on CPU_FREQ_S3C24XX
2143         help
2144           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2145
2146 config CPU_FREQ_S3C24XX_IODEBUG
2147         bool "Debug CPUfreq Samsung driver IO timing"
2148         depends on CPU_FREQ_S3C24XX
2149         help
2150           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2151
2152 config CPU_FREQ_S3C24XX_DEBUGFS
2153         bool "Export debugfs for CPUFreq"
2154         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2155         help
2156           Export status information via debugfs.
2157
2158 endif
2159
2160 source "drivers/cpuidle/Kconfig"
2161
2162 endmenu
2163
2164 menu "Floating point emulation"
2165
2166 comment "At least one emulation must be selected"
2167
2168 config FPE_NWFPE
2169         bool "NWFPE math emulation"
2170         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2171         ---help---
2172           Say Y to include the NWFPE floating point emulator in the kernel.
2173           This is necessary to run most binaries. Linux does not currently
2174           support floating point hardware so you need to say Y here even if
2175           your machine has an FPA or floating point co-processor podule.
2176
2177           You may say N here if you are going to load the Acorn FPEmulator
2178           early in the bootup.
2179
2180 config FPE_NWFPE_XP
2181         bool "Support extended precision"
2182         depends on FPE_NWFPE
2183         help
2184           Say Y to include 80-bit support in the kernel floating-point
2185           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2186           Note that gcc does not generate 80-bit operations by default,
2187           so in most cases this option only enlarges the size of the
2188           floating point emulator without any good reason.
2189
2190           You almost surely want to say N here.
2191
2192 config FPE_FASTFPE
2193         bool "FastFPE math emulation (EXPERIMENTAL)"
2194         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2195         ---help---
2196           Say Y here to include the FAST floating point emulator in the kernel.
2197           This is an experimental much faster emulator which now also has full
2198           precision for the mantissa.  It does not support any exceptions.
2199           It is very simple, and approximately 3-6 times faster than NWFPE.
2200
2201           It should be sufficient for most programs.  It may be not suitable
2202           for scientific calculations, but you have to check this for yourself.
2203           If you do not feel you need a faster FP emulation you should better
2204           choose NWFPE.
2205
2206 config VFP
2207         bool "VFP-format floating point maths"
2208         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2209         help
2210           Say Y to include VFP support code in the kernel. This is needed
2211           if your hardware includes a VFP unit.
2212
2213           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2214           release notes and additional status information.
2215
2216           Say N if your target does not have VFP hardware.
2217
2218 config VFPv3
2219         bool
2220         depends on VFP
2221         default y if CPU_V7
2222
2223 config NEON
2224         bool "Advanced SIMD (NEON) Extension support"
2225         depends on VFPv3 && CPU_V7
2226         help
2227           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2228           Extension.
2229
2230 endmenu
2231
2232 menu "Userspace binary formats"
2233
2234 source "fs/Kconfig.binfmt"
2235
2236 config ARTHUR
2237         tristate "RISC OS personality"
2238         depends on !AEABI
2239         help
2240           Say Y here to include the kernel code necessary if you want to run
2241           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2242           experimental; if this sounds frightening, say N and sleep in peace.
2243           You can also say M here to compile this support as a module (which
2244           will be called arthur).
2245
2246 endmenu
2247
2248 menu "Power management options"
2249
2250 source "kernel/power/Kconfig"
2251
2252 config ARCH_SUSPEND_POSSIBLE
2253         depends on !ARCH_S5PC100
2254         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2255                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2256         def_bool y
2257
2258 config ARM_CPU_SUSPEND
2259         def_bool PM_SLEEP
2260
2261 endmenu
2262
2263 source "net/Kconfig"
2264
2265 source "drivers/Kconfig"
2266
2267 source "fs/Kconfig"
2268
2269 source "arch/arm/Kconfig.debug"
2270
2271 source "security/Kconfig"
2272
2273 source "crypto/Kconfig"
2274
2275 source "lib/Kconfig"