arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config HAVE_PWM
  41         bool
  42
  43 config MIGHT_HAVE_PCI
  44         bool
  45
  46 config SYS_SUPPORTS_APM_EMULATION
  47         bool
  48
  49 config HAVE_SCHED_CLOCK
  50         bool
  51
  52 config GENERIC_GPIO
  53         bool
  54
  55 config ARCH_USES_GETTIMEOFFSET
  56         bool
  57         default n
  58
  59 config GENERIC_CLOCKEVENTS
  60         bool
  61
  62 config GENERIC_CLOCKEVENTS_BROADCAST
  63         bool
  64         depends on GENERIC_CLOCKEVENTS
  65         default y if SMP
  66
  67 config KTIME_SCALAR
  68         bool
  69         default y
  70
  71 config HAVE_TCM
  72         bool
  73         select GENERIC_ALLOCATOR
  74
  75 config HAVE_PROC_CPU
  76         bool
  77
  78 config NO_IOPORT
  79         bool
  80
  81 config EISA
  82         bool
  83         ---help---
  84           The Extended Industry Standard Architecture (EISA) bus was
  85           developed as an open alternative to the IBM MicroChannel bus.
  86
  87           The EISA bus provided some of the features of the IBM MicroChannel
  88           bus while maintaining backward compatibility with cards made for
  89           the older ISA bus.  The EISA bus saw limited use between 1988 and
  90           1995 when it was made obsolete by the PCI bus.
  91
  92           Say Y here if you are building a kernel for an EISA-based machine.
  93
  94           Otherwise, say N.
  95
  96 config SBUS
  97         bool
  98
  99 config MCA
 100         bool
 101         help
 102           MicroChannel Architecture is found in some IBM PS/2 machines and
 103           laptops.  It is a bus system similar to PCI or ISA. See
 104           <file:Documentation/mca.txt> (and especially the web page given
 105           there) before attempting to build an MCA bus kernel.
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config HARDIRQS_SW_RESEND
 125         bool
 126         default y
 127
 128 config GENERIC_IRQ_PROBE
 129         bool
 130         default y
 131
 132 config GENERIC_LOCKBREAK
 133         bool
 134         default y
 135         depends on SMP && PREEMPT
 136
 137 config RWSEM_GENERIC_SPINLOCK
 138         bool
 139         default y
 140
 141 config RWSEM_XCHGADD_ALGORITHM
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U32
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U64
 148         bool
 149
 150 config ARCH_HAS_CPUFREQ
 151         bool
 152         help
 153           Internal node to signify that the ARCH has CPUFREQ support
 154           and that the relevant menu configurations are displayed for
 155           it.
 156
 157 config ARCH_HAS_CPU_IDLE_WAIT
 158        def_bool y
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config GENERIC_ISA_DMA
 178         bool
 179
 180 config FIQ
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 196         depends on EXPERIMENTAL
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary, or theoretically 64K
 206           for the MSM machine class.
 207
 208 config ARM_PATCH_PHYS_VIRT_16BIT
 209         def_bool y
 210         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 211         help
 212           This option extends the physical to virtual translation patching
 213           to allow physical memory down to a theoretical minimum of 64K
 214           boundaries.
 215
 216 source "init/Kconfig"
 217
 218 source "kernel/Kconfig.freezer"
 219
 220 menu "System Type"
 221
 222 config MMU
 223         bool "MMU-based Paged Memory Management Support"
 224         default y
 225         help
 226           Select if you want MMU-based virtualised addressing space
 227           support by paged memory management. If unsure, say 'Y'.
 228
 229 #
 230 # The "ARM system type" choice list is ordered alphabetically by option
 231 # text.  Please add new entries in the option alphabetic order.
 232 #
 233 choice
 234         prompt "ARM system type"
 235         default ARCH_VERSATILE
 236
 237 config ARCH_INTEGRATOR
 238         bool "ARM Ltd. Integrator family"
 239         select ARM_AMBA
 240         select ARCH_HAS_CPUFREQ
 241         select CLKDEV_LOOKUP
 242         select ICST
 243         select GENERIC_CLOCKEVENTS
 244         select PLAT_VERSATILE
 245         select PLAT_VERSATILE_FPGA_IRQ
 246         help
 247           Support for ARM's Integrator platform.
 248
 249 config ARCH_REALVIEW
 250         bool "ARM Ltd. RealView family"
 251         select ARM_AMBA
 252         select CLKDEV_LOOKUP
 253         select ICST
 254         select GENERIC_CLOCKEVENTS
 255         select ARCH_WANT_OPTIONAL_GPIOLIB
 256         select PLAT_VERSATILE
 257         select PLAT_VERSATILE_CLCD
 258         select ARM_TIMER_SP804
 259         select GPIO_PL061 if GPIOLIB
 260         help
 261           This enables support for ARM Ltd RealView boards.
 262
 263 config ARCH_VERSATILE
 264         bool "ARM Ltd. Versatile family"
 265         select ARM_AMBA
 266         select ARM_VIC
 267         select CLKDEV_LOOKUP
 268         select ICST
 269         select GENERIC_CLOCKEVENTS
 270         select ARCH_WANT_OPTIONAL_GPIOLIB
 271         select PLAT_VERSATILE
 272         select PLAT_VERSATILE_CLCD
 273         select PLAT_VERSATILE_FPGA_IRQ
 274         select ARM_TIMER_SP804
 275         help
 276           This enables support for ARM Ltd Versatile board.
 277
 278 config ARCH_VEXPRESS
 279         bool "ARM Ltd. Versatile Express family"
 280         select ARCH_WANT_OPTIONAL_GPIOLIB
 281         select ARM_AMBA
 282         select ARM_TIMER_SP804
 283         select CLKDEV_LOOKUP
 284         select GENERIC_CLOCKEVENTS
 285         select HAVE_CLK
 286         select HAVE_PATA_PLATFORM
 287         select ICST
 288         select PLAT_VERSATILE
 289         select PLAT_VERSATILE_CLCD
 290         help
 291           This enables support for the ARM Ltd Versatile Express boards.
 292
 293 config ARCH_AT91
 294         bool "Atmel AT91"
 295         select ARCH_REQUIRE_GPIOLIB
 296         select HAVE_CLK
 297         select CLKDEV_LOOKUP
 298         select ARM_PATCH_PHYS_VIRT if MMU
 299         help
 300           This enables support for systems based on the Atmel AT91RM9200,
 301           AT91SAM9 and AT91CAP9 processors.
 302
 303 config ARCH_BCMRING
 304         bool "Broadcom BCMRING"
 305         depends on MMU
 306         select CPU_V6
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select GENERIC_CLOCKEVENTS
 311         select ARCH_WANT_OPTIONAL_GPIOLIB
 312         help
 313           Support for Broadcom's BCMRing platform.
 314
 315 config ARCH_CLPS711X
 316         bool "Cirrus Logic CLPS711x/EP721x-based"
 317         select CPU_ARM720T
 318         select ARCH_USES_GETTIMEOFFSET
 319         help
 320           Support for Cirrus Logic 711x/721x based boards.
 321
 322 config ARCH_CNS3XXX
 323         bool "Cavium Networks CNS3XXX family"
 324         select CPU_V6
 325         select GENERIC_CLOCKEVENTS
 326         select ARM_GIC
 327         select MIGHT_HAVE_PCI
 328         select PCI_DOMAINS if PCI
 329         help
 330           Support for Cavium Networks CNS3XXX platform.
 331
 332 config ARCH_GEMINI
 333         bool "Cortina Systems Gemini"
 334         select CPU_FA526
 335         select ARCH_REQUIRE_GPIOLIB
 336         select ARCH_USES_GETTIMEOFFSET
 337         help
 338           Support for the Cortina Systems Gemini family SoCs
 339
 340 config ARCH_EBSA110
 341         bool "EBSA-110"
 342         select CPU_SA110
 343         select ISA
 344         select NO_IOPORT
 345         select ARCH_USES_GETTIMEOFFSET
 346         help
 347           This is an evaluation board for the StrongARM processor available
 348           from Digital. It has limited hardware on-board, including an
 349           Ethernet interface, two PCMCIA sockets, two serial ports and a
 350           parallel port.
 351
 352 config ARCH_EP93XX
 353         bool "EP93xx-based"
 354         select CPU_ARM920T
 355         select ARM_AMBA
 356         select ARM_VIC
 357         select CLKDEV_LOOKUP
 358         select ARCH_REQUIRE_GPIOLIB
 359         select ARCH_HAS_HOLES_MEMORYMODEL
 360         select ARCH_USES_GETTIMEOFFSET
 361         help
 362           This enables support for the Cirrus EP93xx series of CPUs.
 363
 364 config ARCH_FOOTBRIDGE
 365         bool "FootBridge"
 366         select CPU_SA110
 367         select FOOTBRIDGE
 368         select GENERIC_CLOCKEVENTS
 369         help
 370           Support for systems based on the DC21285 companion chip
 371           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 372
 373 config ARCH_MXC
 374         bool "Freescale MXC/iMX-based"
 375         select GENERIC_CLOCKEVENTS
 376         select ARCH_REQUIRE_GPIOLIB
 377         select CLKDEV_LOOKUP
 378         select CLKSRC_MMIO
 379         select HAVE_SCHED_CLOCK
 380         help
 381           Support for Freescale MXC/iMX-based family of processors
 382
 383 config ARCH_MXS
 384         bool "Freescale MXS-based"
 385         select GENERIC_CLOCKEVENTS
 386         select ARCH_REQUIRE_GPIOLIB
 387         select CLKDEV_LOOKUP
 388         select CLKSRC_MMIO
 389         help
 390           Support for Freescale MXS-based family of processors
 391
 392 config ARCH_NETX
 393         bool "Hilscher NetX based"
 394         select CLKSRC_MMIO
 395         select CPU_ARM926T
 396         select ARM_VIC
 397         select GENERIC_CLOCKEVENTS
 398         help
 399           This enables support for systems based on the Hilscher NetX Soc
 400
 401 config ARCH_H720X
 402         bool "Hynix HMS720x-based"
 403         select CPU_ARM720T
 404         select ISA_DMA_API
 405         select ARCH_USES_GETTIMEOFFSET
 406         help
 407           This enables support for systems based on the Hynix HMS720x
 408
 409 config ARCH_IOP13XX
 410         bool "IOP13xx-based"
 411         depends on MMU
 412         select CPU_XSC3
 413         select PLAT_IOP
 414         select PCI
 415         select ARCH_SUPPORTS_MSI
 416         select VMSPLIT_1G
 417         help
 418           Support for Intel's IOP13XX (XScale) family of processors.
 419
 420 config ARCH_IOP32X
 421         bool "IOP32x-based"
 422         depends on MMU
 423         select CPU_XSCALE
 424         select PLAT_IOP
 425         select PCI
 426         select ARCH_REQUIRE_GPIOLIB
 427         help
 428           Support for Intel's 80219 and IOP32X (XScale) family of
 429           processors.
 430
 431 config ARCH_IOP33X
 432         bool "IOP33x-based"
 433         depends on MMU
 434         select CPU_XSCALE
 435         select PLAT_IOP
 436         select PCI
 437         select ARCH_REQUIRE_GPIOLIB
 438         help
 439           Support for Intel's IOP33X (XScale) family of processors.
 440
 441 config ARCH_IXP23XX
 442         bool "IXP23XX-based"
 443         depends on MMU
 444         select CPU_XSC3
 445         select PCI
 446         select ARCH_USES_GETTIMEOFFSET
 447         help
 448           Support for Intel's IXP23xx (XScale) family of processors.
 449
 450 config ARCH_IXP2000
 451         bool "IXP2400/2800-based"
 452         depends on MMU
 453         select CPU_XSCALE
 454         select PCI
 455         select ARCH_USES_GETTIMEOFFSET
 456         help
 457           Support for Intel's IXP2400/2800 (XScale) family of processors.
 458
 459 config ARCH_IXP4XX
 460         bool "IXP4xx-based"
 461         depends on MMU
 462         select CLKSRC_MMIO
 463         select CPU_XSCALE
 464         select GENERIC_GPIO
 465         select GENERIC_CLOCKEVENTS
 466         select HAVE_SCHED_CLOCK
 467         select MIGHT_HAVE_PCI
 468         select DMABOUNCE if PCI
 469         help
 470           Support for Intel's IXP4XX (XScale) family of processors.
 471
 472 config ARCH_DOVE
 473         bool "Marvell Dove"
 474         select CPU_V7
 475         select PCI
 476         select ARCH_REQUIRE_GPIOLIB
 477         select GENERIC_CLOCKEVENTS
 478         select PLAT_ORION
 479         help
 480           Support for the Marvell Dove SoC 88AP510
 481
 482 config ARCH_KIRKWOOD
 483         bool "Marvell Kirkwood"
 484         select CPU_FEROCEON
 485         select PCI
 486         select ARCH_REQUIRE_GPIOLIB
 487         select GENERIC_CLOCKEVENTS
 488         select PLAT_ORION
 489         help
 490           Support for the following Marvell Kirkwood series SoCs:
 491           88F6180, 88F6192 and 88F6281.
 492
 493 config ARCH_LOKI
 494         bool "Marvell Loki (88RC8480)"
 495         select CPU_FEROCEON
 496         select GENERIC_CLOCKEVENTS
 497         select PLAT_ORION
 498         help
 499           Support for the Marvell Loki (88RC8480) SoC.
 500
 501 config ARCH_LPC32XX
 502         bool "NXP LPC32XX"
 503         select CLKSRC_MMIO
 504         select CPU_ARM926T
 505         select ARCH_REQUIRE_GPIOLIB
 506         select HAVE_IDE
 507         select ARM_AMBA
 508         select USB_ARCH_HAS_OHCI
 509         select CLKDEV_LOOKUP
 510         select GENERIC_TIME
 511         select GENERIC_CLOCKEVENTS
 512         help
 513           Support for the NXP LPC32XX family of processors
 514
 515 config ARCH_MV78XX0
 516         bool "Marvell MV78xx0"
 517         select CPU_FEROCEON
 518         select PCI
 519         select ARCH_REQUIRE_GPIOLIB
 520         select GENERIC_CLOCKEVENTS
 521         select PLAT_ORION
 522         help
 523           Support for the following Marvell MV78xx0 series SoCs:
 524           MV781x0, MV782x0.
 525
 526 config ARCH_ORION5X
 527         bool "Marvell Orion"
 528         depends on MMU
 529         select CPU_FEROCEON
 530         select PCI
 531         select ARCH_REQUIRE_GPIOLIB
 532         select GENERIC_CLOCKEVENTS
 533         select PLAT_ORION
 534         help
 535           Support for the following Marvell Orion 5x series SoCs:
 536           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 537           Orion-2 (5281), Orion-1-90 (6183).
 538
 539 config ARCH_MMP
 540         bool "Marvell PXA168/910/MMP2"
 541         depends on MMU
 542         select ARCH_REQUIRE_GPIOLIB
 543         select CLKDEV_LOOKUP
 544         select GENERIC_CLOCKEVENTS
 545         select HAVE_SCHED_CLOCK
 546         select TICK_ONESHOT
 547         select PLAT_PXA
 548         select SPARSE_IRQ
 549         help
 550           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 551
 552 config ARCH_KS8695
 553         bool "Micrel/Kendin KS8695"
 554         select CPU_ARM922T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select ARCH_USES_GETTIMEOFFSET
 557         help
 558           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 559           System-on-Chip devices.
 560
 561 config ARCH_W90X900
 562         bool "Nuvoton W90X900 CPU"
 563         select CPU_ARM926T
 564         select ARCH_REQUIRE_GPIOLIB
 565         select CLKDEV_LOOKUP
 566         select CLKSRC_MMIO
 567         select GENERIC_CLOCKEVENTS
 568         help
 569           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 570           At present, the w90x900 has been renamed nuc900, regarding
 571           the ARM series product line, you can login the following
 572           link address to know more.
 573
 574           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 575                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 576
 577 config ARCH_NUC93X
 578         bool "Nuvoton NUC93X CPU"
 579         select CPU_ARM926T
 580         select CLKDEV_LOOKUP
 581         help
 582           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 583           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 584
 585 config ARCH_TEGRA
 586         bool "NVIDIA Tegra"
 587         select CLKDEV_LOOKUP
 588         select CLKSRC_MMIO
 589         select GENERIC_TIME
 590         select GENERIC_CLOCKEVENTS
 591         select GENERIC_GPIO
 592         select HAVE_CLK
 593         select HAVE_SCHED_CLOCK
 594         select ARCH_HAS_BARRIERS if CACHE_L2X0
 595         select ARCH_HAS_CPUFREQ
 596         help
 597           This enables support for NVIDIA Tegra based systems (Tegra APX,
 598           Tegra 6xx and Tegra 2 series).
 599
 600 config ARCH_PNX4008
 601         bool "Philips Nexperia PNX4008 Mobile"
 602         select CPU_ARM926T
 603         select CLKDEV_LOOKUP
 604         select ARCH_USES_GETTIMEOFFSET
 605         help
 606           This enables support for Philips PNX4008 mobile platform.
 607
 608 config ARCH_PXA
 609         bool "PXA2xx/PXA3xx-based"
 610         depends on MMU
 611         select ARCH_MTD_XIP
 612         select ARCH_HAS_CPUFREQ
 613         select CLKDEV_LOOKUP
 614         select CLKSRC_MMIO
 615         select ARCH_REQUIRE_GPIOLIB
 616         select GENERIC_CLOCKEVENTS
 617         select HAVE_SCHED_CLOCK
 618         select TICK_ONESHOT
 619         select PLAT_PXA
 620         select SPARSE_IRQ
 621         help
 622           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 623
 624 config ARCH_MSM
 625         bool "Qualcomm MSM"
 626         select HAVE_CLK
 627         select GENERIC_CLOCKEVENTS
 628         select ARCH_REQUIRE_GPIOLIB
 629         select CLKDEV_LOOKUP
 630         help
 631           Support for Qualcomm MSM/QSD based systems.  This runs on the
 632           apps processor of the MSM/QSD and depends on a shared memory
 633           interface to the modem processor which runs the baseband
 634           stack and controls some vital subsystems
 635           (clock and power control, etc).
 636
 637 config ARCH_SHMOBILE
 638         bool "Renesas SH-Mobile / R-Mobile"
 639         select HAVE_CLK
 640         select CLKDEV_LOOKUP
 641         select GENERIC_CLOCKEVENTS
 642         select NO_IOPORT
 643         select SPARSE_IRQ
 644         select MULTI_IRQ_HANDLER
 645         help
 646           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 647
 648 config ARCH_RPC
 649         bool "RiscPC"
 650         select ARCH_ACORN
 651         select FIQ
 652         select TIMER_ACORN
 653         select ARCH_MAY_HAVE_PC_FDC
 654         select HAVE_PATA_PLATFORM
 655         select ISA_DMA_API
 656         select NO_IOPORT
 657         select ARCH_SPARSEMEM_ENABLE
 658         select ARCH_USES_GETTIMEOFFSET
 659         help
 660           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 661           CD-ROM interface, serial and parallel port, and the floppy drive.
 662
 663 config ARCH_SA1100
 664         bool "SA1100-based"
 665         select CLKSRC_MMIO
 666         select CPU_SA1100
 667         select ISA
 668         select ARCH_SPARSEMEM_ENABLE
 669         select ARCH_MTD_XIP
 670         select ARCH_HAS_CPUFREQ
 671         select CPU_FREQ
 672         select GENERIC_CLOCKEVENTS
 673         select HAVE_CLK
 674         select HAVE_SCHED_CLOCK
 675         select TICK_ONESHOT
 676         select ARCH_REQUIRE_GPIOLIB
 677         help
 678           Support for StrongARM 11x0 based boards.
 679
 680 config ARCH_S3C2410
 681         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 682         select GENERIC_GPIO
 683         select ARCH_HAS_CPUFREQ
 684         select HAVE_CLK
 685         select CLKDEV_LOOKUP
 686         select ARCH_USES_GETTIMEOFFSET
 687         select HAVE_S3C2410_I2C if I2C
 688         help
 689           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 690           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 691           the Samsung SMDK2410 development board (and derivatives).
 692
 693           Note, the S3C2416 and the S3C2450 are so close that they even share
 694           the same SoC ID code. This means that there is no separate machine
 695           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 696
 697 config ARCH_S3C64XX
 698         bool "Samsung S3C64XX"
 699         select PLAT_SAMSUNG
 700         select CPU_V6
 701         select ARM_VIC
 702         select HAVE_CLK
 703         select CLKDEV_LOOKUP
 704         select NO_IOPORT
 705         select ARCH_USES_GETTIMEOFFSET
 706         select ARCH_HAS_CPUFREQ
 707         select ARCH_REQUIRE_GPIOLIB
 708         select SAMSUNG_CLKSRC
 709         select SAMSUNG_IRQ_VIC_TIMER
 710         select SAMSUNG_IRQ_UART
 711         select S3C_GPIO_TRACK
 712         select S3C_GPIO_PULL_UPDOWN
 713         select S3C_GPIO_CFG_S3C24XX
 714         select S3C_GPIO_CFG_S3C64XX
 715         select S3C_DEV_NAND
 716         select USB_ARCH_HAS_OHCI
 717         select SAMSUNG_GPIOLIB_4BIT
 718         select HAVE_S3C2410_I2C if I2C
 719         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 720         help
 721           Samsung S3C64XX series based systems
 722
 723 config ARCH_S5P64X0
 724         bool "Samsung S5P6440 S5P6450"
 725         select CPU_V6
 726         select GENERIC_GPIO
 727         select HAVE_CLK
 728         select CLKDEV_LOOKUP
 729         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 730         select GENERIC_CLOCKEVENTS
 731         select HAVE_SCHED_CLOCK
 732         select HAVE_S3C2410_I2C if I2C
 733         select HAVE_S3C_RTC if RTC_CLASS
 734         help
 735           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 736           SMDK6450.
 737
 738 config ARCH_S5PC100
 739         bool "Samsung S5PC100"
 740         select GENERIC_GPIO
 741         select HAVE_CLK
 742         select CPU_V7
 743         select ARM_L1_CACHE_SHIFT_6
 744         select ARCH_USES_GETTIMEOFFSET
 745         select HAVE_S3C2410_I2C if I2C
 746         select HAVE_S3C_RTC if RTC_CLASS
 747         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 748         help
 749           Samsung S5PC100 series based systems
 750
 751 config ARCH_S5PV210
 752         bool "Samsung S5PV210/S5PC110"
 753         select CPU_V7
 754         select ARCH_SPARSEMEM_ENABLE
 755         select GENERIC_GPIO
 756         select HAVE_CLK
 757         select ARM_L1_CACHE_SHIFT_6
 758         select ARCH_HAS_CPUFREQ
 759         select GENERIC_CLOCKEVENTS
 760         select HAVE_SCHED_CLOCK
 761         select HAVE_S3C2410_I2C if I2C
 762         select HAVE_S3C_RTC if RTC_CLASS
 763         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 764         help
 765           Samsung S5PV210/S5PC110 series based systems
 766
 767 config ARCH_EXYNOS4
 768         bool "Samsung EXYNOS4"
 769         select CPU_V7
 770         select ARCH_SPARSEMEM_ENABLE
 771         select GENERIC_GPIO
 772         select HAVE_CLK
 773         select ARCH_HAS_CPUFREQ
 774         select GENERIC_CLOCKEVENTS
 775         select HAVE_S3C_RTC if RTC_CLASS
 776         select HAVE_S3C2410_I2C if I2C
 777         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 778         help
 779           Samsung EXYNOS4 series based systems
 780
 781 config ARCH_SHARK
 782         bool "Shark"
 783         select CPU_SA110
 784         select ISA
 785         select ISA_DMA
 786         select ZONE_DMA
 787         select PCI
 788         select ARCH_USES_GETTIMEOFFSET
 789         help
 790           Support for the StrongARM based Digital DNARD machine, also known
 791           as "Shark" (<http://www.shark-linux.de/shark.html>).
 792
 793 config ARCH_TCC_926
 794         bool "Telechips TCC ARM926-based systems"
 795         select CLKSRC_MMIO
 796         select CPU_ARM926T
 797         select HAVE_CLK
 798         select CLKDEV_LOOKUP
 799         select GENERIC_CLOCKEVENTS
 800         help
 801           Support for Telechips TCC ARM926-based systems.
 802
 803 config ARCH_U300
 804         bool "ST-Ericsson U300 Series"
 805         depends on MMU
 806         select CLKSRC_MMIO
 807         select CPU_ARM926T
 808         select HAVE_SCHED_CLOCK
 809         select HAVE_TCM
 810         select ARM_AMBA
 811         select ARM_VIC
 812         select GENERIC_CLOCKEVENTS
 813         select CLKDEV_LOOKUP
 814         select GENERIC_GPIO
 815         help
 816           Support for ST-Ericsson U300 series mobile platforms.
 817
 818 config ARCH_U8500
 819         bool "ST-Ericsson U8500 Series"
 820         select CPU_V7
 821         select ARM_AMBA
 822         select GENERIC_CLOCKEVENTS
 823         select CLKDEV_LOOKUP
 824         select ARCH_REQUIRE_GPIOLIB
 825         select ARCH_HAS_CPUFREQ
 826         help
 827           Support for ST-Ericsson's Ux500 architecture
 828
 829 config ARCH_NOMADIK
 830         bool "STMicroelectronics Nomadik"
 831         select ARM_AMBA
 832         select ARM_VIC
 833         select CPU_ARM926T
 834         select CLKDEV_LOOKUP
 835         select GENERIC_CLOCKEVENTS
 836         select ARCH_REQUIRE_GPIOLIB
 837         help
 838           Support for the Nomadik platform by ST-Ericsson
 839
 840 config ARCH_DAVINCI
 841         bool "TI DaVinci"
 842         select GENERIC_CLOCKEVENTS
 843         select ARCH_REQUIRE_GPIOLIB
 844         select ZONE_DMA
 845         select HAVE_IDE
 846         select CLKDEV_LOOKUP
 847         select GENERIC_ALLOCATOR
 848         select GENERIC_IRQ_CHIP
 849         select ARCH_HAS_HOLES_MEMORYMODEL
 850         help
 851           Support for TI's DaVinci platform.
 852
 853 config ARCH_OMAP
 854         bool "TI OMAP"
 855         select HAVE_CLK
 856         select ARCH_REQUIRE_GPIOLIB
 857         select ARCH_HAS_CPUFREQ
 858         select GENERIC_CLOCKEVENTS
 859         select HAVE_SCHED_CLOCK
 860         select ARCH_HAS_HOLES_MEMORYMODEL
 861         help
 862           Support for TI's OMAP platform (OMAP1/2/3/4).
 863
 864 config PLAT_SPEAR
 865         bool "ST SPEAr"
 866         select ARM_AMBA
 867         select ARCH_REQUIRE_GPIOLIB
 868         select CLKDEV_LOOKUP
 869         select CLKSRC_MMIO
 870         select GENERIC_CLOCKEVENTS
 871         select HAVE_CLK
 872         help
 873           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 874
 875 config ARCH_VT8500
 876         bool "VIA/WonderMedia 85xx"
 877         select CPU_ARM926T
 878         select GENERIC_GPIO
 879         select ARCH_HAS_CPUFREQ
 880         select GENERIC_CLOCKEVENTS
 881         select ARCH_REQUIRE_GPIOLIB
 882         select HAVE_PWM
 883         help
 884           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 885 endchoice
 886
 887 #
 888 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 889 # Kconfigs may be included either alphabetically (according to the
 890 # plat- suffix) or along side the corresponding mach-* source.
 891 #
 892 source "arch/arm/mach-at91/Kconfig"
 893
 894 source "arch/arm/mach-bcmring/Kconfig"
 895
 896 source "arch/arm/mach-clps711x/Kconfig"
 897
 898 source "arch/arm/mach-cns3xxx/Kconfig"
 899
 900 source "arch/arm/mach-davinci/Kconfig"
 901
 902 source "arch/arm/mach-dove/Kconfig"
 903
 904 source "arch/arm/mach-ep93xx/Kconfig"
 905
 906 source "arch/arm/mach-footbridge/Kconfig"
 907
 908 source "arch/arm/mach-gemini/Kconfig"
 909
 910 source "arch/arm/mach-h720x/Kconfig"
 911
 912 source "arch/arm/mach-integrator/Kconfig"
 913
 914 source "arch/arm/mach-iop32x/Kconfig"
 915
 916 source "arch/arm/mach-iop33x/Kconfig"
 917
 918 source "arch/arm/mach-iop13xx/Kconfig"
 919
 920 source "arch/arm/mach-ixp4xx/Kconfig"
 921
 922 source "arch/arm/mach-ixp2000/Kconfig"
 923
 924 source "arch/arm/mach-ixp23xx/Kconfig"
 925
 926 source "arch/arm/mach-kirkwood/Kconfig"
 927
 928 source "arch/arm/mach-ks8695/Kconfig"
 929
 930 source "arch/arm/mach-loki/Kconfig"
 931
 932 source "arch/arm/mach-lpc32xx/Kconfig"
 933
 934 source "arch/arm/mach-msm/Kconfig"
 935
 936 source "arch/arm/mach-mv78xx0/Kconfig"
 937
 938 source "arch/arm/plat-mxc/Kconfig"
 939
 940 source "arch/arm/mach-mxs/Kconfig"
 941
 942 source "arch/arm/mach-netx/Kconfig"
 943
 944 source "arch/arm/mach-nomadik/Kconfig"
 945 source "arch/arm/plat-nomadik/Kconfig"
 946
 947 source "arch/arm/mach-nuc93x/Kconfig"
 948
 949 source "arch/arm/plat-omap/Kconfig"
 950
 951 source "arch/arm/mach-omap1/Kconfig"
 952
 953 source "arch/arm/mach-omap2/Kconfig"
 954
 955 source "arch/arm/mach-orion5x/Kconfig"
 956
 957 source "arch/arm/mach-pxa/Kconfig"
 958 source "arch/arm/plat-pxa/Kconfig"
 959
 960 source "arch/arm/mach-mmp/Kconfig"
 961
 962 source "arch/arm/mach-realview/Kconfig"
 963
 964 source "arch/arm/mach-sa1100/Kconfig"
 965
 966 source "arch/arm/plat-samsung/Kconfig"
 967 source "arch/arm/plat-s3c24xx/Kconfig"
 968 source "arch/arm/plat-s5p/Kconfig"
 969
 970 source "arch/arm/plat-spear/Kconfig"
 971
 972 source "arch/arm/plat-tcc/Kconfig"
 973
 974 if ARCH_S3C2410
 975 source "arch/arm/mach-s3c2400/Kconfig"
 976 source "arch/arm/mach-s3c2410/Kconfig"
 977 source "arch/arm/mach-s3c2412/Kconfig"
 978 source "arch/arm/mach-s3c2416/Kconfig"
 979 source "arch/arm/mach-s3c2440/Kconfig"
 980 source "arch/arm/mach-s3c2443/Kconfig"
 981 endif
 982
 983 if ARCH_S3C64XX
 984 source "arch/arm/mach-s3c64xx/Kconfig"
 985 endif
 986
 987 source "arch/arm/mach-s5p64x0/Kconfig"
 988
 989 source "arch/arm/mach-s5pc100/Kconfig"
 990
 991 source "arch/arm/mach-s5pv210/Kconfig"
 992
 993 source "arch/arm/mach-exynos4/Kconfig"
 994
 995 source "arch/arm/mach-shmobile/Kconfig"
 996
 997 source "arch/arm/mach-tegra/Kconfig"
 998
 999 source "arch/arm/mach-u300/Kconfig"
1000
1001 source "arch/arm/mach-ux500/Kconfig"
1002
1003 source "arch/arm/mach-versatile/Kconfig"
1004
1005 source "arch/arm/mach-vexpress/Kconfig"
1006 source "arch/arm/plat-versatile/Kconfig"
1007
1008 source "arch/arm/mach-vt8500/Kconfig"
1009
1010 source "arch/arm/mach-w90x900/Kconfig"
1011
1012 # Definitions to make life easier
1013 config ARCH_ACORN
1014         bool
1015
1016 config PLAT_IOP
1017         bool
1018         select GENERIC_CLOCKEVENTS
1019         select HAVE_SCHED_CLOCK
1020
1021 config PLAT_ORION
1022         bool
1023         select CLKSRC_MMIO
1024         select GENERIC_IRQ_CHIP
1025         select HAVE_SCHED_CLOCK
1026
1027 config PLAT_PXA
1028         bool
1029
1030 config PLAT_VERSATILE
1031         bool
1032
1033 config ARM_TIMER_SP804
1034         bool
1035         select CLKSRC_MMIO
1036
1037 source arch/arm/mm/Kconfig
1038
1039 config IWMMXT
1040         bool "Enable iWMMXt support"
1041         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1042         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1043         help
1044           Enable support for iWMMXt context switching at run time if
1045           running on a CPU that supports it.
1046
1047 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1048 config XSCALE_PMU
1049         bool
1050         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1051         default y
1052
1053 config CPU_HAS_PMU
1054         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1055                    (!ARCH_OMAP3 || OMAP3_EMU)
1056         default y
1057         bool
1058
1059 config MULTI_IRQ_HANDLER
1060         bool
1061         help
1062           Allow each machine to specify it's own IRQ handler at run time.
1063
1064 if !MMU
1065 source "arch/arm/Kconfig-nommu"
1066 endif
1067
1068 config ARM_ERRATA_411920
1069         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1070         depends on CPU_V6 || CPU_V6K
1071         help
1072           Invalidation of the Instruction Cache operation can
1073           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1074           It does not affect the MPCore. This option enables the ARM Ltd.
1075           recommended workaround.
1076
1077 config ARM_ERRATA_430973
1078         bool "ARM errata: Stale prediction on replaced interworking branch"
1079         depends on CPU_V7
1080         help
1081           This option enables the workaround for the 430973 Cortex-A8
1082           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1083           interworking branch is replaced with another code sequence at the
1084           same virtual address, whether due to self-modifying code or virtual
1085           to physical address re-mapping, Cortex-A8 does not recover from the
1086           stale interworking branch prediction. This results in Cortex-A8
1087           executing the new code sequence in the incorrect ARM or Thumb state.
1088           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1089           and also flushes the branch target cache at every context switch.
1090           Note that setting specific bits in the ACTLR register may not be
1091           available in non-secure mode.
1092
1093 config ARM_ERRATA_458693
1094         bool "ARM errata: Processor deadlock when a false hazard is created"
1095         depends on CPU_V7
1096         help
1097           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1098           erratum. For very specific sequences of memory operations, it is
1099           possible for a hazard condition intended for a cache line to instead
1100           be incorrectly associated with a different cache line. This false
1101           hazard might then cause a processor deadlock. The workaround enables
1102           the L1 caching of the NEON accesses and disables the PLD instruction
1103           in the ACTLR register. Note that setting specific bits in the ACTLR
1104           register may not be available in non-secure mode.
1105
1106 config ARM_ERRATA_460075
1107         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1108         depends on CPU_V7
1109         help
1110           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1111           erratum. Any asynchronous access to the L2 cache may encounter a
1112           situation in which recent store transactions to the L2 cache are lost
1113           and overwritten with stale memory contents from external memory. The
1114           workaround disables the write-allocate mode for the L2 cache via the
1115           ACTLR register. Note that setting specific bits in the ACTLR register
1116           may not be available in non-secure mode.
1117
1118 config ARM_ERRATA_742230
1119         bool "ARM errata: DMB operation may be faulty"
1120         depends on CPU_V7 && SMP
1121         help
1122           This option enables the workaround for the 742230 Cortex-A9
1123           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1124           between two write operations may not ensure the correct visibility
1125           ordering of the two writes. This workaround sets a specific bit in
1126           the diagnostic register of the Cortex-A9 which causes the DMB
1127           instruction to behave as a DSB, ensuring the correct behaviour of
1128           the two writes.
1129
1130 config ARM_ERRATA_742231
1131         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1132         depends on CPU_V7 && SMP
1133         help
1134           This option enables the workaround for the 742231 Cortex-A9
1135           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1136           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1137           accessing some data located in the same cache line, may get corrupted
1138           data due to bad handling of the address hazard when the line gets
1139           replaced from one of the CPUs at the same time as another CPU is
1140           accessing it. This workaround sets specific bits in the diagnostic
1141           register of the Cortex-A9 which reduces the linefill issuing
1142           capabilities of the processor.
1143
1144 config PL310_ERRATA_588369
1145         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1146         depends on CACHE_L2X0
1147         help
1148            The PL310 L2 cache controller implements three types of Clean &
1149            Invalidate maintenance operations: by Physical Address
1150            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1151            They are architecturally defined to behave as the execution of a
1152            clean operation followed immediately by an invalidate operation,
1153            both performing to the same memory location. This functionality
1154            is not correctly implemented in PL310 as clean lines are not
1155            invalidated as a result of these operations.
1156
1157 config ARM_ERRATA_720789
1158         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1159         depends on CPU_V7 && SMP
1160         help
1161           This option enables the workaround for the 720789 Cortex-A9 (prior to
1162           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1163           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1164           As a consequence of this erratum, some TLB entries which should be
1165           invalidated are not, resulting in an incoherency in the system page
1166           tables. The workaround changes the TLB flushing routines to invalidate
1167           entries regardless of the ASID.
1168
1169 config PL310_ERRATA_727915
1170         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1171         depends on CACHE_L2X0
1172         help
1173           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1174           operation (offset 0x7FC). This operation runs in background so that
1175           PL310 can handle normal accesses while it is in progress. Under very
1176           rare circumstances, due to this erratum, write data can be lost when
1177           PL310 treats a cacheable write transaction during a Clean &
1178           Invalidate by Way operation.
1179
1180 config ARM_ERRATA_743622
1181         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1182         depends on CPU_V7
1183         help
1184           This option enables the workaround for the 743622 Cortex-A9
1185           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1186           optimisation in the Cortex-A9 Store Buffer may lead to data
1187           corruption. This workaround sets a specific bit in the diagnostic
1188           register of the Cortex-A9 which disables the Store Buffer
1189           optimisation, preventing the defect from occurring. This has no
1190           visible impact on the overall performance or power consumption of the
1191           processor.
1192
1193 config ARM_ERRATA_751472
1194         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1195         depends on CPU_V7 && SMP
1196         help
1197           This option enables the workaround for the 751472 Cortex-A9 (prior
1198           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1199           completion of a following broadcasted operation if the second
1200           operation is received by a CPU before the ICIALLUIS has completed,
1201           potentially leading to corrupted entries in the cache or TLB.
1202
1203 config ARM_ERRATA_753970
1204         bool "ARM errata: cache sync operation may be faulty"
1205         depends on CACHE_PL310
1206         help
1207           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1208
1209           Under some condition the effect of cache sync operation on
1210           the store buffer still remains when the operation completes.
1211           This means that the store buffer is always asked to drain and
1212           this prevents it from merging any further writes. The workaround
1213           is to replace the normal offset of cache sync operation (0x730)
1214           by another offset targeting an unmapped PL310 register 0x740.
1215           This has the same effect as the cache sync operation: store buffer
1216           drain and waiting for all buffers empty.
1217
1218 config ARM_ERRATA_754322
1219         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1220         depends on CPU_V7
1221         help
1222           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1223           r3p*) erratum. A speculative memory access may cause a page table walk
1224           which starts prior to an ASID switch but completes afterwards. This
1225           can populate the micro-TLB with a stale entry which may be hit with
1226           the new ASID. This workaround places two dsb instructions in the mm
1227           switching code so that no page table walks can cross the ASID switch.
1228
1229 config ARM_ERRATA_754327
1230         bool "ARM errata: no automatic Store Buffer drain"
1231         depends on CPU_V7 && SMP
1232         help
1233           This option enables the workaround for the 754327 Cortex-A9 (prior to
1234           r2p0) erratum. The Store Buffer does not have any automatic draining
1235           mechanism and therefore a livelock may occur if an external agent
1236           continuously polls a memory location waiting to observe an update.
1237           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1238           written polling loops from denying visibility of updates to memory.
1239
1240 endmenu
1241
1242 source "arch/arm/common/Kconfig"
1243
1244 menu "Bus support"
1245
1246 config ARM_AMBA
1247         bool
1248
1249 config ISA
1250         bool
1251         help
1252           Find out whether you have ISA slots on your motherboard.  ISA is the
1253           name of a bus system, i.e. the way the CPU talks to the other stuff
1254           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1255           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1256           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1257
1258 # Select ISA DMA controller support
1259 config ISA_DMA
1260         bool
1261         select ISA_DMA_API
1262
1263 # Select ISA DMA interface
1264 config ISA_DMA_API
1265         bool
1266
1267 config PCI
1268         bool "PCI support" if MIGHT_HAVE_PCI
1269         help
1270           Find out whether you have a PCI motherboard. PCI is the name of a
1271           bus system, i.e. the way the CPU talks to the other stuff inside
1272           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1273           VESA. If you have PCI, say Y, otherwise N.
1274
1275 config PCI_DOMAINS
1276         bool
1277         depends on PCI
1278
1279 config PCI_NANOENGINE
1280         bool "BSE nanoEngine PCI support"
1281         depends on SA1100_NANOENGINE
1282         help
1283           Enable PCI on the BSE nanoEngine board.
1284
1285 config PCI_SYSCALL
1286         def_bool PCI
1287
1288 # Select the host bridge type
1289 config PCI_HOST_VIA82C505
1290         bool
1291         depends on PCI && ARCH_SHARK
1292         default y
1293
1294 config PCI_HOST_ITE8152
1295         bool
1296         depends on PCI && MACH_ARMCORE
1297         default y
1298         select DMABOUNCE
1299
1300 source "drivers/pci/Kconfig"
1301
1302 source "drivers/pcmcia/Kconfig"
1303
1304 endmenu
1305
1306 menu "Kernel Features"
1307
1308 source "kernel/time/Kconfig"
1309
1310 config SMP
1311         bool "Symmetric Multi-Processing"
1312         depends on CPU_V6K || CPU_V7
1313         depends on GENERIC_CLOCKEVENTS
1314         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1315                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1316                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1317                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1318         select USE_GENERIC_SMP_HELPERS
1319         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1320         help
1321           This enables support for systems with more than one CPU. If you have
1322           a system with only one CPU, like most personal computers, say N. If
1323           you have a system with more than one CPU, say Y.
1324
1325           If you say N here, the kernel will run on single and multiprocessor
1326           machines, but will use only one CPU of a multiprocessor machine. If
1327           you say Y here, the kernel will run on many, but not all, single
1328           processor machines. On a single processor machine, the kernel will
1329           run faster if you say N here.
1330
1331           See also <file:Documentation/i386/IO-APIC.txt>,
1332           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1333           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1334
1335           If you don't know what to do here, say N.
1336
1337 config SMP_ON_UP
1338         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1339         depends on EXPERIMENTAL
1340         depends on SMP && !XIP_KERNEL
1341         default y
1342         help
1343           SMP kernels contain instructions which fail on non-SMP processors.
1344           Enabling this option allows the kernel to modify itself to make
1345           these instructions safe.  Disabling it allows about 1K of space
1346           savings.
1347
1348           If you don't know what to do here, say Y.
1349
1350 config HAVE_ARM_SCU
1351         bool
1352         depends on SMP
1353         help
1354           This option enables support for the ARM system coherency unit
1355
1356 config HAVE_ARM_TWD
1357         bool
1358         depends on SMP
1359         select TICK_ONESHOT
1360         help
1361           This options enables support for the ARM timer and watchdog unit
1362
1363 choice
1364         prompt "Memory split"
1365         default VMSPLIT_3G
1366         help
1367           Select the desired split between kernel and user memory.
1368
1369           If you are not absolutely sure what you are doing, leave this
1370           option alone!
1371
1372         config VMSPLIT_3G
1373                 bool "3G/1G user/kernel split"
1374         config VMSPLIT_2G
1375                 bool "2G/2G user/kernel split"
1376         config VMSPLIT_1G
1377                 bool "1G/3G user/kernel split"
1378 endchoice
1379
1380 config PAGE_OFFSET
1381         hex
1382         default 0x40000000 if VMSPLIT_1G
1383         default 0x80000000 if VMSPLIT_2G
1384         default 0xC0000000
1385
1386 config NR_CPUS
1387         int "Maximum number of CPUs (2-32)"
1388         range 2 32
1389         depends on SMP
1390         default "4"
1391
1392 config HOTPLUG_CPU
1393         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1394         depends on SMP && HOTPLUG && EXPERIMENTAL
1395         help
1396           Say Y here to experiment with turning CPUs off and on.  CPUs
1397           can be controlled through /sys/devices/system/cpu.
1398
1399 config LOCAL_TIMERS
1400         bool "Use local timer interrupts"
1401         depends on SMP
1402         default y
1403         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1404         help
1405           Enable support for local timers on SMP platforms, rather then the
1406           legacy IPI broadcast method.  Local timers allows the system
1407           accounting to be spread across the timer interval, preventing a
1408           "thundering herd" at every timer tick.
1409
1410 source kernel/Kconfig.preempt
1411
1412 config HZ
1413         int
1414         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1415                 ARCH_S5PV210 || ARCH_EXYNOS4
1416         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1417         default AT91_TIMER_HZ if ARCH_AT91
1418         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1419         default 100
1420
1421 config THUMB2_KERNEL
1422         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1423         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1424         select AEABI
1425         select ARM_ASM_UNIFIED
1426         help
1427           By enabling this option, the kernel will be compiled in
1428           Thumb-2 mode. A compiler/assembler that understand the unified
1429           ARM-Thumb syntax is needed.
1430
1431           If unsure, say N.
1432
1433 config THUMB2_AVOID_R_ARM_THM_JUMP11
1434         bool "Work around buggy Thumb-2 short branch relocations in gas"
1435         depends on THUMB2_KERNEL && MODULES
1436         default y
1437         help
1438           Various binutils versions can resolve Thumb-2 branches to
1439           locally-defined, preemptible global symbols as short-range "b.n"
1440           branch instructions.
1441
1442           This is a problem, because there's no guarantee the final
1443           destination of the symbol, or any candidate locations for a
1444           trampoline, are within range of the branch.  For this reason, the
1445           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1446           relocation in modules at all, and it makes little sense to add
1447           support.
1448
1449           The symptom is that the kernel fails with an "unsupported
1450           relocation" error when loading some modules.
1451
1452           Until fixed tools are available, passing
1453           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1454           code which hits this problem, at the cost of a bit of extra runtime
1455           stack usage in some cases.
1456
1457           The problem is described in more detail at:
1458               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1459
1460           Only Thumb-2 kernels are affected.
1461
1462           Unless you are sure your tools don't have this problem, say Y.
1463
1464 config ARM_ASM_UNIFIED
1465         bool
1466
1467 config AEABI
1468         bool "Use the ARM EABI to compile the kernel"
1469         help
1470           This option allows for the kernel to be compiled using the latest
1471           ARM ABI (aka EABI).  This is only useful if you are using a user
1472           space environment that is also compiled with EABI.
1473
1474           Since there are major incompatibilities between the legacy ABI and
1475           EABI, especially with regard to structure member alignment, this
1476           option also changes the kernel syscall calling convention to
1477           disambiguate both ABIs and allow for backward compatibility support
1478           (selected with CONFIG_OABI_COMPAT).
1479
1480           To use this you need GCC version 4.0.0 or later.
1481
1482 config OABI_COMPAT
1483         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1484         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1485         default y
1486         help
1487           This option preserves the old syscall interface along with the
1488           new (ARM EABI) one. It also provides a compatibility layer to
1489           intercept syscalls that have structure arguments which layout
1490           in memory differs between the legacy ABI and the new ARM EABI
1491           (only for non "thumb" binaries). This option adds a tiny
1492           overhead to all syscalls and produces a slightly larger kernel.
1493           If you know you'll be using only pure EABI user space then you
1494           can say N here. If this option is not selected and you attempt
1495           to execute a legacy ABI binary then the result will be
1496           UNPREDICTABLE (in fact it can be predicted that it won't work
1497           at all). If in doubt say Y.
1498
1499 config ARCH_HAS_HOLES_MEMORYMODEL
1500         bool
1501
1502 config ARCH_SPARSEMEM_ENABLE
1503         bool
1504
1505 config ARCH_SPARSEMEM_DEFAULT
1506         def_bool ARCH_SPARSEMEM_ENABLE
1507
1508 config ARCH_SELECT_MEMORY_MODEL
1509         def_bool ARCH_SPARSEMEM_ENABLE
1510
1511 config HAVE_ARCH_PFN_VALID
1512         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1513
1514 config HIGHMEM
1515         bool "High Memory Support"
1516         depends on MMU
1517         help
1518           The address space of ARM processors is only 4 Gigabytes large
1519           and it has to accommodate user address space, kernel address
1520           space as well as some memory mapped IO. That means that, if you
1521           have a large amount of physical memory and/or IO, not all of the
1522           memory can be "permanently mapped" by the kernel. The physical
1523           memory that is not permanently mapped is called "high memory".
1524
1525           Depending on the selected kernel/user memory split, minimum
1526           vmalloc space and actual amount of RAM, you may not need this
1527           option which should result in a slightly faster kernel.
1528
1529           If unsure, say n.
1530
1531 config HIGHPTE
1532         bool "Allocate 2nd-level pagetables from highmem"
1533         depends on HIGHMEM
1534
1535 config HW_PERF_EVENTS
1536         bool "Enable hardware performance counter support for perf events"
1537         depends on PERF_EVENTS && CPU_HAS_PMU
1538         default y
1539         help
1540           Enable hardware performance counter support for perf events. If
1541           disabled, perf events will use software events only.
1542
1543 source "mm/Kconfig"
1544
1545 config FORCE_MAX_ZONEORDER
1546         int "Maximum zone order" if ARCH_SHMOBILE
1547         range 11 64 if ARCH_SHMOBILE
1548         default "9" if SA1111
1549         default "11"
1550         help
1551           The kernel memory allocator divides physically contiguous memory
1552           blocks into "zones", where each zone is a power of two number of
1553           pages.  This option selects the largest power of two that the kernel
1554           keeps in the memory allocator.  If you need to allocate very large
1555           blocks of physically contiguous memory, then you may need to
1556           increase this value.
1557
1558           This config option is actually maximum order plus one. For example,
1559           a value of 11 means that the largest free memory block is 2^10 pages.
1560
1561 config LEDS
1562         bool "Timer and CPU usage LEDs"
1563         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1564                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1565                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1566                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1567                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1568                    ARCH_AT91 || ARCH_DAVINCI || \
1569                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1570         help
1571           If you say Y here, the LEDs on your machine will be used
1572           to provide useful information about your current system status.
1573
1574           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1575           be able to select which LEDs are active using the options below. If
1576           you are compiling a kernel for the EBSA-110 or the LART however, the
1577           red LED will simply flash regularly to indicate that the system is
1578           still functional. It is safe to say Y here if you have a CATS
1579           system, but the driver will do nothing.
1580
1581 config LEDS_TIMER
1582         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1583                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1584                             || MACH_OMAP_PERSEUS2
1585         depends on LEDS
1586         depends on !GENERIC_CLOCKEVENTS
1587         default y if ARCH_EBSA110
1588         help
1589           If you say Y here, one of the system LEDs (the green one on the
1590           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1591           will flash regularly to indicate that the system is still
1592           operational. This is mainly useful to kernel hackers who are
1593           debugging unstable kernels.
1594
1595           The LART uses the same LED for both Timer LED and CPU usage LED
1596           functions. You may choose to use both, but the Timer LED function
1597           will overrule the CPU usage LED.
1598
1599 config LEDS_CPU
1600         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1601                         !ARCH_OMAP) \
1602                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1603                         || MACH_OMAP_PERSEUS2
1604         depends on LEDS
1605         help
1606           If you say Y here, the red LED will be used to give a good real
1607           time indication of CPU usage, by lighting whenever the idle task
1608           is not currently executing.
1609
1610           The LART uses the same LED for both Timer LED and CPU usage LED
1611           functions. You may choose to use both, but the Timer LED function
1612           will overrule the CPU usage LED.
1613
1614 config ALIGNMENT_TRAP
1615         bool
1616         depends on CPU_CP15_MMU
1617         default y if !ARCH_EBSA110
1618         select HAVE_PROC_CPU if PROC_FS
1619         help
1620           ARM processors cannot fetch/store information which is not
1621           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1622           address divisible by 4. On 32-bit ARM processors, these non-aligned
1623           fetch/store instructions will be emulated in software if you say
1624           here, which has a severe performance impact. This is necessary for
1625           correct operation of some network protocols. With an IP-only
1626           configuration it is safe to say N, otherwise say Y.
1627
1628 config UACCESS_WITH_MEMCPY
1629         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1630         depends on MMU && EXPERIMENTAL
1631         default y if CPU_FEROCEON
1632         help
1633           Implement faster copy_to_user and clear_user methods for CPU
1634           cores where a 8-word STM instruction give significantly higher
1635           memory write throughput than a sequence of individual 32bit stores.
1636
1637           A possible side effect is a slight increase in scheduling latency
1638           between threads sharing the same address space if they invoke
1639           such copy operations with large buffers.
1640
1641           However, if the CPU data cache is using a write-allocate mode,
1642           this option is unlikely to provide any performance gain.
1643
1644 config SECCOMP
1645         bool
1646         prompt "Enable seccomp to safely compute untrusted bytecode"
1647         ---help---
1648           This kernel feature is useful for number crunching applications
1649           that may need to compute untrusted bytecode during their
1650           execution. By using pipes or other transports made available to
1651           the process as file descriptors supporting the read/write
1652           syscalls, it's possible to isolate those applications in
1653           their own address space using seccomp. Once seccomp is
1654           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1655           and the task is only allowed to execute a few safe syscalls
1656           defined by each seccomp mode.
1657
1658 config CC_STACKPROTECTOR
1659         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1660         depends on EXPERIMENTAL
1661         help
1662           This option turns on the -fstack-protector GCC feature. This
1663           feature puts, at the beginning of functions, a canary value on
1664           the stack just before the return address, and validates
1665           the value just before actually returning.  Stack based buffer
1666           overflows (that need to overwrite this return address) now also
1667           overwrite the canary, which gets detected and the attack is then
1668           neutralized via a kernel panic.
1669           This feature requires gcc version 4.2 or above.
1670
1671 config DEPRECATED_PARAM_STRUCT
1672         bool "Provide old way to pass kernel parameters"
1673         help
1674           This was deprecated in 2001 and announced to live on for 5 years.
1675           Some old boot loaders still use this way.
1676
1677 endmenu
1678
1679 menu "Boot options"
1680
1681 config USE_OF
1682         bool "Flattened Device Tree support"
1683         select OF
1684         select OF_EARLY_FLATTREE
1685         help
1686           Include support for flattened device tree machine descriptions.
1687
1688 # Compressed boot loader in ROM.  Yes, we really want to ask about
1689 # TEXT and BSS so we preserve their values in the config files.
1690 config ZBOOT_ROM_TEXT
1691         hex "Compressed ROM boot loader base address"
1692         default "0"
1693         help
1694           The physical address at which the ROM-able zImage is to be
1695           placed in the target.  Platforms which normally make use of
1696           ROM-able zImage formats normally set this to a suitable
1697           value in their defconfig file.
1698
1699           If ZBOOT_ROM is not enabled, this has no effect.
1700
1701 config ZBOOT_ROM_BSS
1702         hex "Compressed ROM boot loader BSS address"
1703         default "0"
1704         help
1705           The base address of an area of read/write memory in the target
1706           for the ROM-able zImage which must be available while the
1707           decompressor is running. It must be large enough to hold the
1708           entire decompressed kernel plus an additional 128 KiB.
1709           Platforms which normally make use of ROM-able zImage formats
1710           normally set this to a suitable value in their defconfig file.
1711
1712           If ZBOOT_ROM is not enabled, this has no effect.
1713
1714 config ZBOOT_ROM
1715         bool "Compressed boot loader in ROM/flash"
1716         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1717         help
1718           Say Y here if you intend to execute your compressed kernel image
1719           (zImage) directly from ROM or flash.  If unsure, say N.
1720
1721 config ZBOOT_ROM_MMCIF
1722         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1723         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1724         help
1725           Say Y here to include experimental MMCIF loading code in the
1726           ROM-able zImage. With this enabled it is possible to write the
1727           the ROM-able zImage kernel image to an MMC card and boot the
1728           kernel straight from the reset vector. At reset the processor
1729           Mask ROM will load the first part of the the ROM-able zImage
1730           which in turn loads the rest the kernel image to RAM using the
1731           MMCIF hardware block.
1732
1733 config CMDLINE
1734         string "Default kernel command string"
1735         default ""
1736         help
1737           On some architectures (EBSA110 and CATS), there is currently no way
1738           for the boot loader to pass arguments to the kernel. For these
1739           architectures, you should supply some command-line options at build
1740           time by entering them here. As a minimum, you should specify the
1741           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1742
1743 choice
1744         prompt "Kernel command line type" if CMDLINE != ""
1745         default CMDLINE_FROM_BOOTLOADER
1746
1747 config CMDLINE_FROM_BOOTLOADER
1748         bool "Use bootloader kernel arguments if available"
1749         help
1750           Uses the command-line options passed by the boot loader. If
1751           the boot loader doesn't provide any, the default kernel command
1752           string provided in CMDLINE will be used.
1753
1754 config CMDLINE_EXTEND
1755         bool "Extend bootloader kernel arguments"
1756         help
1757           The command-line arguments provided by the boot loader will be
1758           appended to the default kernel command string.
1759
1760 config CMDLINE_FORCE
1761         bool "Always use the default kernel command string"
1762         help
1763           Always use the default kernel command string, even if the boot
1764           loader passes other arguments to the kernel.
1765           This is useful if you cannot or don't want to change the
1766           command-line options your boot loader passes to the kernel.
1767 endchoice
1768
1769 config XIP_KERNEL
1770         bool "Kernel Execute-In-Place from ROM"
1771         depends on !ZBOOT_ROM
1772         help
1773           Execute-In-Place allows the kernel to run from non-volatile storage
1774           directly addressable by the CPU, such as NOR flash. This saves RAM
1775           space since the text section of the kernel is not loaded from flash
1776           to RAM.  Read-write sections, such as the data section and stack,
1777           are still copied to RAM.  The XIP kernel is not compressed since
1778           it has to run directly from flash, so it will take more space to
1779           store it.  The flash address used to link the kernel object files,
1780           and for storing it, is configuration dependent. Therefore, if you
1781           say Y here, you must know the proper physical address where to
1782           store the kernel image depending on your own flash memory usage.
1783
1784           Also note that the make target becomes "make xipImage" rather than
1785           "make zImage" or "make Image".  The final kernel binary to put in
1786           ROM memory will be arch/arm/boot/xipImage.
1787
1788           If unsure, say N.
1789
1790 config XIP_PHYS_ADDR
1791         hex "XIP Kernel Physical Location"
1792         depends on XIP_KERNEL
1793         default "0x00080000"
1794         help
1795           This is the physical address in your flash memory the kernel will
1796           be linked for and stored to.  This address is dependent on your
1797           own flash usage.
1798
1799 config KEXEC
1800         bool "Kexec system call (EXPERIMENTAL)"
1801         depends on EXPERIMENTAL
1802         help
1803           kexec is a system call that implements the ability to shutdown your
1804           current kernel, and to start another kernel.  It is like a reboot
1805           but it is independent of the system firmware.   And like a reboot
1806           you can start any kernel with it, not just Linux.
1807
1808           It is an ongoing process to be certain the hardware in a machine
1809           is properly shutdown, so do not be surprised if this code does not
1810           initially work for you.  It may help to enable device hotplugging
1811           support.
1812
1813 config ATAGS_PROC
1814         bool "Export atags in procfs"
1815         depends on KEXEC
1816         default y
1817         help
1818           Should the atags used to boot the kernel be exported in an "atags"
1819           file in procfs. Useful with kexec.
1820
1821 config CRASH_DUMP
1822         bool "Build kdump crash kernel (EXPERIMENTAL)"
1823         depends on EXPERIMENTAL
1824         help
1825           Generate crash dump after being started by kexec. This should
1826           be normally only set in special crash dump kernels which are
1827           loaded in the main kernel with kexec-tools into a specially
1828           reserved region and then later executed after a crash by
1829           kdump/kexec. The crash dump kernel must be compiled to a
1830           memory address not used by the main kernel
1831
1832           For more details see Documentation/kdump/kdump.txt
1833
1834 config AUTO_ZRELADDR
1835         bool "Auto calculation of the decompressed kernel image address"
1836         depends on !ZBOOT_ROM && !ARCH_U300
1837         help
1838           ZRELADDR is the physical address where the decompressed kernel
1839           image will be placed. If AUTO_ZRELADDR is selected, the address
1840           will be determined at run-time by masking the current IP with
1841           0xf8000000. This assumes the zImage being placed in the first 128MB
1842           from start of memory.
1843
1844 endmenu
1845
1846 menu "CPU Power Management"
1847
1848 if ARCH_HAS_CPUFREQ
1849
1850 source "drivers/cpufreq/Kconfig"
1851
1852 config CPU_FREQ_IMX
1853         tristate "CPUfreq driver for i.MX CPUs"
1854         depends on ARCH_MXC && CPU_FREQ
1855         help
1856           This enables the CPUfreq driver for i.MX CPUs.
1857
1858 config CPU_FREQ_SA1100
1859         bool
1860
1861 config CPU_FREQ_SA1110
1862         bool
1863
1864 config CPU_FREQ_INTEGRATOR
1865         tristate "CPUfreq driver for ARM Integrator CPUs"
1866         depends on ARCH_INTEGRATOR && CPU_FREQ
1867         default y
1868         help
1869           This enables the CPUfreq driver for ARM Integrator CPUs.
1870
1871           For details, take a look at <file:Documentation/cpu-freq>.
1872
1873           If in doubt, say Y.
1874
1875 config CPU_FREQ_PXA
1876         bool
1877         depends on CPU_FREQ && ARCH_PXA && PXA25x
1878         default y
1879         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1880
1881 config CPU_FREQ_S3C64XX
1882         bool "CPUfreq support for Samsung S3C64XX CPUs"
1883         depends on CPU_FREQ && CPU_S3C6410
1884
1885 config CPU_FREQ_S3C
1886         bool
1887         help
1888           Internal configuration node for common cpufreq on Samsung SoC
1889
1890 config CPU_FREQ_S3C24XX
1891         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1892         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1893         select CPU_FREQ_S3C
1894         help
1895           This enables the CPUfreq driver for the Samsung S3C24XX family
1896           of CPUs.
1897
1898           For details, take a look at <file:Documentation/cpu-freq>.
1899
1900           If in doubt, say N.
1901
1902 config CPU_FREQ_S3C24XX_PLL
1903         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1904         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1905         help
1906           Compile in support for changing the PLL frequency from the
1907           S3C24XX series CPUfreq driver. The PLL takes time to settle
1908           after a frequency change, so by default it is not enabled.
1909
1910           This also means that the PLL tables for the selected CPU(s) will
1911           be built which may increase the size of the kernel image.
1912
1913 config CPU_FREQ_S3C24XX_DEBUG
1914         bool "Debug CPUfreq Samsung driver core"
1915         depends on CPU_FREQ_S3C24XX
1916         help
1917           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1918
1919 config CPU_FREQ_S3C24XX_IODEBUG
1920         bool "Debug CPUfreq Samsung driver IO timing"
1921         depends on CPU_FREQ_S3C24XX
1922         help
1923           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1924
1925 config CPU_FREQ_S3C24XX_DEBUGFS
1926         bool "Export debugfs for CPUFreq"
1927         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1928         help
1929           Export status information via debugfs.
1930
1931 endif
1932
1933 source "drivers/cpuidle/Kconfig"
1934
1935 endmenu
1936
1937 menu "Floating point emulation"
1938
1939 comment "At least one emulation must be selected"
1940
1941 config FPE_NWFPE
1942         bool "NWFPE math emulation"
1943         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1944         ---help---
1945           Say Y to include the NWFPE floating point emulator in the kernel.
1946           This is necessary to run most binaries. Linux does not currently
1947           support floating point hardware so you need to say Y here even if
1948           your machine has an FPA or floating point co-processor podule.
1949
1950           You may say N here if you are going to load the Acorn FPEmulator
1951           early in the bootup.
1952
1953 config FPE_NWFPE_XP
1954         bool "Support extended precision"
1955         depends on FPE_NWFPE
1956         help
1957           Say Y to include 80-bit support in the kernel floating-point
1958           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1959           Note that gcc does not generate 80-bit operations by default,
1960           so in most cases this option only enlarges the size of the
1961           floating point emulator without any good reason.
1962
1963           You almost surely want to say N here.
1964
1965 config FPE_FASTFPE
1966         bool "FastFPE math emulation (EXPERIMENTAL)"
1967         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1968         ---help---
1969           Say Y here to include the FAST floating point emulator in the kernel.
1970           This is an experimental much faster emulator which now also has full
1971           precision for the mantissa.  It does not support any exceptions.
1972           It is very simple, and approximately 3-6 times faster than NWFPE.
1973
1974           It should be sufficient for most programs.  It may be not suitable
1975           for scientific calculations, but you have to check this for yourself.
1976           If you do not feel you need a faster FP emulation you should better
1977           choose NWFPE.
1978
1979 config VFP
1980         bool "VFP-format floating point maths"
1981         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1982         help
1983           Say Y to include VFP support code in the kernel. This is needed
1984           if your hardware includes a VFP unit.
1985
1986           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1987           release notes and additional status information.
1988
1989           Say N if your target does not have VFP hardware.
1990
1991 config VFPv3
1992         bool
1993         depends on VFP
1994         default y if CPU_V7
1995
1996 config NEON
1997         bool "Advanced SIMD (NEON) Extension support"
1998         depends on VFPv3 && CPU_V7
1999         help
2000           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2001           Extension.
2002
2003 endmenu
2004
2005 menu "Userspace binary formats"
2006
2007 source "fs/Kconfig.binfmt"
2008
2009 config ARTHUR
2010         tristate "RISC OS personality"
2011         depends on !AEABI
2012         help
2013           Say Y here to include the kernel code necessary if you want to run
2014           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2015           experimental; if this sounds frightening, say N and sleep in peace.
2016           You can also say M here to compile this support as a module (which
2017           will be called arthur).
2018
2019 endmenu
2020
2021 menu "Power management options"
2022
2023 source "kernel/power/Kconfig"
2024
2025 config ARCH_SUSPEND_POSSIBLE
2026         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2027         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2028                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2029         def_bool y
2030
2031 endmenu
2032
2033 source "net/Kconfig"
2034
2035 source "drivers/Kconfig"
2036
2037 source "fs/Kconfig"
2038
2039 source "arch/arm/Kconfig.debug"
2040
2041 source "security/Kconfig"
2042
2043 source "crypto/Kconfig"
2044
2045 source "lib/Kconfig"