arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  13         select HAVE_ARCH_KGDB
  14         select HAVE_ARCH_TRACEHOOK
  15         select HAVE_KPROBES if !XIP_KERNEL
  16         select HAVE_KRETPROBES if (HAVE_KPROBES)
  17         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  18         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  19         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  20         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  21         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  22         select HAVE_GENERIC_DMA_COHERENT
  23         select HAVE_KERNEL_GZIP
  24         select HAVE_KERNEL_LZO
  25         select HAVE_KERNEL_LZMA
  26         select HAVE_KERNEL_XZ
  27         select HAVE_IRQ_WORK
  28         select HAVE_PERF_EVENTS
  29         select PERF_USE_VMALLOC
  30         select HAVE_REGS_AND_STACK_ACCESS_API
  31         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  32         select HAVE_C_RECORDMCOUNT
  33         select HAVE_GENERIC_HARDIRQS
  34         select HARDIRQS_SW_RESEND
  35         select GENERIC_IRQ_PROBE
  36         select GENERIC_IRQ_SHOW
  37         select GENERIC_IRQ_PROBE
  38         select HARDIRQS_SW_RESEND
  39         select CPU_PM if (SUSPEND || CPU_IDLE)
  40         select GENERIC_PCI_IOMAP
  41         select HAVE_BPF_JIT
  42         select GENERIC_SMP_IDLE_THREAD
  43         help
  44           The ARM series is a line of low-power-consumption RISC chip designs
  45           licensed by ARM Ltd and targeted at embedded applications and
  46           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  47           manufactured, but legacy ARM-based PC hardware remains popular in
  48           Europe.  There is an ARM Linux project with a web page at
  49           <http://www.arm.linux.org.uk/>.
  50
  51 config ARM_HAS_SG_CHAIN
  52         bool
  53
  54 config HAVE_PWM
  55         bool
  56
  57 config MIGHT_HAVE_PCI
  58         bool
  59
  60 config SYS_SUPPORTS_APM_EMULATION
  61         bool
  62
  63 config GENERIC_GPIO
  64         bool
  65
  66 config ARCH_USES_GETTIMEOFFSET
  67         bool
  68         default n
  69
  70 config GENERIC_CLOCKEVENTS
  71         bool
  72
  73 config GENERIC_CLOCKEVENTS_BROADCAST
  74         bool
  75         depends on GENERIC_CLOCKEVENTS
  76         default y if SMP
  77
  78 config KTIME_SCALAR
  79         bool
  80         default y
  81
  82 config HAVE_TCM
  83         bool
  84         select GENERIC_ALLOCATOR
  85
  86 config HAVE_PROC_CPU
  87         bool
  88
  89 config NO_IOPORT
  90         bool
  91
  92 config EISA
  93         bool
  94         ---help---
  95           The Extended Industry Standard Architecture (EISA) bus was
  96           developed as an open alternative to the IBM MicroChannel bus.
  97
  98           The EISA bus provided some of the features of the IBM MicroChannel
  99           bus while maintaining backward compatibility with cards made for
 100           the older ISA bus.  The EISA bus saw limited use between 1988 and
 101           1995 when it was made obsolete by the PCI bus.
 102
 103           Say Y here if you are building a kernel for an EISA-based machine.
 104
 105           Otherwise, say N.
 106
 107 config SBUS
 108         bool
 109
 110 config MCA
 111         bool
 112         help
 113           MicroChannel Architecture is found in some IBM PS/2 machines and
 114           laptops.  It is a bus system similar to PCI or ISA. See
 115           <file:Documentation/mca.txt> (and especially the web page given
 116           there) before attempting to build an MCA bus kernel.
 117
 118 config STACKTRACE_SUPPORT
 119         bool
 120         default y
 121
 122 config HAVE_LATENCYTOP_SUPPORT
 123         bool
 124         depends on !SMP
 125         default y
 126
 127 config LOCKDEP_SUPPORT
 128         bool
 129         default y
 130
 131 config TRACE_IRQFLAGS_SUPPORT
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config ARCH_HAS_DMA_SET_COHERENT_MASK
 178         bool
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config NEED_RET_TO_USER
 187         bool
 188
 189 config ARCH_MTD_XIP
 190         bool
 191
 192 config VECTORS_BASE
 193         hex
 194         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 195         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 196         default 0x00000000
 197         help
 198           The base address of exception vectors.
 199
 200 config ARM_PATCH_PHYS_VIRT
 201         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 202         default y
 203         depends on !XIP_KERNEL && MMU
 204         depends on !ARCH_REALVIEW || !SPARSEMEM
 205         help
 206           Patch phys-to-virt and virt-to-phys translation functions at
 207           boot and module load time according to the position of the
 208           kernel in system memory.
 209
 210           This can only be used with non-XIP MMU kernels where the base
 211           of physical memory is at a 16MB boundary.
 212
 213           Only disable this option if you know that you do not require
 214           this feature (eg, building a kernel for a single machine) and
 215           you need to shrink the kernel to the minimal size.
 216
 217 config NEED_MACH_IO_H
 218         bool
 219         help
 220           Select this when mach/io.h is required to provide special
 221           definitions for this platform.  The need for mach/io.h should
 222           be avoided when possible.
 223
 224 config NEED_MACH_MEMORY_H
 225         bool
 226         help
 227           Select this when mach/memory.h is required to provide special
 228           definitions for this platform.  The need for mach/memory.h should
 229           be avoided when possible.
 230
 231 config PHYS_OFFSET
 232         hex "Physical address of main memory" if MMU
 233         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 234         default DRAM_BASE if !MMU
 235         help
 236           Please provide the physical address corresponding to the
 237           location of main memory in your system.
 238
 239 config GENERIC_BUG
 240         def_bool y
 241         depends on BUG
 242
 243 source "init/Kconfig"
 244
 245 source "kernel/Kconfig.freezer"
 246
 247 menu "System Type"
 248
 249 config MMU
 250         bool "MMU-based Paged Memory Management Support"
 251         default y
 252         help
 253           Select if you want MMU-based virtualised addressing space
 254           support by paged memory management. If unsure, say 'Y'.
 255
 256 #
 257 # The "ARM system type" choice list is ordered alphabetically by option
 258 # text.  Please add new entries in the option alphabetic order.
 259 #
 260 choice
 261         prompt "ARM system type"
 262         default ARCH_VERSATILE
 263
 264 config ARCH_INTEGRATOR
 265         bool "ARM Ltd. Integrator family"
 266         select ARM_AMBA
 267         select ARCH_HAS_CPUFREQ
 268         select CLKDEV_LOOKUP
 269         select HAVE_MACH_CLKDEV
 270         select HAVE_TCM
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select PLAT_VERSATILE
 274         select PLAT_VERSATILE_FPGA_IRQ
 275         select NEED_MACH_IO_H
 276         select NEED_MACH_MEMORY_H
 277         select SPARSE_IRQ
 278         select MULTI_IRQ_HANDLER
 279         help
 280           Support for ARM's Integrator platform.
 281
 282 config ARCH_REALVIEW
 283         bool "ARM Ltd. RealView family"
 284         select ARM_AMBA
 285         select CLKDEV_LOOKUP
 286         select HAVE_MACH_CLKDEV
 287         select ICST
 288         select GENERIC_CLOCKEVENTS
 289         select ARCH_WANT_OPTIONAL_GPIOLIB
 290         select PLAT_VERSATILE
 291         select PLAT_VERSATILE_CLCD
 292         select ARM_TIMER_SP804
 293         select GPIO_PL061 if GPIOLIB
 294         select NEED_MACH_MEMORY_H
 295         help
 296           This enables support for ARM Ltd RealView boards.
 297
 298 config ARCH_VERSATILE
 299         bool "ARM Ltd. Versatile family"
 300         select ARM_AMBA
 301         select ARM_VIC
 302         select CLKDEV_LOOKUP
 303         select HAVE_MACH_CLKDEV
 304         select ICST
 305         select GENERIC_CLOCKEVENTS
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select PLAT_VERSATILE
 308         select PLAT_VERSATILE_CLCD
 309         select PLAT_VERSATILE_FPGA_IRQ
 310         select ARM_TIMER_SP804
 311         help
 312           This enables support for ARM Ltd Versatile board.
 313
 314 config ARCH_VEXPRESS
 315         bool "ARM Ltd. Versatile Express family"
 316         select ARCH_WANT_OPTIONAL_GPIOLIB
 317         select ARM_AMBA
 318         select ARM_TIMER_SP804
 319         select CLKDEV_LOOKUP
 320         select HAVE_MACH_CLKDEV
 321         select GENERIC_CLOCKEVENTS
 322         select HAVE_CLK
 323         select HAVE_PATA_PLATFORM
 324         select ICST
 325         select NO_IOPORT
 326         select PLAT_VERSATILE
 327         select PLAT_VERSATILE_CLCD
 328         help
 329           This enables support for the ARM Ltd Versatile Express boards.
 330
 331 config ARCH_AT91
 332         bool "Atmel AT91"
 333         select ARCH_REQUIRE_GPIOLIB
 334         select HAVE_CLK
 335         select CLKDEV_LOOKUP
 336         select IRQ_DOMAIN
 337         select NEED_MACH_IO_H if PCCARD
 338         help
 339           This enables support for systems based on Atmel
 340           AT91RM9200 and AT91SAM9* processors.
 341
 342 config ARCH_BCMRING
 343         bool "Broadcom BCMRING"
 344         depends on MMU
 345         select CPU_V6
 346         select ARM_AMBA
 347         select ARM_TIMER_SP804
 348         select CLKDEV_LOOKUP
 349         select GENERIC_CLOCKEVENTS
 350         select ARCH_WANT_OPTIONAL_GPIOLIB
 351         help
 352           Support for Broadcom's BCMRing platform.
 353
 354 config ARCH_HIGHBANK
 355         bool "Calxeda Highbank-based"
 356         select ARCH_WANT_OPTIONAL_GPIOLIB
 357         select ARM_AMBA
 358         select ARM_GIC
 359         select ARM_TIMER_SP804
 360         select CACHE_L2X0
 361         select CLKDEV_LOOKUP
 362         select CPU_V7
 363         select GENERIC_CLOCKEVENTS
 364         select HAVE_ARM_SCU
 365         select HAVE_SMP
 366         select SPARSE_IRQ
 367         select USE_OF
 368         help
 369           Support for the Calxeda Highbank SoC based boards.
 370
 371 config ARCH_CLPS711X
 372         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 373         select CPU_ARM720T
 374         select ARCH_USES_GETTIMEOFFSET
 375         select NEED_MACH_MEMORY_H
 376         help
 377           Support for Cirrus Logic 711x/721x/731x based boards.
 378
 379 config ARCH_CNS3XXX
 380         bool "Cavium Networks CNS3XXX family"
 381         select CPU_V6K
 382         select GENERIC_CLOCKEVENTS
 383         select ARM_GIC
 384         select MIGHT_HAVE_CACHE_L2X0
 385         select MIGHT_HAVE_PCI
 386         select PCI_DOMAINS if PCI
 387         help
 388           Support for Cavium Networks CNS3XXX platform.
 389
 390 config ARCH_GEMINI
 391         bool "Cortina Systems Gemini"
 392         select CPU_FA526
 393         select ARCH_REQUIRE_GPIOLIB
 394         select ARCH_USES_GETTIMEOFFSET
 395         help
 396           Support for the Cortina Systems Gemini family SoCs
 397
 398 config ARCH_PRIMA2
 399         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 400         select CPU_V7
 401         select NO_IOPORT
 402         select GENERIC_CLOCKEVENTS
 403         select CLKDEV_LOOKUP
 404         select GENERIC_IRQ_CHIP
 405         select MIGHT_HAVE_CACHE_L2X0
 406         select PINCTRL
 407         select PINCTRL_SIRF
 408         select USE_OF
 409         select ZONE_DMA
 410         help
 411           Support for CSR SiRFSoC ARM Cortex A9 Platform
 412
 413 config ARCH_EBSA110
 414         bool "EBSA-110"
 415         select CPU_SA110
 416         select ISA
 417         select NO_IOPORT
 418         select ARCH_USES_GETTIMEOFFSET
 419         select NEED_MACH_IO_H
 420         select NEED_MACH_MEMORY_H
 421         help
 422           This is an evaluation board for the StrongARM processor available
 423           from Digital. It has limited hardware on-board, including an
 424           Ethernet interface, two PCMCIA sockets, two serial ports and a
 425           parallel port.
 426
 427 config ARCH_EP93XX
 428         bool "EP93xx-based"
 429         select CPU_ARM920T
 430         select ARM_AMBA
 431         select ARM_VIC
 432         select CLKDEV_LOOKUP
 433         select ARCH_REQUIRE_GPIOLIB
 434         select ARCH_HAS_HOLES_MEMORYMODEL
 435         select ARCH_USES_GETTIMEOFFSET
 436         select NEED_MACH_MEMORY_H
 437         help
 438           This enables support for the Cirrus EP93xx series of CPUs.
 439
 440 config ARCH_FOOTBRIDGE
 441         bool "FootBridge"
 442         select CPU_SA110
 443         select FOOTBRIDGE
 444         select GENERIC_CLOCKEVENTS
 445         select HAVE_IDE
 446         select NEED_MACH_IO_H
 447         select NEED_MACH_MEMORY_H
 448         help
 449           Support for systems based on the DC21285 companion chip
 450           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 451
 452 config ARCH_MXC
 453         bool "Freescale MXC/iMX-based"
 454         select GENERIC_CLOCKEVENTS
 455         select ARCH_REQUIRE_GPIOLIB
 456         select CLKDEV_LOOKUP
 457         select CLKSRC_MMIO
 458         select GENERIC_IRQ_CHIP
 459         select MULTI_IRQ_HANDLER
 460         help
 461           Support for Freescale MXC/iMX-based family of processors
 462
 463 config ARCH_MXS
 464         bool "Freescale MXS-based"
 465         select GENERIC_CLOCKEVENTS
 466         select ARCH_REQUIRE_GPIOLIB
 467         select CLKDEV_LOOKUP
 468         select CLKSRC_MMIO
 469         select HAVE_CLK_PREPARE
 470         select PINCTRL
 471         help
 472           Support for Freescale MXS-based family of processors
 473
 474 config ARCH_NETX
 475         bool "Hilscher NetX based"
 476         select CLKSRC_MMIO
 477         select CPU_ARM926T
 478         select ARM_VIC
 479         select GENERIC_CLOCKEVENTS
 480         help
 481           This enables support for systems based on the Hilscher NetX Soc
 482
 483 config ARCH_H720X
 484         bool "Hynix HMS720x-based"
 485         select CPU_ARM720T
 486         select ISA_DMA_API
 487         select ARCH_USES_GETTIMEOFFSET
 488         help
 489           This enables support for systems based on the Hynix HMS720x
 490
 491 config ARCH_IOP13XX
 492         bool "IOP13xx-based"
 493         depends on MMU
 494         select CPU_XSC3
 495         select PLAT_IOP
 496         select PCI
 497         select ARCH_SUPPORTS_MSI
 498         select VMSPLIT_1G
 499         select NEED_MACH_IO_H
 500         select NEED_MACH_MEMORY_H
 501         select NEED_RET_TO_USER
 502         help
 503           Support for Intel's IOP13XX (XScale) family of processors.
 504
 505 config ARCH_IOP32X
 506         bool "IOP32x-based"
 507         depends on MMU
 508         select CPU_XSCALE
 509         select NEED_MACH_IO_H
 510         select NEED_RET_TO_USER
 511         select PLAT_IOP
 512         select PCI
 513         select ARCH_REQUIRE_GPIOLIB
 514         help
 515           Support for Intel's 80219 and IOP32X (XScale) family of
 516           processors.
 517
 518 config ARCH_IOP33X
 519         bool "IOP33x-based"
 520         depends on MMU
 521         select CPU_XSCALE
 522         select NEED_MACH_IO_H
 523         select NEED_RET_TO_USER
 524         select PLAT_IOP
 525         select PCI
 526         select ARCH_REQUIRE_GPIOLIB
 527         help
 528           Support for Intel's IOP33X (XScale) family of processors.
 529
 530 config ARCH_IXP4XX
 531         bool "IXP4xx-based"
 532         depends on MMU
 533         select ARCH_HAS_DMA_SET_COHERENT_MASK
 534         select CLKSRC_MMIO
 535         select CPU_XSCALE
 536         select GENERIC_GPIO
 537         select GENERIC_CLOCKEVENTS
 538         select MIGHT_HAVE_PCI
 539         select NEED_MACH_IO_H
 540         select DMABOUNCE if PCI
 541         help
 542           Support for Intel's IXP4XX (XScale) family of processors.
 543
 544 config ARCH_DOVE
 545         bool "Marvell Dove"
 546         select CPU_V7
 547         select PCI
 548         select ARCH_REQUIRE_GPIOLIB
 549         select GENERIC_CLOCKEVENTS
 550         select NEED_MACH_IO_H
 551         select PLAT_ORION
 552         help
 553           Support for the Marvell Dove SoC 88AP510
 554
 555 config ARCH_KIRKWOOD
 556         bool "Marvell Kirkwood"
 557         select CPU_FEROCEON
 558         select PCI
 559         select ARCH_REQUIRE_GPIOLIB
 560         select GENERIC_CLOCKEVENTS
 561         select NEED_MACH_IO_H
 562         select PLAT_ORION
 563         help
 564           Support for the following Marvell Kirkwood series SoCs:
 565           88F6180, 88F6192 and 88F6281.
 566
 567 config ARCH_LPC32XX
 568         bool "NXP LPC32XX"
 569         select CLKSRC_MMIO
 570         select CPU_ARM926T
 571         select ARCH_REQUIRE_GPIOLIB
 572         select HAVE_IDE
 573         select ARM_AMBA
 574         select USB_ARCH_HAS_OHCI
 575         select CLKDEV_LOOKUP
 576         select GENERIC_CLOCKEVENTS
 577         select USE_OF
 578         help
 579           Support for the NXP LPC32XX family of processors
 580
 581 config ARCH_MV78XX0
 582         bool "Marvell MV78xx0"
 583         select CPU_FEROCEON
 584         select PCI
 585         select ARCH_REQUIRE_GPIOLIB
 586         select GENERIC_CLOCKEVENTS
 587         select NEED_MACH_IO_H
 588         select PLAT_ORION
 589         help
 590           Support for the following Marvell MV78xx0 series SoCs:
 591           MV781x0, MV782x0.
 592
 593 config ARCH_ORION5X
 594         bool "Marvell Orion"
 595         depends on MMU
 596         select CPU_FEROCEON
 597         select PCI
 598         select ARCH_REQUIRE_GPIOLIB
 599         select GENERIC_CLOCKEVENTS
 600         select PLAT_ORION
 601         help
 602           Support for the following Marvell Orion 5x series SoCs:
 603           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 604           Orion-2 (5281), Orion-1-90 (6183).
 605
 606 config ARCH_MMP
 607         bool "Marvell PXA168/910/MMP2"
 608         depends on MMU
 609         select ARCH_REQUIRE_GPIOLIB
 610         select CLKDEV_LOOKUP
 611         select GENERIC_CLOCKEVENTS
 612         select GPIO_PXA
 613         select IRQ_DOMAIN
 614         select PLAT_PXA
 615         select SPARSE_IRQ
 616         select GENERIC_ALLOCATOR
 617         help
 618           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 619
 620 config ARCH_KS8695
 621         bool "Micrel/Kendin KS8695"
 622         select CPU_ARM922T
 623         select ARCH_REQUIRE_GPIOLIB
 624         select ARCH_USES_GETTIMEOFFSET
 625         select NEED_MACH_MEMORY_H
 626         help
 627           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 628           System-on-Chip devices.
 629
 630 config ARCH_W90X900
 631         bool "Nuvoton W90X900 CPU"
 632         select CPU_ARM926T
 633         select ARCH_REQUIRE_GPIOLIB
 634         select CLKDEV_LOOKUP
 635         select CLKSRC_MMIO
 636         select GENERIC_CLOCKEVENTS
 637         help
 638           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 639           At present, the w90x900 has been renamed nuc900, regarding
 640           the ARM series product line, you can login the following
 641           link address to know more.
 642
 643           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 644                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 645
 646 config ARCH_TEGRA
 647         bool "NVIDIA Tegra"
 648         select CLKDEV_LOOKUP
 649         select CLKSRC_MMIO
 650         select GENERIC_CLOCKEVENTS
 651         select GENERIC_GPIO
 652         select HAVE_CLK
 653         select HAVE_SMP
 654         select MIGHT_HAVE_CACHE_L2X0
 655         select NEED_MACH_IO_H if PCI
 656         select ARCH_HAS_CPUFREQ
 657         help
 658           This enables support for NVIDIA Tegra based systems (Tegra APX,
 659           Tegra 6xx and Tegra 2 series).
 660
 661 config ARCH_PICOXCELL
 662         bool "Picochip picoXcell"
 663         select ARCH_REQUIRE_GPIOLIB
 664         select ARM_PATCH_PHYS_VIRT
 665         select ARM_VIC
 666         select CPU_V6K
 667         select DW_APB_TIMER
 668         select GENERIC_CLOCKEVENTS
 669         select GENERIC_GPIO
 670         select HAVE_TCM
 671         select NO_IOPORT
 672         select SPARSE_IRQ
 673         select USE_OF
 674         help
 675           This enables support for systems based on the Picochip picoXcell
 676           family of Femtocell devices.  The picoxcell support requires device tree
 677           for all boards.
 678
 679 config ARCH_PNX4008
 680         bool "Philips Nexperia PNX4008 Mobile"
 681         select CPU_ARM926T
 682         select CLKDEV_LOOKUP
 683         select ARCH_USES_GETTIMEOFFSET
 684         help
 685           This enables support for Philips PNX4008 mobile platform.
 686
 687 config ARCH_PXA
 688         bool "PXA2xx/PXA3xx-based"
 689         depends on MMU
 690         select ARCH_MTD_XIP
 691         select ARCH_HAS_CPUFREQ
 692         select CLKDEV_LOOKUP
 693         select CLKSRC_MMIO
 694         select ARCH_REQUIRE_GPIOLIB
 695         select GENERIC_CLOCKEVENTS
 696         select GPIO_PXA
 697         select PLAT_PXA
 698         select SPARSE_IRQ
 699         select AUTO_ZRELADDR
 700         select MULTI_IRQ_HANDLER
 701         select ARM_CPU_SUSPEND if PM
 702         select HAVE_IDE
 703         help
 704           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 705
 706 config ARCH_MSM
 707         bool "Qualcomm MSM"
 708         select HAVE_CLK
 709         select GENERIC_CLOCKEVENTS
 710         select ARCH_REQUIRE_GPIOLIB
 711         select CLKDEV_LOOKUP
 712         help
 713           Support for Qualcomm MSM/QSD based systems.  This runs on the
 714           apps processor of the MSM/QSD and depends on a shared memory
 715           interface to the modem processor which runs the baseband
 716           stack and controls some vital subsystems
 717           (clock and power control, etc).
 718
 719 config ARCH_SHMOBILE
 720         bool "Renesas SH-Mobile / R-Mobile"
 721         select HAVE_CLK
 722         select CLKDEV_LOOKUP
 723         select HAVE_MACH_CLKDEV
 724         select HAVE_SMP
 725         select GENERIC_CLOCKEVENTS
 726         select MIGHT_HAVE_CACHE_L2X0
 727         select NO_IOPORT
 728         select SPARSE_IRQ
 729         select MULTI_IRQ_HANDLER
 730         select PM_GENERIC_DOMAINS if PM
 731         select NEED_MACH_MEMORY_H
 732         help
 733           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 734
 735 config ARCH_RPC
 736         bool "RiscPC"
 737         select ARCH_ACORN
 738         select FIQ
 739         select ARCH_MAY_HAVE_PC_FDC
 740         select HAVE_PATA_PLATFORM
 741         select ISA_DMA_API
 742         select NO_IOPORT
 743         select ARCH_SPARSEMEM_ENABLE
 744         select ARCH_USES_GETTIMEOFFSET
 745         select HAVE_IDE
 746         select NEED_MACH_IO_H
 747         select NEED_MACH_MEMORY_H
 748         help
 749           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 750           CD-ROM interface, serial and parallel port, and the floppy drive.
 751
 752 config ARCH_SA1100
 753         bool "SA1100-based"
 754         select CLKSRC_MMIO
 755         select CPU_SA1100
 756         select ISA
 757         select ARCH_SPARSEMEM_ENABLE
 758         select ARCH_MTD_XIP
 759         select ARCH_HAS_CPUFREQ
 760         select CPU_FREQ
 761         select GENERIC_CLOCKEVENTS
 762         select CLKDEV_LOOKUP
 763         select ARCH_REQUIRE_GPIOLIB
 764         select HAVE_IDE
 765         select NEED_MACH_MEMORY_H
 766         select SPARSE_IRQ
 767         help
 768           Support for StrongARM 11x0 based boards.
 769
 770 config ARCH_S3C24XX
 771         bool "Samsung S3C24XX SoCs"
 772         select GENERIC_GPIO
 773         select ARCH_HAS_CPUFREQ
 774         select HAVE_CLK
 775         select CLKDEV_LOOKUP
 776         select ARCH_USES_GETTIMEOFFSET
 777         select HAVE_S3C2410_I2C if I2C
 778         select HAVE_S3C_RTC if RTC_CLASS
 779         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 780         select NEED_MACH_IO_H
 781         help
 782           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 783           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 784           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 785           Samsung SMDK2410 development board (and derivatives).
 786
 787 config ARCH_S3C64XX
 788         bool "Samsung S3C64XX"
 789         select PLAT_SAMSUNG
 790         select CPU_V6
 791         select ARM_VIC
 792         select HAVE_CLK
 793         select HAVE_TCM
 794         select CLKDEV_LOOKUP
 795         select NO_IOPORT
 796         select ARCH_USES_GETTIMEOFFSET
 797         select ARCH_HAS_CPUFREQ
 798         select ARCH_REQUIRE_GPIOLIB
 799         select SAMSUNG_CLKSRC
 800         select SAMSUNG_IRQ_VIC_TIMER
 801         select S3C_GPIO_TRACK
 802         select S3C_DEV_NAND
 803         select USB_ARCH_HAS_OHCI
 804         select SAMSUNG_GPIOLIB_4BIT
 805         select HAVE_S3C2410_I2C if I2C
 806         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 807         help
 808           Samsung S3C64XX series based systems
 809
 810 config ARCH_S5P64X0
 811         bool "Samsung S5P6440 S5P6450"
 812         select CPU_V6
 813         select GENERIC_GPIO
 814         select HAVE_CLK
 815         select CLKDEV_LOOKUP
 816         select CLKSRC_MMIO
 817         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 818         select GENERIC_CLOCKEVENTS
 819         select HAVE_S3C2410_I2C if I2C
 820         select HAVE_S3C_RTC if RTC_CLASS
 821         help
 822           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 823           SMDK6450.
 824
 825 config ARCH_S5PC100
 826         bool "Samsung S5PC100"
 827         select GENERIC_GPIO
 828         select HAVE_CLK
 829         select CLKDEV_LOOKUP
 830         select CPU_V7
 831         select ARCH_USES_GETTIMEOFFSET
 832         select HAVE_S3C2410_I2C if I2C
 833         select HAVE_S3C_RTC if RTC_CLASS
 834         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 835         help
 836           Samsung S5PC100 series based systems
 837
 838 config ARCH_S5PV210
 839         bool "Samsung S5PV210/S5PC110"
 840         select CPU_V7
 841         select ARCH_SPARSEMEM_ENABLE
 842         select ARCH_HAS_HOLES_MEMORYMODEL
 843         select GENERIC_GPIO
 844         select HAVE_CLK
 845         select CLKDEV_LOOKUP
 846         select CLKSRC_MMIO
 847         select ARCH_HAS_CPUFREQ
 848         select GENERIC_CLOCKEVENTS
 849         select HAVE_S3C2410_I2C if I2C
 850         select HAVE_S3C_RTC if RTC_CLASS
 851         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 852         select NEED_MACH_MEMORY_H
 853         help
 854           Samsung S5PV210/S5PC110 series based systems
 855
 856 config ARCH_EXYNOS
 857         bool "SAMSUNG EXYNOS"
 858         select CPU_V7
 859         select ARCH_SPARSEMEM_ENABLE
 860         select ARCH_HAS_HOLES_MEMORYMODEL
 861         select GENERIC_GPIO
 862         select HAVE_CLK
 863         select CLKDEV_LOOKUP
 864         select ARCH_HAS_CPUFREQ
 865         select GENERIC_CLOCKEVENTS
 866         select HAVE_S3C_RTC if RTC_CLASS
 867         select HAVE_S3C2410_I2C if I2C
 868         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 869         select NEED_MACH_MEMORY_H
 870         help
 871           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 872
 873 config ARCH_SHARK
 874         bool "Shark"
 875         select CPU_SA110
 876         select ISA
 877         select ISA_DMA
 878         select ZONE_DMA
 879         select PCI
 880         select ARCH_USES_GETTIMEOFFSET
 881         select NEED_MACH_MEMORY_H
 882         select NEED_MACH_IO_H
 883         help
 884           Support for the StrongARM based Digital DNARD machine, also known
 885           as "Shark" (<http://www.shark-linux.de/shark.html>).
 886
 887 config ARCH_U300
 888         bool "ST-Ericsson U300 Series"
 889         depends on MMU
 890         select CLKSRC_MMIO
 891         select CPU_ARM926T
 892         select HAVE_TCM
 893         select ARM_AMBA
 894         select ARM_PATCH_PHYS_VIRT
 895         select ARM_VIC
 896         select GENERIC_CLOCKEVENTS
 897         select CLKDEV_LOOKUP
 898         select HAVE_MACH_CLKDEV
 899         select GENERIC_GPIO
 900         select ARCH_REQUIRE_GPIOLIB
 901         help
 902           Support for ST-Ericsson U300 series mobile platforms.
 903
 904 config ARCH_U8500
 905         bool "ST-Ericsson U8500 Series"
 906         depends on MMU
 907         select CPU_V7
 908         select ARM_AMBA
 909         select GENERIC_CLOCKEVENTS
 910         select CLKDEV_LOOKUP
 911         select ARCH_REQUIRE_GPIOLIB
 912         select ARCH_HAS_CPUFREQ
 913         select HAVE_SMP
 914         select MIGHT_HAVE_CACHE_L2X0
 915         help
 916           Support for ST-Ericsson's Ux500 architecture
 917
 918 config ARCH_NOMADIK
 919         bool "STMicroelectronics Nomadik"
 920         select ARM_AMBA
 921         select ARM_VIC
 922         select CPU_ARM926T
 923         select CLKDEV_LOOKUP
 924         select GENERIC_CLOCKEVENTS
 925         select PINCTRL
 926         select MIGHT_HAVE_CACHE_L2X0
 927         select ARCH_REQUIRE_GPIOLIB
 928         help
 929           Support for the Nomadik platform by ST-Ericsson
 930
 931 config ARCH_DAVINCI
 932         bool "TI DaVinci"
 933         select GENERIC_CLOCKEVENTS
 934         select ARCH_REQUIRE_GPIOLIB
 935         select ZONE_DMA
 936         select HAVE_IDE
 937         select CLKDEV_LOOKUP
 938         select GENERIC_ALLOCATOR
 939         select GENERIC_IRQ_CHIP
 940         select ARCH_HAS_HOLES_MEMORYMODEL
 941         help
 942           Support for TI's DaVinci platform.
 943
 944 config ARCH_OMAP
 945         bool "TI OMAP"
 946         select HAVE_CLK
 947         select ARCH_REQUIRE_GPIOLIB
 948         select ARCH_HAS_CPUFREQ
 949         select CLKSRC_MMIO
 950         select GENERIC_CLOCKEVENTS
 951         select ARCH_HAS_HOLES_MEMORYMODEL
 952         help
 953           Support for TI's OMAP platform (OMAP1/2/3/4).
 954
 955 config PLAT_SPEAR
 956         bool "ST SPEAr"
 957         select ARM_AMBA
 958         select ARCH_REQUIRE_GPIOLIB
 959         select CLKDEV_LOOKUP
 960         select CLKSRC_MMIO
 961         select GENERIC_CLOCKEVENTS
 962         select HAVE_CLK
 963         help
 964           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 965
 966 config ARCH_VT8500
 967         bool "VIA/WonderMedia 85xx"
 968         select CPU_ARM926T
 969         select GENERIC_GPIO
 970         select ARCH_HAS_CPUFREQ
 971         select GENERIC_CLOCKEVENTS
 972         select ARCH_REQUIRE_GPIOLIB
 973         select HAVE_PWM
 974         help
 975           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 976
 977 config ARCH_ZYNQ
 978         bool "Xilinx Zynq ARM Cortex A9 Platform"
 979         select CPU_V7
 980         select GENERIC_CLOCKEVENTS
 981         select CLKDEV_LOOKUP
 982         select ARM_GIC
 983         select ARM_AMBA
 984         select ICST
 985         select MIGHT_HAVE_CACHE_L2X0
 986         select USE_OF
 987         help
 988           Support for Xilinx Zynq ARM Cortex A9 Platform
 989 endchoice
 990
 991 #
 992 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 993 # Kconfigs may be included either alphabetically (according to the
 994 # plat- suffix) or along side the corresponding mach-* source.
 995 #
 996 source "arch/arm/mach-at91/Kconfig"
 997
 998 source "arch/arm/mach-bcmring/Kconfig"
 999
1000 source "arch/arm/mach-clps711x/Kconfig"
1001
1002 source "arch/arm/mach-cns3xxx/Kconfig"
1003
1004 source "arch/arm/mach-davinci/Kconfig"
1005
1006 source "arch/arm/mach-dove/Kconfig"
1007
1008 source "arch/arm/mach-ep93xx/Kconfig"
1009
1010 source "arch/arm/mach-footbridge/Kconfig"
1011
1012 source "arch/arm/mach-gemini/Kconfig"
1013
1014 source "arch/arm/mach-h720x/Kconfig"
1015
1016 source "arch/arm/mach-integrator/Kconfig"
1017
1018 source "arch/arm/mach-iop32x/Kconfig"
1019
1020 source "arch/arm/mach-iop33x/Kconfig"
1021
1022 source "arch/arm/mach-iop13xx/Kconfig"
1023
1024 source "arch/arm/mach-ixp4xx/Kconfig"
1025
1026 source "arch/arm/mach-kirkwood/Kconfig"
1027
1028 source "arch/arm/mach-ks8695/Kconfig"
1029
1030 source "arch/arm/mach-lpc32xx/Kconfig"
1031
1032 source "arch/arm/mach-msm/Kconfig"
1033
1034 source "arch/arm/mach-mv78xx0/Kconfig"
1035
1036 source "arch/arm/plat-mxc/Kconfig"
1037
1038 source "arch/arm/mach-mxs/Kconfig"
1039
1040 source "arch/arm/mach-netx/Kconfig"
1041
1042 source "arch/arm/mach-nomadik/Kconfig"
1043 source "arch/arm/plat-nomadik/Kconfig"
1044
1045 source "arch/arm/plat-omap/Kconfig"
1046
1047 source "arch/arm/mach-omap1/Kconfig"
1048
1049 source "arch/arm/mach-omap2/Kconfig"
1050
1051 source "arch/arm/mach-orion5x/Kconfig"
1052
1053 source "arch/arm/mach-pxa/Kconfig"
1054 source "arch/arm/plat-pxa/Kconfig"
1055
1056 source "arch/arm/mach-mmp/Kconfig"
1057
1058 source "arch/arm/mach-realview/Kconfig"
1059
1060 source "arch/arm/mach-sa1100/Kconfig"
1061
1062 source "arch/arm/plat-samsung/Kconfig"
1063 source "arch/arm/plat-s3c24xx/Kconfig"
1064 source "arch/arm/plat-s5p/Kconfig"
1065
1066 source "arch/arm/plat-spear/Kconfig"
1067
1068 source "arch/arm/mach-s3c24xx/Kconfig"
1069 if ARCH_S3C24XX
1070 source "arch/arm/mach-s3c2412/Kconfig"
1071 source "arch/arm/mach-s3c2440/Kconfig"
1072 endif
1073
1074 if ARCH_S3C64XX
1075 source "arch/arm/mach-s3c64xx/Kconfig"
1076 endif
1077
1078 source "arch/arm/mach-s5p64x0/Kconfig"
1079
1080 source "arch/arm/mach-s5pc100/Kconfig"
1081
1082 source "arch/arm/mach-s5pv210/Kconfig"
1083
1084 source "arch/arm/mach-exynos/Kconfig"
1085
1086 source "arch/arm/mach-shmobile/Kconfig"
1087
1088 source "arch/arm/mach-tegra/Kconfig"
1089
1090 source "arch/arm/mach-u300/Kconfig"
1091
1092 source "arch/arm/mach-ux500/Kconfig"
1093
1094 source "arch/arm/mach-versatile/Kconfig"
1095
1096 source "arch/arm/mach-vexpress/Kconfig"
1097 source "arch/arm/plat-versatile/Kconfig"
1098
1099 source "arch/arm/mach-vt8500/Kconfig"
1100
1101 source "arch/arm/mach-w90x900/Kconfig"
1102
1103 # Definitions to make life easier
1104 config ARCH_ACORN
1105         bool
1106
1107 config PLAT_IOP
1108         bool
1109         select GENERIC_CLOCKEVENTS
1110
1111 config PLAT_ORION
1112         bool
1113         select CLKSRC_MMIO
1114         select GENERIC_IRQ_CHIP
1115
1116 config PLAT_PXA
1117         bool
1118
1119 config PLAT_VERSATILE
1120         bool
1121
1122 config ARM_TIMER_SP804
1123         bool
1124         select CLKSRC_MMIO
1125         select HAVE_SCHED_CLOCK
1126
1127 source arch/arm/mm/Kconfig
1128
1129 config ARM_NR_BANKS
1130         int
1131         default 16 if ARCH_EP93XX
1132         default 8
1133
1134 config IWMMXT
1135         bool "Enable iWMMXt support"
1136         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1137         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1138         help
1139           Enable support for iWMMXt context switching at run time if
1140           running on a CPU that supports it.
1141
1142 config XSCALE_PMU
1143         bool
1144         depends on CPU_XSCALE
1145         default y
1146
1147 config CPU_HAS_PMU
1148         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1149                    (!ARCH_OMAP3 || OMAP3_EMU)
1150         default y
1151         bool
1152
1153 config MULTI_IRQ_HANDLER
1154         bool
1155         help
1156           Allow each machine to specify it's own IRQ handler at run time.
1157
1158 if !MMU
1159 source "arch/arm/Kconfig-nommu"
1160 endif
1161
1162 config ARM_ERRATA_326103
1163         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1164         depends on CPU_V6
1165         help
1166           Executing a SWP instruction to read-only memory does not set bit 11
1167           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1168           treat the access as a read, preventing a COW from occurring and
1169           causing the faulting task to livelock.
1170
1171 config ARM_ERRATA_411920
1172         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1173         depends on CPU_V6 || CPU_V6K
1174         help
1175           Invalidation of the Instruction Cache operation can
1176           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1177           It does not affect the MPCore. This option enables the ARM Ltd.
1178           recommended workaround.
1179
1180 config ARM_ERRATA_430973
1181         bool "ARM errata: Stale prediction on replaced interworking branch"
1182         depends on CPU_V7
1183         help
1184           This option enables the workaround for the 430973 Cortex-A8
1185           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1186           interworking branch is replaced with another code sequence at the
1187           same virtual address, whether due to self-modifying code or virtual
1188           to physical address re-mapping, Cortex-A8 does not recover from the
1189           stale interworking branch prediction. This results in Cortex-A8
1190           executing the new code sequence in the incorrect ARM or Thumb state.
1191           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1192           and also flushes the branch target cache at every context switch.
1193           Note that setting specific bits in the ACTLR register may not be
1194           available in non-secure mode.
1195
1196 config ARM_ERRATA_458693
1197         bool "ARM errata: Processor deadlock when a false hazard is created"
1198         depends on CPU_V7
1199         help
1200           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1201           erratum. For very specific sequences of memory operations, it is
1202           possible for a hazard condition intended for a cache line to instead
1203           be incorrectly associated with a different cache line. This false
1204           hazard might then cause a processor deadlock. The workaround enables
1205           the L1 caching of the NEON accesses and disables the PLD instruction
1206           in the ACTLR register. Note that setting specific bits in the ACTLR
1207           register may not be available in non-secure mode.
1208
1209 config ARM_ERRATA_460075
1210         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1211         depends on CPU_V7
1212         help
1213           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1214           erratum. Any asynchronous access to the L2 cache may encounter a
1215           situation in which recent store transactions to the L2 cache are lost
1216           and overwritten with stale memory contents from external memory. The
1217           workaround disables the write-allocate mode for the L2 cache via the
1218           ACTLR register. Note that setting specific bits in the ACTLR register
1219           may not be available in non-secure mode.
1220
1221 config ARM_ERRATA_742230
1222         bool "ARM errata: DMB operation may be faulty"
1223         depends on CPU_V7 && SMP
1224         help
1225           This option enables the workaround for the 742230 Cortex-A9
1226           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1227           between two write operations may not ensure the correct visibility
1228           ordering of the two writes. This workaround sets a specific bit in
1229           the diagnostic register of the Cortex-A9 which causes the DMB
1230           instruction to behave as a DSB, ensuring the correct behaviour of
1231           the two writes.
1232
1233 config ARM_ERRATA_742231
1234         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1235         depends on CPU_V7 && SMP
1236         help
1237           This option enables the workaround for the 742231 Cortex-A9
1238           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1239           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1240           accessing some data located in the same cache line, may get corrupted
1241           data due to bad handling of the address hazard when the line gets
1242           replaced from one of the CPUs at the same time as another CPU is
1243           accessing it. This workaround sets specific bits in the diagnostic
1244           register of the Cortex-A9 which reduces the linefill issuing
1245           capabilities of the processor.
1246
1247 config PL310_ERRATA_588369
1248         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1249         depends on CACHE_L2X0
1250         help
1251            The PL310 L2 cache controller implements three types of Clean &
1252            Invalidate maintenance operations: by Physical Address
1253            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1254            They are architecturally defined to behave as the execution of a
1255            clean operation followed immediately by an invalidate operation,
1256            both performing to the same memory location. This functionality
1257            is not correctly implemented in PL310 as clean lines are not
1258            invalidated as a result of these operations.
1259
1260 config ARM_ERRATA_720789
1261         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1262         depends on CPU_V7
1263         help
1264           This option enables the workaround for the 720789 Cortex-A9 (prior to
1265           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1266           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1267           As a consequence of this erratum, some TLB entries which should be
1268           invalidated are not, resulting in an incoherency in the system page
1269           tables. The workaround changes the TLB flushing routines to invalidate
1270           entries regardless of the ASID.
1271
1272 config PL310_ERRATA_727915
1273         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1274         depends on CACHE_L2X0
1275         help
1276           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1277           operation (offset 0x7FC). This operation runs in background so that
1278           PL310 can handle normal accesses while it is in progress. Under very
1279           rare circumstances, due to this erratum, write data can be lost when
1280           PL310 treats a cacheable write transaction during a Clean &
1281           Invalidate by Way operation.
1282
1283 config ARM_ERRATA_743622
1284         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1285         depends on CPU_V7
1286         help
1287           This option enables the workaround for the 743622 Cortex-A9
1288           (r2p*) erratum. Under very rare conditions, a faulty
1289           optimisation in the Cortex-A9 Store Buffer may lead to data
1290           corruption. This workaround sets a specific bit in the diagnostic
1291           register of the Cortex-A9 which disables the Store Buffer
1292           optimisation, preventing the defect from occurring. This has no
1293           visible impact on the overall performance or power consumption of the
1294           processor.
1295
1296 config ARM_ERRATA_751472
1297         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1298         depends on CPU_V7
1299         help
1300           This option enables the workaround for the 751472 Cortex-A9 (prior
1301           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1302           completion of a following broadcasted operation if the second
1303           operation is received by a CPU before the ICIALLUIS has completed,
1304           potentially leading to corrupted entries in the cache or TLB.
1305
1306 config PL310_ERRATA_753970
1307         bool "PL310 errata: cache sync operation may be faulty"
1308         depends on CACHE_PL310
1309         help
1310           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1311
1312           Under some condition the effect of cache sync operation on
1313           the store buffer still remains when the operation completes.
1314           This means that the store buffer is always asked to drain and
1315           this prevents it from merging any further writes. The workaround
1316           is to replace the normal offset of cache sync operation (0x730)
1317           by another offset targeting an unmapped PL310 register 0x740.
1318           This has the same effect as the cache sync operation: store buffer
1319           drain and waiting for all buffers empty.
1320
1321 config ARM_ERRATA_754322
1322         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1323         depends on CPU_V7
1324         help
1325           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1326           r3p*) erratum. A speculative memory access may cause a page table walk
1327           which starts prior to an ASID switch but completes afterwards. This
1328           can populate the micro-TLB with a stale entry which may be hit with
1329           the new ASID. This workaround places two dsb instructions in the mm
1330           switching code so that no page table walks can cross the ASID switch.
1331
1332 config ARM_ERRATA_754327
1333         bool "ARM errata: no automatic Store Buffer drain"
1334         depends on CPU_V7 && SMP
1335         help
1336           This option enables the workaround for the 754327 Cortex-A9 (prior to
1337           r2p0) erratum. The Store Buffer does not have any automatic draining
1338           mechanism and therefore a livelock may occur if an external agent
1339           continuously polls a memory location waiting to observe an update.
1340           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1341           written polling loops from denying visibility of updates to memory.
1342
1343 config ARM_ERRATA_364296
1344         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1345         depends on CPU_V6 && !SMP
1346         help
1347           This options enables the workaround for the 364296 ARM1136
1348           r0p2 erratum (possible cache data corruption with
1349           hit-under-miss enabled). It sets the undocumented bit 31 in
1350           the auxiliary control register and the FI bit in the control
1351           register, thus disabling hit-under-miss without putting the
1352           processor into full low interrupt latency mode. ARM11MPCore
1353           is not affected.
1354
1355 config ARM_ERRATA_764369
1356         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1357         depends on CPU_V7 && SMP
1358         help
1359           This option enables the workaround for erratum 764369
1360           affecting Cortex-A9 MPCore with two or more processors (all
1361           current revisions). Under certain timing circumstances, a data
1362           cache line maintenance operation by MVA targeting an Inner
1363           Shareable memory region may fail to proceed up to either the
1364           Point of Coherency or to the Point of Unification of the
1365           system. This workaround adds a DSB instruction before the
1366           relevant cache maintenance functions and sets a specific bit
1367           in the diagnostic control register of the SCU.
1368
1369 config PL310_ERRATA_769419
1370         bool "PL310 errata: no automatic Store Buffer drain"
1371         depends on CACHE_L2X0
1372         help
1373           On revisions of the PL310 prior to r3p2, the Store Buffer does
1374           not automatically drain. This can cause normal, non-cacheable
1375           writes to be retained when the memory system is idle, leading
1376           to suboptimal I/O performance for drivers using coherent DMA.
1377           This option adds a write barrier to the cpu_idle loop so that,
1378           on systems with an outer cache, the store buffer is drained
1379           explicitly.
1380
1381 endmenu
1382
1383 source "arch/arm/common/Kconfig"
1384
1385 menu "Bus support"
1386
1387 config ARM_AMBA
1388         bool
1389
1390 config ISA
1391         bool
1392         help
1393           Find out whether you have ISA slots on your motherboard.  ISA is the
1394           name of a bus system, i.e. the way the CPU talks to the other stuff
1395           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1396           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1397           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1398
1399 # Select ISA DMA controller support
1400 config ISA_DMA
1401         bool
1402         select ISA_DMA_API
1403
1404 # Select ISA DMA interface
1405 config ISA_DMA_API
1406         bool
1407
1408 config PCI
1409         bool "PCI support" if MIGHT_HAVE_PCI
1410         help
1411           Find out whether you have a PCI motherboard. PCI is the name of a
1412           bus system, i.e. the way the CPU talks to the other stuff inside
1413           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1414           VESA. If you have PCI, say Y, otherwise N.
1415
1416 config PCI_DOMAINS
1417         bool
1418         depends on PCI
1419
1420 config PCI_NANOENGINE
1421         bool "BSE nanoEngine PCI support"
1422         depends on SA1100_NANOENGINE
1423         help
1424           Enable PCI on the BSE nanoEngine board.
1425
1426 config PCI_SYSCALL
1427         def_bool PCI
1428
1429 # Select the host bridge type
1430 config PCI_HOST_VIA82C505
1431         bool
1432         depends on PCI && ARCH_SHARK
1433         default y
1434
1435 config PCI_HOST_ITE8152
1436         bool
1437         depends on PCI && MACH_ARMCORE
1438         default y
1439         select DMABOUNCE
1440
1441 source "drivers/pci/Kconfig"
1442
1443 source "drivers/pcmcia/Kconfig"
1444
1445 endmenu
1446
1447 menu "Kernel Features"
1448
1449 source "kernel/time/Kconfig"
1450
1451 config HAVE_SMP
1452         bool
1453         help
1454           This option should be selected by machines which have an SMP-
1455           capable CPU.
1456
1457           The only effect of this option is to make the SMP-related
1458           options available to the user for configuration.
1459
1460 config SMP
1461         bool "Symmetric Multi-Processing"
1462         depends on CPU_V6K || CPU_V7
1463         depends on GENERIC_CLOCKEVENTS
1464         depends on HAVE_SMP
1465         depends on MMU
1466         select USE_GENERIC_SMP_HELPERS
1467         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1468         help
1469           This enables support for systems with more than one CPU. If you have
1470           a system with only one CPU, like most personal computers, say N. If
1471           you have a system with more than one CPU, say Y.
1472
1473           If you say N here, the kernel will run on single and multiprocessor
1474           machines, but will use only one CPU of a multiprocessor machine. If
1475           you say Y here, the kernel will run on many, but not all, single
1476           processor machines. On a single processor machine, the kernel will
1477           run faster if you say N here.
1478
1479           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1480           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1481           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1482
1483           If you don't know what to do here, say N.
1484
1485 config SMP_ON_UP
1486         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1487         depends on EXPERIMENTAL
1488         depends on SMP && !XIP_KERNEL
1489         default y
1490         help
1491           SMP kernels contain instructions which fail on non-SMP processors.
1492           Enabling this option allows the kernel to modify itself to make
1493           these instructions safe.  Disabling it allows about 1K of space
1494           savings.
1495
1496           If you don't know what to do here, say Y.
1497
1498 config ARM_CPU_TOPOLOGY
1499         bool "Support cpu topology definition"
1500         depends on SMP && CPU_V7
1501         default y
1502         help
1503           Support ARM cpu topology definition. The MPIDR register defines
1504           affinity between processors which is then used to describe the cpu
1505           topology of an ARM System.
1506
1507 config SCHED_MC
1508         bool "Multi-core scheduler support"
1509         depends on ARM_CPU_TOPOLOGY
1510         help
1511           Multi-core scheduler support improves the CPU scheduler's decision
1512           making when dealing with multi-core CPU chips at a cost of slightly
1513           increased overhead in some places. If unsure say N here.
1514
1515 config SCHED_SMT
1516         bool "SMT scheduler support"
1517         depends on ARM_CPU_TOPOLOGY
1518         help
1519           Improves the CPU scheduler's decision making when dealing with
1520           MultiThreading at a cost of slightly increased overhead in some
1521           places. If unsure say N here.
1522
1523 config HAVE_ARM_SCU
1524         bool
1525         help
1526           This option enables support for the ARM system coherency unit
1527
1528 config ARM_ARCH_TIMER
1529         bool "Architected timer support"
1530         depends on CPU_V7
1531         help
1532           This option enables support for the ARM architected timer
1533
1534 config HAVE_ARM_TWD
1535         bool
1536         depends on SMP
1537         help
1538           This options enables support for the ARM timer and watchdog unit
1539
1540 choice
1541         prompt "Memory split"
1542         default VMSPLIT_3G
1543         help
1544           Select the desired split between kernel and user memory.
1545
1546           If you are not absolutely sure what you are doing, leave this
1547           option alone!
1548
1549         config VMSPLIT_3G
1550                 bool "3G/1G user/kernel split"
1551         config VMSPLIT_2G
1552                 bool "2G/2G user/kernel split"
1553         config VMSPLIT_1G
1554                 bool "1G/3G user/kernel split"
1555 endchoice
1556
1557 config PAGE_OFFSET
1558         hex
1559         default 0x40000000 if VMSPLIT_1G
1560         default 0x80000000 if VMSPLIT_2G
1561         default 0xC0000000
1562
1563 config NR_CPUS
1564         int "Maximum number of CPUs (2-32)"
1565         range 2 32
1566         depends on SMP
1567         default "4"
1568
1569 config HOTPLUG_CPU
1570         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1571         depends on SMP && HOTPLUG && EXPERIMENTAL
1572         help
1573           Say Y here to experiment with turning CPUs off and on.  CPUs
1574           can be controlled through /sys/devices/system/cpu.
1575
1576 config LOCAL_TIMERS
1577         bool "Use local timer interrupts"
1578         depends on SMP
1579         default y
1580         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1581         help
1582           Enable support for local timers on SMP platforms, rather then the
1583           legacy IPI broadcast method.  Local timers allows the system
1584           accounting to be spread across the timer interval, preventing a
1585           "thundering herd" at every timer tick.
1586
1587 config ARCH_NR_GPIO
1588         int
1589         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1590         default 355 if ARCH_U8500
1591         default 264 if MACH_H4700
1592         default 0
1593         help
1594           Maximum number of GPIOs in the system.
1595
1596           If unsure, leave the default value.
1597
1598 source kernel/Kconfig.preempt
1599
1600 config HZ
1601         int
1602         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1603                 ARCH_S5PV210 || ARCH_EXYNOS4
1604         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1605         default AT91_TIMER_HZ if ARCH_AT91
1606         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1607         default 100
1608
1609 config THUMB2_KERNEL
1610         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1611         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1612         select AEABI
1613         select ARM_ASM_UNIFIED
1614         select ARM_UNWIND
1615         help
1616           By enabling this option, the kernel will be compiled in
1617           Thumb-2 mode. A compiler/assembler that understand the unified
1618           ARM-Thumb syntax is needed.
1619
1620           If unsure, say N.
1621
1622 config THUMB2_AVOID_R_ARM_THM_JUMP11
1623         bool "Work around buggy Thumb-2 short branch relocations in gas"
1624         depends on THUMB2_KERNEL && MODULES
1625         default y
1626         help
1627           Various binutils versions can resolve Thumb-2 branches to
1628           locally-defined, preemptible global symbols as short-range "b.n"
1629           branch instructions.
1630
1631           This is a problem, because there's no guarantee the final
1632           destination of the symbol, or any candidate locations for a
1633           trampoline, are within range of the branch.  For this reason, the
1634           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1635           relocation in modules at all, and it makes little sense to add
1636           support.
1637
1638           The symptom is that the kernel fails with an "unsupported
1639           relocation" error when loading some modules.
1640
1641           Until fixed tools are available, passing
1642           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1643           code which hits this problem, at the cost of a bit of extra runtime
1644           stack usage in some cases.
1645
1646           The problem is described in more detail at:
1647               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1648
1649           Only Thumb-2 kernels are affected.
1650
1651           Unless you are sure your tools don't have this problem, say Y.
1652
1653 config ARM_ASM_UNIFIED
1654         bool
1655
1656 config AEABI
1657         bool "Use the ARM EABI to compile the kernel"
1658         help
1659           This option allows for the kernel to be compiled using the latest
1660           ARM ABI (aka EABI).  This is only useful if you are using a user
1661           space environment that is also compiled with EABI.
1662
1663           Since there are major incompatibilities between the legacy ABI and
1664           EABI, especially with regard to structure member alignment, this
1665           option also changes the kernel syscall calling convention to
1666           disambiguate both ABIs and allow for backward compatibility support
1667           (selected with CONFIG_OABI_COMPAT).
1668
1669           To use this you need GCC version 4.0.0 or later.
1670
1671 config OABI_COMPAT
1672         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1673         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1674         default y
1675         help
1676           This option preserves the old syscall interface along with the
1677           new (ARM EABI) one. It also provides a compatibility layer to
1678           intercept syscalls that have structure arguments which layout
1679           in memory differs between the legacy ABI and the new ARM EABI
1680           (only for non "thumb" binaries). This option adds a tiny
1681           overhead to all syscalls and produces a slightly larger kernel.
1682           If you know you'll be using only pure EABI user space then you
1683           can say N here. If this option is not selected and you attempt
1684           to execute a legacy ABI binary then the result will be
1685           UNPREDICTABLE (in fact it can be predicted that it won't work
1686           at all). If in doubt say Y.
1687
1688 config ARCH_HAS_HOLES_MEMORYMODEL
1689         bool
1690
1691 config ARCH_SPARSEMEM_ENABLE
1692         bool
1693
1694 config ARCH_SPARSEMEM_DEFAULT
1695         def_bool ARCH_SPARSEMEM_ENABLE
1696
1697 config ARCH_SELECT_MEMORY_MODEL
1698         def_bool ARCH_SPARSEMEM_ENABLE
1699
1700 config HAVE_ARCH_PFN_VALID
1701         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1702
1703 config HIGHMEM
1704         bool "High Memory Support"
1705         depends on MMU
1706         help
1707           The address space of ARM processors is only 4 Gigabytes large
1708           and it has to accommodate user address space, kernel address
1709           space as well as some memory mapped IO. That means that, if you
1710           have a large amount of physical memory and/or IO, not all of the
1711           memory can be "permanently mapped" by the kernel. The physical
1712           memory that is not permanently mapped is called "high memory".
1713
1714           Depending on the selected kernel/user memory split, minimum
1715           vmalloc space and actual amount of RAM, you may not need this
1716           option which should result in a slightly faster kernel.
1717
1718           If unsure, say n.
1719
1720 config HIGHPTE
1721         bool "Allocate 2nd-level pagetables from highmem"
1722         depends on HIGHMEM
1723
1724 config HW_PERF_EVENTS
1725         bool "Enable hardware performance counter support for perf events"
1726         depends on PERF_EVENTS && CPU_HAS_PMU
1727         default y
1728         help
1729           Enable hardware performance counter support for perf events. If
1730           disabled, perf events will use software events only.
1731
1732 source "mm/Kconfig"
1733
1734 config FORCE_MAX_ZONEORDER
1735         int "Maximum zone order" if ARCH_SHMOBILE
1736         range 11 64 if ARCH_SHMOBILE
1737         default "9" if SA1111
1738         default "11"
1739         help
1740           The kernel memory allocator divides physically contiguous memory
1741           blocks into "zones", where each zone is a power of two number of
1742           pages.  This option selects the largest power of two that the kernel
1743           keeps in the memory allocator.  If you need to allocate very large
1744           blocks of physically contiguous memory, then you may need to
1745           increase this value.
1746
1747           This config option is actually maximum order plus one. For example,
1748           a value of 11 means that the largest free memory block is 2^10 pages.
1749
1750 config LEDS
1751         bool "Timer and CPU usage LEDs"
1752         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1753                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1754                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1755                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1756                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1757                    ARCH_AT91 || ARCH_DAVINCI || \
1758                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1759         help
1760           If you say Y here, the LEDs on your machine will be used
1761           to provide useful information about your current system status.
1762
1763           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1764           be able to select which LEDs are active using the options below. If
1765           you are compiling a kernel for the EBSA-110 or the LART however, the
1766           red LED will simply flash regularly to indicate that the system is
1767           still functional. It is safe to say Y here if you have a CATS
1768           system, but the driver will do nothing.
1769
1770 config LEDS_TIMER
1771         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1772                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1773                             || MACH_OMAP_PERSEUS2
1774         depends on LEDS
1775         depends on !GENERIC_CLOCKEVENTS
1776         default y if ARCH_EBSA110
1777         help
1778           If you say Y here, one of the system LEDs (the green one on the
1779           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1780           will flash regularly to indicate that the system is still
1781           operational. This is mainly useful to kernel hackers who are
1782           debugging unstable kernels.
1783
1784           The LART uses the same LED for both Timer LED and CPU usage LED
1785           functions. You may choose to use both, but the Timer LED function
1786           will overrule the CPU usage LED.
1787
1788 config LEDS_CPU
1789         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1790                         !ARCH_OMAP) \
1791                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1792                         || MACH_OMAP_PERSEUS2
1793         depends on LEDS
1794         help
1795           If you say Y here, the red LED will be used to give a good real
1796           time indication of CPU usage, by lighting whenever the idle task
1797           is not currently executing.
1798
1799           The LART uses the same LED for both Timer LED and CPU usage LED
1800           functions. You may choose to use both, but the Timer LED function
1801           will overrule the CPU usage LED.
1802
1803 config ALIGNMENT_TRAP
1804         bool
1805         depends on CPU_CP15_MMU
1806         default y if !ARCH_EBSA110
1807         select HAVE_PROC_CPU if PROC_FS
1808         help
1809           ARM processors cannot fetch/store information which is not
1810           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1811           address divisible by 4. On 32-bit ARM processors, these non-aligned
1812           fetch/store instructions will be emulated in software if you say
1813           here, which has a severe performance impact. This is necessary for
1814           correct operation of some network protocols. With an IP-only
1815           configuration it is safe to say N, otherwise say Y.
1816
1817 config UACCESS_WITH_MEMCPY
1818         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1819         depends on MMU && EXPERIMENTAL
1820         default y if CPU_FEROCEON
1821         help
1822           Implement faster copy_to_user and clear_user methods for CPU
1823           cores where a 8-word STM instruction give significantly higher
1824           memory write throughput than a sequence of individual 32bit stores.
1825
1826           A possible side effect is a slight increase in scheduling latency
1827           between threads sharing the same address space if they invoke
1828           such copy operations with large buffers.
1829
1830           However, if the CPU data cache is using a write-allocate mode,
1831           this option is unlikely to provide any performance gain.
1832
1833 config SECCOMP
1834         bool
1835         prompt "Enable seccomp to safely compute untrusted bytecode"
1836         ---help---
1837           This kernel feature is useful for number crunching applications
1838           that may need to compute untrusted bytecode during their
1839           execution. By using pipes or other transports made available to
1840           the process as file descriptors supporting the read/write
1841           syscalls, it's possible to isolate those applications in
1842           their own address space using seccomp. Once seccomp is
1843           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1844           and the task is only allowed to execute a few safe syscalls
1845           defined by each seccomp mode.
1846
1847 config CC_STACKPROTECTOR
1848         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1849         depends on EXPERIMENTAL
1850         help
1851           This option turns on the -fstack-protector GCC feature. This
1852           feature puts, at the beginning of functions, a canary value on
1853           the stack just before the return address, and validates
1854           the value just before actually returning.  Stack based buffer
1855           overflows (that need to overwrite this return address) now also
1856           overwrite the canary, which gets detected and the attack is then
1857           neutralized via a kernel panic.
1858           This feature requires gcc version 4.2 or above.
1859
1860 config DEPRECATED_PARAM_STRUCT
1861         bool "Provide old way to pass kernel parameters"
1862         help
1863           This was deprecated in 2001 and announced to live on for 5 years.
1864           Some old boot loaders still use this way.
1865
1866 endmenu
1867
1868 menu "Boot options"
1869
1870 config USE_OF
1871         bool "Flattened Device Tree support"
1872         select OF
1873         select OF_EARLY_FLATTREE
1874         select IRQ_DOMAIN
1875         help
1876           Include support for flattened device tree machine descriptions.
1877
1878 # Compressed boot loader in ROM.  Yes, we really want to ask about
1879 # TEXT and BSS so we preserve their values in the config files.
1880 config ZBOOT_ROM_TEXT
1881         hex "Compressed ROM boot loader base address"
1882         default "0"
1883         help
1884           The physical address at which the ROM-able zImage is to be
1885           placed in the target.  Platforms which normally make use of
1886           ROM-able zImage formats normally set this to a suitable
1887           value in their defconfig file.
1888
1889           If ZBOOT_ROM is not enabled, this has no effect.
1890
1891 config ZBOOT_ROM_BSS
1892         hex "Compressed ROM boot loader BSS address"
1893         default "0"
1894         help
1895           The base address of an area of read/write memory in the target
1896           for the ROM-able zImage which must be available while the
1897           decompressor is running. It must be large enough to hold the
1898           entire decompressed kernel plus an additional 128 KiB.
1899           Platforms which normally make use of ROM-able zImage formats
1900           normally set this to a suitable value in their defconfig file.
1901
1902           If ZBOOT_ROM is not enabled, this has no effect.
1903
1904 config ZBOOT_ROM
1905         bool "Compressed boot loader in ROM/flash"
1906         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1907         help
1908           Say Y here if you intend to execute your compressed kernel image
1909           (zImage) directly from ROM or flash.  If unsure, say N.
1910
1911 choice
1912         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1913         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1914         default ZBOOT_ROM_NONE
1915         help
1916           Include experimental SD/MMC loading code in the ROM-able zImage.
1917           With this enabled it is possible to write the ROM-able zImage
1918           kernel image to an MMC or SD card and boot the kernel straight
1919           from the reset vector. At reset the processor Mask ROM will load
1920           the first part of the ROM-able zImage which in turn loads the
1921           rest the kernel image to RAM.
1922
1923 config ZBOOT_ROM_NONE
1924         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1925         help
1926           Do not load image from SD or MMC
1927
1928 config ZBOOT_ROM_MMCIF
1929         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1930         help
1931           Load image from MMCIF hardware block.
1932
1933 config ZBOOT_ROM_SH_MOBILE_SDHI
1934         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1935         help
1936           Load image from SDHI hardware block
1937
1938 endchoice
1939
1940 config ARM_APPENDED_DTB
1941         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1942         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1943         help
1944           With this option, the boot code will look for a device tree binary
1945           (DTB) appended to zImage
1946           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1947
1948           This is meant as a backward compatibility convenience for those
1949           systems with a bootloader that can't be upgraded to accommodate
1950           the documented boot protocol using a device tree.
1951
1952           Beware that there is very little in terms of protection against
1953           this option being confused by leftover garbage in memory that might
1954           look like a DTB header after a reboot if no actual DTB is appended
1955           to zImage.  Do not leave this option active in a production kernel
1956           if you don't intend to always append a DTB.  Proper passing of the
1957           location into r2 of a bootloader provided DTB is always preferable
1958           to this option.
1959
1960 config ARM_ATAG_DTB_COMPAT
1961         bool "Supplement the appended DTB with traditional ATAG information"
1962         depends on ARM_APPENDED_DTB
1963         help
1964           Some old bootloaders can't be updated to a DTB capable one, yet
1965           they provide ATAGs with memory configuration, the ramdisk address,
1966           the kernel cmdline string, etc.  Such information is dynamically
1967           provided by the bootloader and can't always be stored in a static
1968           DTB.  To allow a device tree enabled kernel to be used with such
1969           bootloaders, this option allows zImage to extract the information
1970           from the ATAG list and store it at run time into the appended DTB.
1971
1972 config CMDLINE
1973         string "Default kernel command string"
1974         default ""
1975         help
1976           On some architectures (EBSA110 and CATS), there is currently no way
1977           for the boot loader to pass arguments to the kernel. For these
1978           architectures, you should supply some command-line options at build
1979           time by entering them here. As a minimum, you should specify the
1980           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1981
1982 choice
1983         prompt "Kernel command line type" if CMDLINE != ""
1984         default CMDLINE_FROM_BOOTLOADER
1985
1986 config CMDLINE_FROM_BOOTLOADER
1987         bool "Use bootloader kernel arguments if available"
1988         help
1989           Uses the command-line options passed by the boot loader. If
1990           the boot loader doesn't provide any, the default kernel command
1991           string provided in CMDLINE will be used.
1992
1993 config CMDLINE_EXTEND
1994         bool "Extend bootloader kernel arguments"
1995         help
1996           The command-line arguments provided by the boot loader will be
1997           appended to the default kernel command string.
1998
1999 config CMDLINE_FORCE
2000         bool "Always use the default kernel command string"
2001         help
2002           Always use the default kernel command string, even if the boot
2003           loader passes other arguments to the kernel.
2004           This is useful if you cannot or don't want to change the
2005           command-line options your boot loader passes to the kernel.
2006 endchoice
2007
2008 config XIP_KERNEL
2009         bool "Kernel Execute-In-Place from ROM"
2010         depends on !ZBOOT_ROM && !ARM_LPAE
2011         help
2012           Execute-In-Place allows the kernel to run from non-volatile storage
2013           directly addressable by the CPU, such as NOR flash. This saves RAM
2014           space since the text section of the kernel is not loaded from flash
2015           to RAM.  Read-write sections, such as the data section and stack,
2016           are still copied to RAM.  The XIP kernel is not compressed since
2017           it has to run directly from flash, so it will take more space to
2018           store it.  The flash address used to link the kernel object files,
2019           and for storing it, is configuration dependent. Therefore, if you
2020           say Y here, you must know the proper physical address where to
2021           store the kernel image depending on your own flash memory usage.
2022
2023           Also note that the make target becomes "make xipImage" rather than
2024           "make zImage" or "make Image".  The final kernel binary to put in
2025           ROM memory will be arch/arm/boot/xipImage.
2026
2027           If unsure, say N.
2028
2029 config XIP_PHYS_ADDR
2030         hex "XIP Kernel Physical Location"
2031         depends on XIP_KERNEL
2032         default "0x00080000"
2033         help
2034           This is the physical address in your flash memory the kernel will
2035           be linked for and stored to.  This address is dependent on your
2036           own flash usage.
2037
2038 config KEXEC
2039         bool "Kexec system call (EXPERIMENTAL)"
2040         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2041         help
2042           kexec is a system call that implements the ability to shutdown your
2043           current kernel, and to start another kernel.  It is like a reboot
2044           but it is independent of the system firmware.   And like a reboot
2045           you can start any kernel with it, not just Linux.
2046
2047           It is an ongoing process to be certain the hardware in a machine
2048           is properly shutdown, so do not be surprised if this code does not
2049           initially work for you.  It may help to enable device hotplugging
2050           support.
2051
2052 config ATAGS_PROC
2053         bool "Export atags in procfs"
2054         depends on KEXEC
2055         default y
2056         help
2057           Should the atags used to boot the kernel be exported in an "atags"
2058           file in procfs. Useful with kexec.
2059
2060 config CRASH_DUMP
2061         bool "Build kdump crash kernel (EXPERIMENTAL)"
2062         depends on EXPERIMENTAL
2063         help
2064           Generate crash dump after being started by kexec. This should
2065           be normally only set in special crash dump kernels which are
2066           loaded in the main kernel with kexec-tools into a specially
2067           reserved region and then later executed after a crash by
2068           kdump/kexec. The crash dump kernel must be compiled to a
2069           memory address not used by the main kernel
2070
2071           For more details see Documentation/kdump/kdump.txt
2072
2073 config AUTO_ZRELADDR
2074         bool "Auto calculation of the decompressed kernel image address"
2075         depends on !ZBOOT_ROM && !ARCH_U300
2076         help
2077           ZRELADDR is the physical address where the decompressed kernel
2078           image will be placed. If AUTO_ZRELADDR is selected, the address
2079           will be determined at run-time by masking the current IP with
2080           0xf8000000. This assumes the zImage being placed in the first 128MB
2081           from start of memory.
2082
2083 endmenu
2084
2085 menu "CPU Power Management"
2086
2087 if ARCH_HAS_CPUFREQ
2088
2089 source "drivers/cpufreq/Kconfig"
2090
2091 config CPU_FREQ_IMX
2092         tristate "CPUfreq driver for i.MX CPUs"
2093         depends on ARCH_MXC && CPU_FREQ
2094         help
2095           This enables the CPUfreq driver for i.MX CPUs.
2096
2097 config CPU_FREQ_SA1100
2098         bool
2099
2100 config CPU_FREQ_SA1110
2101         bool
2102
2103 config CPU_FREQ_INTEGRATOR
2104         tristate "CPUfreq driver for ARM Integrator CPUs"
2105         depends on ARCH_INTEGRATOR && CPU_FREQ
2106         default y
2107         help
2108           This enables the CPUfreq driver for ARM Integrator CPUs.
2109
2110           For details, take a look at <file:Documentation/cpu-freq>.
2111
2112           If in doubt, say Y.
2113
2114 config CPU_FREQ_PXA
2115         bool
2116         depends on CPU_FREQ && ARCH_PXA && PXA25x
2117         default y
2118         select CPU_FREQ_TABLE
2119         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2120
2121 config CPU_FREQ_S3C
2122         bool
2123         help
2124           Internal configuration node for common cpufreq on Samsung SoC
2125
2126 config CPU_FREQ_S3C24XX
2127         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2128         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2129         select CPU_FREQ_S3C
2130         help
2131           This enables the CPUfreq driver for the Samsung S3C24XX family
2132           of CPUs.
2133
2134           For details, take a look at <file:Documentation/cpu-freq>.
2135
2136           If in doubt, say N.
2137
2138 config CPU_FREQ_S3C24XX_PLL
2139         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2140         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2141         help
2142           Compile in support for changing the PLL frequency from the
2143           S3C24XX series CPUfreq driver. The PLL takes time to settle
2144           after a frequency change, so by default it is not enabled.
2145
2146           This also means that the PLL tables for the selected CPU(s) will
2147           be built which may increase the size of the kernel image.
2148
2149 config CPU_FREQ_S3C24XX_DEBUG
2150         bool "Debug CPUfreq Samsung driver core"
2151         depends on CPU_FREQ_S3C24XX
2152         help
2153           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2154
2155 config CPU_FREQ_S3C24XX_IODEBUG
2156         bool "Debug CPUfreq Samsung driver IO timing"
2157         depends on CPU_FREQ_S3C24XX
2158         help
2159           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2160
2161 config CPU_FREQ_S3C24XX_DEBUGFS
2162         bool "Export debugfs for CPUFreq"
2163         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2164         help
2165           Export status information via debugfs.
2166
2167 endif
2168
2169 source "drivers/cpuidle/Kconfig"
2170
2171 endmenu
2172
2173 menu "Floating point emulation"
2174
2175 comment "At least one emulation must be selected"
2176
2177 config FPE_NWFPE
2178         bool "NWFPE math emulation"
2179         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2180         ---help---
2181           Say Y to include the NWFPE floating point emulator in the kernel.
2182           This is necessary to run most binaries. Linux does not currently
2183           support floating point hardware so you need to say Y here even if
2184           your machine has an FPA or floating point co-processor podule.
2185
2186           You may say N here if you are going to load the Acorn FPEmulator
2187           early in the bootup.
2188
2189 config FPE_NWFPE_XP
2190         bool "Support extended precision"
2191         depends on FPE_NWFPE
2192         help
2193           Say Y to include 80-bit support in the kernel floating-point
2194           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2195           Note that gcc does not generate 80-bit operations by default,
2196           so in most cases this option only enlarges the size of the
2197           floating point emulator without any good reason.
2198
2199           You almost surely want to say N here.
2200
2201 config FPE_FASTFPE
2202         bool "FastFPE math emulation (EXPERIMENTAL)"
2203         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2204         ---help---
2205           Say Y here to include the FAST floating point emulator in the kernel.
2206           This is an experimental much faster emulator which now also has full
2207           precision for the mantissa.  It does not support any exceptions.
2208           It is very simple, and approximately 3-6 times faster than NWFPE.
2209
2210           It should be sufficient for most programs.  It may be not suitable
2211           for scientific calculations, but you have to check this for yourself.
2212           If you do not feel you need a faster FP emulation you should better
2213           choose NWFPE.
2214
2215 config VFP
2216         bool "VFP-format floating point maths"
2217         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2218         help
2219           Say Y to include VFP support code in the kernel. This is needed
2220           if your hardware includes a VFP unit.
2221
2222           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2223           release notes and additional status information.
2224
2225           Say N if your target does not have VFP hardware.
2226
2227 config VFPv3
2228         bool
2229         depends on VFP
2230         default y if CPU_V7
2231
2232 config NEON
2233         bool "Advanced SIMD (NEON) Extension support"
2234         depends on VFPv3 && CPU_V7
2235         help
2236           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2237           Extension.
2238
2239 endmenu
2240
2241 menu "Userspace binary formats"
2242
2243 source "fs/Kconfig.binfmt"
2244
2245 config ARTHUR
2246         tristate "RISC OS personality"
2247         depends on !AEABI
2248         help
2249           Say Y here to include the kernel code necessary if you want to run
2250           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2251           experimental; if this sounds frightening, say N and sleep in peace.
2252           You can also say M here to compile this support as a module (which
2253           will be called arthur).
2254
2255 endmenu
2256
2257 menu "Power management options"
2258
2259 source "kernel/power/Kconfig"
2260
2261 config ARCH_SUSPEND_POSSIBLE
2262         depends on !ARCH_S5PC100 && !ARCH_TEGRA
2263         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2264                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2265         def_bool y
2266
2267 config ARM_CPU_SUSPEND
2268         def_bool PM_SLEEP
2269
2270 endmenu
2271
2272 source "net/Kconfig"
2273
2274 source "drivers/Kconfig"
2275
2276 source "fs/Kconfig"
2277
2278 source "arch/arm/Kconfig.debug"
2279
2280 source "security/Kconfig"
2281
2282 source "crypto/Kconfig"
2283
2284 source "lib/Kconfig"