arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config HAVE_PWM
  41         bool
  42
  43 config MIGHT_HAVE_PCI
  44         bool
  45
  46 config SYS_SUPPORTS_APM_EMULATION
  47         bool
  48
  49 config HAVE_SCHED_CLOCK
  50         bool
  51
  52 config GENERIC_GPIO
  53         bool
  54
  55 config ARCH_USES_GETTIMEOFFSET
  56         bool
  57         default n
  58
  59 config GENERIC_CLOCKEVENTS
  60         bool
  61
  62 config GENERIC_CLOCKEVENTS_BROADCAST
  63         bool
  64         depends on GENERIC_CLOCKEVENTS
  65         default y if SMP
  66
  67 config KTIME_SCALAR
  68         bool
  69         default y
  70
  71 config HAVE_TCM
  72         bool
  73         select GENERIC_ALLOCATOR
  74
  75 config HAVE_PROC_CPU
  76         bool
  77
  78 config NO_IOPORT
  79         bool
  80
  81 config EISA
  82         bool
  83         ---help---
  84           The Extended Industry Standard Architecture (EISA) bus was
  85           developed as an open alternative to the IBM MicroChannel bus.
  86
  87           The EISA bus provided some of the features of the IBM MicroChannel
  88           bus while maintaining backward compatibility with cards made for
  89           the older ISA bus.  The EISA bus saw limited use between 1988 and
  90           1995 when it was made obsolete by the PCI bus.
  91
  92           Say Y here if you are building a kernel for an EISA-based machine.
  93
  94           Otherwise, say N.
  95
  96 config SBUS
  97         bool
  98
  99 config MCA
 100         bool
 101         help
 102           MicroChannel Architecture is found in some IBM PS/2 machines and
 103           laptops.  It is a bus system similar to PCI or ISA. See
 104           <file:Documentation/mca.txt> (and especially the web page given
 105           there) before attempting to build an MCA bus kernel.
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config HARDIRQS_SW_RESEND
 125         bool
 126         default y
 127
 128 config GENERIC_IRQ_PROBE
 129         bool
 130         default y
 131
 132 config GENERIC_LOCKBREAK
 133         bool
 134         default y
 135         depends on SMP && PREEMPT
 136
 137 config RWSEM_GENERIC_SPINLOCK
 138         bool
 139         default y
 140
 141 config RWSEM_XCHGADD_ALGORITHM
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U32
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U64
 148         bool
 149
 150 config ARCH_HAS_CPUFREQ
 151         bool
 152         help
 153           Internal node to signify that the ARCH has CPUFREQ support
 154           and that the relevant menu configurations are displayed for
 155           it.
 156
 157 config ARCH_HAS_CPU_IDLE_WAIT
 158        def_bool y
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config GENERIC_ISA_DMA
 178         bool
 179
 180 config FIQ
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 196         depends on EXPERIMENTAL
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary, or theoretically 64K
 206           for the MSM machine class.
 207
 208 config ARM_PATCH_PHYS_VIRT_16BIT
 209         def_bool y
 210         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 211         help
 212           This option extends the physical to virtual translation patching
 213           to allow physical memory down to a theoretical minimum of 64K
 214           boundaries.
 215
 216 source "init/Kconfig"
 217
 218 source "kernel/Kconfig.freezer"
 219
 220 menu "System Type"
 221
 222 config MMU
 223         bool "MMU-based Paged Memory Management Support"
 224         default y
 225         help
 226           Select if you want MMU-based virtualised addressing space
 227           support by paged memory management. If unsure, say 'Y'.
 228
 229 #
 230 # The "ARM system type" choice list is ordered alphabetically by option
 231 # text.  Please add new entries in the option alphabetic order.
 232 #
 233 choice
 234         prompt "ARM system type"
 235         default ARCH_VERSATILE
 236
 237 config ARCH_INTEGRATOR
 238         bool "ARM Ltd. Integrator family"
 239         select ARM_AMBA
 240         select ARCH_HAS_CPUFREQ
 241         select CLKDEV_LOOKUP
 242         select ICST
 243         select GENERIC_CLOCKEVENTS
 244         select PLAT_VERSATILE
 245         select PLAT_VERSATILE_FPGA_IRQ
 246         help
 247           Support for ARM's Integrator platform.
 248
 249 config ARCH_REALVIEW
 250         bool "ARM Ltd. RealView family"
 251         select ARM_AMBA
 252         select CLKDEV_LOOKUP
 253         select ICST
 254         select GENERIC_CLOCKEVENTS
 255         select ARCH_WANT_OPTIONAL_GPIOLIB
 256         select PLAT_VERSATILE
 257         select PLAT_VERSATILE_CLCD
 258         select ARM_TIMER_SP804
 259         select GPIO_PL061 if GPIOLIB
 260         help
 261           This enables support for ARM Ltd RealView boards.
 262
 263 config ARCH_VERSATILE
 264         bool "ARM Ltd. Versatile family"
 265         select ARM_AMBA
 266         select ARM_VIC
 267         select CLKDEV_LOOKUP
 268         select ICST
 269         select GENERIC_CLOCKEVENTS
 270         select ARCH_WANT_OPTIONAL_GPIOLIB
 271         select PLAT_VERSATILE
 272         select PLAT_VERSATILE_CLCD
 273         select PLAT_VERSATILE_FPGA_IRQ
 274         select ARM_TIMER_SP804
 275         help
 276           This enables support for ARM Ltd Versatile board.
 277
 278 config ARCH_VEXPRESS
 279         bool "ARM Ltd. Versatile Express family"
 280         select ARCH_WANT_OPTIONAL_GPIOLIB
 281         select ARM_AMBA
 282         select ARM_TIMER_SP804
 283         select CLKDEV_LOOKUP
 284         select GENERIC_CLOCKEVENTS
 285         select HAVE_CLK
 286         select HAVE_PATA_PLATFORM
 287         select ICST
 288         select PLAT_VERSATILE
 289         select PLAT_VERSATILE_CLCD
 290         help
 291           This enables support for the ARM Ltd Versatile Express boards.
 292
 293 config ARCH_AT91
 294         bool "Atmel AT91"
 295         select ARCH_REQUIRE_GPIOLIB
 296         select HAVE_CLK
 297         select CLKDEV_LOOKUP
 298         select ARM_PATCH_PHYS_VIRT if MMU
 299         help
 300           This enables support for systems based on the Atmel AT91RM9200,
 301           AT91SAM9 and AT91CAP9 processors.
 302
 303 config ARCH_BCMRING
 304         bool "Broadcom BCMRING"
 305         depends on MMU
 306         select CPU_V6
 307         select ARM_AMBA
 308         select ARM_TIMER_SP804
 309         select CLKDEV_LOOKUP
 310         select GENERIC_CLOCKEVENTS
 311         select ARCH_WANT_OPTIONAL_GPIOLIB
 312         help
 313           Support for Broadcom's BCMRing platform.
 314
 315 config ARCH_CLPS711X
 316         bool "Cirrus Logic CLPS711x/EP721x-based"
 317         select CPU_ARM720T
 318         select ARCH_USES_GETTIMEOFFSET
 319         help
 320           Support for Cirrus Logic 711x/721x based boards.
 321
 322 config ARCH_CNS3XXX
 323         bool "Cavium Networks CNS3XXX family"
 324         select CPU_V6
 325         select GENERIC_CLOCKEVENTS
 326         select ARM_GIC
 327         select MIGHT_HAVE_PCI
 328         select PCI_DOMAINS if PCI
 329         help
 330           Support for Cavium Networks CNS3XXX platform.
 331
 332 config ARCH_GEMINI
 333         bool "Cortina Systems Gemini"
 334         select CPU_FA526
 335         select ARCH_REQUIRE_GPIOLIB
 336         select ARCH_USES_GETTIMEOFFSET
 337         help
 338           Support for the Cortina Systems Gemini family SoCs
 339
 340 config ARCH_EBSA110
 341         bool "EBSA-110"
 342         select CPU_SA110
 343         select ISA
 344         select NO_IOPORT
 345         select ARCH_USES_GETTIMEOFFSET
 346         help
 347           This is an evaluation board for the StrongARM processor available
 348           from Digital. It has limited hardware on-board, including an
 349           Ethernet interface, two PCMCIA sockets, two serial ports and a
 350           parallel port.
 351
 352 config ARCH_EP93XX
 353         bool "EP93xx-based"
 354         select CPU_ARM920T
 355         select ARM_AMBA
 356         select ARM_VIC
 357         select CLKDEV_LOOKUP
 358         select ARCH_REQUIRE_GPIOLIB
 359         select ARCH_HAS_HOLES_MEMORYMODEL
 360         select ARCH_USES_GETTIMEOFFSET
 361         help
 362           This enables support for the Cirrus EP93xx series of CPUs.
 363
 364 config ARCH_FOOTBRIDGE
 365         bool "FootBridge"
 366         select CPU_SA110
 367         select FOOTBRIDGE
 368         select GENERIC_CLOCKEVENTS
 369         help
 370           Support for systems based on the DC21285 companion chip
 371           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 372
 373 config ARCH_MXC
 374         bool "Freescale MXC/iMX-based"
 375         select GENERIC_CLOCKEVENTS
 376         select ARCH_REQUIRE_GPIOLIB
 377         select CLKDEV_LOOKUP
 378         select CLKSRC_MMIO
 379         select HAVE_SCHED_CLOCK
 380         help
 381           Support for Freescale MXC/iMX-based family of processors
 382
 383 config ARCH_MXS
 384         bool "Freescale MXS-based"
 385         select GENERIC_CLOCKEVENTS
 386         select ARCH_REQUIRE_GPIOLIB
 387         select CLKDEV_LOOKUP
 388         select CLKSRC_MMIO
 389         help
 390           Support for Freescale MXS-based family of processors
 391
 392 config ARCH_NETX
 393         bool "Hilscher NetX based"
 394         select CLKSRC_MMIO
 395         select CPU_ARM926T
 396         select ARM_VIC
 397         select GENERIC_CLOCKEVENTS
 398         help
 399           This enables support for systems based on the Hilscher NetX Soc
 400
 401 config ARCH_H720X
 402         bool "Hynix HMS720x-based"
 403         select CPU_ARM720T
 404         select ISA_DMA_API
 405         select ARCH_USES_GETTIMEOFFSET
 406         help
 407           This enables support for systems based on the Hynix HMS720x
 408
 409 config ARCH_IOP13XX
 410         bool "IOP13xx-based"
 411         depends on MMU
 412         select CPU_XSC3
 413         select PLAT_IOP
 414         select PCI
 415         select ARCH_SUPPORTS_MSI
 416         select VMSPLIT_1G
 417         help
 418           Support for Intel's IOP13XX (XScale) family of processors.
 419
 420 config ARCH_IOP32X
 421         bool "IOP32x-based"
 422         depends on MMU
 423         select CPU_XSCALE
 424         select PLAT_IOP
 425         select PCI
 426         select ARCH_REQUIRE_GPIOLIB
 427         help
 428           Support for Intel's 80219 and IOP32X (XScale) family of
 429           processors.
 430
 431 config ARCH_IOP33X
 432         bool "IOP33x-based"
 433         depends on MMU
 434         select CPU_XSCALE
 435         select PLAT_IOP
 436         select PCI
 437         select ARCH_REQUIRE_GPIOLIB
 438         help
 439           Support for Intel's IOP33X (XScale) family of processors.
 440
 441 config ARCH_IXP23XX
 442         bool "IXP23XX-based"
 443         depends on MMU
 444         select CPU_XSC3
 445         select PCI
 446         select ARCH_USES_GETTIMEOFFSET
 447         help
 448           Support for Intel's IXP23xx (XScale) family of processors.
 449
 450 config ARCH_IXP2000
 451         bool "IXP2400/2800-based"
 452         depends on MMU
 453         select CPU_XSCALE
 454         select PCI
 455         select ARCH_USES_GETTIMEOFFSET
 456         help
 457           Support for Intel's IXP2400/2800 (XScale) family of processors.
 458
 459 config ARCH_IXP4XX
 460         bool "IXP4xx-based"
 461         depends on MMU
 462         select CLKSRC_MMIO
 463         select CPU_XSCALE
 464         select GENERIC_GPIO
 465         select GENERIC_CLOCKEVENTS
 466         select HAVE_SCHED_CLOCK
 467         select MIGHT_HAVE_PCI
 468         select DMABOUNCE if PCI
 469         help
 470           Support for Intel's IXP4XX (XScale) family of processors.
 471
 472 config ARCH_DOVE
 473         bool "Marvell Dove"
 474         select CPU_V7
 475         select PCI
 476         select ARCH_REQUIRE_GPIOLIB
 477         select GENERIC_CLOCKEVENTS
 478         select PLAT_ORION
 479         help
 480           Support for the Marvell Dove SoC 88AP510
 481
 482 config ARCH_KIRKWOOD
 483         bool "Marvell Kirkwood"
 484         select CPU_FEROCEON
 485         select PCI
 486         select ARCH_REQUIRE_GPIOLIB
 487         select GENERIC_CLOCKEVENTS
 488         select PLAT_ORION
 489         help
 490           Support for the following Marvell Kirkwood series SoCs:
 491           88F6180, 88F6192 and 88F6281.
 492
 493 config ARCH_LOKI
 494         bool "Marvell Loki (88RC8480)"
 495         select CPU_FEROCEON
 496         select GENERIC_CLOCKEVENTS
 497         select PLAT_ORION
 498         help
 499           Support for the Marvell Loki (88RC8480) SoC.
 500
 501 config ARCH_LPC32XX
 502         bool "NXP LPC32XX"
 503         select CLKSRC_MMIO
 504         select CPU_ARM926T
 505         select ARCH_REQUIRE_GPIOLIB
 506         select HAVE_IDE
 507         select ARM_AMBA
 508         select USB_ARCH_HAS_OHCI
 509         select CLKDEV_LOOKUP
 510         select GENERIC_TIME
 511         select GENERIC_CLOCKEVENTS
 512         help
 513           Support for the NXP LPC32XX family of processors
 514
 515 config ARCH_MV78XX0
 516         bool "Marvell MV78xx0"
 517         select CPU_FEROCEON
 518         select PCI
 519         select ARCH_REQUIRE_GPIOLIB
 520         select GENERIC_CLOCKEVENTS
 521         select PLAT_ORION
 522         help
 523           Support for the following Marvell MV78xx0 series SoCs:
 524           MV781x0, MV782x0.
 525
 526 config ARCH_ORION5X
 527         bool "Marvell Orion"
 528         depends on MMU
 529         select CPU_FEROCEON
 530         select PCI
 531         select ARCH_REQUIRE_GPIOLIB
 532         select GENERIC_CLOCKEVENTS
 533         select PLAT_ORION
 534         help
 535           Support for the following Marvell Orion 5x series SoCs:
 536           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 537           Orion-2 (5281), Orion-1-90 (6183).
 538
 539 config ARCH_MMP
 540         bool "Marvell PXA168/910/MMP2"
 541         depends on MMU
 542         select ARCH_REQUIRE_GPIOLIB
 543         select CLKDEV_LOOKUP
 544         select GENERIC_CLOCKEVENTS
 545         select HAVE_SCHED_CLOCK
 546         select TICK_ONESHOT
 547         select PLAT_PXA
 548         select SPARSE_IRQ
 549         help
 550           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 551
 552 config ARCH_KS8695
 553         bool "Micrel/Kendin KS8695"
 554         select CPU_ARM922T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select ARCH_USES_GETTIMEOFFSET
 557         help
 558           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 559           System-on-Chip devices.
 560
 561 config ARCH_W90X900
 562         bool "Nuvoton W90X900 CPU"
 563         select CPU_ARM926T
 564         select ARCH_REQUIRE_GPIOLIB
 565         select CLKDEV_LOOKUP
 566         select CLKSRC_MMIO
 567         select GENERIC_CLOCKEVENTS
 568         help
 569           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 570           At present, the w90x900 has been renamed nuc900, regarding
 571           the ARM series product line, you can login the following
 572           link address to know more.
 573
 574           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 575                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 576
 577 config ARCH_NUC93X
 578         bool "Nuvoton NUC93X CPU"
 579         select CPU_ARM926T
 580         select CLKDEV_LOOKUP
 581         help
 582           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 583           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 584
 585 config ARCH_TEGRA
 586         bool "NVIDIA Tegra"
 587         select CLKDEV_LOOKUP
 588         select CLKSRC_MMIO
 589         select GENERIC_TIME
 590         select GENERIC_CLOCKEVENTS
 591         select GENERIC_GPIO
 592         select HAVE_CLK
 593         select HAVE_SCHED_CLOCK
 594         select ARCH_HAS_CPUFREQ
 595         help
 596           This enables support for NVIDIA Tegra based systems (Tegra APX,
 597           Tegra 6xx and Tegra 2 series).
 598
 599 config ARCH_PNX4008
 600         bool "Philips Nexperia PNX4008 Mobile"
 601         select CPU_ARM926T
 602         select CLKDEV_LOOKUP
 603         select ARCH_USES_GETTIMEOFFSET
 604         help
 605           This enables support for Philips PNX4008 mobile platform.
 606
 607 config ARCH_PXA
 608         bool "PXA2xx/PXA3xx-based"
 609         depends on MMU
 610         select ARCH_MTD_XIP
 611         select ARCH_HAS_CPUFREQ
 612         select CLKDEV_LOOKUP
 613         select CLKSRC_MMIO
 614         select ARCH_REQUIRE_GPIOLIB
 615         select GENERIC_CLOCKEVENTS
 616         select HAVE_SCHED_CLOCK
 617         select TICK_ONESHOT
 618         select PLAT_PXA
 619         select SPARSE_IRQ
 620         help
 621           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 622
 623 config ARCH_MSM
 624         bool "Qualcomm MSM"
 625         select HAVE_CLK
 626         select GENERIC_CLOCKEVENTS
 627         select ARCH_REQUIRE_GPIOLIB
 628         select CLKDEV_LOOKUP
 629         help
 630           Support for Qualcomm MSM/QSD based systems.  This runs on the
 631           apps processor of the MSM/QSD and depends on a shared memory
 632           interface to the modem processor which runs the baseband
 633           stack and controls some vital subsystems
 634           (clock and power control, etc).
 635
 636 config ARCH_SHMOBILE
 637         bool "Renesas SH-Mobile / R-Mobile"
 638         select HAVE_CLK
 639         select CLKDEV_LOOKUP
 640         select GENERIC_CLOCKEVENTS
 641         select NO_IOPORT
 642         select SPARSE_IRQ
 643         select MULTI_IRQ_HANDLER
 644         help
 645           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 646
 647 config ARCH_RPC
 648         bool "RiscPC"
 649         select ARCH_ACORN
 650         select FIQ
 651         select TIMER_ACORN
 652         select ARCH_MAY_HAVE_PC_FDC
 653         select HAVE_PATA_PLATFORM
 654         select ISA_DMA_API
 655         select NO_IOPORT
 656         select ARCH_SPARSEMEM_ENABLE
 657         select ARCH_USES_GETTIMEOFFSET
 658         help
 659           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 660           CD-ROM interface, serial and parallel port, and the floppy drive.
 661
 662 config ARCH_SA1100
 663         bool "SA1100-based"
 664         select CLKSRC_MMIO
 665         select CPU_SA1100
 666         select ISA
 667         select ARCH_SPARSEMEM_ENABLE
 668         select ARCH_MTD_XIP
 669         select ARCH_HAS_CPUFREQ
 670         select CPU_FREQ
 671         select GENERIC_CLOCKEVENTS
 672         select HAVE_CLK
 673         select HAVE_SCHED_CLOCK
 674         select TICK_ONESHOT
 675         select ARCH_REQUIRE_GPIOLIB
 676         help
 677           Support for StrongARM 11x0 based boards.
 678
 679 config ARCH_S3C2410
 680         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 681         select GENERIC_GPIO
 682         select ARCH_HAS_CPUFREQ
 683         select HAVE_CLK
 684         select ARCH_USES_GETTIMEOFFSET
 685         select HAVE_S3C2410_I2C if I2C
 686         help
 687           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 688           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 689           the Samsung SMDK2410 development board (and derivatives).
 690
 691           Note, the S3C2416 and the S3C2450 are so close that they even share
 692           the same SoC ID code. This means that there is no separate machine
 693           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 694
 695 config ARCH_S3C64XX
 696         bool "Samsung S3C64XX"
 697         select PLAT_SAMSUNG
 698         select CPU_V6
 699         select ARM_VIC
 700         select HAVE_CLK
 701         select NO_IOPORT
 702         select ARCH_USES_GETTIMEOFFSET
 703         select ARCH_HAS_CPUFREQ
 704         select ARCH_REQUIRE_GPIOLIB
 705         select SAMSUNG_CLKSRC
 706         select SAMSUNG_IRQ_VIC_TIMER
 707         select SAMSUNG_IRQ_UART
 708         select S3C_GPIO_TRACK
 709         select S3C_GPIO_PULL_UPDOWN
 710         select S3C_GPIO_CFG_S3C24XX
 711         select S3C_GPIO_CFG_S3C64XX
 712         select S3C_DEV_NAND
 713         select USB_ARCH_HAS_OHCI
 714         select SAMSUNG_GPIOLIB_4BIT
 715         select HAVE_S3C2410_I2C if I2C
 716         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 717         help
 718           Samsung S3C64XX series based systems
 719
 720 config ARCH_S5P64X0
 721         bool "Samsung S5P6440 S5P6450"
 722         select CPU_V6
 723         select GENERIC_GPIO
 724         select HAVE_CLK
 725         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 726         select GENERIC_CLOCKEVENTS
 727         select HAVE_SCHED_CLOCK
 728         select HAVE_S3C2410_I2C if I2C
 729         select HAVE_S3C_RTC if RTC_CLASS
 730         help
 731           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 732           SMDK6450.
 733
 734 config ARCH_S5PC100
 735         bool "Samsung S5PC100"
 736         select GENERIC_GPIO
 737         select HAVE_CLK
 738         select CPU_V7
 739         select ARM_L1_CACHE_SHIFT_6
 740         select ARCH_USES_GETTIMEOFFSET
 741         select HAVE_S3C2410_I2C if I2C
 742         select HAVE_S3C_RTC if RTC_CLASS
 743         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 744         help
 745           Samsung S5PC100 series based systems
 746
 747 config ARCH_S5PV210
 748         bool "Samsung S5PV210/S5PC110"
 749         select CPU_V7
 750         select ARCH_SPARSEMEM_ENABLE
 751         select GENERIC_GPIO
 752         select HAVE_CLK
 753         select ARM_L1_CACHE_SHIFT_6
 754         select ARCH_HAS_CPUFREQ
 755         select GENERIC_CLOCKEVENTS
 756         select HAVE_SCHED_CLOCK
 757         select HAVE_S3C2410_I2C if I2C
 758         select HAVE_S3C_RTC if RTC_CLASS
 759         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 760         help
 761           Samsung S5PV210/S5PC110 series based systems
 762
 763 config ARCH_EXYNOS4
 764         bool "Samsung EXYNOS4"
 765         select CPU_V7
 766         select ARCH_SPARSEMEM_ENABLE
 767         select GENERIC_GPIO
 768         select HAVE_CLK
 769         select ARCH_HAS_CPUFREQ
 770         select GENERIC_CLOCKEVENTS
 771         select HAVE_S3C_RTC if RTC_CLASS
 772         select HAVE_S3C2410_I2C if I2C
 773         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 774         help
 775           Samsung EXYNOS4 series based systems
 776
 777 config ARCH_SHARK
 778         bool "Shark"
 779         select CPU_SA110
 780         select ISA
 781         select ISA_DMA
 782         select ZONE_DMA
 783         select PCI
 784         select ARCH_USES_GETTIMEOFFSET
 785         help
 786           Support for the StrongARM based Digital DNARD machine, also known
 787           as "Shark" (<http://www.shark-linux.de/shark.html>).
 788
 789 config ARCH_TCC_926
 790         bool "Telechips TCC ARM926-based systems"
 791         select CLKSRC_MMIO
 792         select CPU_ARM926T
 793         select HAVE_CLK
 794         select CLKDEV_LOOKUP
 795         select GENERIC_CLOCKEVENTS
 796         help
 797           Support for Telechips TCC ARM926-based systems.
 798
 799 config ARCH_U300
 800         bool "ST-Ericsson U300 Series"
 801         depends on MMU
 802         select CLKSRC_MMIO
 803         select CPU_ARM926T
 804         select HAVE_SCHED_CLOCK
 805         select HAVE_TCM
 806         select ARM_AMBA
 807         select ARM_VIC
 808         select GENERIC_CLOCKEVENTS
 809         select CLKDEV_LOOKUP
 810         select GENERIC_GPIO
 811         help
 812           Support for ST-Ericsson U300 series mobile platforms.
 813
 814 config ARCH_U8500
 815         bool "ST-Ericsson U8500 Series"
 816         select CPU_V7
 817         select ARM_AMBA
 818         select GENERIC_CLOCKEVENTS
 819         select CLKDEV_LOOKUP
 820         select ARCH_REQUIRE_GPIOLIB
 821         select ARCH_HAS_CPUFREQ
 822         help
 823           Support for ST-Ericsson's Ux500 architecture
 824
 825 config ARCH_NOMADIK
 826         bool "STMicroelectronics Nomadik"
 827         select ARM_AMBA
 828         select ARM_VIC
 829         select CPU_ARM926T
 830         select CLKDEV_LOOKUP
 831         select GENERIC_CLOCKEVENTS
 832         select ARCH_REQUIRE_GPIOLIB
 833         help
 834           Support for the Nomadik platform by ST-Ericsson
 835
 836 config ARCH_DAVINCI
 837         bool "TI DaVinci"
 838         select GENERIC_CLOCKEVENTS
 839         select ARCH_REQUIRE_GPIOLIB
 840         select ZONE_DMA
 841         select HAVE_IDE
 842         select CLKDEV_LOOKUP
 843         select GENERIC_ALLOCATOR
 844         select GENERIC_IRQ_CHIP
 845         select ARCH_HAS_HOLES_MEMORYMODEL
 846         help
 847           Support for TI's DaVinci platform.
 848
 849 config ARCH_OMAP
 850         bool "TI OMAP"
 851         select HAVE_CLK
 852         select ARCH_REQUIRE_GPIOLIB
 853         select ARCH_HAS_CPUFREQ
 854         select GENERIC_CLOCKEVENTS
 855         select HAVE_SCHED_CLOCK
 856         select ARCH_HAS_HOLES_MEMORYMODEL
 857         help
 858           Support for TI's OMAP platform (OMAP1/2/3/4).
 859
 860 config PLAT_SPEAR
 861         bool "ST SPEAr"
 862         select ARM_AMBA
 863         select ARCH_REQUIRE_GPIOLIB
 864         select CLKDEV_LOOKUP
 865         select CLKSRC_MMIO
 866         select GENERIC_CLOCKEVENTS
 867         select HAVE_CLK
 868         help
 869           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 870
 871 config ARCH_VT8500
 872         bool "VIA/WonderMedia 85xx"
 873         select CPU_ARM926T
 874         select GENERIC_GPIO
 875         select ARCH_HAS_CPUFREQ
 876         select GENERIC_CLOCKEVENTS
 877         select ARCH_REQUIRE_GPIOLIB
 878         select HAVE_PWM
 879         help
 880           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 881 endchoice
 882
 883 #
 884 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 885 # Kconfigs may be included either alphabetically (according to the
 886 # plat- suffix) or along side the corresponding mach-* source.
 887 #
 888 source "arch/arm/mach-at91/Kconfig"
 889
 890 source "arch/arm/mach-bcmring/Kconfig"
 891
 892 source "arch/arm/mach-clps711x/Kconfig"
 893
 894 source "arch/arm/mach-cns3xxx/Kconfig"
 895
 896 source "arch/arm/mach-davinci/Kconfig"
 897
 898 source "arch/arm/mach-dove/Kconfig"
 899
 900 source "arch/arm/mach-ep93xx/Kconfig"
 901
 902 source "arch/arm/mach-footbridge/Kconfig"
 903
 904 source "arch/arm/mach-gemini/Kconfig"
 905
 906 source "arch/arm/mach-h720x/Kconfig"
 907
 908 source "arch/arm/mach-integrator/Kconfig"
 909
 910 source "arch/arm/mach-iop32x/Kconfig"
 911
 912 source "arch/arm/mach-iop33x/Kconfig"
 913
 914 source "arch/arm/mach-iop13xx/Kconfig"
 915
 916 source "arch/arm/mach-ixp4xx/Kconfig"
 917
 918 source "arch/arm/mach-ixp2000/Kconfig"
 919
 920 source "arch/arm/mach-ixp23xx/Kconfig"
 921
 922 source "arch/arm/mach-kirkwood/Kconfig"
 923
 924 source "arch/arm/mach-ks8695/Kconfig"
 925
 926 source "arch/arm/mach-loki/Kconfig"
 927
 928 source "arch/arm/mach-lpc32xx/Kconfig"
 929
 930 source "arch/arm/mach-msm/Kconfig"
 931
 932 source "arch/arm/mach-mv78xx0/Kconfig"
 933
 934 source "arch/arm/plat-mxc/Kconfig"
 935
 936 source "arch/arm/mach-mxs/Kconfig"
 937
 938 source "arch/arm/mach-netx/Kconfig"
 939
 940 source "arch/arm/mach-nomadik/Kconfig"
 941 source "arch/arm/plat-nomadik/Kconfig"
 942
 943 source "arch/arm/mach-nuc93x/Kconfig"
 944
 945 source "arch/arm/plat-omap/Kconfig"
 946
 947 source "arch/arm/mach-omap1/Kconfig"
 948
 949 source "arch/arm/mach-omap2/Kconfig"
 950
 951 source "arch/arm/mach-orion5x/Kconfig"
 952
 953 source "arch/arm/mach-pxa/Kconfig"
 954 source "arch/arm/plat-pxa/Kconfig"
 955
 956 source "arch/arm/mach-mmp/Kconfig"
 957
 958 source "arch/arm/mach-realview/Kconfig"
 959
 960 source "arch/arm/mach-sa1100/Kconfig"
 961
 962 source "arch/arm/plat-samsung/Kconfig"
 963 source "arch/arm/plat-s3c24xx/Kconfig"
 964 source "arch/arm/plat-s5p/Kconfig"
 965
 966 source "arch/arm/plat-spear/Kconfig"
 967
 968 source "arch/arm/plat-tcc/Kconfig"
 969
 970 if ARCH_S3C2410
 971 source "arch/arm/mach-s3c2400/Kconfig"
 972 source "arch/arm/mach-s3c2410/Kconfig"
 973 source "arch/arm/mach-s3c2412/Kconfig"
 974 source "arch/arm/mach-s3c2416/Kconfig"
 975 source "arch/arm/mach-s3c2440/Kconfig"
 976 source "arch/arm/mach-s3c2443/Kconfig"
 977 endif
 978
 979 if ARCH_S3C64XX
 980 source "arch/arm/mach-s3c64xx/Kconfig"
 981 endif
 982
 983 source "arch/arm/mach-s5p64x0/Kconfig"
 984
 985 source "arch/arm/mach-s5pc100/Kconfig"
 986
 987 source "arch/arm/mach-s5pv210/Kconfig"
 988
 989 source "arch/arm/mach-exynos4/Kconfig"
 990
 991 source "arch/arm/mach-shmobile/Kconfig"
 992
 993 source "arch/arm/mach-tegra/Kconfig"
 994
 995 source "arch/arm/mach-u300/Kconfig"
 996
 997 source "arch/arm/mach-ux500/Kconfig"
 998
 999 source "arch/arm/mach-versatile/Kconfig"
1000
1001 source "arch/arm/mach-vexpress/Kconfig"
1002 source "arch/arm/plat-versatile/Kconfig"
1003
1004 source "arch/arm/mach-vt8500/Kconfig"
1005
1006 source "arch/arm/mach-w90x900/Kconfig"
1007
1008 # Definitions to make life easier
1009 config ARCH_ACORN
1010         bool
1011
1012 config PLAT_IOP
1013         bool
1014         select GENERIC_CLOCKEVENTS
1015         select HAVE_SCHED_CLOCK
1016
1017 config PLAT_ORION
1018         bool
1019         select CLKSRC_MMIO
1020         select GENERIC_IRQ_CHIP
1021         select HAVE_SCHED_CLOCK
1022
1023 config PLAT_PXA
1024         bool
1025
1026 config PLAT_VERSATILE
1027         bool
1028
1029 config ARM_TIMER_SP804
1030         bool
1031         select CLKSRC_MMIO
1032
1033 source arch/arm/mm/Kconfig
1034
1035 config IWMMXT
1036         bool "Enable iWMMXt support"
1037         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1038         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1039         help
1040           Enable support for iWMMXt context switching at run time if
1041           running on a CPU that supports it.
1042
1043 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1044 config XSCALE_PMU
1045         bool
1046         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1047         default y
1048
1049 config CPU_HAS_PMU
1050         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1051                    (!ARCH_OMAP3 || OMAP3_EMU)
1052         default y
1053         bool
1054
1055 config MULTI_IRQ_HANDLER
1056         bool
1057         help
1058           Allow each machine to specify it's own IRQ handler at run time.
1059
1060 if !MMU
1061 source "arch/arm/Kconfig-nommu"
1062 endif
1063
1064 config ARM_ERRATA_411920
1065         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1066         depends on CPU_V6 || CPU_V6K
1067         help
1068           Invalidation of the Instruction Cache operation can
1069           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1070           It does not affect the MPCore. This option enables the ARM Ltd.
1071           recommended workaround.
1072
1073 config ARM_ERRATA_430973
1074         bool "ARM errata: Stale prediction on replaced interworking branch"
1075         depends on CPU_V7
1076         help
1077           This option enables the workaround for the 430973 Cortex-A8
1078           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1079           interworking branch is replaced with another code sequence at the
1080           same virtual address, whether due to self-modifying code or virtual
1081           to physical address re-mapping, Cortex-A8 does not recover from the
1082           stale interworking branch prediction. This results in Cortex-A8
1083           executing the new code sequence in the incorrect ARM or Thumb state.
1084           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1085           and also flushes the branch target cache at every context switch.
1086           Note that setting specific bits in the ACTLR register may not be
1087           available in non-secure mode.
1088
1089 config ARM_ERRATA_458693
1090         bool "ARM errata: Processor deadlock when a false hazard is created"
1091         depends on CPU_V7
1092         help
1093           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1094           erratum. For very specific sequences of memory operations, it is
1095           possible for a hazard condition intended for a cache line to instead
1096           be incorrectly associated with a different cache line. This false
1097           hazard might then cause a processor deadlock. The workaround enables
1098           the L1 caching of the NEON accesses and disables the PLD instruction
1099           in the ACTLR register. Note that setting specific bits in the ACTLR
1100           register may not be available in non-secure mode.
1101
1102 config ARM_ERRATA_460075
1103         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1104         depends on CPU_V7
1105         help
1106           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1107           erratum. Any asynchronous access to the L2 cache may encounter a
1108           situation in which recent store transactions to the L2 cache are lost
1109           and overwritten with stale memory contents from external memory. The
1110           workaround disables the write-allocate mode for the L2 cache via the
1111           ACTLR register. Note that setting specific bits in the ACTLR register
1112           may not be available in non-secure mode.
1113
1114 config ARM_ERRATA_742230
1115         bool "ARM errata: DMB operation may be faulty"
1116         depends on CPU_V7 && SMP
1117         help
1118           This option enables the workaround for the 742230 Cortex-A9
1119           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1120           between two write operations may not ensure the correct visibility
1121           ordering of the two writes. This workaround sets a specific bit in
1122           the diagnostic register of the Cortex-A9 which causes the DMB
1123           instruction to behave as a DSB, ensuring the correct behaviour of
1124           the two writes.
1125
1126 config ARM_ERRATA_742231
1127         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1128         depends on CPU_V7 && SMP
1129         help
1130           This option enables the workaround for the 742231 Cortex-A9
1131           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1132           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1133           accessing some data located in the same cache line, may get corrupted
1134           data due to bad handling of the address hazard when the line gets
1135           replaced from one of the CPUs at the same time as another CPU is
1136           accessing it. This workaround sets specific bits in the diagnostic
1137           register of the Cortex-A9 which reduces the linefill issuing
1138           capabilities of the processor.
1139
1140 config PL310_ERRATA_588369
1141         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1142         depends on CACHE_L2X0
1143         help
1144            The PL310 L2 cache controller implements three types of Clean &
1145            Invalidate maintenance operations: by Physical Address
1146            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1147            They are architecturally defined to behave as the execution of a
1148            clean operation followed immediately by an invalidate operation,
1149            both performing to the same memory location. This functionality
1150            is not correctly implemented in PL310 as clean lines are not
1151            invalidated as a result of these operations.
1152
1153 config ARM_ERRATA_720789
1154         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1155         depends on CPU_V7 && SMP
1156         help
1157           This option enables the workaround for the 720789 Cortex-A9 (prior to
1158           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1159           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1160           As a consequence of this erratum, some TLB entries which should be
1161           invalidated are not, resulting in an incoherency in the system page
1162           tables. The workaround changes the TLB flushing routines to invalidate
1163           entries regardless of the ASID.
1164
1165 config PL310_ERRATA_727915
1166         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1167         depends on CACHE_L2X0
1168         help
1169           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1170           operation (offset 0x7FC). This operation runs in background so that
1171           PL310 can handle normal accesses while it is in progress. Under very
1172           rare circumstances, due to this erratum, write data can be lost when
1173           PL310 treats a cacheable write transaction during a Clean &
1174           Invalidate by Way operation.
1175
1176 config ARM_ERRATA_743622
1177         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1178         depends on CPU_V7
1179         help
1180           This option enables the workaround for the 743622 Cortex-A9
1181           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1182           optimisation in the Cortex-A9 Store Buffer may lead to data
1183           corruption. This workaround sets a specific bit in the diagnostic
1184           register of the Cortex-A9 which disables the Store Buffer
1185           optimisation, preventing the defect from occurring. This has no
1186           visible impact on the overall performance or power consumption of the
1187           processor.
1188
1189 config ARM_ERRATA_751472
1190         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1191         depends on CPU_V7 && SMP
1192         help
1193           This option enables the workaround for the 751472 Cortex-A9 (prior
1194           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1195           completion of a following broadcasted operation if the second
1196           operation is received by a CPU before the ICIALLUIS has completed,
1197           potentially leading to corrupted entries in the cache or TLB.
1198
1199 config ARM_ERRATA_753970
1200         bool "ARM errata: cache sync operation may be faulty"
1201         depends on CACHE_PL310
1202         help
1203           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1204
1205           Under some condition the effect of cache sync operation on
1206           the store buffer still remains when the operation completes.
1207           This means that the store buffer is always asked to drain and
1208           this prevents it from merging any further writes. The workaround
1209           is to replace the normal offset of cache sync operation (0x730)
1210           by another offset targeting an unmapped PL310 register 0x740.
1211           This has the same effect as the cache sync operation: store buffer
1212           drain and waiting for all buffers empty.
1213
1214 config ARM_ERRATA_754322
1215         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1216         depends on CPU_V7
1217         help
1218           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1219           r3p*) erratum. A speculative memory access may cause a page table walk
1220           which starts prior to an ASID switch but completes afterwards. This
1221           can populate the micro-TLB with a stale entry which may be hit with
1222           the new ASID. This workaround places two dsb instructions in the mm
1223           switching code so that no page table walks can cross the ASID switch.
1224
1225 config ARM_ERRATA_754327
1226         bool "ARM errata: no automatic Store Buffer drain"
1227         depends on CPU_V7 && SMP
1228         help
1229           This option enables the workaround for the 754327 Cortex-A9 (prior to
1230           r2p0) erratum. The Store Buffer does not have any automatic draining
1231           mechanism and therefore a livelock may occur if an external agent
1232           continuously polls a memory location waiting to observe an update.
1233           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1234           written polling loops from denying visibility of updates to memory.
1235
1236 endmenu
1237
1238 source "arch/arm/common/Kconfig"
1239
1240 menu "Bus support"
1241
1242 config ARM_AMBA
1243         bool
1244
1245 config ISA
1246         bool
1247         help
1248           Find out whether you have ISA slots on your motherboard.  ISA is the
1249           name of a bus system, i.e. the way the CPU talks to the other stuff
1250           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1251           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1252           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1253
1254 # Select ISA DMA controller support
1255 config ISA_DMA
1256         bool
1257         select ISA_DMA_API
1258
1259 # Select ISA DMA interface
1260 config ISA_DMA_API
1261         bool
1262
1263 config PCI
1264         bool "PCI support" if MIGHT_HAVE_PCI
1265         help
1266           Find out whether you have a PCI motherboard. PCI is the name of a
1267           bus system, i.e. the way the CPU talks to the other stuff inside
1268           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1269           VESA. If you have PCI, say Y, otherwise N.
1270
1271 config PCI_DOMAINS
1272         bool
1273         depends on PCI
1274
1275 config PCI_NANOENGINE
1276         bool "BSE nanoEngine PCI support"
1277         depends on SA1100_NANOENGINE
1278         help
1279           Enable PCI on the BSE nanoEngine board.
1280
1281 config PCI_SYSCALL
1282         def_bool PCI
1283
1284 # Select the host bridge type
1285 config PCI_HOST_VIA82C505
1286         bool
1287         depends on PCI && ARCH_SHARK
1288         default y
1289
1290 config PCI_HOST_ITE8152
1291         bool
1292         depends on PCI && MACH_ARMCORE
1293         default y
1294         select DMABOUNCE
1295
1296 source "drivers/pci/Kconfig"
1297
1298 source "drivers/pcmcia/Kconfig"
1299
1300 endmenu
1301
1302 menu "Kernel Features"
1303
1304 source "kernel/time/Kconfig"
1305
1306 config SMP
1307         bool "Symmetric Multi-Processing"
1308         depends on CPU_V6K || CPU_V7
1309         depends on GENERIC_CLOCKEVENTS
1310         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1311                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1312                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1313                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1314         select USE_GENERIC_SMP_HELPERS
1315         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1316         help
1317           This enables support for systems with more than one CPU. If you have
1318           a system with only one CPU, like most personal computers, say N. If
1319           you have a system with more than one CPU, say Y.
1320
1321           If you say N here, the kernel will run on single and multiprocessor
1322           machines, but will use only one CPU of a multiprocessor machine. If
1323           you say Y here, the kernel will run on many, but not all, single
1324           processor machines. On a single processor machine, the kernel will
1325           run faster if you say N here.
1326
1327           See also <file:Documentation/i386/IO-APIC.txt>,
1328           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1329           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1330
1331           If you don't know what to do here, say N.
1332
1333 config SMP_ON_UP
1334         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1335         depends on EXPERIMENTAL
1336         depends on SMP && !XIP_KERNEL
1337         default y
1338         help
1339           SMP kernels contain instructions which fail on non-SMP processors.
1340           Enabling this option allows the kernel to modify itself to make
1341           these instructions safe.  Disabling it allows about 1K of space
1342           savings.
1343
1344           If you don't know what to do here, say Y.
1345
1346 config HAVE_ARM_SCU
1347         bool
1348         depends on SMP
1349         help
1350           This option enables support for the ARM system coherency unit
1351
1352 config HAVE_ARM_TWD
1353         bool
1354         depends on SMP
1355         select TICK_ONESHOT
1356         help
1357           This options enables support for the ARM timer and watchdog unit
1358
1359 choice
1360         prompt "Memory split"
1361         default VMSPLIT_3G
1362         help
1363           Select the desired split between kernel and user memory.
1364
1365           If you are not absolutely sure what you are doing, leave this
1366           option alone!
1367
1368         config VMSPLIT_3G
1369                 bool "3G/1G user/kernel split"
1370         config VMSPLIT_2G
1371                 bool "2G/2G user/kernel split"
1372         config VMSPLIT_1G
1373                 bool "1G/3G user/kernel split"
1374 endchoice
1375
1376 config PAGE_OFFSET
1377         hex
1378         default 0x40000000 if VMSPLIT_1G
1379         default 0x80000000 if VMSPLIT_2G
1380         default 0xC0000000
1381
1382 config NR_CPUS
1383         int "Maximum number of CPUs (2-32)"
1384         range 2 32
1385         depends on SMP
1386         default "4"
1387
1388 config HOTPLUG_CPU
1389         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1390         depends on SMP && HOTPLUG && EXPERIMENTAL
1391         help
1392           Say Y here to experiment with turning CPUs off and on.  CPUs
1393           can be controlled through /sys/devices/system/cpu.
1394
1395 config LOCAL_TIMERS
1396         bool "Use local timer interrupts"
1397         depends on SMP
1398         default y
1399         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1400         help
1401           Enable support for local timers on SMP platforms, rather then the
1402           legacy IPI broadcast method.  Local timers allows the system
1403           accounting to be spread across the timer interval, preventing a
1404           "thundering herd" at every timer tick.
1405
1406 source kernel/Kconfig.preempt
1407
1408 config HZ
1409         int
1410         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1411                 ARCH_S5PV210 || ARCH_EXYNOS4
1412         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1413         default AT91_TIMER_HZ if ARCH_AT91
1414         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1415         default 100
1416
1417 config THUMB2_KERNEL
1418         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1419         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1420         select AEABI
1421         select ARM_ASM_UNIFIED
1422         help
1423           By enabling this option, the kernel will be compiled in
1424           Thumb-2 mode. A compiler/assembler that understand the unified
1425           ARM-Thumb syntax is needed.
1426
1427           If unsure, say N.
1428
1429 config THUMB2_AVOID_R_ARM_THM_JUMP11
1430         bool "Work around buggy Thumb-2 short branch relocations in gas"
1431         depends on THUMB2_KERNEL && MODULES
1432         default y
1433         help
1434           Various binutils versions can resolve Thumb-2 branches to
1435           locally-defined, preemptible global symbols as short-range "b.n"
1436           branch instructions.
1437
1438           This is a problem, because there's no guarantee the final
1439           destination of the symbol, or any candidate locations for a
1440           trampoline, are within range of the branch.  For this reason, the
1441           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1442           relocation in modules at all, and it makes little sense to add
1443           support.
1444
1445           The symptom is that the kernel fails with an "unsupported
1446           relocation" error when loading some modules.
1447
1448           Until fixed tools are available, passing
1449           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1450           code which hits this problem, at the cost of a bit of extra runtime
1451           stack usage in some cases.
1452
1453           The problem is described in more detail at:
1454               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1455
1456           Only Thumb-2 kernels are affected.
1457
1458           Unless you are sure your tools don't have this problem, say Y.
1459
1460 config ARM_ASM_UNIFIED
1461         bool
1462
1463 config AEABI
1464         bool "Use the ARM EABI to compile the kernel"
1465         help
1466           This option allows for the kernel to be compiled using the latest
1467           ARM ABI (aka EABI).  This is only useful if you are using a user
1468           space environment that is also compiled with EABI.
1469
1470           Since there are major incompatibilities between the legacy ABI and
1471           EABI, especially with regard to structure member alignment, this
1472           option also changes the kernel syscall calling convention to
1473           disambiguate both ABIs and allow for backward compatibility support
1474           (selected with CONFIG_OABI_COMPAT).
1475
1476           To use this you need GCC version 4.0.0 or later.
1477
1478 config OABI_COMPAT
1479         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1480         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1481         default y
1482         help
1483           This option preserves the old syscall interface along with the
1484           new (ARM EABI) one. It also provides a compatibility layer to
1485           intercept syscalls that have structure arguments which layout
1486           in memory differs between the legacy ABI and the new ARM EABI
1487           (only for non "thumb" binaries). This option adds a tiny
1488           overhead to all syscalls and produces a slightly larger kernel.
1489           If you know you'll be using only pure EABI user space then you
1490           can say N here. If this option is not selected and you attempt
1491           to execute a legacy ABI binary then the result will be
1492           UNPREDICTABLE (in fact it can be predicted that it won't work
1493           at all). If in doubt say Y.
1494
1495 config ARCH_HAS_HOLES_MEMORYMODEL
1496         bool
1497
1498 config ARCH_SPARSEMEM_ENABLE
1499         bool
1500
1501 config ARCH_SPARSEMEM_DEFAULT
1502         def_bool ARCH_SPARSEMEM_ENABLE
1503
1504 config ARCH_SELECT_MEMORY_MODEL
1505         def_bool ARCH_SPARSEMEM_ENABLE
1506
1507 config HAVE_ARCH_PFN_VALID
1508         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1509
1510 config HIGHMEM
1511         bool "High Memory Support"
1512         depends on MMU
1513         help
1514           The address space of ARM processors is only 4 Gigabytes large
1515           and it has to accommodate user address space, kernel address
1516           space as well as some memory mapped IO. That means that, if you
1517           have a large amount of physical memory and/or IO, not all of the
1518           memory can be "permanently mapped" by the kernel. The physical
1519           memory that is not permanently mapped is called "high memory".
1520
1521           Depending on the selected kernel/user memory split, minimum
1522           vmalloc space and actual amount of RAM, you may not need this
1523           option which should result in a slightly faster kernel.
1524
1525           If unsure, say n.
1526
1527 config HIGHPTE
1528         bool "Allocate 2nd-level pagetables from highmem"
1529         depends on HIGHMEM
1530
1531 config HW_PERF_EVENTS
1532         bool "Enable hardware performance counter support for perf events"
1533         depends on PERF_EVENTS && CPU_HAS_PMU
1534         default y
1535         help
1536           Enable hardware performance counter support for perf events. If
1537           disabled, perf events will use software events only.
1538
1539 source "mm/Kconfig"
1540
1541 config FORCE_MAX_ZONEORDER
1542         int "Maximum zone order" if ARCH_SHMOBILE
1543         range 11 64 if ARCH_SHMOBILE
1544         default "9" if SA1111
1545         default "11"
1546         help
1547           The kernel memory allocator divides physically contiguous memory
1548           blocks into "zones", where each zone is a power of two number of
1549           pages.  This option selects the largest power of two that the kernel
1550           keeps in the memory allocator.  If you need to allocate very large
1551           blocks of physically contiguous memory, then you may need to
1552           increase this value.
1553
1554           This config option is actually maximum order plus one. For example,
1555           a value of 11 means that the largest free memory block is 2^10 pages.
1556
1557 config LEDS
1558         bool "Timer and CPU usage LEDs"
1559         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1560                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1561                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1562                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1563                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1564                    ARCH_AT91 || ARCH_DAVINCI || \
1565                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1566         help
1567           If you say Y here, the LEDs on your machine will be used
1568           to provide useful information about your current system status.
1569
1570           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1571           be able to select which LEDs are active using the options below. If
1572           you are compiling a kernel for the EBSA-110 or the LART however, the
1573           red LED will simply flash regularly to indicate that the system is
1574           still functional. It is safe to say Y here if you have a CATS
1575           system, but the driver will do nothing.
1576
1577 config LEDS_TIMER
1578         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1579                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1580                             || MACH_OMAP_PERSEUS2
1581         depends on LEDS
1582         depends on !GENERIC_CLOCKEVENTS
1583         default y if ARCH_EBSA110
1584         help
1585           If you say Y here, one of the system LEDs (the green one on the
1586           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1587           will flash regularly to indicate that the system is still
1588           operational. This is mainly useful to kernel hackers who are
1589           debugging unstable kernels.
1590
1591           The LART uses the same LED for both Timer LED and CPU usage LED
1592           functions. You may choose to use both, but the Timer LED function
1593           will overrule the CPU usage LED.
1594
1595 config LEDS_CPU
1596         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1597                         !ARCH_OMAP) \
1598                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1599                         || MACH_OMAP_PERSEUS2
1600         depends on LEDS
1601         help
1602           If you say Y here, the red LED will be used to give a good real
1603           time indication of CPU usage, by lighting whenever the idle task
1604           is not currently executing.
1605
1606           The LART uses the same LED for both Timer LED and CPU usage LED
1607           functions. You may choose to use both, but the Timer LED function
1608           will overrule the CPU usage LED.
1609
1610 config ALIGNMENT_TRAP
1611         bool
1612         depends on CPU_CP15_MMU
1613         default y if !ARCH_EBSA110
1614         select HAVE_PROC_CPU if PROC_FS
1615         help
1616           ARM processors cannot fetch/store information which is not
1617           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1618           address divisible by 4. On 32-bit ARM processors, these non-aligned
1619           fetch/store instructions will be emulated in software if you say
1620           here, which has a severe performance impact. This is necessary for
1621           correct operation of some network protocols. With an IP-only
1622           configuration it is safe to say N, otherwise say Y.
1623
1624 config UACCESS_WITH_MEMCPY
1625         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1626         depends on MMU && EXPERIMENTAL
1627         default y if CPU_FEROCEON
1628         help
1629           Implement faster copy_to_user and clear_user methods for CPU
1630           cores where a 8-word STM instruction give significantly higher
1631           memory write throughput than a sequence of individual 32bit stores.
1632
1633           A possible side effect is a slight increase in scheduling latency
1634           between threads sharing the same address space if they invoke
1635           such copy operations with large buffers.
1636
1637           However, if the CPU data cache is using a write-allocate mode,
1638           this option is unlikely to provide any performance gain.
1639
1640 config SECCOMP
1641         bool
1642         prompt "Enable seccomp to safely compute untrusted bytecode"
1643         ---help---
1644           This kernel feature is useful for number crunching applications
1645           that may need to compute untrusted bytecode during their
1646           execution. By using pipes or other transports made available to
1647           the process as file descriptors supporting the read/write
1648           syscalls, it's possible to isolate those applications in
1649           their own address space using seccomp. Once seccomp is
1650           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1651           and the task is only allowed to execute a few safe syscalls
1652           defined by each seccomp mode.
1653
1654 config CC_STACKPROTECTOR
1655         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1656         depends on EXPERIMENTAL
1657         help
1658           This option turns on the -fstack-protector GCC feature. This
1659           feature puts, at the beginning of functions, a canary value on
1660           the stack just before the return address, and validates
1661           the value just before actually returning.  Stack based buffer
1662           overflows (that need to overwrite this return address) now also
1663           overwrite the canary, which gets detected and the attack is then
1664           neutralized via a kernel panic.
1665           This feature requires gcc version 4.2 or above.
1666
1667 config DEPRECATED_PARAM_STRUCT
1668         bool "Provide old way to pass kernel parameters"
1669         help
1670           This was deprecated in 2001 and announced to live on for 5 years.
1671           Some old boot loaders still use this way.
1672
1673 endmenu
1674
1675 menu "Boot options"
1676
1677 config USE_OF
1678         bool "Flattened Device Tree support"
1679         select OF
1680         select OF_EARLY_FLATTREE
1681         help
1682           Include support for flattened device tree machine descriptions.
1683
1684 # Compressed boot loader in ROM.  Yes, we really want to ask about
1685 # TEXT and BSS so we preserve their values in the config files.
1686 config ZBOOT_ROM_TEXT
1687         hex "Compressed ROM boot loader base address"
1688         default "0"
1689         help
1690           The physical address at which the ROM-able zImage is to be
1691           placed in the target.  Platforms which normally make use of
1692           ROM-able zImage formats normally set this to a suitable
1693           value in their defconfig file.
1694
1695           If ZBOOT_ROM is not enabled, this has no effect.
1696
1697 config ZBOOT_ROM_BSS
1698         hex "Compressed ROM boot loader BSS address"
1699         default "0"
1700         help
1701           The base address of an area of read/write memory in the target
1702           for the ROM-able zImage which must be available while the
1703           decompressor is running. It must be large enough to hold the
1704           entire decompressed kernel plus an additional 128 KiB.
1705           Platforms which normally make use of ROM-able zImage formats
1706           normally set this to a suitable value in their defconfig file.
1707
1708           If ZBOOT_ROM is not enabled, this has no effect.
1709
1710 config ZBOOT_ROM
1711         bool "Compressed boot loader in ROM/flash"
1712         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1713         help
1714           Say Y here if you intend to execute your compressed kernel image
1715           (zImage) directly from ROM or flash.  If unsure, say N.
1716
1717 config ZBOOT_ROM_MMCIF
1718         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1719         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1720         help
1721           Say Y here to include experimental MMCIF loading code in the
1722           ROM-able zImage. With this enabled it is possible to write the
1723           the ROM-able zImage kernel image to an MMC card and boot the
1724           kernel straight from the reset vector. At reset the processor
1725           Mask ROM will load the first part of the the ROM-able zImage
1726           which in turn loads the rest the kernel image to RAM using the
1727           MMCIF hardware block.
1728
1729 config CMDLINE
1730         string "Default kernel command string"
1731         default ""
1732         help
1733           On some architectures (EBSA110 and CATS), there is currently no way
1734           for the boot loader to pass arguments to the kernel. For these
1735           architectures, you should supply some command-line options at build
1736           time by entering them here. As a minimum, you should specify the
1737           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1738
1739 choice
1740         prompt "Kernel command line type" if CMDLINE != ""
1741         default CMDLINE_FROM_BOOTLOADER
1742
1743 config CMDLINE_FROM_BOOTLOADER
1744         bool "Use bootloader kernel arguments if available"
1745         help
1746           Uses the command-line options passed by the boot loader. If
1747           the boot loader doesn't provide any, the default kernel command
1748           string provided in CMDLINE will be used.
1749
1750 config CMDLINE_EXTEND
1751         bool "Extend bootloader kernel arguments"
1752         help
1753           The command-line arguments provided by the boot loader will be
1754           appended to the default kernel command string.
1755
1756 config CMDLINE_FORCE
1757         bool "Always use the default kernel command string"
1758         help
1759           Always use the default kernel command string, even if the boot
1760           loader passes other arguments to the kernel.
1761           This is useful if you cannot or don't want to change the
1762           command-line options your boot loader passes to the kernel.
1763 endchoice
1764
1765 config XIP_KERNEL
1766         bool "Kernel Execute-In-Place from ROM"
1767         depends on !ZBOOT_ROM
1768         help
1769           Execute-In-Place allows the kernel to run from non-volatile storage
1770           directly addressable by the CPU, such as NOR flash. This saves RAM
1771           space since the text section of the kernel is not loaded from flash
1772           to RAM.  Read-write sections, such as the data section and stack,
1773           are still copied to RAM.  The XIP kernel is not compressed since
1774           it has to run directly from flash, so it will take more space to
1775           store it.  The flash address used to link the kernel object files,
1776           and for storing it, is configuration dependent. Therefore, if you
1777           say Y here, you must know the proper physical address where to
1778           store the kernel image depending on your own flash memory usage.
1779
1780           Also note that the make target becomes "make xipImage" rather than
1781           "make zImage" or "make Image".  The final kernel binary to put in
1782           ROM memory will be arch/arm/boot/xipImage.
1783
1784           If unsure, say N.
1785
1786 config XIP_PHYS_ADDR
1787         hex "XIP Kernel Physical Location"
1788         depends on XIP_KERNEL
1789         default "0x00080000"
1790         help
1791           This is the physical address in your flash memory the kernel will
1792           be linked for and stored to.  This address is dependent on your
1793           own flash usage.
1794
1795 config KEXEC
1796         bool "Kexec system call (EXPERIMENTAL)"
1797         depends on EXPERIMENTAL
1798         help
1799           kexec is a system call that implements the ability to shutdown your
1800           current kernel, and to start another kernel.  It is like a reboot
1801           but it is independent of the system firmware.   And like a reboot
1802           you can start any kernel with it, not just Linux.
1803
1804           It is an ongoing process to be certain the hardware in a machine
1805           is properly shutdown, so do not be surprised if this code does not
1806           initially work for you.  It may help to enable device hotplugging
1807           support.
1808
1809 config ATAGS_PROC
1810         bool "Export atags in procfs"
1811         depends on KEXEC
1812         default y
1813         help
1814           Should the atags used to boot the kernel be exported in an "atags"
1815           file in procfs. Useful with kexec.
1816
1817 config CRASH_DUMP
1818         bool "Build kdump crash kernel (EXPERIMENTAL)"
1819         depends on EXPERIMENTAL
1820         help
1821           Generate crash dump after being started by kexec. This should
1822           be normally only set in special crash dump kernels which are
1823           loaded in the main kernel with kexec-tools into a specially
1824           reserved region and then later executed after a crash by
1825           kdump/kexec. The crash dump kernel must be compiled to a
1826           memory address not used by the main kernel
1827
1828           For more details see Documentation/kdump/kdump.txt
1829
1830 config AUTO_ZRELADDR
1831         bool "Auto calculation of the decompressed kernel image address"
1832         depends on !ZBOOT_ROM && !ARCH_U300
1833         help
1834           ZRELADDR is the physical address where the decompressed kernel
1835           image will be placed. If AUTO_ZRELADDR is selected, the address
1836           will be determined at run-time by masking the current IP with
1837           0xf8000000. This assumes the zImage being placed in the first 128MB
1838           from start of memory.
1839
1840 endmenu
1841
1842 menu "CPU Power Management"
1843
1844 if ARCH_HAS_CPUFREQ
1845
1846 source "drivers/cpufreq/Kconfig"
1847
1848 config CPU_FREQ_IMX
1849         tristate "CPUfreq driver for i.MX CPUs"
1850         depends on ARCH_MXC && CPU_FREQ
1851         help
1852           This enables the CPUfreq driver for i.MX CPUs.
1853
1854 config CPU_FREQ_SA1100
1855         bool
1856
1857 config CPU_FREQ_SA1110
1858         bool
1859
1860 config CPU_FREQ_INTEGRATOR
1861         tristate "CPUfreq driver for ARM Integrator CPUs"
1862         depends on ARCH_INTEGRATOR && CPU_FREQ
1863         default y
1864         help
1865           This enables the CPUfreq driver for ARM Integrator CPUs.
1866
1867           For details, take a look at <file:Documentation/cpu-freq>.
1868
1869           If in doubt, say Y.
1870
1871 config CPU_FREQ_PXA
1872         bool
1873         depends on CPU_FREQ && ARCH_PXA && PXA25x
1874         default y
1875         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1876
1877 config CPU_FREQ_S3C64XX
1878         bool "CPUfreq support for Samsung S3C64XX CPUs"
1879         depends on CPU_FREQ && CPU_S3C6410
1880
1881 config CPU_FREQ_S3C
1882         bool
1883         help
1884           Internal configuration node for common cpufreq on Samsung SoC
1885
1886 config CPU_FREQ_S3C24XX
1887         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1888         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1889         select CPU_FREQ_S3C
1890         help
1891           This enables the CPUfreq driver for the Samsung S3C24XX family
1892           of CPUs.
1893
1894           For details, take a look at <file:Documentation/cpu-freq>.
1895
1896           If in doubt, say N.
1897
1898 config CPU_FREQ_S3C24XX_PLL
1899         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1900         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1901         help
1902           Compile in support for changing the PLL frequency from the
1903           S3C24XX series CPUfreq driver. The PLL takes time to settle
1904           after a frequency change, so by default it is not enabled.
1905
1906           This also means that the PLL tables for the selected CPU(s) will
1907           be built which may increase the size of the kernel image.
1908
1909 config CPU_FREQ_S3C24XX_DEBUG
1910         bool "Debug CPUfreq Samsung driver core"
1911         depends on CPU_FREQ_S3C24XX
1912         help
1913           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1914
1915 config CPU_FREQ_S3C24XX_IODEBUG
1916         bool "Debug CPUfreq Samsung driver IO timing"
1917         depends on CPU_FREQ_S3C24XX
1918         help
1919           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1920
1921 config CPU_FREQ_S3C24XX_DEBUGFS
1922         bool "Export debugfs for CPUFreq"
1923         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1924         help
1925           Export status information via debugfs.
1926
1927 endif
1928
1929 source "drivers/cpuidle/Kconfig"
1930
1931 endmenu
1932
1933 menu "Floating point emulation"
1934
1935 comment "At least one emulation must be selected"
1936
1937 config FPE_NWFPE
1938         bool "NWFPE math emulation"
1939         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1940         ---help---
1941           Say Y to include the NWFPE floating point emulator in the kernel.
1942           This is necessary to run most binaries. Linux does not currently
1943           support floating point hardware so you need to say Y here even if
1944           your machine has an FPA or floating point co-processor podule.
1945
1946           You may say N here if you are going to load the Acorn FPEmulator
1947           early in the bootup.
1948
1949 config FPE_NWFPE_XP
1950         bool "Support extended precision"
1951         depends on FPE_NWFPE
1952         help
1953           Say Y to include 80-bit support in the kernel floating-point
1954           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1955           Note that gcc does not generate 80-bit operations by default,
1956           so in most cases this option only enlarges the size of the
1957           floating point emulator without any good reason.
1958
1959           You almost surely want to say N here.
1960
1961 config FPE_FASTFPE
1962         bool "FastFPE math emulation (EXPERIMENTAL)"
1963         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1964         ---help---
1965           Say Y here to include the FAST floating point emulator in the kernel.
1966           This is an experimental much faster emulator which now also has full
1967           precision for the mantissa.  It does not support any exceptions.
1968           It is very simple, and approximately 3-6 times faster than NWFPE.
1969
1970           It should be sufficient for most programs.  It may be not suitable
1971           for scientific calculations, but you have to check this for yourself.
1972           If you do not feel you need a faster FP emulation you should better
1973           choose NWFPE.
1974
1975 config VFP
1976         bool "VFP-format floating point maths"
1977         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1978         help
1979           Say Y to include VFP support code in the kernel. This is needed
1980           if your hardware includes a VFP unit.
1981
1982           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1983           release notes and additional status information.
1984
1985           Say N if your target does not have VFP hardware.
1986
1987 config VFPv3
1988         bool
1989         depends on VFP
1990         default y if CPU_V7
1991
1992 config NEON
1993         bool "Advanced SIMD (NEON) Extension support"
1994         depends on VFPv3 && CPU_V7
1995         help
1996           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1997           Extension.
1998
1999 endmenu
2000
2001 menu "Userspace binary formats"
2002
2003 source "fs/Kconfig.binfmt"
2004
2005 config ARTHUR
2006         tristate "RISC OS personality"
2007         depends on !AEABI
2008         help
2009           Say Y here to include the kernel code necessary if you want to run
2010           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2011           experimental; if this sounds frightening, say N and sleep in peace.
2012           You can also say M here to compile this support as a module (which
2013           will be called arthur).
2014
2015 endmenu
2016
2017 menu "Power management options"
2018
2019 source "kernel/power/Kconfig"
2020
2021 config ARCH_SUSPEND_POSSIBLE
2022         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2023         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2024                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2025         def_bool y
2026
2027 endmenu
2028
2029 source "net/Kconfig"
2030
2031 source "drivers/Kconfig"
2032
2033 source "fs/Kconfig"
2034
2035 source "arch/arm/Kconfig.debug"
2036
2037 source "security/Kconfig"
2038
2039 source "crypto/Kconfig"
2040
2041 source "lib/Kconfig"