5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
32 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and
34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
35 manufactured, but legacy ARM-based PC hardware remains popular in
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
45 config SYS_SUPPORTS_APM_EMULATION
48 config HAVE_SCHED_CLOCK
54 config ARCH_USES_GETTIMEOFFSET
58 config GENERIC_CLOCKEVENTS
61 config GENERIC_CLOCKEVENTS_BROADCAST
63 depends on GENERIC_CLOCKEVENTS
68 select GENERIC_ALLOCATOR
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
87 Say Y here if you are building a kernel for an EISA-based machine.
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
102 config STACKTRACE_SUPPORT
106 config HAVE_LATENCYTOP_SUPPORT
111 config LOCKDEP_SUPPORT
115 config TRACE_IRQFLAGS_SUPPORT
119 config HARDIRQS_SW_RESEND
123 config GENERIC_IRQ_PROBE
127 config GENERIC_LOCKBREAK
130 depends on SMP && PREEMPT
132 config RWSEM_GENERIC_SPINLOCK
136 config RWSEM_XCHGADD_ALGORITHM
139 config ARCH_HAS_ILOG2_U32
142 config ARCH_HAS_ILOG2_U64
145 config ARCH_HAS_CPUFREQ
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
152 config ARCH_HAS_CPU_IDLE_WAIT
155 config GENERIC_HWEIGHT
159 config GENERIC_CALIBRATE_DELAY
163 config ARCH_MAY_HAVE_PC_FDC
169 config NEED_DMA_MAP_STATE
172 config GENERIC_ISA_DMA
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
232 select PLAT_VERSATILE_FPGA_IRQ
234 Support for ARM's Integrator platform.
237 bool "ARM Ltd. RealView family"
241 select GENERIC_CLOCKEVENTS
242 select ARCH_WANT_OPTIONAL_GPIOLIB
243 select PLAT_VERSATILE
244 select PLAT_VERSATILE_CLCD
245 select ARM_TIMER_SP804
246 select GPIO_PL061 if GPIOLIB
248 This enables support for ARM Ltd RealView boards.
250 config ARCH_VERSATILE
251 bool "ARM Ltd. Versatile family"
256 select GENERIC_CLOCKEVENTS
257 select ARCH_WANT_OPTIONAL_GPIOLIB
258 select PLAT_VERSATILE
259 select PLAT_VERSATILE_CLCD
260 select PLAT_VERSATILE_FPGA_IRQ
261 select ARM_TIMER_SP804
263 This enables support for ARM Ltd Versatile board.
266 bool "ARM Ltd. Versatile Express family"
267 select ARCH_WANT_OPTIONAL_GPIOLIB
269 select ARM_TIMER_SP804
271 select GENERIC_CLOCKEVENTS
273 select HAVE_PATA_PLATFORM
275 select PLAT_VERSATILE
276 select PLAT_VERSATILE_CLCD
278 This enables support for the ARM Ltd Versatile Express boards.
282 select ARCH_REQUIRE_GPIOLIB
285 This enables support for systems based on the Atmel AT91RM9200,
286 AT91SAM9 and AT91CAP9 processors.
289 bool "Broadcom BCMRING"
294 select GENERIC_CLOCKEVENTS
295 select ARCH_WANT_OPTIONAL_GPIOLIB
297 Support for Broadcom's BCMRing platform.
300 bool "Cirrus Logic CLPS711x/EP721x-based"
302 select ARCH_USES_GETTIMEOFFSET
304 Support for Cirrus Logic 711x/721x based boards.
307 bool "Cavium Networks CNS3XXX family"
309 select GENERIC_CLOCKEVENTS
311 select MIGHT_HAVE_PCI
312 select PCI_DOMAINS if PCI
314 Support for Cavium Networks CNS3XXX platform.
317 bool "Cortina Systems Gemini"
319 select ARCH_REQUIRE_GPIOLIB
320 select ARCH_USES_GETTIMEOFFSET
322 Support for the Cortina Systems Gemini family SoCs
329 select ARCH_USES_GETTIMEOFFSET
331 This is an evaluation board for the StrongARM processor available
332 from Digital. It has limited hardware on-board, including an
333 Ethernet interface, two PCMCIA sockets, two serial ports and a
342 select ARCH_REQUIRE_GPIOLIB
343 select ARCH_HAS_HOLES_MEMORYMODEL
344 select ARCH_USES_GETTIMEOFFSET
346 This enables support for the Cirrus EP93xx series of CPUs.
348 config ARCH_FOOTBRIDGE
352 select ARCH_USES_GETTIMEOFFSET
354 Support for systems based on the DC21285 companion chip
355 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
358 bool "Freescale MXC/iMX-based"
359 select GENERIC_CLOCKEVENTS
360 select ARCH_REQUIRE_GPIOLIB
363 Support for Freescale MXC/iMX-based family of processors
366 bool "Freescale MXS-based"
367 select GENERIC_CLOCKEVENTS
368 select ARCH_REQUIRE_GPIOLIB
371 Support for Freescale MXS-based family of processors
374 bool "Freescale STMP3xxx"
377 select ARCH_REQUIRE_GPIOLIB
378 select GENERIC_CLOCKEVENTS
379 select USB_ARCH_HAS_EHCI
381 Support for systems based on the Freescale 3xxx CPUs.
384 bool "Hilscher NetX based"
387 select GENERIC_CLOCKEVENTS
389 This enables support for systems based on the Hilscher NetX Soc
392 bool "Hynix HMS720x-based"
395 select ARCH_USES_GETTIMEOFFSET
397 This enables support for systems based on the Hynix HMS720x
405 select ARCH_SUPPORTS_MSI
408 Support for Intel's IOP13XX (XScale) family of processors.
416 select ARCH_REQUIRE_GPIOLIB
418 Support for Intel's 80219 and IOP32X (XScale) family of
427 select ARCH_REQUIRE_GPIOLIB
429 Support for Intel's IOP33X (XScale) family of processors.
436 select ARCH_USES_GETTIMEOFFSET
438 Support for Intel's IXP23xx (XScale) family of processors.
441 bool "IXP2400/2800-based"
445 select ARCH_USES_GETTIMEOFFSET
447 Support for Intel's IXP2400/2800 (XScale) family of processors.
454 select GENERIC_CLOCKEVENTS
455 select HAVE_SCHED_CLOCK
456 select MIGHT_HAVE_PCI
457 select DMABOUNCE if PCI
459 Support for Intel's IXP4XX (XScale) family of processors.
464 select ARCH_REQUIRE_GPIOLIB
465 select GENERIC_CLOCKEVENTS
468 Support for the Marvell Dove SoC 88AP510
471 bool "Marvell Kirkwood"
474 select ARCH_REQUIRE_GPIOLIB
475 select GENERIC_CLOCKEVENTS
478 Support for the following Marvell Kirkwood series SoCs:
479 88F6180, 88F6192 and 88F6281.
482 bool "Marvell Loki (88RC8480)"
484 select GENERIC_CLOCKEVENTS
487 Support for the Marvell Loki (88RC8480) SoC.
492 select ARCH_REQUIRE_GPIOLIB
495 select USB_ARCH_HAS_OHCI
498 select GENERIC_CLOCKEVENTS
500 Support for the NXP LPC32XX family of processors
503 bool "Marvell MV78xx0"
506 select ARCH_REQUIRE_GPIOLIB
507 select GENERIC_CLOCKEVENTS
510 Support for the following Marvell MV78xx0 series SoCs:
518 select ARCH_REQUIRE_GPIOLIB
519 select GENERIC_CLOCKEVENTS
522 Support for the following Marvell Orion 5x series SoCs:
523 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
524 Orion-2 (5281), Orion-1-90 (6183).
527 bool "Marvell PXA168/910/MMP2"
529 select ARCH_REQUIRE_GPIOLIB
531 select GENERIC_CLOCKEVENTS
532 select HAVE_SCHED_CLOCK
537 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
540 bool "Micrel/Kendin KS8695"
542 select ARCH_REQUIRE_GPIOLIB
543 select ARCH_USES_GETTIMEOFFSET
545 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
546 System-on-Chip devices.
549 bool "NetSilicon NS9xxx"
552 select GENERIC_CLOCKEVENTS
555 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
558 <http://www.digi.com/products/microprocessors/index.jsp>
561 bool "Nuvoton W90X900 CPU"
563 select ARCH_REQUIRE_GPIOLIB
565 select GENERIC_CLOCKEVENTS
567 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
568 At present, the w90x900 has been renamed nuc900, regarding
569 the ARM series product line, you can login the following
570 link address to know more.
572 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
573 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
576 bool "Nuvoton NUC93X CPU"
580 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
581 low-power and high performance MPEG-4/JPEG multimedia controller chip.
587 select GENERIC_CLOCKEVENTS
590 select HAVE_SCHED_CLOCK
591 select ARCH_HAS_BARRIERS if CACHE_L2X0
592 select ARCH_HAS_CPUFREQ
594 This enables support for NVIDIA Tegra based systems (Tegra APX,
595 Tegra 6xx and Tegra 2 series).
598 bool "Philips Nexperia PNX4008 Mobile"
601 select ARCH_USES_GETTIMEOFFSET
603 This enables support for Philips PNX4008 mobile platform.
606 bool "PXA2xx/PXA3xx-based"
609 select ARCH_HAS_CPUFREQ
611 select ARCH_REQUIRE_GPIOLIB
612 select GENERIC_CLOCKEVENTS
613 select HAVE_SCHED_CLOCK
618 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
623 select GENERIC_CLOCKEVENTS
624 select ARCH_REQUIRE_GPIOLIB
626 Support for Qualcomm MSM/QSD based systems. This runs on the
627 apps processor of the MSM/QSD and depends on a shared memory
628 interface to the modem processor which runs the baseband
629 stack and controls some vital subsystems
630 (clock and power control, etc).
633 bool "Renesas SH-Mobile / R-Mobile"
636 select GENERIC_CLOCKEVENTS
639 select MULTI_IRQ_HANDLER
641 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
648 select ARCH_MAY_HAVE_PC_FDC
649 select HAVE_PATA_PLATFORM
652 select ARCH_SPARSEMEM_ENABLE
653 select ARCH_USES_GETTIMEOFFSET
655 On the Acorn Risc-PC, Linux can support the internal IDE disk and
656 CD-ROM interface, serial and parallel port, and the floppy drive.
662 select ARCH_SPARSEMEM_ENABLE
664 select ARCH_HAS_CPUFREQ
666 select GENERIC_CLOCKEVENTS
668 select HAVE_SCHED_CLOCK
670 select ARCH_REQUIRE_GPIOLIB
672 Support for StrongARM 11x0 based boards.
675 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
677 select ARCH_HAS_CPUFREQ
679 select ARCH_USES_GETTIMEOFFSET
680 select HAVE_S3C2410_I2C if I2C
682 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
683 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
684 the Samsung SMDK2410 development board (and derivatives).
686 Note, the S3C2416 and the S3C2450 are so close that they even share
687 the same SoC ID code. This means that there is no seperate machine
688 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
691 bool "Samsung S3C64XX"
697 select ARCH_USES_GETTIMEOFFSET
698 select ARCH_HAS_CPUFREQ
699 select ARCH_REQUIRE_GPIOLIB
700 select SAMSUNG_CLKSRC
701 select SAMSUNG_IRQ_VIC_TIMER
702 select SAMSUNG_IRQ_UART
703 select S3C_GPIO_TRACK
704 select S3C_GPIO_PULL_UPDOWN
705 select S3C_GPIO_CFG_S3C24XX
706 select S3C_GPIO_CFG_S3C64XX
708 select USB_ARCH_HAS_OHCI
709 select SAMSUNG_GPIOLIB_4BIT
710 select HAVE_S3C2410_I2C if I2C
711 select HAVE_S3C2410_WATCHDOG if WATCHDOG
713 Samsung S3C64XX series based systems
716 bool "Samsung S5P6440 S5P6450"
720 select HAVE_S3C2410_WATCHDOG if WATCHDOG
721 select ARCH_USES_GETTIMEOFFSET
722 select HAVE_S3C2410_I2C if I2C
723 select HAVE_S3C_RTC if RTC_CLASS
725 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
729 bool "Samsung S5P6442"
733 select ARCH_USES_GETTIMEOFFSET
734 select HAVE_S3C2410_WATCHDOG if WATCHDOG
736 Samsung S5P6442 CPU based systems
739 bool "Samsung S5PC100"
743 select ARM_L1_CACHE_SHIFT_6
744 select ARCH_USES_GETTIMEOFFSET
745 select HAVE_S3C2410_I2C if I2C
746 select HAVE_S3C_RTC if RTC_CLASS
747 select HAVE_S3C2410_WATCHDOG if WATCHDOG
749 Samsung S5PC100 series based systems
752 bool "Samsung S5PV210/S5PC110"
754 select ARCH_SPARSEMEM_ENABLE
757 select ARM_L1_CACHE_SHIFT_6
758 select ARCH_HAS_CPUFREQ
759 select ARCH_USES_GETTIMEOFFSET
760 select HAVE_S3C2410_I2C if I2C
761 select HAVE_S3C_RTC if RTC_CLASS
762 select HAVE_S3C2410_WATCHDOG if WATCHDOG
764 Samsung S5PV210/S5PC110 series based systems
767 bool "Samsung S5PV310/S5PC210"
769 select ARCH_SPARSEMEM_ENABLE
772 select ARCH_HAS_CPUFREQ
773 select GENERIC_CLOCKEVENTS
774 select HAVE_S3C_RTC if RTC_CLASS
775 select HAVE_S3C2410_I2C if I2C
776 select HAVE_S3C2410_WATCHDOG if WATCHDOG
778 Samsung S5PV310 series based systems
787 select ARCH_USES_GETTIMEOFFSET
789 Support for the StrongARM based Digital DNARD machine, also known
790 as "Shark" (<http://www.shark-linux.de/shark.html>).
793 bool "Telechips TCC ARM926-based systems"
797 select GENERIC_CLOCKEVENTS
799 Support for Telechips TCC ARM926-based systems.
804 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
805 select ARCH_USES_GETTIMEOFFSET
807 Say Y here for systems based on one of the Sharp LH7A40X
808 System on a Chip processors. These CPUs include an ARM922T
809 core with a wide array of integrated devices for
810 hand-held and low-power applications.
813 bool "ST-Ericsson U300 Series"
816 select HAVE_SCHED_CLOCK
820 select GENERIC_CLOCKEVENTS
824 Support for ST-Ericsson U300 series mobile platforms.
827 bool "ST-Ericsson U8500 Series"
830 select GENERIC_CLOCKEVENTS
832 select ARCH_REQUIRE_GPIOLIB
833 select ARCH_HAS_CPUFREQ
835 Support for ST-Ericsson's Ux500 architecture
838 bool "STMicroelectronics Nomadik"
843 select GENERIC_CLOCKEVENTS
844 select ARCH_REQUIRE_GPIOLIB
846 Support for the Nomadik platform by ST-Ericsson
850 select GENERIC_CLOCKEVENTS
851 select ARCH_REQUIRE_GPIOLIB
855 select GENERIC_ALLOCATOR
856 select ARCH_HAS_HOLES_MEMORYMODEL
858 Support for TI's DaVinci platform.
863 select ARCH_REQUIRE_GPIOLIB
864 select ARCH_HAS_CPUFREQ
865 select GENERIC_CLOCKEVENTS
866 select HAVE_SCHED_CLOCK
867 select ARCH_HAS_HOLES_MEMORYMODEL
869 Support for TI's OMAP platform (OMAP1/2/3/4).
874 select ARCH_REQUIRE_GPIOLIB
876 select GENERIC_CLOCKEVENTS
879 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
884 # This is sorted alphabetically by mach-* pathname. However, plat-*
885 # Kconfigs may be included either alphabetically (according to the
886 # plat- suffix) or along side the corresponding mach-* source.
888 source "arch/arm/mach-aaec2000/Kconfig"
890 source "arch/arm/mach-at91/Kconfig"
892 source "arch/arm/mach-bcmring/Kconfig"
894 source "arch/arm/mach-clps711x/Kconfig"
896 source "arch/arm/mach-cns3xxx/Kconfig"
898 source "arch/arm/mach-davinci/Kconfig"
900 source "arch/arm/mach-dove/Kconfig"
902 source "arch/arm/mach-ep93xx/Kconfig"
904 source "arch/arm/mach-footbridge/Kconfig"
906 source "arch/arm/mach-gemini/Kconfig"
908 source "arch/arm/mach-h720x/Kconfig"
910 source "arch/arm/mach-integrator/Kconfig"
912 source "arch/arm/mach-iop32x/Kconfig"
914 source "arch/arm/mach-iop33x/Kconfig"
916 source "arch/arm/mach-iop13xx/Kconfig"
918 source "arch/arm/mach-ixp4xx/Kconfig"
920 source "arch/arm/mach-ixp2000/Kconfig"
922 source "arch/arm/mach-ixp23xx/Kconfig"
924 source "arch/arm/mach-kirkwood/Kconfig"
926 source "arch/arm/mach-ks8695/Kconfig"
928 source "arch/arm/mach-lh7a40x/Kconfig"
930 source "arch/arm/mach-loki/Kconfig"
932 source "arch/arm/mach-lpc32xx/Kconfig"
934 source "arch/arm/mach-msm/Kconfig"
936 source "arch/arm/mach-mv78xx0/Kconfig"
938 source "arch/arm/plat-mxc/Kconfig"
940 source "arch/arm/mach-mxs/Kconfig"
942 source "arch/arm/mach-netx/Kconfig"
944 source "arch/arm/mach-nomadik/Kconfig"
945 source "arch/arm/plat-nomadik/Kconfig"
947 source "arch/arm/mach-ns9xxx/Kconfig"
949 source "arch/arm/mach-nuc93x/Kconfig"
951 source "arch/arm/plat-omap/Kconfig"
953 source "arch/arm/mach-omap1/Kconfig"
955 source "arch/arm/mach-omap2/Kconfig"
957 source "arch/arm/mach-orion5x/Kconfig"
959 source "arch/arm/mach-pxa/Kconfig"
960 source "arch/arm/plat-pxa/Kconfig"
962 source "arch/arm/mach-mmp/Kconfig"
964 source "arch/arm/mach-realview/Kconfig"
966 source "arch/arm/mach-sa1100/Kconfig"
968 source "arch/arm/plat-samsung/Kconfig"
969 source "arch/arm/plat-s3c24xx/Kconfig"
970 source "arch/arm/plat-s5p/Kconfig"
972 source "arch/arm/plat-spear/Kconfig"
974 source "arch/arm/plat-tcc/Kconfig"
977 source "arch/arm/mach-s3c2400/Kconfig"
978 source "arch/arm/mach-s3c2410/Kconfig"
979 source "arch/arm/mach-s3c2412/Kconfig"
980 source "arch/arm/mach-s3c2416/Kconfig"
981 source "arch/arm/mach-s3c2440/Kconfig"
982 source "arch/arm/mach-s3c2443/Kconfig"
986 source "arch/arm/mach-s3c64xx/Kconfig"
989 source "arch/arm/mach-s5p64x0/Kconfig"
991 source "arch/arm/mach-s5p6442/Kconfig"
993 source "arch/arm/mach-s5pc100/Kconfig"
995 source "arch/arm/mach-s5pv210/Kconfig"
997 source "arch/arm/mach-s5pv310/Kconfig"
999 source "arch/arm/mach-shmobile/Kconfig"
1001 source "arch/arm/plat-stmp3xxx/Kconfig"
1003 source "arch/arm/mach-tegra/Kconfig"
1005 source "arch/arm/mach-u300/Kconfig"
1007 source "arch/arm/mach-ux500/Kconfig"
1009 source "arch/arm/mach-versatile/Kconfig"
1011 source "arch/arm/mach-vexpress/Kconfig"
1012 source "arch/arm/plat-versatile/Kconfig"
1014 source "arch/arm/mach-w90x900/Kconfig"
1016 # Definitions to make life easier
1022 select GENERIC_CLOCKEVENTS
1023 select HAVE_SCHED_CLOCK
1027 select HAVE_SCHED_CLOCK
1032 config PLAT_VERSATILE
1035 config ARM_TIMER_SP804
1038 source arch/arm/mm/Kconfig
1041 bool "Enable iWMMXt support"
1042 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1043 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1045 Enable support for iWMMXt context switching at run time if
1046 running on a CPU that supports it.
1048 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1051 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1055 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1056 (!ARCH_OMAP3 || OMAP3_EMU)
1060 config MULTI_IRQ_HANDLER
1063 Allow each machine to specify it's own IRQ handler at run time.
1066 source "arch/arm/Kconfig-nommu"
1069 config ARM_ERRATA_411920
1070 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1073 Invalidation of the Instruction Cache operation can
1074 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1075 It does not affect the MPCore. This option enables the ARM Ltd.
1076 recommended workaround.
1078 config ARM_ERRATA_430973
1079 bool "ARM errata: Stale prediction on replaced interworking branch"
1082 This option enables the workaround for the 430973 Cortex-A8
1083 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1084 interworking branch is replaced with another code sequence at the
1085 same virtual address, whether due to self-modifying code or virtual
1086 to physical address re-mapping, Cortex-A8 does not recover from the
1087 stale interworking branch prediction. This results in Cortex-A8
1088 executing the new code sequence in the incorrect ARM or Thumb state.
1089 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1090 and also flushes the branch target cache at every context switch.
1091 Note that setting specific bits in the ACTLR register may not be
1092 available in non-secure mode.
1094 config ARM_ERRATA_458693
1095 bool "ARM errata: Processor deadlock when a false hazard is created"
1098 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1099 erratum. For very specific sequences of memory operations, it is
1100 possible for a hazard condition intended for a cache line to instead
1101 be incorrectly associated with a different cache line. This false
1102 hazard might then cause a processor deadlock. The workaround enables
1103 the L1 caching of the NEON accesses and disables the PLD instruction
1104 in the ACTLR register. Note that setting specific bits in the ACTLR
1105 register may not be available in non-secure mode.
1107 config ARM_ERRATA_460075
1108 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1111 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1112 erratum. Any asynchronous access to the L2 cache may encounter a
1113 situation in which recent store transactions to the L2 cache are lost
1114 and overwritten with stale memory contents from external memory. The
1115 workaround disables the write-allocate mode for the L2 cache via the
1116 ACTLR register. Note that setting specific bits in the ACTLR register
1117 may not be available in non-secure mode.
1119 config ARM_ERRATA_742230
1120 bool "ARM errata: DMB operation may be faulty"
1121 depends on CPU_V7 && SMP
1123 This option enables the workaround for the 742230 Cortex-A9
1124 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1125 between two write operations may not ensure the correct visibility
1126 ordering of the two writes. This workaround sets a specific bit in
1127 the diagnostic register of the Cortex-A9 which causes the DMB
1128 instruction to behave as a DSB, ensuring the correct behaviour of
1131 config ARM_ERRATA_742231
1132 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1133 depends on CPU_V7 && SMP
1135 This option enables the workaround for the 742231 Cortex-A9
1136 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1137 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1138 accessing some data located in the same cache line, may get corrupted
1139 data due to bad handling of the address hazard when the line gets
1140 replaced from one of the CPUs at the same time as another CPU is
1141 accessing it. This workaround sets specific bits in the diagnostic
1142 register of the Cortex-A9 which reduces the linefill issuing
1143 capabilities of the processor.
1145 config PL310_ERRATA_588369
1146 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1147 depends on CACHE_L2X0 && ARCH_OMAP4
1149 The PL310 L2 cache controller implements three types of Clean &
1150 Invalidate maintenance operations: by Physical Address
1151 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1152 They are architecturally defined to behave as the execution of a
1153 clean operation followed immediately by an invalidate operation,
1154 both performing to the same memory location. This functionality
1155 is not correctly implemented in PL310 as clean lines are not
1156 invalidated as a result of these operations. Note that this errata
1157 uses Texas Instrument's secure monitor api.
1159 config ARM_ERRATA_720789
1160 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1161 depends on CPU_V7 && SMP
1163 This option enables the workaround for the 720789 Cortex-A9 (prior to
1164 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1165 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1166 As a consequence of this erratum, some TLB entries which should be
1167 invalidated are not, resulting in an incoherency in the system page
1168 tables. The workaround changes the TLB flushing routines to invalidate
1169 entries regardless of the ASID.
1171 config ARM_ERRATA_743622
1172 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1175 This option enables the workaround for the 743622 Cortex-A9
1176 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1177 optimisation in the Cortex-A9 Store Buffer may lead to data
1178 corruption. This workaround sets a specific bit in the diagnostic
1179 register of the Cortex-A9 which disables the Store Buffer
1180 optimisation, preventing the defect from occurring. This has no
1181 visible impact on the overall performance or power consumption of the
1186 source "arch/arm/common/Kconfig"
1196 Find out whether you have ISA slots on your motherboard. ISA is the
1197 name of a bus system, i.e. the way the CPU talks to the other stuff
1198 inside your box. Other bus systems are PCI, EISA, MicroChannel
1199 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1200 newer boards don't support it. If you have ISA, say Y, otherwise N.
1202 # Select ISA DMA controller support
1207 # Select ISA DMA interface
1212 bool "PCI support" if MIGHT_HAVE_PCI
1214 Find out whether you have a PCI motherboard. PCI is the name of a
1215 bus system, i.e. the way the CPU talks to the other stuff inside
1216 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1217 VESA. If you have PCI, say Y, otherwise N.
1223 config PCI_NANOENGINE
1224 bool "BSE nanoEngine PCI support"
1225 depends on SA1100_NANOENGINE
1227 Enable PCI on the BSE nanoEngine board.
1232 # Select the host bridge type
1233 config PCI_HOST_VIA82C505
1235 depends on PCI && ARCH_SHARK
1238 config PCI_HOST_ITE8152
1240 depends on PCI && MACH_ARMCORE
1244 source "drivers/pci/Kconfig"
1246 source "drivers/pcmcia/Kconfig"
1250 menu "Kernel Features"
1252 source "kernel/time/Kconfig"
1255 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1256 depends on EXPERIMENTAL
1257 depends on GENERIC_CLOCKEVENTS
1258 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1259 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1260 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1261 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1262 select USE_GENERIC_SMP_HELPERS
1263 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1265 This enables support for systems with more than one CPU. If you have
1266 a system with only one CPU, like most personal computers, say N. If
1267 you have a system with more than one CPU, say Y.
1269 If you say N here, the kernel will run on single and multiprocessor
1270 machines, but will use only one CPU of a multiprocessor machine. If
1271 you say Y here, the kernel will run on many, but not all, single
1272 processor machines. On a single processor machine, the kernel will
1273 run faster if you say N here.
1275 See also <file:Documentation/i386/IO-APIC.txt>,
1276 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1277 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1279 If you don't know what to do here, say N.
1282 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1283 depends on EXPERIMENTAL
1284 depends on SMP && !XIP_KERNEL
1287 SMP kernels contain instructions which fail on non-SMP processors.
1288 Enabling this option allows the kernel to modify itself to make
1289 these instructions safe. Disabling it allows about 1K of space
1292 If you don't know what to do here, say Y.
1298 This option enables support for the ARM system coherency unit
1305 This options enables support for the ARM timer and watchdog unit
1308 prompt "Memory split"
1311 Select the desired split between kernel and user memory.
1313 If you are not absolutely sure what you are doing, leave this
1317 bool "3G/1G user/kernel split"
1319 bool "2G/2G user/kernel split"
1321 bool "1G/3G user/kernel split"
1326 default 0x40000000 if VMSPLIT_1G
1327 default 0x80000000 if VMSPLIT_2G
1331 int "Maximum number of CPUs (2-32)"
1337 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1338 depends on SMP && HOTPLUG && EXPERIMENTAL
1339 depends on !ARCH_MSM
1341 Say Y here to experiment with turning CPUs off and on. CPUs
1342 can be controlled through /sys/devices/system/cpu.
1345 bool "Use local timer interrupts"
1348 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1350 Enable support for local timers on SMP platforms, rather then the
1351 legacy IPI broadcast method. Local timers allows the system
1352 accounting to be spread across the timer interval, preventing a
1353 "thundering herd" at every timer tick.
1355 source kernel/Kconfig.preempt
1359 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1360 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1361 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1362 default AT91_TIMER_HZ if ARCH_AT91
1363 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1366 config THUMB2_KERNEL
1367 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1368 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1370 select ARM_ASM_UNIFIED
1372 By enabling this option, the kernel will be compiled in
1373 Thumb-2 mode. A compiler/assembler that understand the unified
1374 ARM-Thumb syntax is needed.
1378 config ARM_ASM_UNIFIED
1382 bool "Use the ARM EABI to compile the kernel"
1384 This option allows for the kernel to be compiled using the latest
1385 ARM ABI (aka EABI). This is only useful if you are using a user
1386 space environment that is also compiled with EABI.
1388 Since there are major incompatibilities between the legacy ABI and
1389 EABI, especially with regard to structure member alignment, this
1390 option also changes the kernel syscall calling convention to
1391 disambiguate both ABIs and allow for backward compatibility support
1392 (selected with CONFIG_OABI_COMPAT).
1394 To use this you need GCC version 4.0.0 or later.
1397 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1398 depends on AEABI && EXPERIMENTAL
1401 This option preserves the old syscall interface along with the
1402 new (ARM EABI) one. It also provides a compatibility layer to
1403 intercept syscalls that have structure arguments which layout
1404 in memory differs between the legacy ABI and the new ARM EABI
1405 (only for non "thumb" binaries). This option adds a tiny
1406 overhead to all syscalls and produces a slightly larger kernel.
1407 If you know you'll be using only pure EABI user space then you
1408 can say N here. If this option is not selected and you attempt
1409 to execute a legacy ABI binary then the result will be
1410 UNPREDICTABLE (in fact it can be predicted that it won't work
1411 at all). If in doubt say Y.
1413 config ARCH_HAS_HOLES_MEMORYMODEL
1416 config ARCH_SPARSEMEM_ENABLE
1419 config ARCH_SPARSEMEM_DEFAULT
1420 def_bool ARCH_SPARSEMEM_ENABLE
1422 config ARCH_SELECT_MEMORY_MODEL
1423 def_bool ARCH_SPARSEMEM_ENABLE
1426 bool "High Memory Support (EXPERIMENTAL)"
1427 depends on MMU && EXPERIMENTAL
1429 The address space of ARM processors is only 4 Gigabytes large
1430 and it has to accommodate user address space, kernel address
1431 space as well as some memory mapped IO. That means that, if you
1432 have a large amount of physical memory and/or IO, not all of the
1433 memory can be "permanently mapped" by the kernel. The physical
1434 memory that is not permanently mapped is called "high memory".
1436 Depending on the selected kernel/user memory split, minimum
1437 vmalloc space and actual amount of RAM, you may not need this
1438 option which should result in a slightly faster kernel.
1443 bool "Allocate 2nd-level pagetables from highmem"
1445 depends on !OUTER_CACHE
1447 config HW_PERF_EVENTS
1448 bool "Enable hardware performance counter support for perf events"
1449 depends on PERF_EVENTS && CPU_HAS_PMU
1452 Enable hardware performance counter support for perf events. If
1453 disabled, perf events will use software events only.
1457 config FORCE_MAX_ZONEORDER
1458 int "Maximum zone order" if ARCH_SHMOBILE
1459 range 11 64 if ARCH_SHMOBILE
1460 default "9" if SA1111
1463 The kernel memory allocator divides physically contiguous memory
1464 blocks into "zones", where each zone is a power of two number of
1465 pages. This option selects the largest power of two that the kernel
1466 keeps in the memory allocator. If you need to allocate very large
1467 blocks of physically contiguous memory, then you may need to
1468 increase this value.
1470 This config option is actually maximum order plus one. For example,
1471 a value of 11 means that the largest free memory block is 2^10 pages.
1474 bool "Timer and CPU usage LEDs"
1475 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1476 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1477 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1478 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1479 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1480 ARCH_AT91 || ARCH_DAVINCI || \
1481 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1483 If you say Y here, the LEDs on your machine will be used
1484 to provide useful information about your current system status.
1486 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1487 be able to select which LEDs are active using the options below. If
1488 you are compiling a kernel for the EBSA-110 or the LART however, the
1489 red LED will simply flash regularly to indicate that the system is
1490 still functional. It is safe to say Y here if you have a CATS
1491 system, but the driver will do nothing.
1494 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1495 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1496 || MACH_OMAP_PERSEUS2
1498 depends on !GENERIC_CLOCKEVENTS
1499 default y if ARCH_EBSA110
1501 If you say Y here, one of the system LEDs (the green one on the
1502 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1503 will flash regularly to indicate that the system is still
1504 operational. This is mainly useful to kernel hackers who are
1505 debugging unstable kernels.
1507 The LART uses the same LED for both Timer LED and CPU usage LED
1508 functions. You may choose to use both, but the Timer LED function
1509 will overrule the CPU usage LED.
1512 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1514 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1515 || MACH_OMAP_PERSEUS2
1518 If you say Y here, the red LED will be used to give a good real
1519 time indication of CPU usage, by lighting whenever the idle task
1520 is not currently executing.
1522 The LART uses the same LED for both Timer LED and CPU usage LED
1523 functions. You may choose to use both, but the Timer LED function
1524 will overrule the CPU usage LED.
1526 config ALIGNMENT_TRAP
1528 depends on CPU_CP15_MMU
1529 default y if !ARCH_EBSA110
1530 select HAVE_PROC_CPU if PROC_FS
1532 ARM processors cannot fetch/store information which is not
1533 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1534 address divisible by 4. On 32-bit ARM processors, these non-aligned
1535 fetch/store instructions will be emulated in software if you say
1536 here, which has a severe performance impact. This is necessary for
1537 correct operation of some network protocols. With an IP-only
1538 configuration it is safe to say N, otherwise say Y.
1540 config UACCESS_WITH_MEMCPY
1541 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1542 depends on MMU && EXPERIMENTAL
1543 default y if CPU_FEROCEON
1545 Implement faster copy_to_user and clear_user methods for CPU
1546 cores where a 8-word STM instruction give significantly higher
1547 memory write throughput than a sequence of individual 32bit stores.
1549 A possible side effect is a slight increase in scheduling latency
1550 between threads sharing the same address space if they invoke
1551 such copy operations with large buffers.
1553 However, if the CPU data cache is using a write-allocate mode,
1554 this option is unlikely to provide any performance gain.
1558 prompt "Enable seccomp to safely compute untrusted bytecode"
1560 This kernel feature is useful for number crunching applications
1561 that may need to compute untrusted bytecode during their
1562 execution. By using pipes or other transports made available to
1563 the process as file descriptors supporting the read/write
1564 syscalls, it's possible to isolate those applications in
1565 their own address space using seccomp. Once seccomp is
1566 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1567 and the task is only allowed to execute a few safe syscalls
1568 defined by each seccomp mode.
1570 config CC_STACKPROTECTOR
1571 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1572 depends on EXPERIMENTAL
1574 This option turns on the -fstack-protector GCC feature. This
1575 feature puts, at the beginning of functions, a canary value on
1576 the stack just before the return address, and validates
1577 the value just before actually returning. Stack based buffer
1578 overflows (that need to overwrite this return address) now also
1579 overwrite the canary, which gets detected and the attack is then
1580 neutralized via a kernel panic.
1581 This feature requires gcc version 4.2 or above.
1583 config DEPRECATED_PARAM_STRUCT
1584 bool "Provide old way to pass kernel parameters"
1586 This was deprecated in 2001 and announced to live on for 5 years.
1587 Some old boot loaders still use this way.
1593 # Compressed boot loader in ROM. Yes, we really want to ask about
1594 # TEXT and BSS so we preserve their values in the config files.
1595 config ZBOOT_ROM_TEXT
1596 hex "Compressed ROM boot loader base address"
1599 The physical address at which the ROM-able zImage is to be
1600 placed in the target. Platforms which normally make use of
1601 ROM-able zImage formats normally set this to a suitable
1602 value in their defconfig file.
1604 If ZBOOT_ROM is not enabled, this has no effect.
1606 config ZBOOT_ROM_BSS
1607 hex "Compressed ROM boot loader BSS address"
1610 The base address of an area of read/write memory in the target
1611 for the ROM-able zImage which must be available while the
1612 decompressor is running. It must be large enough to hold the
1613 entire decompressed kernel plus an additional 128 KiB.
1614 Platforms which normally make use of ROM-able zImage formats
1615 normally set this to a suitable value in their defconfig file.
1617 If ZBOOT_ROM is not enabled, this has no effect.
1620 bool "Compressed boot loader in ROM/flash"
1621 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1623 Say Y here if you intend to execute your compressed kernel image
1624 (zImage) directly from ROM or flash. If unsure, say N.
1627 string "Default kernel command string"
1630 On some architectures (EBSA110 and CATS), there is currently no way
1631 for the boot loader to pass arguments to the kernel. For these
1632 architectures, you should supply some command-line options at build
1633 time by entering them here. As a minimum, you should specify the
1634 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1636 config CMDLINE_FORCE
1637 bool "Always use the default kernel command string"
1638 depends on CMDLINE != ""
1640 Always use the default kernel command string, even if the boot
1641 loader passes other arguments to the kernel.
1642 This is useful if you cannot or don't want to change the
1643 command-line options your boot loader passes to the kernel.
1648 bool "Kernel Execute-In-Place from ROM"
1649 depends on !ZBOOT_ROM
1651 Execute-In-Place allows the kernel to run from non-volatile storage
1652 directly addressable by the CPU, such as NOR flash. This saves RAM
1653 space since the text section of the kernel is not loaded from flash
1654 to RAM. Read-write sections, such as the data section and stack,
1655 are still copied to RAM. The XIP kernel is not compressed since
1656 it has to run directly from flash, so it will take more space to
1657 store it. The flash address used to link the kernel object files,
1658 and for storing it, is configuration dependent. Therefore, if you
1659 say Y here, you must know the proper physical address where to
1660 store the kernel image depending on your own flash memory usage.
1662 Also note that the make target becomes "make xipImage" rather than
1663 "make zImage" or "make Image". The final kernel binary to put in
1664 ROM memory will be arch/arm/boot/xipImage.
1668 config XIP_PHYS_ADDR
1669 hex "XIP Kernel Physical Location"
1670 depends on XIP_KERNEL
1671 default "0x00080000"
1673 This is the physical address in your flash memory the kernel will
1674 be linked for and stored to. This address is dependent on your
1678 bool "Kexec system call (EXPERIMENTAL)"
1679 depends on EXPERIMENTAL
1681 kexec is a system call that implements the ability to shutdown your
1682 current kernel, and to start another kernel. It is like a reboot
1683 but it is independent of the system firmware. And like a reboot
1684 you can start any kernel with it, not just Linux.
1686 It is an ongoing process to be certain the hardware in a machine
1687 is properly shutdown, so do not be surprised if this code does not
1688 initially work for you. It may help to enable device hotplugging
1692 bool "Export atags in procfs"
1696 Should the atags used to boot the kernel be exported in an "atags"
1697 file in procfs. Useful with kexec.
1700 bool "Build kdump crash kernel (EXPERIMENTAL)"
1701 depends on EXPERIMENTAL
1703 Generate crash dump after being started by kexec. This should
1704 be normally only set in special crash dump kernels which are
1705 loaded in the main kernel with kexec-tools into a specially
1706 reserved region and then later executed after a crash by
1707 kdump/kexec. The crash dump kernel must be compiled to a
1708 memory address not used by the main kernel
1710 For more details see Documentation/kdump/kdump.txt
1712 config AUTO_ZRELADDR
1713 bool "Auto calculation of the decompressed kernel image address"
1714 depends on !ZBOOT_ROM && !ARCH_U300
1716 ZRELADDR is the physical address where the decompressed kernel
1717 image will be placed. If AUTO_ZRELADDR is selected, the address
1718 will be determined at run-time by masking the current IP with
1719 0xf8000000. This assumes the zImage being placed in the first 128MB
1720 from start of memory.
1724 menu "CPU Power Management"
1728 source "drivers/cpufreq/Kconfig"
1731 tristate "CPUfreq driver for i.MX CPUs"
1732 depends on ARCH_MXC && CPU_FREQ
1734 This enables the CPUfreq driver for i.MX CPUs.
1736 config CPU_FREQ_SA1100
1739 config CPU_FREQ_SA1110
1742 config CPU_FREQ_INTEGRATOR
1743 tristate "CPUfreq driver for ARM Integrator CPUs"
1744 depends on ARCH_INTEGRATOR && CPU_FREQ
1747 This enables the CPUfreq driver for ARM Integrator CPUs.
1749 For details, take a look at <file:Documentation/cpu-freq>.
1755 depends on CPU_FREQ && ARCH_PXA && PXA25x
1757 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1759 config CPU_FREQ_S3C64XX
1760 bool "CPUfreq support for Samsung S3C64XX CPUs"
1761 depends on CPU_FREQ && CPU_S3C6410
1766 Internal configuration node for common cpufreq on Samsung SoC
1768 config CPU_FREQ_S3C24XX
1769 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1770 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1773 This enables the CPUfreq driver for the Samsung S3C24XX family
1776 For details, take a look at <file:Documentation/cpu-freq>.
1780 config CPU_FREQ_S3C24XX_PLL
1781 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1782 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1784 Compile in support for changing the PLL frequency from the
1785 S3C24XX series CPUfreq driver. The PLL takes time to settle
1786 after a frequency change, so by default it is not enabled.
1788 This also means that the PLL tables for the selected CPU(s) will
1789 be built which may increase the size of the kernel image.
1791 config CPU_FREQ_S3C24XX_DEBUG
1792 bool "Debug CPUfreq Samsung driver core"
1793 depends on CPU_FREQ_S3C24XX
1795 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1797 config CPU_FREQ_S3C24XX_IODEBUG
1798 bool "Debug CPUfreq Samsung driver IO timing"
1799 depends on CPU_FREQ_S3C24XX
1801 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1803 config CPU_FREQ_S3C24XX_DEBUGFS
1804 bool "Export debugfs for CPUFreq"
1805 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1807 Export status information via debugfs.
1811 source "drivers/cpuidle/Kconfig"
1815 menu "Floating point emulation"
1817 comment "At least one emulation must be selected"
1820 bool "NWFPE math emulation"
1821 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1823 Say Y to include the NWFPE floating point emulator in the kernel.
1824 This is necessary to run most binaries. Linux does not currently
1825 support floating point hardware so you need to say Y here even if
1826 your machine has an FPA or floating point co-processor podule.
1828 You may say N here if you are going to load the Acorn FPEmulator
1829 early in the bootup.
1832 bool "Support extended precision"
1833 depends on FPE_NWFPE
1835 Say Y to include 80-bit support in the kernel floating-point
1836 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1837 Note that gcc does not generate 80-bit operations by default,
1838 so in most cases this option only enlarges the size of the
1839 floating point emulator without any good reason.
1841 You almost surely want to say N here.
1844 bool "FastFPE math emulation (EXPERIMENTAL)"
1845 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1847 Say Y here to include the FAST floating point emulator in the kernel.
1848 This is an experimental much faster emulator which now also has full
1849 precision for the mantissa. It does not support any exceptions.
1850 It is very simple, and approximately 3-6 times faster than NWFPE.
1852 It should be sufficient for most programs. It may be not suitable
1853 for scientific calculations, but you have to check this for yourself.
1854 If you do not feel you need a faster FP emulation you should better
1858 bool "VFP-format floating point maths"
1859 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1861 Say Y to include VFP support code in the kernel. This is needed
1862 if your hardware includes a VFP unit.
1864 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1865 release notes and additional status information.
1867 Say N if your target does not have VFP hardware.
1875 bool "Advanced SIMD (NEON) Extension support"
1876 depends on VFPv3 && CPU_V7
1878 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1883 menu "Userspace binary formats"
1885 source "fs/Kconfig.binfmt"
1888 tristate "RISC OS personality"
1891 Say Y here to include the kernel code necessary if you want to run
1892 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1893 experimental; if this sounds frightening, say N and sleep in peace.
1894 You can also say M here to compile this support as a module (which
1895 will be called arthur).
1899 menu "Power management options"
1901 source "kernel/power/Kconfig"
1903 config ARCH_SUSPEND_POSSIBLE
1908 source "net/Kconfig"
1910 source "drivers/Kconfig"
1914 source "arch/arm/Kconfig.debug"
1916 source "security/Kconfig"
1918 source "crypto/Kconfig"
1920 source "lib/Kconfig"