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1 #
2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
4 #
5
6 mainmenu "Linux Kernel Configuration"
7
8 config ARM
9 bool
10 default y
11 select HAVE_AOUT
12 select HAVE_IDE
13 select HAVE_MEMBLOCK
14 select RTC_LIB
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
18 select HAVE_ARCH_KGDB
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
23 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
24 select HAVE_GENERIC_DMA_COHERENT
25 select HAVE_KERNEL_GZIP
26 select HAVE_KERNEL_LZO
27 select HAVE_KERNEL_LZMA
28 select HAVE_IRQ_WORK
29 select HAVE_PERF_EVENTS
30 select PERF_USE_VMALLOC
31 select HAVE_REGS_AND_STACK_ACCESS_API
32 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
33 help
34 The ARM series is a line of low-power-consumption RISC chip designs
35 licensed by ARM Ltd and targeted at embedded applications and
36 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
37 manufactured, but legacy ARM-based PC hardware remains popular in
38 Europe. There is an ARM Linux project with a web page at
39 <http://www.arm.linux.org.uk/>.
40
41 config HAVE_PWM
42 bool
43
44 config SYS_SUPPORTS_APM_EMULATION
45 bool
46
47 config GENERIC_GPIO
48 bool
49
50 config ARCH_USES_GETTIMEOFFSET
51 bool
52 default n
53
54 config GENERIC_CLOCKEVENTS
55 bool
56
57 config GENERIC_CLOCKEVENTS_BROADCAST
58 bool
59 depends on GENERIC_CLOCKEVENTS
60 default y if SMP
61
62 config HAVE_TCM
63 bool
64 select GENERIC_ALLOCATOR
65
66 config HAVE_PROC_CPU
67 bool
68
69 config NO_IOPORT
70 bool
71
72 config EISA
73 bool
74 ---help---
75 The Extended Industry Standard Architecture (EISA) bus was
76 developed as an open alternative to the IBM MicroChannel bus.
77
78 The EISA bus provided some of the features of the IBM MicroChannel
79 bus while maintaining backward compatibility with cards made for
80 the older ISA bus. The EISA bus saw limited use between 1988 and
81 1995 when it was made obsolete by the PCI bus.
82
83 Say Y here if you are building a kernel for an EISA-based machine.
84
85 Otherwise, say N.
86
87 config SBUS
88 bool
89
90 config MCA
91 bool
92 help
93 MicroChannel Architecture is found in some IBM PS/2 machines and
94 laptops. It is a bus system similar to PCI or ISA. See
95 <file:Documentation/mca.txt> (and especially the web page given
96 there) before attempting to build an MCA bus kernel.
97
98 config GENERIC_HARDIRQS
99 bool
100 default y
101
102 config STACKTRACE_SUPPORT
103 bool
104 default y
105
106 config HAVE_LATENCYTOP_SUPPORT
107 bool
108 depends on !SMP
109 default y
110
111 config LOCKDEP_SUPPORT
112 bool
113 default y
114
115 config TRACE_IRQFLAGS_SUPPORT
116 bool
117 default y
118
119 config HARDIRQS_SW_RESEND
120 bool
121 default y
122
123 config GENERIC_IRQ_PROBE
124 bool
125 default y
126
127 config GENERIC_LOCKBREAK
128 bool
129 default y
130 depends on SMP && PREEMPT
131
132 config RWSEM_GENERIC_SPINLOCK
133 bool
134 default y
135
136 config RWSEM_XCHGADD_ALGORITHM
137 bool
138
139 config ARCH_HAS_ILOG2_U32
140 bool
141
142 config ARCH_HAS_ILOG2_U64
143 bool
144
145 config ARCH_HAS_CPUFREQ
146 bool
147 help
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
150 it.
151
152 config ARCH_HAS_CPU_IDLE_WAIT
153 def_bool y
154
155 config GENERIC_HWEIGHT
156 bool
157 default y
158
159 config GENERIC_CALIBRATE_DELAY
160 bool
161 default y
162
163 config ARCH_MAY_HAVE_PC_FDC
164 bool
165
166 config ZONE_DMA
167 bool
168
169 config NEED_DMA_MAP_STATE
170 def_bool y
171
172 config GENERIC_ISA_DMA
173 bool
174
175 config FIQ
176 bool
177
178 config ARCH_MTD_XIP
179 bool
180
181 config GENERIC_HARDIRQS_NO__DO_IRQ
182 def_bool y
183
184 config ARM_L1_CACHE_SHIFT_6
185 bool
186 help
187 Setting ARM L1 cache line size to 64 Bytes.
188
189 config VECTORS_BASE
190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197 source "init/Kconfig"
198
199 source "kernel/Kconfig.freezer"
200
201 menu "System Type"
202
203 config MMU
204 bool "MMU-based Paged Memory Management Support"
205 default y
206 help
207 Select if you want MMU-based virtualised addressing space
208 support by paged memory management. If unsure, say 'Y'.
209
210 #
211 # The "ARM system type" choice list is ordered alphabetically by option
212 # text. Please add new entries in the option alphabetic order.
213 #
214 choice
215 prompt "ARM system type"
216 default ARCH_VERSATILE
217
218 config ARCH_AAEC2000
219 bool "Agilent AAEC-2000 based"
220 select CPU_ARM920T
221 select ARM_AMBA
222 select HAVE_CLK
223 select ARCH_USES_GETTIMEOFFSET
224 help
225 This enables support for systems based on the Agilent AAEC-2000
226
227 config ARCH_INTEGRATOR
228 bool "ARM Ltd. Integrator family"
229 select ARM_AMBA
230 select ARCH_HAS_CPUFREQ
231 select COMMON_CLKDEV
232 select ICST
233 select GENERIC_CLOCKEVENTS
234 select PLAT_VERSATILE
235 help
236 Support for ARM's Integrator platform.
237
238 config ARCH_REALVIEW
239 bool "ARM Ltd. RealView family"
240 select ARM_AMBA
241 select COMMON_CLKDEV
242 select ICST
243 select GENERIC_CLOCKEVENTS
244 select ARCH_WANT_OPTIONAL_GPIOLIB
245 select PLAT_VERSATILE
246 select ARM_TIMER_SP804
247 select GPIO_PL061 if GPIOLIB
248 help
249 This enables support for ARM Ltd RealView boards.
250
251 config ARCH_VERSATILE
252 bool "ARM Ltd. Versatile family"
253 select ARM_AMBA
254 select ARM_VIC
255 select COMMON_CLKDEV
256 select ICST
257 select GENERIC_CLOCKEVENTS
258 select ARCH_WANT_OPTIONAL_GPIOLIB
259 select PLAT_VERSATILE
260 select ARM_TIMER_SP804
261 help
262 This enables support for ARM Ltd Versatile board.
263
264 config ARCH_VEXPRESS
265 bool "ARM Ltd. Versatile Express family"
266 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_AMBA
268 select ARM_TIMER_SP804
269 select COMMON_CLKDEV
270 select GENERIC_CLOCKEVENTS
271 select HAVE_CLK
272 select ICST
273 select PLAT_VERSATILE
274 help
275 This enables support for the ARM Ltd Versatile Express boards.
276
277 config ARCH_AT91
278 bool "Atmel AT91"
279 select ARCH_REQUIRE_GPIOLIB
280 select HAVE_CLK
281 help
282 This enables support for systems based on the Atmel AT91RM9200,
283 AT91SAM9 and AT91CAP9 processors.
284
285 config ARCH_BCMRING
286 bool "Broadcom BCMRING"
287 depends on MMU
288 select CPU_V6
289 select ARM_AMBA
290 select COMMON_CLKDEV
291 select GENERIC_CLOCKEVENTS
292 select ARCH_WANT_OPTIONAL_GPIOLIB
293 help
294 Support for Broadcom's BCMRing platform.
295
296 config ARCH_CLPS711X
297 bool "Cirrus Logic CLPS711x/EP721x-based"
298 select CPU_ARM720T
299 select ARCH_USES_GETTIMEOFFSET
300 help
301 Support for Cirrus Logic 711x/721x based boards.
302
303 config ARCH_CNS3XXX
304 bool "Cavium Networks CNS3XXX family"
305 select CPU_V6
306 select GENERIC_CLOCKEVENTS
307 select ARM_GIC
308 select PCI_DOMAINS if PCI
309 help
310 Support for Cavium Networks CNS3XXX platform.
311
312 config ARCH_GEMINI
313 bool "Cortina Systems Gemini"
314 select CPU_FA526
315 select ARCH_REQUIRE_GPIOLIB
316 select ARCH_USES_GETTIMEOFFSET
317 help
318 Support for the Cortina Systems Gemini family SoCs
319
320 config ARCH_EBSA110
321 bool "EBSA-110"
322 select CPU_SA110
323 select ISA
324 select NO_IOPORT
325 select ARCH_USES_GETTIMEOFFSET
326 help
327 This is an evaluation board for the StrongARM processor available
328 from Digital. It has limited hardware on-board, including an
329 Ethernet interface, two PCMCIA sockets, two serial ports and a
330 parallel port.
331
332 config ARCH_EP93XX
333 bool "EP93xx-based"
334 select CPU_ARM920T
335 select ARM_AMBA
336 select ARM_VIC
337 select COMMON_CLKDEV
338 select ARCH_REQUIRE_GPIOLIB
339 select ARCH_HAS_HOLES_MEMORYMODEL
340 select ARCH_USES_GETTIMEOFFSET
341 help
342 This enables support for the Cirrus EP93xx series of CPUs.
343
344 config ARCH_FOOTBRIDGE
345 bool "FootBridge"
346 select CPU_SA110
347 select FOOTBRIDGE
348 select ARCH_USES_GETTIMEOFFSET
349 help
350 Support for systems based on the DC21285 companion chip
351 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
352
353 config ARCH_MXC
354 bool "Freescale MXC/iMX-based"
355 select GENERIC_CLOCKEVENTS
356 select ARCH_REQUIRE_GPIOLIB
357 select COMMON_CLKDEV
358 help
359 Support for Freescale MXC/iMX-based family of processors
360
361 config ARCH_STMP3XXX
362 bool "Freescale STMP3xxx"
363 select CPU_ARM926T
364 select COMMON_CLKDEV
365 select ARCH_REQUIRE_GPIOLIB
366 select GENERIC_CLOCKEVENTS
367 select USB_ARCH_HAS_EHCI
368 help
369 Support for systems based on the Freescale 3xxx CPUs.
370
371 config ARCH_NETX
372 bool "Hilscher NetX based"
373 select CPU_ARM926T
374 select ARM_VIC
375 select GENERIC_CLOCKEVENTS
376 help
377 This enables support for systems based on the Hilscher NetX Soc
378
379 config ARCH_H720X
380 bool "Hynix HMS720x-based"
381 select CPU_ARM720T
382 select ISA_DMA_API
383 select ARCH_USES_GETTIMEOFFSET
384 help
385 This enables support for systems based on the Hynix HMS720x
386
387 config ARCH_IOP13XX
388 bool "IOP13xx-based"
389 depends on MMU
390 select CPU_XSC3
391 select PLAT_IOP
392 select PCI
393 select ARCH_SUPPORTS_MSI
394 select VMSPLIT_1G
395 help
396 Support for Intel's IOP13XX (XScale) family of processors.
397
398 config ARCH_IOP32X
399 bool "IOP32x-based"
400 depends on MMU
401 select CPU_XSCALE
402 select PLAT_IOP
403 select PCI
404 select ARCH_REQUIRE_GPIOLIB
405 help
406 Support for Intel's 80219 and IOP32X (XScale) family of
407 processors.
408
409 config ARCH_IOP33X
410 bool "IOP33x-based"
411 depends on MMU
412 select CPU_XSCALE
413 select PLAT_IOP
414 select PCI
415 select ARCH_REQUIRE_GPIOLIB
416 help
417 Support for Intel's IOP33X (XScale) family of processors.
418
419 config ARCH_IXP23XX
420 bool "IXP23XX-based"
421 depends on MMU
422 select CPU_XSC3
423 select PCI
424 select ARCH_USES_GETTIMEOFFSET
425 help
426 Support for Intel's IXP23xx (XScale) family of processors.
427
428 config ARCH_IXP2000
429 bool "IXP2400/2800-based"
430 depends on MMU
431 select CPU_XSCALE
432 select PCI
433 select ARCH_USES_GETTIMEOFFSET
434 help
435 Support for Intel's IXP2400/2800 (XScale) family of processors.
436
437 config ARCH_IXP4XX
438 bool "IXP4xx-based"
439 depends on MMU
440 select CPU_XSCALE
441 select GENERIC_GPIO
442 select GENERIC_CLOCKEVENTS
443 select DMABOUNCE if PCI
444 help
445 Support for Intel's IXP4XX (XScale) family of processors.
446
447 config ARCH_DOVE
448 bool "Marvell Dove"
449 select PCI
450 select ARCH_REQUIRE_GPIOLIB
451 select GENERIC_CLOCKEVENTS
452 select PLAT_ORION
453 help
454 Support for the Marvell Dove SoC 88AP510
455
456 config ARCH_KIRKWOOD
457 bool "Marvell Kirkwood"
458 select CPU_FEROCEON
459 select PCI
460 select ARCH_REQUIRE_GPIOLIB
461 select GENERIC_CLOCKEVENTS
462 select PLAT_ORION
463 help
464 Support for the following Marvell Kirkwood series SoCs:
465 88F6180, 88F6192 and 88F6281.
466
467 config ARCH_LOKI
468 bool "Marvell Loki (88RC8480)"
469 select CPU_FEROCEON
470 select GENERIC_CLOCKEVENTS
471 select PLAT_ORION
472 help
473 Support for the Marvell Loki (88RC8480) SoC.
474
475 config ARCH_LPC32XX
476 bool "NXP LPC32XX"
477 select CPU_ARM926T
478 select ARCH_REQUIRE_GPIOLIB
479 select HAVE_IDE
480 select ARM_AMBA
481 select USB_ARCH_HAS_OHCI
482 select COMMON_CLKDEV
483 select GENERIC_TIME
484 select GENERIC_CLOCKEVENTS
485 help
486 Support for the NXP LPC32XX family of processors
487
488 config ARCH_MV78XX0
489 bool "Marvell MV78xx0"
490 select CPU_FEROCEON
491 select PCI
492 select ARCH_REQUIRE_GPIOLIB
493 select GENERIC_CLOCKEVENTS
494 select PLAT_ORION
495 help
496 Support for the following Marvell MV78xx0 series SoCs:
497 MV781x0, MV782x0.
498
499 config ARCH_ORION5X
500 bool "Marvell Orion"
501 depends on MMU
502 select CPU_FEROCEON
503 select PCI
504 select ARCH_REQUIRE_GPIOLIB
505 select GENERIC_CLOCKEVENTS
506 select PLAT_ORION
507 help
508 Support for the following Marvell Orion 5x series SoCs:
509 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
510 Orion-2 (5281), Orion-1-90 (6183).
511
512 config ARCH_MMP
513 bool "Marvell PXA168/910/MMP2"
514 depends on MMU
515 select ARCH_REQUIRE_GPIOLIB
516 select COMMON_CLKDEV
517 select GENERIC_CLOCKEVENTS
518 select TICK_ONESHOT
519 select PLAT_PXA
520 select SPARSE_IRQ
521 help
522 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
523
524 config ARCH_KS8695
525 bool "Micrel/Kendin KS8695"
526 select CPU_ARM922T
527 select ARCH_REQUIRE_GPIOLIB
528 select ARCH_USES_GETTIMEOFFSET
529 help
530 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
531 System-on-Chip devices.
532
533 config ARCH_NS9XXX
534 bool "NetSilicon NS9xxx"
535 select CPU_ARM926T
536 select GENERIC_GPIO
537 select GENERIC_CLOCKEVENTS
538 select HAVE_CLK
539 help
540 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
541 System.
542
543 <http://www.digi.com/products/microprocessors/index.jsp>
544
545 config ARCH_W90X900
546 bool "Nuvoton W90X900 CPU"
547 select CPU_ARM926T
548 select ARCH_REQUIRE_GPIOLIB
549 select COMMON_CLKDEV
550 select GENERIC_CLOCKEVENTS
551 help
552 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
553 At present, the w90x900 has been renamed nuc900, regarding
554 the ARM series product line, you can login the following
555 link address to know more.
556
557 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
558 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
559
560 config ARCH_NUC93X
561 bool "Nuvoton NUC93X CPU"
562 select CPU_ARM926T
563 select COMMON_CLKDEV
564 help
565 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
566 low-power and high performance MPEG-4/JPEG multimedia controller chip.
567
568 config ARCH_TEGRA
569 bool "NVIDIA Tegra"
570 select GENERIC_TIME
571 select GENERIC_CLOCKEVENTS
572 select GENERIC_GPIO
573 select HAVE_CLK
574 select COMMON_CLKDEV
575 select ARCH_HAS_BARRIERS if CACHE_L2X0
576 select ARCH_HAS_CPUFREQ
577 help
578 This enables support for NVIDIA Tegra based systems (Tegra APX,
579 Tegra 6xx and Tegra 2 series).
580
581 config ARCH_PNX4008
582 bool "Philips Nexperia PNX4008 Mobile"
583 select CPU_ARM926T
584 select COMMON_CLKDEV
585 select ARCH_USES_GETTIMEOFFSET
586 help
587 This enables support for Philips PNX4008 mobile platform.
588
589 config ARCH_PXA
590 bool "PXA2xx/PXA3xx-based"
591 depends on MMU
592 select ARCH_MTD_XIP
593 select ARCH_HAS_CPUFREQ
594 select COMMON_CLKDEV
595 select ARCH_REQUIRE_GPIOLIB
596 select GENERIC_CLOCKEVENTS
597 select TICK_ONESHOT
598 select PLAT_PXA
599 select SPARSE_IRQ
600 help
601 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
602
603 config ARCH_MSM
604 bool "Qualcomm MSM"
605 select HAVE_CLK
606 select GENERIC_CLOCKEVENTS
607 select ARCH_REQUIRE_GPIOLIB
608 help
609 Support for Qualcomm MSM/QSD based systems. This runs on the
610 apps processor of the MSM/QSD and depends on a shared memory
611 interface to the modem processor which runs the baseband
612 stack and controls some vital subsystems
613 (clock and power control, etc).
614
615 config ARCH_SHMOBILE
616 bool "Renesas SH-Mobile"
617 help
618 Support for Renesas's SH-Mobile ARM platforms
619
620 config ARCH_RPC
621 bool "RiscPC"
622 select ARCH_ACORN
623 select FIQ
624 select TIMER_ACORN
625 select ARCH_MAY_HAVE_PC_FDC
626 select HAVE_PATA_PLATFORM
627 select ISA_DMA_API
628 select NO_IOPORT
629 select ARCH_SPARSEMEM_ENABLE
630 select ARCH_USES_GETTIMEOFFSET
631 help
632 On the Acorn Risc-PC, Linux can support the internal IDE disk and
633 CD-ROM interface, serial and parallel port, and the floppy drive.
634
635 config ARCH_SA1100
636 bool "SA1100-based"
637 select CPU_SA1100
638 select ISA
639 select ARCH_SPARSEMEM_ENABLE
640 select ARCH_MTD_XIP
641 select ARCH_HAS_CPUFREQ
642 select CPU_FREQ
643 select GENERIC_CLOCKEVENTS
644 select HAVE_CLK
645 select TICK_ONESHOT
646 select ARCH_REQUIRE_GPIOLIB
647 help
648 Support for StrongARM 11x0 based boards.
649
650 config ARCH_S3C2410
651 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
652 select GENERIC_GPIO
653 select ARCH_HAS_CPUFREQ
654 select HAVE_CLK
655 select ARCH_USES_GETTIMEOFFSET
656 select HAVE_S3C2410_I2C
657 help
658 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
659 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
660 the Samsung SMDK2410 development board (and derivatives).
661
662 Note, the S3C2416 and the S3C2450 are so close that they even share
663 the same SoC ID code. This means that there is no seperate machine
664 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
665
666 config ARCH_S3C64XX
667 bool "Samsung S3C64XX"
668 select PLAT_SAMSUNG
669 select CPU_V6
670 select ARM_VIC
671 select HAVE_CLK
672 select NO_IOPORT
673 select ARCH_USES_GETTIMEOFFSET
674 select ARCH_HAS_CPUFREQ
675 select ARCH_REQUIRE_GPIOLIB
676 select SAMSUNG_CLKSRC
677 select SAMSUNG_IRQ_VIC_TIMER
678 select SAMSUNG_IRQ_UART
679 select S3C_GPIO_TRACK
680 select S3C_GPIO_PULL_UPDOWN
681 select S3C_GPIO_CFG_S3C24XX
682 select S3C_GPIO_CFG_S3C64XX
683 select S3C_DEV_NAND
684 select USB_ARCH_HAS_OHCI
685 select SAMSUNG_GPIOLIB_4BIT
686 select HAVE_S3C2410_I2C
687 select HAVE_S3C2410_WATCHDOG
688 help
689 Samsung S3C64XX series based systems
690
691 config ARCH_S5P64X0
692 bool "Samsung S5P6440 S5P6450"
693 select CPU_V6
694 select GENERIC_GPIO
695 select HAVE_CLK
696 select HAVE_S3C2410_WATCHDOG
697 select ARCH_USES_GETTIMEOFFSET
698 select HAVE_S3C2410_I2C
699 select HAVE_S3C_RTC
700 help
701 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
702 SMDK6450.
703
704 config ARCH_S5P6442
705 bool "Samsung S5P6442"
706 select CPU_V6
707 select GENERIC_GPIO
708 select HAVE_CLK
709 select ARCH_USES_GETTIMEOFFSET
710 select HAVE_S3C2410_WATCHDOG
711 help
712 Samsung S5P6442 CPU based systems
713
714 config ARCH_S5PC100
715 bool "Samsung S5PC100"
716 select GENERIC_GPIO
717 select HAVE_CLK
718 select CPU_V7
719 select ARM_L1_CACHE_SHIFT_6
720 select ARCH_USES_GETTIMEOFFSET
721 select HAVE_S3C2410_I2C
722 select HAVE_S3C_RTC
723 select HAVE_S3C2410_WATCHDOG
724 help
725 Samsung S5PC100 series based systems
726
727 config ARCH_S5PV210
728 bool "Samsung S5PV210/S5PC110"
729 select CPU_V7
730 select GENERIC_GPIO
731 select HAVE_CLK
732 select ARM_L1_CACHE_SHIFT_6
733 select ARCH_USES_GETTIMEOFFSET
734 select HAVE_S3C2410_I2C
735 select HAVE_S3C_RTC
736 select HAVE_S3C2410_WATCHDOG
737 help
738 Samsung S5PV210/S5PC110 series based systems
739
740 config ARCH_S5PV310
741 bool "Samsung S5PV310/S5PC210"
742 select CPU_V7
743 select GENERIC_GPIO
744 select HAVE_CLK
745 select GENERIC_CLOCKEVENTS
746 help
747 Samsung S5PV310 series based systems
748
749 config ARCH_SHARK
750 bool "Shark"
751 select CPU_SA110
752 select ISA
753 select ISA_DMA
754 select ZONE_DMA
755 select PCI
756 select ARCH_USES_GETTIMEOFFSET
757 help
758 Support for the StrongARM based Digital DNARD machine, also known
759 as "Shark" (<http://www.shark-linux.de/shark.html>).
760
761 config ARCH_TCC_926
762 bool "Telechips TCC ARM926-based systems"
763 select CPU_ARM926T
764 select HAVE_CLK
765 select COMMON_CLKDEV
766 select GENERIC_CLOCKEVENTS
767 help
768 Support for Telechips TCC ARM926-based systems.
769
770 config ARCH_LH7A40X
771 bool "Sharp LH7A40X"
772 select CPU_ARM922T
773 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
774 select ARCH_USES_GETTIMEOFFSET
775 help
776 Say Y here for systems based on one of the Sharp LH7A40X
777 System on a Chip processors. These CPUs include an ARM922T
778 core with a wide array of integrated devices for
779 hand-held and low-power applications.
780
781 config ARCH_U300
782 bool "ST-Ericsson U300 Series"
783 depends on MMU
784 select CPU_ARM926T
785 select HAVE_TCM
786 select ARM_AMBA
787 select ARM_VIC
788 select GENERIC_CLOCKEVENTS
789 select COMMON_CLKDEV
790 select GENERIC_GPIO
791 help
792 Support for ST-Ericsson U300 series mobile platforms.
793
794 config ARCH_U8500
795 bool "ST-Ericsson U8500 Series"
796 select CPU_V7
797 select ARM_AMBA
798 select GENERIC_CLOCKEVENTS
799 select COMMON_CLKDEV
800 select ARCH_REQUIRE_GPIOLIB
801 help
802 Support for ST-Ericsson's Ux500 architecture
803
804 config ARCH_NOMADIK
805 bool "STMicroelectronics Nomadik"
806 select ARM_AMBA
807 select ARM_VIC
808 select CPU_ARM926T
809 select COMMON_CLKDEV
810 select GENERIC_CLOCKEVENTS
811 select ARCH_REQUIRE_GPIOLIB
812 help
813 Support for the Nomadik platform by ST-Ericsson
814
815 config ARCH_DAVINCI
816 bool "TI DaVinci"
817 select GENERIC_CLOCKEVENTS
818 select ARCH_REQUIRE_GPIOLIB
819 select ZONE_DMA
820 select HAVE_IDE
821 select COMMON_CLKDEV
822 select GENERIC_ALLOCATOR
823 select ARCH_HAS_HOLES_MEMORYMODEL
824 help
825 Support for TI's DaVinci platform.
826
827 config ARCH_OMAP
828 bool "TI OMAP"
829 select HAVE_CLK
830 select ARCH_REQUIRE_GPIOLIB
831 select ARCH_HAS_CPUFREQ
832 select GENERIC_CLOCKEVENTS
833 select ARCH_HAS_HOLES_MEMORYMODEL
834 help
835 Support for TI's OMAP platform (OMAP1/2/3/4).
836
837 config PLAT_SPEAR
838 bool "ST SPEAr"
839 select ARM_AMBA
840 select ARCH_REQUIRE_GPIOLIB
841 select COMMON_CLKDEV
842 select GENERIC_CLOCKEVENTS
843 select HAVE_CLK
844 help
845 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
846
847 endchoice
848
849 #
850 # This is sorted alphabetically by mach-* pathname. However, plat-*
851 # Kconfigs may be included either alphabetically (according to the
852 # plat- suffix) or along side the corresponding mach-* source.
853 #
854 source "arch/arm/mach-aaec2000/Kconfig"
855
856 source "arch/arm/mach-at91/Kconfig"
857
858 source "arch/arm/mach-bcmring/Kconfig"
859
860 source "arch/arm/mach-clps711x/Kconfig"
861
862 source "arch/arm/mach-cns3xxx/Kconfig"
863
864 source "arch/arm/mach-davinci/Kconfig"
865
866 source "arch/arm/mach-dove/Kconfig"
867
868 source "arch/arm/mach-ep93xx/Kconfig"
869
870 source "arch/arm/mach-footbridge/Kconfig"
871
872 source "arch/arm/mach-gemini/Kconfig"
873
874 source "arch/arm/mach-h720x/Kconfig"
875
876 source "arch/arm/mach-integrator/Kconfig"
877
878 source "arch/arm/mach-iop32x/Kconfig"
879
880 source "arch/arm/mach-iop33x/Kconfig"
881
882 source "arch/arm/mach-iop13xx/Kconfig"
883
884 source "arch/arm/mach-ixp4xx/Kconfig"
885
886 source "arch/arm/mach-ixp2000/Kconfig"
887
888 source "arch/arm/mach-ixp23xx/Kconfig"
889
890 source "arch/arm/mach-kirkwood/Kconfig"
891
892 source "arch/arm/mach-ks8695/Kconfig"
893
894 source "arch/arm/mach-lh7a40x/Kconfig"
895
896 source "arch/arm/mach-loki/Kconfig"
897
898 source "arch/arm/mach-lpc32xx/Kconfig"
899
900 source "arch/arm/mach-msm/Kconfig"
901
902 source "arch/arm/mach-mv78xx0/Kconfig"
903
904 source "arch/arm/plat-mxc/Kconfig"
905
906 source "arch/arm/mach-netx/Kconfig"
907
908 source "arch/arm/mach-nomadik/Kconfig"
909 source "arch/arm/plat-nomadik/Kconfig"
910
911 source "arch/arm/mach-ns9xxx/Kconfig"
912
913 source "arch/arm/mach-nuc93x/Kconfig"
914
915 source "arch/arm/plat-omap/Kconfig"
916
917 source "arch/arm/mach-omap1/Kconfig"
918
919 source "arch/arm/mach-omap2/Kconfig"
920
921 source "arch/arm/mach-orion5x/Kconfig"
922
923 source "arch/arm/mach-pxa/Kconfig"
924 source "arch/arm/plat-pxa/Kconfig"
925
926 source "arch/arm/mach-mmp/Kconfig"
927
928 source "arch/arm/mach-realview/Kconfig"
929
930 source "arch/arm/mach-sa1100/Kconfig"
931
932 source "arch/arm/plat-samsung/Kconfig"
933 source "arch/arm/plat-s3c24xx/Kconfig"
934 source "arch/arm/plat-s5p/Kconfig"
935
936 source "arch/arm/plat-spear/Kconfig"
937
938 source "arch/arm/plat-tcc/Kconfig"
939
940 if ARCH_S3C2410
941 source "arch/arm/mach-s3c2400/Kconfig"
942 source "arch/arm/mach-s3c2410/Kconfig"
943 source "arch/arm/mach-s3c2412/Kconfig"
944 source "arch/arm/mach-s3c2416/Kconfig"
945 source "arch/arm/mach-s3c2440/Kconfig"
946 source "arch/arm/mach-s3c2443/Kconfig"
947 endif
948
949 if ARCH_S3C64XX
950 source "arch/arm/mach-s3c64xx/Kconfig"
951 endif
952
953 source "arch/arm/mach-s5p64x0/Kconfig"
954
955 source "arch/arm/mach-s5p6442/Kconfig"
956
957 source "arch/arm/mach-s5pc100/Kconfig"
958
959 source "arch/arm/mach-s5pv210/Kconfig"
960
961 source "arch/arm/mach-s5pv310/Kconfig"
962
963 source "arch/arm/mach-shmobile/Kconfig"
964
965 source "arch/arm/plat-stmp3xxx/Kconfig"
966
967 source "arch/arm/mach-tegra/Kconfig"
968
969 source "arch/arm/mach-u300/Kconfig"
970
971 source "arch/arm/mach-ux500/Kconfig"
972
973 source "arch/arm/mach-versatile/Kconfig"
974
975 source "arch/arm/mach-vexpress/Kconfig"
976
977 source "arch/arm/mach-w90x900/Kconfig"
978
979 # Definitions to make life easier
980 config ARCH_ACORN
981 bool
982
983 config PLAT_IOP
984 bool
985 select GENERIC_CLOCKEVENTS
986
987 config PLAT_ORION
988 bool
989
990 config PLAT_PXA
991 bool
992
993 config PLAT_VERSATILE
994 bool
995
996 config ARM_TIMER_SP804
997 bool
998
999 source arch/arm/mm/Kconfig
1000
1001 config IWMMXT
1002 bool "Enable iWMMXt support"
1003 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1004 default y if PXA27x || PXA3xx || ARCH_MMP
1005 help
1006 Enable support for iWMMXt context switching at run time if
1007 running on a CPU that supports it.
1008
1009 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1010 config XSCALE_PMU
1011 bool
1012 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1013 default y
1014
1015 config CPU_HAS_PMU
1016 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1017 (!ARCH_OMAP3 || OMAP3_EMU)
1018 default y
1019 bool
1020
1021 if !MMU
1022 source "arch/arm/Kconfig-nommu"
1023 endif
1024
1025 config ARM_ERRATA_411920
1026 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1027 depends on CPU_V6
1028 help
1029 Invalidation of the Instruction Cache operation can
1030 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1031 It does not affect the MPCore. This option enables the ARM Ltd.
1032 recommended workaround.
1033
1034 config ARM_ERRATA_430973
1035 bool "ARM errata: Stale prediction on replaced interworking branch"
1036 depends on CPU_V7
1037 help
1038 This option enables the workaround for the 430973 Cortex-A8
1039 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1040 interworking branch is replaced with another code sequence at the
1041 same virtual address, whether due to self-modifying code or virtual
1042 to physical address re-mapping, Cortex-A8 does not recover from the
1043 stale interworking branch prediction. This results in Cortex-A8
1044 executing the new code sequence in the incorrect ARM or Thumb state.
1045 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1046 and also flushes the branch target cache at every context switch.
1047 Note that setting specific bits in the ACTLR register may not be
1048 available in non-secure mode.
1049
1050 config ARM_ERRATA_458693
1051 bool "ARM errata: Processor deadlock when a false hazard is created"
1052 depends on CPU_V7
1053 help
1054 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1055 erratum. For very specific sequences of memory operations, it is
1056 possible for a hazard condition intended for a cache line to instead
1057 be incorrectly associated with a different cache line. This false
1058 hazard might then cause a processor deadlock. The workaround enables
1059 the L1 caching of the NEON accesses and disables the PLD instruction
1060 in the ACTLR register. Note that setting specific bits in the ACTLR
1061 register may not be available in non-secure mode.
1062
1063 config ARM_ERRATA_460075
1064 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1065 depends on CPU_V7
1066 help
1067 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1068 erratum. Any asynchronous access to the L2 cache may encounter a
1069 situation in which recent store transactions to the L2 cache are lost
1070 and overwritten with stale memory contents from external memory. The
1071 workaround disables the write-allocate mode for the L2 cache via the
1072 ACTLR register. Note that setting specific bits in the ACTLR register
1073 may not be available in non-secure mode.
1074
1075 config ARM_ERRATA_742230
1076 bool "ARM errata: DMB operation may be faulty"
1077 depends on CPU_V7 && SMP
1078 help
1079 This option enables the workaround for the 742230 Cortex-A9
1080 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1081 between two write operations may not ensure the correct visibility
1082 ordering of the two writes. This workaround sets a specific bit in
1083 the diagnostic register of the Cortex-A9 which causes the DMB
1084 instruction to behave as a DSB, ensuring the correct behaviour of
1085 the two writes.
1086
1087 config ARM_ERRATA_742231
1088 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1089 depends on CPU_V7 && SMP
1090 help
1091 This option enables the workaround for the 742231 Cortex-A9
1092 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1093 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1094 accessing some data located in the same cache line, may get corrupted
1095 data due to bad handling of the address hazard when the line gets
1096 replaced from one of the CPUs at the same time as another CPU is
1097 accessing it. This workaround sets specific bits in the diagnostic
1098 register of the Cortex-A9 which reduces the linefill issuing
1099 capabilities of the processor.
1100
1101 config PL310_ERRATA_588369
1102 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1103 depends on CACHE_L2X0 && ARCH_OMAP4
1104 help
1105 The PL310 L2 cache controller implements three types of Clean &
1106 Invalidate maintenance operations: by Physical Address
1107 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1108 They are architecturally defined to behave as the execution of a
1109 clean operation followed immediately by an invalidate operation,
1110 both performing to the same memory location. This functionality
1111 is not correctly implemented in PL310 as clean lines are not
1112 invalidated as a result of these operations. Note that this errata
1113 uses Texas Instrument's secure monitor api.
1114
1115 config ARM_ERRATA_720789
1116 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1117 depends on CPU_V7 && SMP
1118 help
1119 This option enables the workaround for the 720789 Cortex-A9 (prior to
1120 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1121 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1122 As a consequence of this erratum, some TLB entries which should be
1123 invalidated are not, resulting in an incoherency in the system page
1124 tables. The workaround changes the TLB flushing routines to invalidate
1125 entries regardless of the ASID.
1126
1127 config ARM_ERRATA_743622
1128 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1129 depends on CPU_V7
1130 help
1131 This option enables the workaround for the 743622 Cortex-A9
1132 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1133 optimisation in the Cortex-A9 Store Buffer may lead to data
1134 corruption. This workaround sets a specific bit in the diagnostic
1135 register of the Cortex-A9 which disables the Store Buffer
1136 optimisation, preventing the defect from occurring. This has no
1137 visible impact on the overall performance or power consumption of the
1138 processor.
1139
1140 endmenu
1141
1142 source "arch/arm/common/Kconfig"
1143
1144 menu "Bus support"
1145
1146 config ARM_AMBA
1147 bool
1148
1149 config ISA
1150 bool
1151 help
1152 Find out whether you have ISA slots on your motherboard. ISA is the
1153 name of a bus system, i.e. the way the CPU talks to the other stuff
1154 inside your box. Other bus systems are PCI, EISA, MicroChannel
1155 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1156 newer boards don't support it. If you have ISA, say Y, otherwise N.
1157
1158 # Select ISA DMA controller support
1159 config ISA_DMA
1160 bool
1161 select ISA_DMA_API
1162
1163 # Select ISA DMA interface
1164 config ISA_DMA_API
1165 bool
1166
1167 config PCI
1168 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1169 help
1170 Find out whether you have a PCI motherboard. PCI is the name of a
1171 bus system, i.e. the way the CPU talks to the other stuff inside
1172 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1173 VESA. If you have PCI, say Y, otherwise N.
1174
1175 config PCI_DOMAINS
1176 bool
1177 depends on PCI
1178
1179 config PCI_SYSCALL
1180 def_bool PCI
1181
1182 # Select the host bridge type
1183 config PCI_HOST_VIA82C505
1184 bool
1185 depends on PCI && ARCH_SHARK
1186 default y
1187
1188 config PCI_HOST_ITE8152
1189 bool
1190 depends on PCI && MACH_ARMCORE
1191 default y
1192 select DMABOUNCE
1193
1194 source "drivers/pci/Kconfig"
1195
1196 source "drivers/pcmcia/Kconfig"
1197
1198 endmenu
1199
1200 menu "Kernel Features"
1201
1202 source "kernel/time/Kconfig"
1203
1204 config SMP
1205 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1206 depends on EXPERIMENTAL
1207 depends on GENERIC_CLOCKEVENTS
1208 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1209 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1210 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1211 select USE_GENERIC_SMP_HELPERS
1212 select HAVE_ARM_SCU
1213 help
1214 This enables support for systems with more than one CPU. If you have
1215 a system with only one CPU, like most personal computers, say N. If
1216 you have a system with more than one CPU, say Y.
1217
1218 If you say N here, the kernel will run on single and multiprocessor
1219 machines, but will use only one CPU of a multiprocessor machine. If
1220 you say Y here, the kernel will run on many, but not all, single
1221 processor machines. On a single processor machine, the kernel will
1222 run faster if you say N here.
1223
1224 See also <file:Documentation/i386/IO-APIC.txt>,
1225 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1226 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1227
1228 If you don't know what to do here, say N.
1229
1230 config SMP_ON_UP
1231 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1232 depends on EXPERIMENTAL
1233 depends on SMP && !XIP && !THUMB2_KERNEL
1234 default y
1235 help
1236 SMP kernels contain instructions which fail on non-SMP processors.
1237 Enabling this option allows the kernel to modify itself to make
1238 these instructions safe. Disabling it allows about 1K of space
1239 savings.
1240
1241 If you don't know what to do here, say Y.
1242
1243 config HAVE_ARM_SCU
1244 bool
1245 depends on SMP
1246 help
1247 This option enables support for the ARM system coherency unit
1248
1249 config HAVE_ARM_TWD
1250 bool
1251 depends on SMP
1252 help
1253 This options enables support for the ARM timer and watchdog unit
1254
1255 choice
1256 prompt "Memory split"
1257 default VMSPLIT_3G
1258 help
1259 Select the desired split between kernel and user memory.
1260
1261 If you are not absolutely sure what you are doing, leave this
1262 option alone!
1263
1264 config VMSPLIT_3G
1265 bool "3G/1G user/kernel split"
1266 config VMSPLIT_2G
1267 bool "2G/2G user/kernel split"
1268 config VMSPLIT_1G
1269 bool "1G/3G user/kernel split"
1270 endchoice
1271
1272 config PAGE_OFFSET
1273 hex
1274 default 0x40000000 if VMSPLIT_1G
1275 default 0x80000000 if VMSPLIT_2G
1276 default 0xC0000000
1277
1278 config NR_CPUS
1279 int "Maximum number of CPUs (2-32)"
1280 range 2 32
1281 depends on SMP
1282 default "4"
1283
1284 config HOTPLUG_CPU
1285 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1286 depends on SMP && HOTPLUG && EXPERIMENTAL
1287 help
1288 Say Y here to experiment with turning CPUs off and on. CPUs
1289 can be controlled through /sys/devices/system/cpu.
1290
1291 config LOCAL_TIMERS
1292 bool "Use local timer interrupts"
1293 depends on SMP
1294 default y
1295 select HAVE_ARM_TWD
1296 help
1297 Enable support for local timers on SMP platforms, rather then the
1298 legacy IPI broadcast method. Local timers allows the system
1299 accounting to be spread across the timer interval, preventing a
1300 "thundering herd" at every timer tick.
1301
1302 source kernel/Kconfig.preempt
1303
1304 config HZ
1305 int
1306 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1307 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1308 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1309 default AT91_TIMER_HZ if ARCH_AT91
1310 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1311 default 100
1312
1313 config THUMB2_KERNEL
1314 bool "Compile the kernel in Thumb-2 mode"
1315 depends on CPU_V7 && EXPERIMENTAL
1316 select AEABI
1317 select ARM_ASM_UNIFIED
1318 help
1319 By enabling this option, the kernel will be compiled in
1320 Thumb-2 mode. A compiler/assembler that understand the unified
1321 ARM-Thumb syntax is needed.
1322
1323 If unsure, say N.
1324
1325 config ARM_ASM_UNIFIED
1326 bool
1327
1328 config AEABI
1329 bool "Use the ARM EABI to compile the kernel"
1330 help
1331 This option allows for the kernel to be compiled using the latest
1332 ARM ABI (aka EABI). This is only useful if you are using a user
1333 space environment that is also compiled with EABI.
1334
1335 Since there are major incompatibilities between the legacy ABI and
1336 EABI, especially with regard to structure member alignment, this
1337 option also changes the kernel syscall calling convention to
1338 disambiguate both ABIs and allow for backward compatibility support
1339 (selected with CONFIG_OABI_COMPAT).
1340
1341 To use this you need GCC version 4.0.0 or later.
1342
1343 config OABI_COMPAT
1344 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1345 depends on AEABI && EXPERIMENTAL
1346 default y
1347 help
1348 This option preserves the old syscall interface along with the
1349 new (ARM EABI) one. It also provides a compatibility layer to
1350 intercept syscalls that have structure arguments which layout
1351 in memory differs between the legacy ABI and the new ARM EABI
1352 (only for non "thumb" binaries). This option adds a tiny
1353 overhead to all syscalls and produces a slightly larger kernel.
1354 If you know you'll be using only pure EABI user space then you
1355 can say N here. If this option is not selected and you attempt
1356 to execute a legacy ABI binary then the result will be
1357 UNPREDICTABLE (in fact it can be predicted that it won't work
1358 at all). If in doubt say Y.
1359
1360 config ARCH_HAS_HOLES_MEMORYMODEL
1361 bool
1362
1363 config ARCH_SPARSEMEM_ENABLE
1364 bool
1365
1366 config ARCH_SPARSEMEM_DEFAULT
1367 def_bool ARCH_SPARSEMEM_ENABLE
1368
1369 config ARCH_SELECT_MEMORY_MODEL
1370 def_bool ARCH_SPARSEMEM_ENABLE
1371
1372 config HIGHMEM
1373 bool "High Memory Support (EXPERIMENTAL)"
1374 depends on MMU && EXPERIMENTAL
1375 help
1376 The address space of ARM processors is only 4 Gigabytes large
1377 and it has to accommodate user address space, kernel address
1378 space as well as some memory mapped IO. That means that, if you
1379 have a large amount of physical memory and/or IO, not all of the
1380 memory can be "permanently mapped" by the kernel. The physical
1381 memory that is not permanently mapped is called "high memory".
1382
1383 Depending on the selected kernel/user memory split, minimum
1384 vmalloc space and actual amount of RAM, you may not need this
1385 option which should result in a slightly faster kernel.
1386
1387 If unsure, say n.
1388
1389 config HIGHPTE
1390 bool "Allocate 2nd-level pagetables from highmem"
1391 depends on HIGHMEM
1392 depends on !OUTER_CACHE
1393
1394 config HW_PERF_EVENTS
1395 bool "Enable hardware performance counter support for perf events"
1396 depends on PERF_EVENTS && CPU_HAS_PMU
1397 default y
1398 help
1399 Enable hardware performance counter support for perf events. If
1400 disabled, perf events will use software events only.
1401
1402 config SPARSE_IRQ
1403 def_bool n
1404 help
1405 This enables support for sparse irqs. This is useful in general
1406 as most CPUs have a fairly sparse array of IRQ vectors, which
1407 the irq_desc then maps directly on to. Systems with a high
1408 number of off-chip IRQs will want to treat this as
1409 experimental until they have been independently verified.
1410
1411 source "mm/Kconfig"
1412
1413 config FORCE_MAX_ZONEORDER
1414 int "Maximum zone order" if ARCH_SHMOBILE
1415 range 11 64 if ARCH_SHMOBILE
1416 default "9" if SA1111
1417 default "11"
1418 help
1419 The kernel memory allocator divides physically contiguous memory
1420 blocks into "zones", where each zone is a power of two number of
1421 pages. This option selects the largest power of two that the kernel
1422 keeps in the memory allocator. If you need to allocate very large
1423 blocks of physically contiguous memory, then you may need to
1424 increase this value.
1425
1426 This config option is actually maximum order plus one. For example,
1427 a value of 11 means that the largest free memory block is 2^10 pages.
1428
1429 config LEDS
1430 bool "Timer and CPU usage LEDs"
1431 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1432 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1433 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1434 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1435 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1436 ARCH_AT91 || ARCH_DAVINCI || \
1437 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1438 help
1439 If you say Y here, the LEDs on your machine will be used
1440 to provide useful information about your current system status.
1441
1442 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1443 be able to select which LEDs are active using the options below. If
1444 you are compiling a kernel for the EBSA-110 or the LART however, the
1445 red LED will simply flash regularly to indicate that the system is
1446 still functional. It is safe to say Y here if you have a CATS
1447 system, but the driver will do nothing.
1448
1449 config LEDS_TIMER
1450 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1451 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1452 || MACH_OMAP_PERSEUS2
1453 depends on LEDS
1454 depends on !GENERIC_CLOCKEVENTS
1455 default y if ARCH_EBSA110
1456 help
1457 If you say Y here, one of the system LEDs (the green one on the
1458 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1459 will flash regularly to indicate that the system is still
1460 operational. This is mainly useful to kernel hackers who are
1461 debugging unstable kernels.
1462
1463 The LART uses the same LED for both Timer LED and CPU usage LED
1464 functions. You may choose to use both, but the Timer LED function
1465 will overrule the CPU usage LED.
1466
1467 config LEDS_CPU
1468 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1469 !ARCH_OMAP) \
1470 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1471 || MACH_OMAP_PERSEUS2
1472 depends on LEDS
1473 help
1474 If you say Y here, the red LED will be used to give a good real
1475 time indication of CPU usage, by lighting whenever the idle task
1476 is not currently executing.
1477
1478 The LART uses the same LED for both Timer LED and CPU usage LED
1479 functions. You may choose to use both, but the Timer LED function
1480 will overrule the CPU usage LED.
1481
1482 config ALIGNMENT_TRAP
1483 bool
1484 depends on CPU_CP15_MMU
1485 default y if !ARCH_EBSA110
1486 select HAVE_PROC_CPU if PROC_FS
1487 help
1488 ARM processors cannot fetch/store information which is not
1489 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1490 address divisible by 4. On 32-bit ARM processors, these non-aligned
1491 fetch/store instructions will be emulated in software if you say
1492 here, which has a severe performance impact. This is necessary for
1493 correct operation of some network protocols. With an IP-only
1494 configuration it is safe to say N, otherwise say Y.
1495
1496 config UACCESS_WITH_MEMCPY
1497 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1498 depends on MMU && EXPERIMENTAL
1499 default y if CPU_FEROCEON
1500 help
1501 Implement faster copy_to_user and clear_user methods for CPU
1502 cores where a 8-word STM instruction give significantly higher
1503 memory write throughput than a sequence of individual 32bit stores.
1504
1505 A possible side effect is a slight increase in scheduling latency
1506 between threads sharing the same address space if they invoke
1507 such copy operations with large buffers.
1508
1509 However, if the CPU data cache is using a write-allocate mode,
1510 this option is unlikely to provide any performance gain.
1511
1512 config SECCOMP
1513 bool
1514 prompt "Enable seccomp to safely compute untrusted bytecode"
1515 ---help---
1516 This kernel feature is useful for number crunching applications
1517 that may need to compute untrusted bytecode during their
1518 execution. By using pipes or other transports made available to
1519 the process as file descriptors supporting the read/write
1520 syscalls, it's possible to isolate those applications in
1521 their own address space using seccomp. Once seccomp is
1522 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1523 and the task is only allowed to execute a few safe syscalls
1524 defined by each seccomp mode.
1525
1526 config CC_STACKPROTECTOR
1527 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1528 help
1529 This option turns on the -fstack-protector GCC feature. This
1530 feature puts, at the beginning of functions, a canary value on
1531 the stack just before the return address, and validates
1532 the value just before actually returning. Stack based buffer
1533 overflows (that need to overwrite this return address) now also
1534 overwrite the canary, which gets detected and the attack is then
1535 neutralized via a kernel panic.
1536 This feature requires gcc version 4.2 or above.
1537
1538 config DEPRECATED_PARAM_STRUCT
1539 bool "Provide old way to pass kernel parameters"
1540 help
1541 This was deprecated in 2001 and announced to live on for 5 years.
1542 Some old boot loaders still use this way.
1543
1544 endmenu
1545
1546 menu "Boot options"
1547
1548 # Compressed boot loader in ROM. Yes, we really want to ask about
1549 # TEXT and BSS so we preserve their values in the config files.
1550 config ZBOOT_ROM_TEXT
1551 hex "Compressed ROM boot loader base address"
1552 default "0"
1553 help
1554 The physical address at which the ROM-able zImage is to be
1555 placed in the target. Platforms which normally make use of
1556 ROM-able zImage formats normally set this to a suitable
1557 value in their defconfig file.
1558
1559 If ZBOOT_ROM is not enabled, this has no effect.
1560
1561 config ZBOOT_ROM_BSS
1562 hex "Compressed ROM boot loader BSS address"
1563 default "0"
1564 help
1565 The base address of an area of read/write memory in the target
1566 for the ROM-able zImage which must be available while the
1567 decompressor is running. It must be large enough to hold the
1568 entire decompressed kernel plus an additional 128 KiB.
1569 Platforms which normally make use of ROM-able zImage formats
1570 normally set this to a suitable value in their defconfig file.
1571
1572 If ZBOOT_ROM is not enabled, this has no effect.
1573
1574 config ZBOOT_ROM
1575 bool "Compressed boot loader in ROM/flash"
1576 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1577 help
1578 Say Y here if you intend to execute your compressed kernel image
1579 (zImage) directly from ROM or flash. If unsure, say N.
1580
1581 config CMDLINE
1582 string "Default kernel command string"
1583 default ""
1584 help
1585 On some architectures (EBSA110 and CATS), there is currently no way
1586 for the boot loader to pass arguments to the kernel. For these
1587 architectures, you should supply some command-line options at build
1588 time by entering them here. As a minimum, you should specify the
1589 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1590
1591 config CMDLINE_FORCE
1592 bool "Always use the default kernel command string"
1593 depends on CMDLINE != ""
1594 help
1595 Always use the default kernel command string, even if the boot
1596 loader passes other arguments to the kernel.
1597 This is useful if you cannot or don't want to change the
1598 command-line options your boot loader passes to the kernel.
1599
1600 If unsure, say N.
1601
1602 config XIP_KERNEL
1603 bool "Kernel Execute-In-Place from ROM"
1604 depends on !ZBOOT_ROM
1605 help
1606 Execute-In-Place allows the kernel to run from non-volatile storage
1607 directly addressable by the CPU, such as NOR flash. This saves RAM
1608 space since the text section of the kernel is not loaded from flash
1609 to RAM. Read-write sections, such as the data section and stack,
1610 are still copied to RAM. The XIP kernel is not compressed since
1611 it has to run directly from flash, so it will take more space to
1612 store it. The flash address used to link the kernel object files,
1613 and for storing it, is configuration dependent. Therefore, if you
1614 say Y here, you must know the proper physical address where to
1615 store the kernel image depending on your own flash memory usage.
1616
1617 Also note that the make target becomes "make xipImage" rather than
1618 "make zImage" or "make Image". The final kernel binary to put in
1619 ROM memory will be arch/arm/boot/xipImage.
1620
1621 If unsure, say N.
1622
1623 config XIP_PHYS_ADDR
1624 hex "XIP Kernel Physical Location"
1625 depends on XIP_KERNEL
1626 default "0x00080000"
1627 help
1628 This is the physical address in your flash memory the kernel will
1629 be linked for and stored to. This address is dependent on your
1630 own flash usage.
1631
1632 config KEXEC
1633 bool "Kexec system call (EXPERIMENTAL)"
1634 depends on EXPERIMENTAL
1635 help
1636 kexec is a system call that implements the ability to shutdown your
1637 current kernel, and to start another kernel. It is like a reboot
1638 but it is independent of the system firmware. And like a reboot
1639 you can start any kernel with it, not just Linux.
1640
1641 It is an ongoing process to be certain the hardware in a machine
1642 is properly shutdown, so do not be surprised if this code does not
1643 initially work for you. It may help to enable device hotplugging
1644 support.
1645
1646 config ATAGS_PROC
1647 bool "Export atags in procfs"
1648 depends on KEXEC
1649 default y
1650 help
1651 Should the atags used to boot the kernel be exported in an "atags"
1652 file in procfs. Useful with kexec.
1653
1654 config AUTO_ZRELADDR
1655 bool "Auto calculation of the decompressed kernel image address"
1656 depends on !ZBOOT_ROM && !ARCH_U300
1657 help
1658 ZRELADDR is the physical address where the decompressed kernel
1659 image will be placed. If AUTO_ZRELADDR is selected, the address
1660 will be determined at run-time by masking the current IP with
1661 0xf8000000. This assumes the zImage being placed in the first 128MB
1662 from start of memory.
1663
1664 endmenu
1665
1666 menu "CPU Power Management"
1667
1668 if ARCH_HAS_CPUFREQ
1669
1670 source "drivers/cpufreq/Kconfig"
1671
1672 config CPU_FREQ_SA1100
1673 bool
1674
1675 config CPU_FREQ_SA1110
1676 bool
1677
1678 config CPU_FREQ_INTEGRATOR
1679 tristate "CPUfreq driver for ARM Integrator CPUs"
1680 depends on ARCH_INTEGRATOR && CPU_FREQ
1681 default y
1682 help
1683 This enables the CPUfreq driver for ARM Integrator CPUs.
1684
1685 For details, take a look at <file:Documentation/cpu-freq>.
1686
1687 If in doubt, say Y.
1688
1689 config CPU_FREQ_PXA
1690 bool
1691 depends on CPU_FREQ && ARCH_PXA && PXA25x
1692 default y
1693 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1694
1695 config CPU_FREQ_S3C64XX
1696 bool "CPUfreq support for Samsung S3C64XX CPUs"
1697 depends on CPU_FREQ && CPU_S3C6410
1698
1699 config CPU_FREQ_S3C
1700 bool
1701 help
1702 Internal configuration node for common cpufreq on Samsung SoC
1703
1704 config CPU_FREQ_S3C24XX
1705 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1706 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1707 select CPU_FREQ_S3C
1708 help
1709 This enables the CPUfreq driver for the Samsung S3C24XX family
1710 of CPUs.
1711
1712 For details, take a look at <file:Documentation/cpu-freq>.
1713
1714 If in doubt, say N.
1715
1716 config CPU_FREQ_S3C24XX_PLL
1717 bool "Support CPUfreq changing of PLL frequency"
1718 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1719 help
1720 Compile in support for changing the PLL frequency from the
1721 S3C24XX series CPUfreq driver. The PLL takes time to settle
1722 after a frequency change, so by default it is not enabled.
1723
1724 This also means that the PLL tables for the selected CPU(s) will
1725 be built which may increase the size of the kernel image.
1726
1727 config CPU_FREQ_S3C24XX_DEBUG
1728 bool "Debug CPUfreq Samsung driver core"
1729 depends on CPU_FREQ_S3C24XX
1730 help
1731 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1732
1733 config CPU_FREQ_S3C24XX_IODEBUG
1734 bool "Debug CPUfreq Samsung driver IO timing"
1735 depends on CPU_FREQ_S3C24XX
1736 help
1737 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1738
1739 config CPU_FREQ_S3C24XX_DEBUGFS
1740 bool "Export debugfs for CPUFreq"
1741 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1742 help
1743 Export status information via debugfs.
1744
1745 endif
1746
1747 source "drivers/cpuidle/Kconfig"
1748
1749 endmenu
1750
1751 menu "Floating point emulation"
1752
1753 comment "At least one emulation must be selected"
1754
1755 config FPE_NWFPE
1756 bool "NWFPE math emulation"
1757 depends on !AEABI || OABI_COMPAT
1758 ---help---
1759 Say Y to include the NWFPE floating point emulator in the kernel.
1760 This is necessary to run most binaries. Linux does not currently
1761 support floating point hardware so you need to say Y here even if
1762 your machine has an FPA or floating point co-processor podule.
1763
1764 You may say N here if you are going to load the Acorn FPEmulator
1765 early in the bootup.
1766
1767 config FPE_NWFPE_XP
1768 bool "Support extended precision"
1769 depends on FPE_NWFPE
1770 help
1771 Say Y to include 80-bit support in the kernel floating-point
1772 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1773 Note that gcc does not generate 80-bit operations by default,
1774 so in most cases this option only enlarges the size of the
1775 floating point emulator without any good reason.
1776
1777 You almost surely want to say N here.
1778
1779 config FPE_FASTFPE
1780 bool "FastFPE math emulation (EXPERIMENTAL)"
1781 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1782 ---help---
1783 Say Y here to include the FAST floating point emulator in the kernel.
1784 This is an experimental much faster emulator which now also has full
1785 precision for the mantissa. It does not support any exceptions.
1786 It is very simple, and approximately 3-6 times faster than NWFPE.
1787
1788 It should be sufficient for most programs. It may be not suitable
1789 for scientific calculations, but you have to check this for yourself.
1790 If you do not feel you need a faster FP emulation you should better
1791 choose NWFPE.
1792
1793 config VFP
1794 bool "VFP-format floating point maths"
1795 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1796 help
1797 Say Y to include VFP support code in the kernel. This is needed
1798 if your hardware includes a VFP unit.
1799
1800 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1801 release notes and additional status information.
1802
1803 Say N if your target does not have VFP hardware.
1804
1805 config VFPv3
1806 bool
1807 depends on VFP
1808 default y if CPU_V7
1809
1810 config NEON
1811 bool "Advanced SIMD (NEON) Extension support"
1812 depends on VFPv3 && CPU_V7
1813 help
1814 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1815 Extension.
1816
1817 endmenu
1818
1819 menu "Userspace binary formats"
1820
1821 source "fs/Kconfig.binfmt"
1822
1823 config ARTHUR
1824 tristate "RISC OS personality"
1825 depends on !AEABI
1826 help
1827 Say Y here to include the kernel code necessary if you want to run
1828 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1829 experimental; if this sounds frightening, say N and sleep in peace.
1830 You can also say M here to compile this support as a module (which
1831 will be called arthur).
1832
1833 endmenu
1834
1835 menu "Power management options"
1836
1837 source "kernel/power/Kconfig"
1838
1839 config ARCH_SUSPEND_POSSIBLE
1840 def_bool y
1841
1842 endmenu
1843
1844 source "net/Kconfig"
1845
1846 source "drivers/Kconfig"
1847
1848 source "fs/Kconfig"
1849
1850 source "arch/arm/Kconfig.debug"
1851
1852 source "security/Kconfig"
1853
1854 source "crypto/Kconfig"
1855
1856 source "lib/Kconfig"