arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         select CPU_PM if (SUSPEND || CPU_IDLE)
  33         help
  34           The ARM series is a line of low-power-consumption RISC chip designs
  35           licensed by ARM Ltd and targeted at embedded applications and
  36           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  37           manufactured, but legacy ARM-based PC hardware remains popular in
  38           Europe.  There is an ARM Linux project with a web page at
  39           <http://www.arm.linux.org.uk/>.
  40
  41 config ARM_HAS_SG_CHAIN
  42         bool
  43
  44 config HAVE_PWM
  45         bool
  46
  47 config MIGHT_HAVE_PCI
  48         bool
  49
  50 config SYS_SUPPORTS_APM_EMULATION
  51         bool
  52
  53 config HAVE_SCHED_CLOCK
  54         bool
  55
  56 config GENERIC_GPIO
  57         bool
  58
  59 config ARCH_USES_GETTIMEOFFSET
  60         bool
  61         default n
  62
  63 config GENERIC_CLOCKEVENTS
  64         bool
  65
  66 config GENERIC_CLOCKEVENTS_BROADCAST
  67         bool
  68         depends on GENERIC_CLOCKEVENTS
  69         default y if SMP
  70
  71 config KTIME_SCALAR
  72         bool
  73         default y
  74
  75 config HAVE_TCM
  76         bool
  77         select GENERIC_ALLOCATOR
  78
  79 config HAVE_PROC_CPU
  80         bool
  81
  82 config NO_IOPORT
  83         bool
  84
  85 config EISA
  86         bool
  87         ---help---
  88           The Extended Industry Standard Architecture (EISA) bus was
  89           developed as an open alternative to the IBM MicroChannel bus.
  90
  91           The EISA bus provided some of the features of the IBM MicroChannel
  92           bus while maintaining backward compatibility with cards made for
  93           the older ISA bus.  The EISA bus saw limited use between 1988 and
  94           1995 when it was made obsolete by the PCI bus.
  95
  96           Say Y here if you are building a kernel for an EISA-based machine.
  97
  98           Otherwise, say N.
  99
 100 config SBUS
 101         bool
 102
 103 config MCA
 104         bool
 105         help
 106           MicroChannel Architecture is found in some IBM PS/2 machines and
 107           laptops.  It is a bus system similar to PCI or ISA. See
 108           <file:Documentation/mca.txt> (and especially the web page given
 109           there) before attempting to build an MCA bus kernel.
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config HARDIRQS_SW_RESEND
 129         bool
 130         default y
 131
 132 config GENERIC_IRQ_PROBE
 133         bool
 134         default y
 135
 136 config GENERIC_LOCKBREAK
 137         bool
 138         default y
 139         depends on SMP && PREEMPT
 140
 141 config RWSEM_GENERIC_SPINLOCK
 142         bool
 143         default y
 144
 145 config RWSEM_XCHGADD_ALGORITHM
 146         bool
 147
 148 config ARCH_HAS_ILOG2_U32
 149         bool
 150
 151 config ARCH_HAS_ILOG2_U64
 152         bool
 153
 154 config ARCH_HAS_CPUFREQ
 155         bool
 156         help
 157           Internal node to signify that the ARCH has CPUFREQ support
 158           and that the relevant menu configurations are displayed for
 159           it.
 160
 161 config ARCH_HAS_CPU_IDLE_WAIT
 162        def_bool y
 163
 164 config GENERIC_HWEIGHT
 165         bool
 166         default y
 167
 168 config GENERIC_CALIBRATE_DELAY
 169         bool
 170         default y
 171
 172 config ARCH_MAY_HAVE_PC_FDC
 173         bool
 174
 175 config ZONE_DMA
 176         bool
 177
 178 config NEED_DMA_MAP_STATE
 179        def_bool y
 180
 181 config GENERIC_ISA_DMA
 182         bool
 183
 184 config FIQ
 185         bool
 186
 187 config ARCH_MTD_XIP
 188         bool
 189
 190 config VECTORS_BASE
 191         hex
 192         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 193         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 194         default 0x00000000
 195         help
 196           The base address of exception vectors.
 197
 198 config ARM_PATCH_PHYS_VIRT
 199         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 200         default y
 201         depends on !XIP_KERNEL && MMU
 202         depends on !ARCH_REALVIEW || !SPARSEMEM
 203         help
 204           Patch phys-to-virt and virt-to-phys translation functions at
 205           boot and module load time according to the position of the
 206           kernel in system memory.
 207
 208           This can only be used with non-XIP MMU kernels where the base
 209           of physical memory is at a 16MB boundary.
 210
 211           Only disable this option if you know that you do not require
 212           this feature (eg, building a kernel for a single machine) and
 213           you need to shrink the kernel to the minimal size.
 214
 215 config NEED_MACH_MEMORY_H
 216         bool
 217         help
 218           Select this when mach/memory.h is required to provide special
 219           definitions for this platform.  The need for mach/memory.h should
 220           be avoided when possible.
 221
 222 config PHYS_OFFSET
 223         hex "Physical address of main memory"
 224         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 225         help
 226           Please provide the physical address corresponding to the
 227           location of main memory in your system.
 228
 229 config GENERIC_BUG
 230         def_bool y
 231         depends on BUG
 232
 233 source "init/Kconfig"
 234
 235 source "kernel/Kconfig.freezer"
 236
 237 menu "System Type"
 238
 239 config MMU
 240         bool "MMU-based Paged Memory Management Support"
 241         default y
 242         help
 243           Select if you want MMU-based virtualised addressing space
 244           support by paged memory management. If unsure, say 'Y'.
 245
 246 #
 247 # The "ARM system type" choice list is ordered alphabetically by option
 248 # text.  Please add new entries in the option alphabetic order.
 249 #
 250 choice
 251         prompt "ARM system type"
 252         default ARCH_VERSATILE
 253
 254 config ARCH_INTEGRATOR
 255         bool "ARM Ltd. Integrator family"
 256         select ARM_AMBA
 257         select ARCH_HAS_CPUFREQ
 258         select CLKDEV_LOOKUP
 259         select HAVE_MACH_CLKDEV
 260         select ICST
 261         select GENERIC_CLOCKEVENTS
 262         select PLAT_VERSATILE
 263         select PLAT_VERSATILE_FPGA_IRQ
 264         select NEED_MACH_MEMORY_H
 265         help
 266           Support for ARM's Integrator platform.
 267
 268 config ARCH_REALVIEW
 269         bool "ARM Ltd. RealView family"
 270         select ARM_AMBA
 271         select CLKDEV_LOOKUP
 272         select HAVE_MACH_CLKDEV
 273         select ICST
 274         select GENERIC_CLOCKEVENTS
 275         select ARCH_WANT_OPTIONAL_GPIOLIB
 276         select PLAT_VERSATILE
 277         select PLAT_VERSATILE_CLCD
 278         select ARM_TIMER_SP804
 279         select GPIO_PL061 if GPIOLIB
 280         select NEED_MACH_MEMORY_H
 281         help
 282           This enables support for ARM Ltd RealView boards.
 283
 284 config ARCH_VERSATILE
 285         bool "ARM Ltd. Versatile family"
 286         select ARM_AMBA
 287         select ARM_VIC
 288         select CLKDEV_LOOKUP
 289         select HAVE_MACH_CLKDEV
 290         select ICST
 291         select GENERIC_CLOCKEVENTS
 292         select ARCH_WANT_OPTIONAL_GPIOLIB
 293         select PLAT_VERSATILE
 294         select PLAT_VERSATILE_CLCD
 295         select PLAT_VERSATILE_FPGA_IRQ
 296         select ARM_TIMER_SP804
 297         help
 298           This enables support for ARM Ltd Versatile board.
 299
 300 config ARCH_VEXPRESS
 301         bool "ARM Ltd. Versatile Express family"
 302         select ARCH_WANT_OPTIONAL_GPIOLIB
 303         select ARM_AMBA
 304         select ARM_TIMER_SP804
 305         select CLKDEV_LOOKUP
 306         select HAVE_MACH_CLKDEV
 307         select GENERIC_CLOCKEVENTS
 308         select HAVE_CLK
 309         select HAVE_PATA_PLATFORM
 310         select ICST
 311         select PLAT_VERSATILE
 312         select PLAT_VERSATILE_CLCD
 313         help
 314           This enables support for the ARM Ltd Versatile Express boards.
 315
 316 config ARCH_AT91
 317         bool "Atmel AT91"
 318         select ARCH_REQUIRE_GPIOLIB
 319         select HAVE_CLK
 320         select CLKDEV_LOOKUP
 321         help
 322           This enables support for systems based on the Atmel AT91RM9200,
 323           AT91SAM9 and AT91CAP9 processors.
 324
 325 config ARCH_BCMRING
 326         bool "Broadcom BCMRING"
 327         depends on MMU
 328         select CPU_V6
 329         select ARM_AMBA
 330         select ARM_TIMER_SP804
 331         select CLKDEV_LOOKUP
 332         select GENERIC_CLOCKEVENTS
 333         select ARCH_WANT_OPTIONAL_GPIOLIB
 334         help
 335           Support for Broadcom's BCMRing platform.
 336
 337 config ARCH_HIGHBANK
 338         bool "Calxeda Highbank-based"
 339         select ARCH_WANT_OPTIONAL_GPIOLIB
 340         select ARM_AMBA
 341         select ARM_GIC
 342         select ARM_TIMER_SP804
 343         select CLKDEV_LOOKUP
 344         select CPU_V7
 345         select GENERIC_CLOCKEVENTS
 346         select HAVE_ARM_SCU
 347         select USE_OF
 348         help
 349           Support for the Calxeda Highbank SoC based boards.
 350
 351 config ARCH_CLPS711X
 352         bool "Cirrus Logic CLPS711x/EP721x-based"
 353         select CPU_ARM720T
 354         select ARCH_USES_GETTIMEOFFSET
 355         select NEED_MACH_MEMORY_H
 356         help
 357           Support for Cirrus Logic 711x/721x based boards.
 358
 359 config ARCH_CNS3XXX
 360         bool "Cavium Networks CNS3XXX family"
 361         select CPU_V6K
 362         select GENERIC_CLOCKEVENTS
 363         select ARM_GIC
 364         select MIGHT_HAVE_PCI
 365         select PCI_DOMAINS if PCI
 366         help
 367           Support for Cavium Networks CNS3XXX platform.
 368
 369 config ARCH_GEMINI
 370         bool "Cortina Systems Gemini"
 371         select CPU_FA526
 372         select ARCH_REQUIRE_GPIOLIB
 373         select ARCH_USES_GETTIMEOFFSET
 374         help
 375           Support for the Cortina Systems Gemini family SoCs
 376
 377 config ARCH_PRIMA2
 378         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 379         select CPU_V7
 380         select NO_IOPORT
 381         select GENERIC_CLOCKEVENTS
 382         select CLKDEV_LOOKUP
 383         select GENERIC_IRQ_CHIP
 384         select USE_OF
 385         select ZONE_DMA
 386         help
 387           Support for CSR SiRFSoC ARM Cortex A9 Platform
 388
 389 config ARCH_EBSA110
 390         bool "EBSA-110"
 391         select CPU_SA110
 392         select ISA
 393         select NO_IOPORT
 394         select ARCH_USES_GETTIMEOFFSET
 395         select NEED_MACH_MEMORY_H
 396         help
 397           This is an evaluation board for the StrongARM processor available
 398           from Digital. It has limited hardware on-board, including an
 399           Ethernet interface, two PCMCIA sockets, two serial ports and a
 400           parallel port.
 401
 402 config ARCH_EP93XX
 403         bool "EP93xx-based"
 404         select CPU_ARM920T
 405         select ARM_AMBA
 406         select ARM_VIC
 407         select CLKDEV_LOOKUP
 408         select ARCH_REQUIRE_GPIOLIB
 409         select ARCH_HAS_HOLES_MEMORYMODEL
 410         select ARCH_USES_GETTIMEOFFSET
 411         select NEED_MACH_MEMORY_H
 412         help
 413           This enables support for the Cirrus EP93xx series of CPUs.
 414
 415 config ARCH_FOOTBRIDGE
 416         bool "FootBridge"
 417         select CPU_SA110
 418         select FOOTBRIDGE
 419         select GENERIC_CLOCKEVENTS
 420         select HAVE_IDE
 421         select NEED_MACH_MEMORY_H
 422         help
 423           Support for systems based on the DC21285 companion chip
 424           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 425
 426 config ARCH_MXC
 427         bool "Freescale MXC/iMX-based"
 428         select GENERIC_CLOCKEVENTS
 429         select ARCH_REQUIRE_GPIOLIB
 430         select CLKDEV_LOOKUP
 431         select CLKSRC_MMIO
 432         select GENERIC_IRQ_CHIP
 433         select HAVE_SCHED_CLOCK
 434         select MULTI_IRQ_HANDLER
 435         help
 436           Support for Freescale MXC/iMX-based family of processors
 437
 438 config ARCH_MXS
 439         bool "Freescale MXS-based"
 440         select GENERIC_CLOCKEVENTS
 441         select ARCH_REQUIRE_GPIOLIB
 442         select CLKDEV_LOOKUP
 443         select CLKSRC_MMIO
 444         help
 445           Support for Freescale MXS-based family of processors
 446
 447 config ARCH_NETX
 448         bool "Hilscher NetX based"
 449         select CLKSRC_MMIO
 450         select CPU_ARM926T
 451         select ARM_VIC
 452         select GENERIC_CLOCKEVENTS
 453         help
 454           This enables support for systems based on the Hilscher NetX Soc
 455
 456 config ARCH_H720X
 457         bool "Hynix HMS720x-based"
 458         select CPU_ARM720T
 459         select ISA_DMA_API
 460         select ARCH_USES_GETTIMEOFFSET
 461         help
 462           This enables support for systems based on the Hynix HMS720x
 463
 464 config ARCH_IOP13XX
 465         bool "IOP13xx-based"
 466         depends on MMU
 467         select CPU_XSC3
 468         select PLAT_IOP
 469         select PCI
 470         select ARCH_SUPPORTS_MSI
 471         select VMSPLIT_1G
 472         select NEED_MACH_MEMORY_H
 473         help
 474           Support for Intel's IOP13XX (XScale) family of processors.
 475
 476 config ARCH_IOP32X
 477         bool "IOP32x-based"
 478         depends on MMU
 479         select CPU_XSCALE
 480         select PLAT_IOP
 481         select PCI
 482         select ARCH_REQUIRE_GPIOLIB
 483         help
 484           Support for Intel's 80219 and IOP32X (XScale) family of
 485           processors.
 486
 487 config ARCH_IOP33X
 488         bool "IOP33x-based"
 489         depends on MMU
 490         select CPU_XSCALE
 491         select PLAT_IOP
 492         select PCI
 493         select ARCH_REQUIRE_GPIOLIB
 494         help
 495           Support for Intel's IOP33X (XScale) family of processors.
 496
 497 config ARCH_IXP23XX
 498         bool "IXP23XX-based"
 499         depends on MMU
 500         select CPU_XSC3
 501         select PCI
 502         select ARCH_USES_GETTIMEOFFSET
 503         select NEED_MACH_MEMORY_H
 504         help
 505           Support for Intel's IXP23xx (XScale) family of processors.
 506
 507 config ARCH_IXP2000
 508         bool "IXP2400/2800-based"
 509         depends on MMU
 510         select CPU_XSCALE
 511         select PCI
 512         select ARCH_USES_GETTIMEOFFSET
 513         select NEED_MACH_MEMORY_H
 514         help
 515           Support for Intel's IXP2400/2800 (XScale) family of processors.
 516
 517 config ARCH_IXP4XX
 518         bool "IXP4xx-based"
 519         depends on MMU
 520         select CLKSRC_MMIO
 521         select CPU_XSCALE
 522         select GENERIC_GPIO
 523         select GENERIC_CLOCKEVENTS
 524         select HAVE_SCHED_CLOCK
 525         select MIGHT_HAVE_PCI
 526         select DMABOUNCE if PCI
 527         help
 528           Support for Intel's IXP4XX (XScale) family of processors.
 529
 530 config ARCH_DOVE
 531         bool "Marvell Dove"
 532         select CPU_V7
 533         select PCI
 534         select ARCH_REQUIRE_GPIOLIB
 535         select GENERIC_CLOCKEVENTS
 536         select PLAT_ORION
 537         help
 538           Support for the Marvell Dove SoC 88AP510
 539
 540 config ARCH_KIRKWOOD
 541         bool "Marvell Kirkwood"
 542         select CPU_FEROCEON
 543         select PCI
 544         select ARCH_REQUIRE_GPIOLIB
 545         select GENERIC_CLOCKEVENTS
 546         select PLAT_ORION
 547         help
 548           Support for the following Marvell Kirkwood series SoCs:
 549           88F6180, 88F6192 and 88F6281.
 550
 551 config ARCH_LPC32XX
 552         bool "NXP LPC32XX"
 553         select CLKSRC_MMIO
 554         select CPU_ARM926T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select HAVE_IDE
 557         select ARM_AMBA
 558         select USB_ARCH_HAS_OHCI
 559         select CLKDEV_LOOKUP
 560         select GENERIC_CLOCKEVENTS
 561         help
 562           Support for the NXP LPC32XX family of processors
 563
 564 config ARCH_MV78XX0
 565         bool "Marvell MV78xx0"
 566         select CPU_FEROCEON
 567         select PCI
 568         select ARCH_REQUIRE_GPIOLIB
 569         select GENERIC_CLOCKEVENTS
 570         select PLAT_ORION
 571         help
 572           Support for the following Marvell MV78xx0 series SoCs:
 573           MV781x0, MV782x0.
 574
 575 config ARCH_ORION5X
 576         bool "Marvell Orion"
 577         depends on MMU
 578         select CPU_FEROCEON
 579         select PCI
 580         select ARCH_REQUIRE_GPIOLIB
 581         select GENERIC_CLOCKEVENTS
 582         select PLAT_ORION
 583         help
 584           Support for the following Marvell Orion 5x series SoCs:
 585           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 586           Orion-2 (5281), Orion-1-90 (6183).
 587
 588 config ARCH_MMP
 589         bool "Marvell PXA168/910/MMP2"
 590         depends on MMU
 591         select ARCH_REQUIRE_GPIOLIB
 592         select CLKDEV_LOOKUP
 593         select GENERIC_CLOCKEVENTS
 594         select HAVE_SCHED_CLOCK
 595         select TICK_ONESHOT
 596         select PLAT_PXA
 597         select SPARSE_IRQ
 598         help
 599           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 600
 601 config ARCH_KS8695
 602         bool "Micrel/Kendin KS8695"
 603         select CPU_ARM922T
 604         select ARCH_REQUIRE_GPIOLIB
 605         select ARCH_USES_GETTIMEOFFSET
 606         select NEED_MACH_MEMORY_H
 607         help
 608           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 609           System-on-Chip devices.
 610
 611 config ARCH_W90X900
 612         bool "Nuvoton W90X900 CPU"
 613         select CPU_ARM926T
 614         select ARCH_REQUIRE_GPIOLIB
 615         select CLKDEV_LOOKUP
 616         select CLKSRC_MMIO
 617         select GENERIC_CLOCKEVENTS
 618         help
 619           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 620           At present, the w90x900 has been renamed nuc900, regarding
 621           the ARM series product line, you can login the following
 622           link address to know more.
 623
 624           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 625                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 626
 627 config ARCH_TEGRA
 628         bool "NVIDIA Tegra"
 629         select CLKDEV_LOOKUP
 630         select CLKSRC_MMIO
 631         select GENERIC_CLOCKEVENTS
 632         select GENERIC_GPIO
 633         select HAVE_CLK
 634         select HAVE_SCHED_CLOCK
 635         select ARCH_HAS_CPUFREQ
 636         help
 637           This enables support for NVIDIA Tegra based systems (Tegra APX,
 638           Tegra 6xx and Tegra 2 series).
 639
 640 config ARCH_PICOXCELL
 641         bool "Picochip picoXcell"
 642         select ARCH_REQUIRE_GPIOLIB
 643         select ARM_PATCH_PHYS_VIRT
 644         select ARM_VIC
 645         select CPU_V6K
 646         select DW_APB_TIMER
 647         select GENERIC_CLOCKEVENTS
 648         select GENERIC_GPIO
 649         select HAVE_SCHED_CLOCK
 650         select HAVE_TCM
 651         select NO_IOPORT
 652         select USE_OF
 653         help
 654           This enables support for systems based on the Picochip picoXcell
 655           family of Femtocell devices.  The picoxcell support requires device tree
 656           for all boards.
 657
 658 config ARCH_PNX4008
 659         bool "Philips Nexperia PNX4008 Mobile"
 660         select CPU_ARM926T
 661         select CLKDEV_LOOKUP
 662         select ARCH_USES_GETTIMEOFFSET
 663         help
 664           This enables support for Philips PNX4008 mobile platform.
 665
 666 config ARCH_PXA
 667         bool "PXA2xx/PXA3xx-based"
 668         depends on MMU
 669         select ARCH_MTD_XIP
 670         select ARCH_HAS_CPUFREQ
 671         select CLKDEV_LOOKUP
 672         select CLKSRC_MMIO
 673         select ARCH_REQUIRE_GPIOLIB
 674         select GENERIC_CLOCKEVENTS
 675         select HAVE_SCHED_CLOCK
 676         select TICK_ONESHOT
 677         select PLAT_PXA
 678         select SPARSE_IRQ
 679         select AUTO_ZRELADDR
 680         select MULTI_IRQ_HANDLER
 681         select ARM_CPU_SUSPEND if PM
 682         select HAVE_IDE
 683         help
 684           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 685
 686 config ARCH_MSM
 687         bool "Qualcomm MSM"
 688         select HAVE_CLK
 689         select GENERIC_CLOCKEVENTS
 690         select ARCH_REQUIRE_GPIOLIB
 691         select CLKDEV_LOOKUP
 692         help
 693           Support for Qualcomm MSM/QSD based systems.  This runs on the
 694           apps processor of the MSM/QSD and depends on a shared memory
 695           interface to the modem processor which runs the baseband
 696           stack and controls some vital subsystems
 697           (clock and power control, etc).
 698
 699 config ARCH_SHMOBILE
 700         bool "Renesas SH-Mobile / R-Mobile"
 701         select HAVE_CLK
 702         select CLKDEV_LOOKUP
 703         select HAVE_MACH_CLKDEV
 704         select GENERIC_CLOCKEVENTS
 705         select NO_IOPORT
 706         select SPARSE_IRQ
 707         select MULTI_IRQ_HANDLER
 708         select PM_GENERIC_DOMAINS if PM
 709         select NEED_MACH_MEMORY_H
 710         help
 711           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 712
 713 config ARCH_RPC
 714         bool "RiscPC"
 715         select ARCH_ACORN
 716         select FIQ
 717         select TIMER_ACORN
 718         select ARCH_MAY_HAVE_PC_FDC
 719         select HAVE_PATA_PLATFORM
 720         select ISA_DMA_API
 721         select NO_IOPORT
 722         select ARCH_SPARSEMEM_ENABLE
 723         select ARCH_USES_GETTIMEOFFSET
 724         select HAVE_IDE
 725         select NEED_MACH_MEMORY_H
 726         help
 727           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 728           CD-ROM interface, serial and parallel port, and the floppy drive.
 729
 730 config ARCH_SA1100
 731         bool "SA1100-based"
 732         select CLKSRC_MMIO
 733         select CPU_SA1100
 734         select ISA
 735         select ARCH_SPARSEMEM_ENABLE
 736         select ARCH_MTD_XIP
 737         select ARCH_HAS_CPUFREQ
 738         select CPU_FREQ
 739         select GENERIC_CLOCKEVENTS
 740         select HAVE_CLK
 741         select HAVE_SCHED_CLOCK
 742         select TICK_ONESHOT
 743         select ARCH_REQUIRE_GPIOLIB
 744         select HAVE_IDE
 745         select NEED_MACH_MEMORY_H
 746         help
 747           Support for StrongARM 11x0 based boards.
 748
 749 config ARCH_S3C2410
 750         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 751         select GENERIC_GPIO
 752         select ARCH_HAS_CPUFREQ
 753         select HAVE_CLK
 754         select CLKDEV_LOOKUP
 755         select ARCH_USES_GETTIMEOFFSET
 756         select HAVE_S3C2410_I2C if I2C
 757         help
 758           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 759           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 760           the Samsung SMDK2410 development board (and derivatives).
 761
 762           Note, the S3C2416 and the S3C2450 are so close that they even share
 763           the same SoC ID code. This means that there is no separate machine
 764           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 765
 766 config ARCH_S3C64XX
 767         bool "Samsung S3C64XX"
 768         select PLAT_SAMSUNG
 769         select CPU_V6
 770         select ARM_VIC
 771         select HAVE_CLK
 772         select CLKDEV_LOOKUP
 773         select NO_IOPORT
 774         select ARCH_USES_GETTIMEOFFSET
 775         select ARCH_HAS_CPUFREQ
 776         select ARCH_REQUIRE_GPIOLIB
 777         select SAMSUNG_CLKSRC
 778         select SAMSUNG_IRQ_VIC_TIMER
 779         select S3C_GPIO_TRACK
 780         select S3C_DEV_NAND
 781         select USB_ARCH_HAS_OHCI
 782         select SAMSUNG_GPIOLIB_4BIT
 783         select HAVE_S3C2410_I2C if I2C
 784         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 785         help
 786           Samsung S3C64XX series based systems
 787
 788 config ARCH_S5P64X0
 789         bool "Samsung S5P6440 S5P6450"
 790         select CPU_V6
 791         select GENERIC_GPIO
 792         select HAVE_CLK
 793         select CLKDEV_LOOKUP
 794         select CLKSRC_MMIO
 795         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 796         select GENERIC_CLOCKEVENTS
 797         select HAVE_SCHED_CLOCK
 798         select HAVE_S3C2410_I2C if I2C
 799         select HAVE_S3C_RTC if RTC_CLASS
 800         help
 801           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 802           SMDK6450.
 803
 804 config ARCH_S5PC100
 805         bool "Samsung S5PC100"
 806         select GENERIC_GPIO
 807         select HAVE_CLK
 808         select CLKDEV_LOOKUP
 809         select CPU_V7
 810         select ARM_L1_CACHE_SHIFT_6
 811         select ARCH_USES_GETTIMEOFFSET
 812         select HAVE_S3C2410_I2C if I2C
 813         select HAVE_S3C_RTC if RTC_CLASS
 814         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 815         help
 816           Samsung S5PC100 series based systems
 817
 818 config ARCH_S5PV210
 819         bool "Samsung S5PV210/S5PC110"
 820         select CPU_V7
 821         select ARCH_SPARSEMEM_ENABLE
 822         select ARCH_HAS_HOLES_MEMORYMODEL
 823         select GENERIC_GPIO
 824         select HAVE_CLK
 825         select CLKDEV_LOOKUP
 826         select CLKSRC_MMIO
 827         select ARM_L1_CACHE_SHIFT_6
 828         select ARCH_HAS_CPUFREQ
 829         select GENERIC_CLOCKEVENTS
 830         select HAVE_SCHED_CLOCK
 831         select HAVE_S3C2410_I2C if I2C
 832         select HAVE_S3C_RTC if RTC_CLASS
 833         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 834         select NEED_MACH_MEMORY_H
 835         help
 836           Samsung S5PV210/S5PC110 series based systems
 837
 838 config ARCH_EXYNOS4
 839         bool "Samsung EXYNOS4"
 840         select CPU_V7
 841         select ARCH_SPARSEMEM_ENABLE
 842         select ARCH_HAS_HOLES_MEMORYMODEL
 843         select GENERIC_GPIO
 844         select HAVE_CLK
 845         select CLKDEV_LOOKUP
 846         select ARCH_HAS_CPUFREQ
 847         select GENERIC_CLOCKEVENTS
 848         select HAVE_S3C_RTC if RTC_CLASS
 849         select HAVE_S3C2410_I2C if I2C
 850         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 851         select NEED_MACH_MEMORY_H
 852         help
 853           Samsung EXYNOS4 series based systems
 854
 855 config ARCH_SHARK
 856         bool "Shark"
 857         select CPU_SA110
 858         select ISA
 859         select ISA_DMA
 860         select ZONE_DMA
 861         select PCI
 862         select ARCH_USES_GETTIMEOFFSET
 863         select NEED_MACH_MEMORY_H
 864         help
 865           Support for the StrongARM based Digital DNARD machine, also known
 866           as "Shark" (<http://www.shark-linux.de/shark.html>).
 867
 868 config ARCH_TCC_926
 869         bool "Telechips TCC ARM926-based systems"
 870         select CLKSRC_MMIO
 871         select CPU_ARM926T
 872         select HAVE_CLK
 873         select CLKDEV_LOOKUP
 874         select GENERIC_CLOCKEVENTS
 875         help
 876           Support for Telechips TCC ARM926-based systems.
 877
 878 config ARCH_U300
 879         bool "ST-Ericsson U300 Series"
 880         depends on MMU
 881         select CLKSRC_MMIO
 882         select CPU_ARM926T
 883         select HAVE_SCHED_CLOCK
 884         select HAVE_TCM
 885         select ARM_AMBA
 886         select ARM_PATCH_PHYS_VIRT
 887         select ARM_VIC
 888         select GENERIC_CLOCKEVENTS
 889         select CLKDEV_LOOKUP
 890         select HAVE_MACH_CLKDEV
 891         select GENERIC_GPIO
 892         select ARCH_REQUIRE_GPIOLIB
 893         select NEED_MACH_MEMORY_H
 894         help
 895           Support for ST-Ericsson U300 series mobile platforms.
 896
 897 config ARCH_U8500
 898         bool "ST-Ericsson U8500 Series"
 899         select CPU_V7
 900         select ARM_AMBA
 901         select GENERIC_CLOCKEVENTS
 902         select CLKDEV_LOOKUP
 903         select ARCH_REQUIRE_GPIOLIB
 904         select ARCH_HAS_CPUFREQ
 905         help
 906           Support for ST-Ericsson's Ux500 architecture
 907
 908 config ARCH_NOMADIK
 909         bool "STMicroelectronics Nomadik"
 910         select ARM_AMBA
 911         select ARM_VIC
 912         select CPU_ARM926T
 913         select CLKDEV_LOOKUP
 914         select GENERIC_CLOCKEVENTS
 915         select ARCH_REQUIRE_GPIOLIB
 916         help
 917           Support for the Nomadik platform by ST-Ericsson
 918
 919 config ARCH_DAVINCI
 920         bool "TI DaVinci"
 921         select GENERIC_CLOCKEVENTS
 922         select ARCH_REQUIRE_GPIOLIB
 923         select ZONE_DMA
 924         select HAVE_IDE
 925         select CLKDEV_LOOKUP
 926         select GENERIC_ALLOCATOR
 927         select GENERIC_IRQ_CHIP
 928         select ARCH_HAS_HOLES_MEMORYMODEL
 929         help
 930           Support for TI's DaVinci platform.
 931
 932 config ARCH_OMAP
 933         bool "TI OMAP"
 934         select HAVE_CLK
 935         select ARCH_REQUIRE_GPIOLIB
 936         select ARCH_HAS_CPUFREQ
 937         select CLKSRC_MMIO
 938         select GENERIC_CLOCKEVENTS
 939         select HAVE_SCHED_CLOCK
 940         select ARCH_HAS_HOLES_MEMORYMODEL
 941         help
 942           Support for TI's OMAP platform (OMAP1/2/3/4).
 943
 944 config PLAT_SPEAR
 945         bool "ST SPEAr"
 946         select ARM_AMBA
 947         select ARCH_REQUIRE_GPIOLIB
 948         select CLKDEV_LOOKUP
 949         select CLKSRC_MMIO
 950         select GENERIC_CLOCKEVENTS
 951         select HAVE_CLK
 952         help
 953           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 954
 955 config ARCH_VT8500
 956         bool "VIA/WonderMedia 85xx"
 957         select CPU_ARM926T
 958         select GENERIC_GPIO
 959         select ARCH_HAS_CPUFREQ
 960         select GENERIC_CLOCKEVENTS
 961         select ARCH_REQUIRE_GPIOLIB
 962         select HAVE_PWM
 963         help
 964           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 965
 966 config ARCH_ZYNQ
 967         bool "Xilinx Zynq ARM Cortex A9 Platform"
 968         select CPU_V7
 969         select GENERIC_CLOCKEVENTS
 970         select CLKDEV_LOOKUP
 971         select ARM_GIC
 972         select ARM_AMBA
 973         select ICST
 974         select USE_OF
 975         help
 976           Support for Xilinx Zynq ARM Cortex A9 Platform
 977 endchoice
 978
 979 #
 980 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 981 # Kconfigs may be included either alphabetically (according to the
 982 # plat- suffix) or along side the corresponding mach-* source.
 983 #
 984 source "arch/arm/mach-at91/Kconfig"
 985
 986 source "arch/arm/mach-bcmring/Kconfig"
 987
 988 source "arch/arm/mach-clps711x/Kconfig"
 989
 990 source "arch/arm/mach-cns3xxx/Kconfig"
 991
 992 source "arch/arm/mach-davinci/Kconfig"
 993
 994 source "arch/arm/mach-dove/Kconfig"
 995
 996 source "arch/arm/mach-ep93xx/Kconfig"
 997
 998 source "arch/arm/mach-footbridge/Kconfig"
 999
1000 source "arch/arm/mach-gemini/Kconfig"
1001
1002 source "arch/arm/mach-h720x/Kconfig"
1003
1004 source "arch/arm/mach-integrator/Kconfig"
1005
1006 source "arch/arm/mach-iop32x/Kconfig"
1007
1008 source "arch/arm/mach-iop33x/Kconfig"
1009
1010 source "arch/arm/mach-iop13xx/Kconfig"
1011
1012 source "arch/arm/mach-ixp4xx/Kconfig"
1013
1014 source "arch/arm/mach-ixp2000/Kconfig"
1015
1016 source "arch/arm/mach-ixp23xx/Kconfig"
1017
1018 source "arch/arm/mach-kirkwood/Kconfig"
1019
1020 source "arch/arm/mach-ks8695/Kconfig"
1021
1022 source "arch/arm/mach-lpc32xx/Kconfig"
1023
1024 source "arch/arm/mach-msm/Kconfig"
1025
1026 source "arch/arm/mach-mv78xx0/Kconfig"
1027
1028 source "arch/arm/plat-mxc/Kconfig"
1029
1030 source "arch/arm/mach-mxs/Kconfig"
1031
1032 source "arch/arm/mach-netx/Kconfig"
1033
1034 source "arch/arm/mach-nomadik/Kconfig"
1035 source "arch/arm/plat-nomadik/Kconfig"
1036
1037 source "arch/arm/plat-omap/Kconfig"
1038
1039 source "arch/arm/mach-omap1/Kconfig"
1040
1041 source "arch/arm/mach-omap2/Kconfig"
1042
1043 source "arch/arm/mach-orion5x/Kconfig"
1044
1045 source "arch/arm/mach-pxa/Kconfig"
1046 source "arch/arm/plat-pxa/Kconfig"
1047
1048 source "arch/arm/mach-mmp/Kconfig"
1049
1050 source "arch/arm/mach-realview/Kconfig"
1051
1052 source "arch/arm/mach-sa1100/Kconfig"
1053
1054 source "arch/arm/plat-samsung/Kconfig"
1055 source "arch/arm/plat-s3c24xx/Kconfig"
1056 source "arch/arm/plat-s5p/Kconfig"
1057
1058 source "arch/arm/plat-spear/Kconfig"
1059
1060 source "arch/arm/plat-tcc/Kconfig"
1061
1062 if ARCH_S3C2410
1063 source "arch/arm/mach-s3c2410/Kconfig"
1064 source "arch/arm/mach-s3c2412/Kconfig"
1065 source "arch/arm/mach-s3c2416/Kconfig"
1066 source "arch/arm/mach-s3c2440/Kconfig"
1067 source "arch/arm/mach-s3c2443/Kconfig"
1068 endif
1069
1070 if ARCH_S3C64XX
1071 source "arch/arm/mach-s3c64xx/Kconfig"
1072 endif
1073
1074 source "arch/arm/mach-s5p64x0/Kconfig"
1075
1076 source "arch/arm/mach-s5pc100/Kconfig"
1077
1078 source "arch/arm/mach-s5pv210/Kconfig"
1079
1080 source "arch/arm/mach-exynos4/Kconfig"
1081
1082 source "arch/arm/mach-shmobile/Kconfig"
1083
1084 source "arch/arm/mach-tegra/Kconfig"
1085
1086 source "arch/arm/mach-u300/Kconfig"
1087
1088 source "arch/arm/mach-ux500/Kconfig"
1089
1090 source "arch/arm/mach-versatile/Kconfig"
1091
1092 source "arch/arm/mach-vexpress/Kconfig"
1093 source "arch/arm/plat-versatile/Kconfig"
1094
1095 source "arch/arm/mach-vt8500/Kconfig"
1096
1097 source "arch/arm/mach-w90x900/Kconfig"
1098
1099 # Definitions to make life easier
1100 config ARCH_ACORN
1101         bool
1102
1103 config PLAT_IOP
1104         bool
1105         select GENERIC_CLOCKEVENTS
1106         select HAVE_SCHED_CLOCK
1107
1108 config PLAT_ORION
1109         bool
1110         select CLKSRC_MMIO
1111         select GENERIC_IRQ_CHIP
1112         select HAVE_SCHED_CLOCK
1113
1114 config PLAT_PXA
1115         bool
1116
1117 config PLAT_VERSATILE
1118         bool
1119
1120 config ARM_TIMER_SP804
1121         bool
1122         select CLKSRC_MMIO
1123
1124 source arch/arm/mm/Kconfig
1125
1126 config IWMMXT
1127         bool "Enable iWMMXt support"
1128         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1129         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1130         help
1131           Enable support for iWMMXt context switching at run time if
1132           running on a CPU that supports it.
1133
1134 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1135 config XSCALE_PMU
1136         bool
1137         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1138         default y
1139
1140 config CPU_HAS_PMU
1141         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1142                    (!ARCH_OMAP3 || OMAP3_EMU)
1143         default y
1144         bool
1145
1146 config MULTI_IRQ_HANDLER
1147         bool
1148         help
1149           Allow each machine to specify it's own IRQ handler at run time.
1150
1151 if !MMU
1152 source "arch/arm/Kconfig-nommu"
1153 endif
1154
1155 config ARM_ERRATA_411920
1156         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1157         depends on CPU_V6 || CPU_V6K
1158         help
1159           Invalidation of the Instruction Cache operation can
1160           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1161           It does not affect the MPCore. This option enables the ARM Ltd.
1162           recommended workaround.
1163
1164 config ARM_ERRATA_430973
1165         bool "ARM errata: Stale prediction on replaced interworking branch"
1166         depends on CPU_V7
1167         help
1168           This option enables the workaround for the 430973 Cortex-A8
1169           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1170           interworking branch is replaced with another code sequence at the
1171           same virtual address, whether due to self-modifying code or virtual
1172           to physical address re-mapping, Cortex-A8 does not recover from the
1173           stale interworking branch prediction. This results in Cortex-A8
1174           executing the new code sequence in the incorrect ARM or Thumb state.
1175           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1176           and also flushes the branch target cache at every context switch.
1177           Note that setting specific bits in the ACTLR register may not be
1178           available in non-secure mode.
1179
1180 config ARM_ERRATA_458693
1181         bool "ARM errata: Processor deadlock when a false hazard is created"
1182         depends on CPU_V7
1183         help
1184           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1185           erratum. For very specific sequences of memory operations, it is
1186           possible for a hazard condition intended for a cache line to instead
1187           be incorrectly associated with a different cache line. This false
1188           hazard might then cause a processor deadlock. The workaround enables
1189           the L1 caching of the NEON accesses and disables the PLD instruction
1190           in the ACTLR register. Note that setting specific bits in the ACTLR
1191           register may not be available in non-secure mode.
1192
1193 config ARM_ERRATA_460075
1194         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1195         depends on CPU_V7
1196         help
1197           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1198           erratum. Any asynchronous access to the L2 cache may encounter a
1199           situation in which recent store transactions to the L2 cache are lost
1200           and overwritten with stale memory contents from external memory. The
1201           workaround disables the write-allocate mode for the L2 cache via the
1202           ACTLR register. Note that setting specific bits in the ACTLR register
1203           may not be available in non-secure mode.
1204
1205 config ARM_ERRATA_742230
1206         bool "ARM errata: DMB operation may be faulty"
1207         depends on CPU_V7 && SMP
1208         help
1209           This option enables the workaround for the 742230 Cortex-A9
1210           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1211           between two write operations may not ensure the correct visibility
1212           ordering of the two writes. This workaround sets a specific bit in
1213           the diagnostic register of the Cortex-A9 which causes the DMB
1214           instruction to behave as a DSB, ensuring the correct behaviour of
1215           the two writes.
1216
1217 config ARM_ERRATA_742231
1218         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1219         depends on CPU_V7 && SMP
1220         help
1221           This option enables the workaround for the 742231 Cortex-A9
1222           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1223           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1224           accessing some data located in the same cache line, may get corrupted
1225           data due to bad handling of the address hazard when the line gets
1226           replaced from one of the CPUs at the same time as another CPU is
1227           accessing it. This workaround sets specific bits in the diagnostic
1228           register of the Cortex-A9 which reduces the linefill issuing
1229           capabilities of the processor.
1230
1231 config PL310_ERRATA_588369
1232         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1233         depends on CACHE_L2X0
1234         help
1235            The PL310 L2 cache controller implements three types of Clean &
1236            Invalidate maintenance operations: by Physical Address
1237            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1238            They are architecturally defined to behave as the execution of a
1239            clean operation followed immediately by an invalidate operation,
1240            both performing to the same memory location. This functionality
1241            is not correctly implemented in PL310 as clean lines are not
1242            invalidated as a result of these operations.
1243
1244 config ARM_ERRATA_720789
1245         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1246         depends on CPU_V7 && SMP
1247         help
1248           This option enables the workaround for the 720789 Cortex-A9 (prior to
1249           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1250           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1251           As a consequence of this erratum, some TLB entries which should be
1252           invalidated are not, resulting in an incoherency in the system page
1253           tables. The workaround changes the TLB flushing routines to invalidate
1254           entries regardless of the ASID.
1255
1256 config PL310_ERRATA_727915
1257         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1258         depends on CACHE_L2X0
1259         help
1260           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1261           operation (offset 0x7FC). This operation runs in background so that
1262           PL310 can handle normal accesses while it is in progress. Under very
1263           rare circumstances, due to this erratum, write data can be lost when
1264           PL310 treats a cacheable write transaction during a Clean &
1265           Invalidate by Way operation.
1266
1267 config ARM_ERRATA_743622
1268         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1269         depends on CPU_V7
1270         help
1271           This option enables the workaround for the 743622 Cortex-A9
1272           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1273           optimisation in the Cortex-A9 Store Buffer may lead to data
1274           corruption. This workaround sets a specific bit in the diagnostic
1275           register of the Cortex-A9 which disables the Store Buffer
1276           optimisation, preventing the defect from occurring. This has no
1277           visible impact on the overall performance or power consumption of the
1278           processor.
1279
1280 config ARM_ERRATA_751472
1281         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1282         depends on CPU_V7 && SMP
1283         help
1284           This option enables the workaround for the 751472 Cortex-A9 (prior
1285           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1286           completion of a following broadcasted operation if the second
1287           operation is received by a CPU before the ICIALLUIS has completed,
1288           potentially leading to corrupted entries in the cache or TLB.
1289
1290 config ARM_ERRATA_753970
1291         bool "ARM errata: cache sync operation may be faulty"
1292         depends on CACHE_PL310
1293         help
1294           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1295
1296           Under some condition the effect of cache sync operation on
1297           the store buffer still remains when the operation completes.
1298           This means that the store buffer is always asked to drain and
1299           this prevents it from merging any further writes. The workaround
1300           is to replace the normal offset of cache sync operation (0x730)
1301           by another offset targeting an unmapped PL310 register 0x740.
1302           This has the same effect as the cache sync operation: store buffer
1303           drain and waiting for all buffers empty.
1304
1305 config ARM_ERRATA_754322
1306         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1307         depends on CPU_V7
1308         help
1309           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1310           r3p*) erratum. A speculative memory access may cause a page table walk
1311           which starts prior to an ASID switch but completes afterwards. This
1312           can populate the micro-TLB with a stale entry which may be hit with
1313           the new ASID. This workaround places two dsb instructions in the mm
1314           switching code so that no page table walks can cross the ASID switch.
1315
1316 config ARM_ERRATA_754327
1317         bool "ARM errata: no automatic Store Buffer drain"
1318         depends on CPU_V7 && SMP
1319         help
1320           This option enables the workaround for the 754327 Cortex-A9 (prior to
1321           r2p0) erratum. The Store Buffer does not have any automatic draining
1322           mechanism and therefore a livelock may occur if an external agent
1323           continuously polls a memory location waiting to observe an update.
1324           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1325           written polling loops from denying visibility of updates to memory.
1326
1327 config ARM_ERRATA_364296
1328         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1329         depends on CPU_V6 && !SMP
1330         help
1331           This options enables the workaround for the 364296 ARM1136
1332           r0p2 erratum (possible cache data corruption with
1333           hit-under-miss enabled). It sets the undocumented bit 31 in
1334           the auxiliary control register and the FI bit in the control
1335           register, thus disabling hit-under-miss without putting the
1336           processor into full low interrupt latency mode. ARM11MPCore
1337           is not affected.
1338
1339 config ARM_ERRATA_764369
1340         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1341         depends on CPU_V7 && SMP
1342         help
1343           This option enables the workaround for erratum 764369
1344           affecting Cortex-A9 MPCore with two or more processors (all
1345           current revisions). Under certain timing circumstances, a data
1346           cache line maintenance operation by MVA targeting an Inner
1347           Shareable memory region may fail to proceed up to either the
1348           Point of Coherency or to the Point of Unification of the
1349           system. This workaround adds a DSB instruction before the
1350           relevant cache maintenance functions and sets a specific bit
1351           in the diagnostic control register of the SCU.
1352
1353 endmenu
1354
1355 source "arch/arm/common/Kconfig"
1356
1357 menu "Bus support"
1358
1359 config ARM_AMBA
1360         bool
1361
1362 config ISA
1363         bool
1364         help
1365           Find out whether you have ISA slots on your motherboard.  ISA is the
1366           name of a bus system, i.e. the way the CPU talks to the other stuff
1367           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1368           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1369           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1370
1371 # Select ISA DMA controller support
1372 config ISA_DMA
1373         bool
1374         select ISA_DMA_API
1375
1376 # Select ISA DMA interface
1377 config ISA_DMA_API
1378         bool
1379
1380 config PCI
1381         bool "PCI support" if MIGHT_HAVE_PCI
1382         help
1383           Find out whether you have a PCI motherboard. PCI is the name of a
1384           bus system, i.e. the way the CPU talks to the other stuff inside
1385           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1386           VESA. If you have PCI, say Y, otherwise N.
1387
1388 config PCI_DOMAINS
1389         bool
1390         depends on PCI
1391
1392 config PCI_NANOENGINE
1393         bool "BSE nanoEngine PCI support"
1394         depends on SA1100_NANOENGINE
1395         help
1396           Enable PCI on the BSE nanoEngine board.
1397
1398 config PCI_SYSCALL
1399         def_bool PCI
1400
1401 # Select the host bridge type
1402 config PCI_HOST_VIA82C505
1403         bool
1404         depends on PCI && ARCH_SHARK
1405         default y
1406
1407 config PCI_HOST_ITE8152
1408         bool
1409         depends on PCI && MACH_ARMCORE
1410         default y
1411         select DMABOUNCE
1412
1413 source "drivers/pci/Kconfig"
1414
1415 source "drivers/pcmcia/Kconfig"
1416
1417 endmenu
1418
1419 menu "Kernel Features"
1420
1421 source "kernel/time/Kconfig"
1422
1423 config SMP
1424         bool "Symmetric Multi-Processing"
1425         depends on CPU_V6K || CPU_V7
1426         depends on GENERIC_CLOCKEVENTS
1427         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1428                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1429                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1430                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
1431         depends on MMU
1432         select USE_GENERIC_SMP_HELPERS
1433         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1434         help
1435           This enables support for systems with more than one CPU. If you have
1436           a system with only one CPU, like most personal computers, say N. If
1437           you have a system with more than one CPU, say Y.
1438
1439           If you say N here, the kernel will run on single and multiprocessor
1440           machines, but will use only one CPU of a multiprocessor machine. If
1441           you say Y here, the kernel will run on many, but not all, single
1442           processor machines. On a single processor machine, the kernel will
1443           run faster if you say N here.
1444
1445           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1446           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1447           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1448
1449           If you don't know what to do here, say N.
1450
1451 config SMP_ON_UP
1452         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1453         depends on EXPERIMENTAL
1454         depends on SMP && !XIP_KERNEL
1455         default y
1456         help
1457           SMP kernels contain instructions which fail on non-SMP processors.
1458           Enabling this option allows the kernel to modify itself to make
1459           these instructions safe.  Disabling it allows about 1K of space
1460           savings.
1461
1462           If you don't know what to do here, say Y.
1463
1464 config ARM_CPU_TOPOLOGY
1465         bool "Support cpu topology definition"
1466         depends on SMP && CPU_V7
1467         default y
1468         help
1469           Support ARM cpu topology definition. The MPIDR register defines
1470           affinity between processors which is then used to describe the cpu
1471           topology of an ARM System.
1472
1473 config SCHED_MC
1474         bool "Multi-core scheduler support"
1475         depends on ARM_CPU_TOPOLOGY
1476         help
1477           Multi-core scheduler support improves the CPU scheduler's decision
1478           making when dealing with multi-core CPU chips at a cost of slightly
1479           increased overhead in some places. If unsure say N here.
1480
1481 config SCHED_SMT
1482         bool "SMT scheduler support"
1483         depends on ARM_CPU_TOPOLOGY
1484         help
1485           Improves the CPU scheduler's decision making when dealing with
1486           MultiThreading at a cost of slightly increased overhead in some
1487           places. If unsure say N here.
1488
1489 config HAVE_ARM_SCU
1490         bool
1491         help
1492           This option enables support for the ARM system coherency unit
1493
1494 config HAVE_ARM_TWD
1495         bool
1496         depends on SMP
1497         select TICK_ONESHOT
1498         help
1499           This options enables support for the ARM timer and watchdog unit
1500
1501 choice
1502         prompt "Memory split"
1503         default VMSPLIT_3G
1504         help
1505           Select the desired split between kernel and user memory.
1506
1507           If you are not absolutely sure what you are doing, leave this
1508           option alone!
1509
1510         config VMSPLIT_3G
1511                 bool "3G/1G user/kernel split"
1512         config VMSPLIT_2G
1513                 bool "2G/2G user/kernel split"
1514         config VMSPLIT_1G
1515                 bool "1G/3G user/kernel split"
1516 endchoice
1517
1518 config PAGE_OFFSET
1519         hex
1520         default 0x40000000 if VMSPLIT_1G
1521         default 0x80000000 if VMSPLIT_2G
1522         default 0xC0000000
1523
1524 config NR_CPUS
1525         int "Maximum number of CPUs (2-32)"
1526         range 2 32
1527         depends on SMP
1528         default "4"
1529
1530 config HOTPLUG_CPU
1531         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1532         depends on SMP && HOTPLUG && EXPERIMENTAL
1533         help
1534           Say Y here to experiment with turning CPUs off and on.  CPUs
1535           can be controlled through /sys/devices/system/cpu.
1536
1537 config LOCAL_TIMERS
1538         bool "Use local timer interrupts"
1539         depends on SMP
1540         default y
1541         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1542         help
1543           Enable support for local timers on SMP platforms, rather then the
1544           legacy IPI broadcast method.  Local timers allows the system
1545           accounting to be spread across the timer interval, preventing a
1546           "thundering herd" at every timer tick.
1547
1548 source kernel/Kconfig.preempt
1549
1550 config HZ
1551         int
1552         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1553                 ARCH_S5PV210 || ARCH_EXYNOS4
1554         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1555         default AT91_TIMER_HZ if ARCH_AT91
1556         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1557         default 100
1558
1559 config THUMB2_KERNEL
1560         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1561         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1562         select AEABI
1563         select ARM_ASM_UNIFIED
1564         select ARM_UNWIND
1565         help
1566           By enabling this option, the kernel will be compiled in
1567           Thumb-2 mode. A compiler/assembler that understand the unified
1568           ARM-Thumb syntax is needed.
1569
1570           If unsure, say N.
1571
1572 config THUMB2_AVOID_R_ARM_THM_JUMP11
1573         bool "Work around buggy Thumb-2 short branch relocations in gas"
1574         depends on THUMB2_KERNEL && MODULES
1575         default y
1576         help
1577           Various binutils versions can resolve Thumb-2 branches to
1578           locally-defined, preemptible global symbols as short-range "b.n"
1579           branch instructions.
1580
1581           This is a problem, because there's no guarantee the final
1582           destination of the symbol, or any candidate locations for a
1583           trampoline, are within range of the branch.  For this reason, the
1584           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1585           relocation in modules at all, and it makes little sense to add
1586           support.
1587
1588           The symptom is that the kernel fails with an "unsupported
1589           relocation" error when loading some modules.
1590
1591           Until fixed tools are available, passing
1592           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1593           code which hits this problem, at the cost of a bit of extra runtime
1594           stack usage in some cases.
1595
1596           The problem is described in more detail at:
1597               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1598
1599           Only Thumb-2 kernels are affected.
1600
1601           Unless you are sure your tools don't have this problem, say Y.
1602
1603 config ARM_ASM_UNIFIED
1604         bool
1605
1606 config AEABI
1607         bool "Use the ARM EABI to compile the kernel"
1608         help
1609           This option allows for the kernel to be compiled using the latest
1610           ARM ABI (aka EABI).  This is only useful if you are using a user
1611           space environment that is also compiled with EABI.
1612
1613           Since there are major incompatibilities between the legacy ABI and
1614           EABI, especially with regard to structure member alignment, this
1615           option also changes the kernel syscall calling convention to
1616           disambiguate both ABIs and allow for backward compatibility support
1617           (selected with CONFIG_OABI_COMPAT).
1618
1619           To use this you need GCC version 4.0.0 or later.
1620
1621 config OABI_COMPAT
1622         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1623         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1624         default y
1625         help
1626           This option preserves the old syscall interface along with the
1627           new (ARM EABI) one. It also provides a compatibility layer to
1628           intercept syscalls that have structure arguments which layout
1629           in memory differs between the legacy ABI and the new ARM EABI
1630           (only for non "thumb" binaries). This option adds a tiny
1631           overhead to all syscalls and produces a slightly larger kernel.
1632           If you know you'll be using only pure EABI user space then you
1633           can say N here. If this option is not selected and you attempt
1634           to execute a legacy ABI binary then the result will be
1635           UNPREDICTABLE (in fact it can be predicted that it won't work
1636           at all). If in doubt say Y.
1637
1638 config ARCH_HAS_HOLES_MEMORYMODEL
1639         bool
1640
1641 config ARCH_SPARSEMEM_ENABLE
1642         bool
1643
1644 config ARCH_SPARSEMEM_DEFAULT
1645         def_bool ARCH_SPARSEMEM_ENABLE
1646
1647 config ARCH_SELECT_MEMORY_MODEL
1648         def_bool ARCH_SPARSEMEM_ENABLE
1649
1650 config HAVE_ARCH_PFN_VALID
1651         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1652
1653 config HIGHMEM
1654         bool "High Memory Support"
1655         depends on MMU
1656         help
1657           The address space of ARM processors is only 4 Gigabytes large
1658           and it has to accommodate user address space, kernel address
1659           space as well as some memory mapped IO. That means that, if you
1660           have a large amount of physical memory and/or IO, not all of the
1661           memory can be "permanently mapped" by the kernel. The physical
1662           memory that is not permanently mapped is called "high memory".
1663
1664           Depending on the selected kernel/user memory split, minimum
1665           vmalloc space and actual amount of RAM, you may not need this
1666           option which should result in a slightly faster kernel.
1667
1668           If unsure, say n.
1669
1670 config HIGHPTE
1671         bool "Allocate 2nd-level pagetables from highmem"
1672         depends on HIGHMEM
1673
1674 config HW_PERF_EVENTS
1675         bool "Enable hardware performance counter support for perf events"
1676         depends on PERF_EVENTS && CPU_HAS_PMU
1677         default y
1678         help
1679           Enable hardware performance counter support for perf events. If
1680           disabled, perf events will use software events only.
1681
1682 source "mm/Kconfig"
1683
1684 config FORCE_MAX_ZONEORDER
1685         int "Maximum zone order" if ARCH_SHMOBILE
1686         range 11 64 if ARCH_SHMOBILE
1687         default "9" if SA1111
1688         default "11"
1689         help
1690           The kernel memory allocator divides physically contiguous memory
1691           blocks into "zones", where each zone is a power of two number of
1692           pages.  This option selects the largest power of two that the kernel
1693           keeps in the memory allocator.  If you need to allocate very large
1694           blocks of physically contiguous memory, then you may need to
1695           increase this value.
1696
1697           This config option is actually maximum order plus one. For example,
1698           a value of 11 means that the largest free memory block is 2^10 pages.
1699
1700 config LEDS
1701         bool "Timer and CPU usage LEDs"
1702         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1703                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1704                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1705                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1706                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1707                    ARCH_AT91 || ARCH_DAVINCI || \
1708                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1709         help
1710           If you say Y here, the LEDs on your machine will be used
1711           to provide useful information about your current system status.
1712
1713           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1714           be able to select which LEDs are active using the options below. If
1715           you are compiling a kernel for the EBSA-110 or the LART however, the
1716           red LED will simply flash regularly to indicate that the system is
1717           still functional. It is safe to say Y here if you have a CATS
1718           system, but the driver will do nothing.
1719
1720 config LEDS_TIMER
1721         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1722                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1723                             || MACH_OMAP_PERSEUS2
1724         depends on LEDS
1725         depends on !GENERIC_CLOCKEVENTS
1726         default y if ARCH_EBSA110
1727         help
1728           If you say Y here, one of the system LEDs (the green one on the
1729           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1730           will flash regularly to indicate that the system is still
1731           operational. This is mainly useful to kernel hackers who are
1732           debugging unstable kernels.
1733
1734           The LART uses the same LED for both Timer LED and CPU usage LED
1735           functions. You may choose to use both, but the Timer LED function
1736           will overrule the CPU usage LED.
1737
1738 config LEDS_CPU
1739         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1740                         !ARCH_OMAP) \
1741                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1742                         || MACH_OMAP_PERSEUS2
1743         depends on LEDS
1744         help
1745           If you say Y here, the red LED will be used to give a good real
1746           time indication of CPU usage, by lighting whenever the idle task
1747           is not currently executing.
1748
1749           The LART uses the same LED for both Timer LED and CPU usage LED
1750           functions. You may choose to use both, but the Timer LED function
1751           will overrule the CPU usage LED.
1752
1753 config ALIGNMENT_TRAP
1754         bool
1755         depends on CPU_CP15_MMU
1756         default y if !ARCH_EBSA110
1757         select HAVE_PROC_CPU if PROC_FS
1758         help
1759           ARM processors cannot fetch/store information which is not
1760           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1761           address divisible by 4. On 32-bit ARM processors, these non-aligned
1762           fetch/store instructions will be emulated in software if you say
1763           here, which has a severe performance impact. This is necessary for
1764           correct operation of some network protocols. With an IP-only
1765           configuration it is safe to say N, otherwise say Y.
1766
1767 config UACCESS_WITH_MEMCPY
1768         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1769         depends on MMU && EXPERIMENTAL
1770         default y if CPU_FEROCEON
1771         help
1772           Implement faster copy_to_user and clear_user methods for CPU
1773           cores where a 8-word STM instruction give significantly higher
1774           memory write throughput than a sequence of individual 32bit stores.
1775
1776           A possible side effect is a slight increase in scheduling latency
1777           between threads sharing the same address space if they invoke
1778           such copy operations with large buffers.
1779
1780           However, if the CPU data cache is using a write-allocate mode,
1781           this option is unlikely to provide any performance gain.
1782
1783 config SECCOMP
1784         bool
1785         prompt "Enable seccomp to safely compute untrusted bytecode"
1786         ---help---
1787           This kernel feature is useful for number crunching applications
1788           that may need to compute untrusted bytecode during their
1789           execution. By using pipes or other transports made available to
1790           the process as file descriptors supporting the read/write
1791           syscalls, it's possible to isolate those applications in
1792           their own address space using seccomp. Once seccomp is
1793           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1794           and the task is only allowed to execute a few safe syscalls
1795           defined by each seccomp mode.
1796
1797 config CC_STACKPROTECTOR
1798         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1799         depends on EXPERIMENTAL
1800         help
1801           This option turns on the -fstack-protector GCC feature. This
1802           feature puts, at the beginning of functions, a canary value on
1803           the stack just before the return address, and validates
1804           the value just before actually returning.  Stack based buffer
1805           overflows (that need to overwrite this return address) now also
1806           overwrite the canary, which gets detected and the attack is then
1807           neutralized via a kernel panic.
1808           This feature requires gcc version 4.2 or above.
1809
1810 config DEPRECATED_PARAM_STRUCT
1811         bool "Provide old way to pass kernel parameters"
1812         help
1813           This was deprecated in 2001 and announced to live on for 5 years.
1814           Some old boot loaders still use this way.
1815
1816 endmenu
1817
1818 menu "Boot options"
1819
1820 config USE_OF
1821         bool "Flattened Device Tree support"
1822         select OF
1823         select OF_EARLY_FLATTREE
1824         select IRQ_DOMAIN
1825         help
1826           Include support for flattened device tree machine descriptions.
1827
1828 # Compressed boot loader in ROM.  Yes, we really want to ask about
1829 # TEXT and BSS so we preserve their values in the config files.
1830 config ZBOOT_ROM_TEXT
1831         hex "Compressed ROM boot loader base address"
1832         default "0"
1833         help
1834           The physical address at which the ROM-able zImage is to be
1835           placed in the target.  Platforms which normally make use of
1836           ROM-able zImage formats normally set this to a suitable
1837           value in their defconfig file.
1838
1839           If ZBOOT_ROM is not enabled, this has no effect.
1840
1841 config ZBOOT_ROM_BSS
1842         hex "Compressed ROM boot loader BSS address"
1843         default "0"
1844         help
1845           The base address of an area of read/write memory in the target
1846           for the ROM-able zImage which must be available while the
1847           decompressor is running. It must be large enough to hold the
1848           entire decompressed kernel plus an additional 128 KiB.
1849           Platforms which normally make use of ROM-able zImage formats
1850           normally set this to a suitable value in their defconfig file.
1851
1852           If ZBOOT_ROM is not enabled, this has no effect.
1853
1854 config ZBOOT_ROM
1855         bool "Compressed boot loader in ROM/flash"
1856         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1857         help
1858           Say Y here if you intend to execute your compressed kernel image
1859           (zImage) directly from ROM or flash.  If unsure, say N.
1860
1861 choice
1862         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1863         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1864         default ZBOOT_ROM_NONE
1865         help
1866           Include experimental SD/MMC loading code in the ROM-able zImage.
1867           With this enabled it is possible to write the the ROM-able zImage
1868           kernel image to an MMC or SD card and boot the kernel straight
1869           from the reset vector. At reset the processor Mask ROM will load
1870           the first part of the the ROM-able zImage which in turn loads the
1871           rest the kernel image to RAM.
1872
1873 config ZBOOT_ROM_NONE
1874         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1875         help
1876           Do not load image from SD or MMC
1877
1878 config ZBOOT_ROM_MMCIF
1879         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1880         help
1881           Load image from MMCIF hardware block.
1882
1883 config ZBOOT_ROM_SH_MOBILE_SDHI
1884         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1885         help
1886           Load image from SDHI hardware block
1887
1888 endchoice
1889
1890 config ARM_APPENDED_DTB
1891         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1892         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1893         help
1894           With this option, the boot code will look for a device tree binary
1895           (DTB) appended to zImage
1896           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1897
1898           This is meant as a backward compatibility convenience for those
1899           systems with a bootloader that can't be upgraded to accommodate
1900           the documented boot protocol using a device tree.
1901
1902           Beware that there is very little in terms of protection against
1903           this option being confused by leftover garbage in memory that might
1904           look like a DTB header after a reboot if no actual DTB is appended
1905           to zImage.  Do not leave this option active in a production kernel
1906           if you don't intend to always append a DTB.  Proper passing of the
1907           location into r2 of a bootloader provided DTB is always preferable
1908           to this option.
1909
1910 config ARM_ATAG_DTB_COMPAT
1911         bool "Supplement the appended DTB with traditional ATAG information"
1912         depends on ARM_APPENDED_DTB
1913         help
1914           Some old bootloaders can't be updated to a DTB capable one, yet
1915           they provide ATAGs with memory configuration, the ramdisk address,
1916           the kernel cmdline string, etc.  Such information is dynamically
1917           provided by the bootloader and can't always be stored in a static
1918           DTB.  To allow a device tree enabled kernel to be used with such
1919           bootloaders, this option allows zImage to extract the information
1920           from the ATAG list and store it at run time into the appended DTB.
1921
1922 config CMDLINE
1923         string "Default kernel command string"
1924         default ""
1925         help
1926           On some architectures (EBSA110 and CATS), there is currently no way
1927           for the boot loader to pass arguments to the kernel. For these
1928           architectures, you should supply some command-line options at build
1929           time by entering them here. As a minimum, you should specify the
1930           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1931
1932 choice
1933         prompt "Kernel command line type" if CMDLINE != ""
1934         default CMDLINE_FROM_BOOTLOADER
1935
1936 config CMDLINE_FROM_BOOTLOADER
1937         bool "Use bootloader kernel arguments if available"
1938         help
1939           Uses the command-line options passed by the boot loader. If
1940           the boot loader doesn't provide any, the default kernel command
1941           string provided in CMDLINE will be used.
1942
1943 config CMDLINE_EXTEND
1944         bool "Extend bootloader kernel arguments"
1945         help
1946           The command-line arguments provided by the boot loader will be
1947           appended to the default kernel command string.
1948
1949 config CMDLINE_FORCE
1950         bool "Always use the default kernel command string"
1951         help
1952           Always use the default kernel command string, even if the boot
1953           loader passes other arguments to the kernel.
1954           This is useful if you cannot or don't want to change the
1955           command-line options your boot loader passes to the kernel.
1956 endchoice
1957
1958 config XIP_KERNEL
1959         bool "Kernel Execute-In-Place from ROM"
1960         depends on !ZBOOT_ROM
1961         help
1962           Execute-In-Place allows the kernel to run from non-volatile storage
1963           directly addressable by the CPU, such as NOR flash. This saves RAM
1964           space since the text section of the kernel is not loaded from flash
1965           to RAM.  Read-write sections, such as the data section and stack,
1966           are still copied to RAM.  The XIP kernel is not compressed since
1967           it has to run directly from flash, so it will take more space to
1968           store it.  The flash address used to link the kernel object files,
1969           and for storing it, is configuration dependent. Therefore, if you
1970           say Y here, you must know the proper physical address where to
1971           store the kernel image depending on your own flash memory usage.
1972
1973           Also note that the make target becomes "make xipImage" rather than
1974           "make zImage" or "make Image".  The final kernel binary to put in
1975           ROM memory will be arch/arm/boot/xipImage.
1976
1977           If unsure, say N.
1978
1979 config XIP_PHYS_ADDR
1980         hex "XIP Kernel Physical Location"
1981         depends on XIP_KERNEL
1982         default "0x00080000"
1983         help
1984           This is the physical address in your flash memory the kernel will
1985           be linked for and stored to.  This address is dependent on your
1986           own flash usage.
1987
1988 config KEXEC
1989         bool "Kexec system call (EXPERIMENTAL)"
1990         depends on EXPERIMENTAL
1991         help
1992           kexec is a system call that implements the ability to shutdown your
1993           current kernel, and to start another kernel.  It is like a reboot
1994           but it is independent of the system firmware.   And like a reboot
1995           you can start any kernel with it, not just Linux.
1996
1997           It is an ongoing process to be certain the hardware in a machine
1998           is properly shutdown, so do not be surprised if this code does not
1999           initially work for you.  It may help to enable device hotplugging
2000           support.
2001
2002 config ATAGS_PROC
2003         bool "Export atags in procfs"
2004         depends on KEXEC
2005         default y
2006         help
2007           Should the atags used to boot the kernel be exported in an "atags"
2008           file in procfs. Useful with kexec.
2009
2010 config CRASH_DUMP
2011         bool "Build kdump crash kernel (EXPERIMENTAL)"
2012         depends on EXPERIMENTAL
2013         help
2014           Generate crash dump after being started by kexec. This should
2015           be normally only set in special crash dump kernels which are
2016           loaded in the main kernel with kexec-tools into a specially
2017           reserved region and then later executed after a crash by
2018           kdump/kexec. The crash dump kernel must be compiled to a
2019           memory address not used by the main kernel
2020
2021           For more details see Documentation/kdump/kdump.txt
2022
2023 config AUTO_ZRELADDR
2024         bool "Auto calculation of the decompressed kernel image address"
2025         depends on !ZBOOT_ROM && !ARCH_U300
2026         help
2027           ZRELADDR is the physical address where the decompressed kernel
2028           image will be placed. If AUTO_ZRELADDR is selected, the address
2029           will be determined at run-time by masking the current IP with
2030           0xf8000000. This assumes the zImage being placed in the first 128MB
2031           from start of memory.
2032
2033 endmenu
2034
2035 menu "CPU Power Management"
2036
2037 if ARCH_HAS_CPUFREQ
2038
2039 source "drivers/cpufreq/Kconfig"
2040
2041 config CPU_FREQ_IMX
2042         tristate "CPUfreq driver for i.MX CPUs"
2043         depends on ARCH_MXC && CPU_FREQ
2044         help
2045           This enables the CPUfreq driver for i.MX CPUs.
2046
2047 config CPU_FREQ_SA1100
2048         bool
2049
2050 config CPU_FREQ_SA1110
2051         bool
2052
2053 config CPU_FREQ_INTEGRATOR
2054         tristate "CPUfreq driver for ARM Integrator CPUs"
2055         depends on ARCH_INTEGRATOR && CPU_FREQ
2056         default y
2057         help
2058           This enables the CPUfreq driver for ARM Integrator CPUs.
2059
2060           For details, take a look at <file:Documentation/cpu-freq>.
2061
2062           If in doubt, say Y.
2063
2064 config CPU_FREQ_PXA
2065         bool
2066         depends on CPU_FREQ && ARCH_PXA && PXA25x
2067         default y
2068         select CPU_FREQ_TABLE
2069         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2070
2071 config CPU_FREQ_S3C
2072         bool
2073         help
2074           Internal configuration node for common cpufreq on Samsung SoC
2075
2076 config CPU_FREQ_S3C24XX
2077         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2078         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
2079         select CPU_FREQ_S3C
2080         help
2081           This enables the CPUfreq driver for the Samsung S3C24XX family
2082           of CPUs.
2083
2084           For details, take a look at <file:Documentation/cpu-freq>.
2085
2086           If in doubt, say N.
2087
2088 config CPU_FREQ_S3C24XX_PLL
2089         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2090         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2091         help
2092           Compile in support for changing the PLL frequency from the
2093           S3C24XX series CPUfreq driver. The PLL takes time to settle
2094           after a frequency change, so by default it is not enabled.
2095
2096           This also means that the PLL tables for the selected CPU(s) will
2097           be built which may increase the size of the kernel image.
2098
2099 config CPU_FREQ_S3C24XX_DEBUG
2100         bool "Debug CPUfreq Samsung driver core"
2101         depends on CPU_FREQ_S3C24XX
2102         help
2103           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2104
2105 config CPU_FREQ_S3C24XX_IODEBUG
2106         bool "Debug CPUfreq Samsung driver IO timing"
2107         depends on CPU_FREQ_S3C24XX
2108         help
2109           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2110
2111 config CPU_FREQ_S3C24XX_DEBUGFS
2112         bool "Export debugfs for CPUFreq"
2113         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2114         help
2115           Export status information via debugfs.
2116
2117 endif
2118
2119 source "drivers/cpuidle/Kconfig"
2120
2121 endmenu
2122
2123 menu "Floating point emulation"
2124
2125 comment "At least one emulation must be selected"
2126
2127 config FPE_NWFPE
2128         bool "NWFPE math emulation"
2129         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2130         ---help---
2131           Say Y to include the NWFPE floating point emulator in the kernel.
2132           This is necessary to run most binaries. Linux does not currently
2133           support floating point hardware so you need to say Y here even if
2134           your machine has an FPA or floating point co-processor podule.
2135
2136           You may say N here if you are going to load the Acorn FPEmulator
2137           early in the bootup.
2138
2139 config FPE_NWFPE_XP
2140         bool "Support extended precision"
2141         depends on FPE_NWFPE
2142         help
2143           Say Y to include 80-bit support in the kernel floating-point
2144           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2145           Note that gcc does not generate 80-bit operations by default,
2146           so in most cases this option only enlarges the size of the
2147           floating point emulator without any good reason.
2148
2149           You almost surely want to say N here.
2150
2151 config FPE_FASTFPE
2152         bool "FastFPE math emulation (EXPERIMENTAL)"
2153         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2154         ---help---
2155           Say Y here to include the FAST floating point emulator in the kernel.
2156           This is an experimental much faster emulator which now also has full
2157           precision for the mantissa.  It does not support any exceptions.
2158           It is very simple, and approximately 3-6 times faster than NWFPE.
2159
2160           It should be sufficient for most programs.  It may be not suitable
2161           for scientific calculations, but you have to check this for yourself.
2162           If you do not feel you need a faster FP emulation you should better
2163           choose NWFPE.
2164
2165 config VFP
2166         bool "VFP-format floating point maths"
2167         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2168         help
2169           Say Y to include VFP support code in the kernel. This is needed
2170           if your hardware includes a VFP unit.
2171
2172           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2173           release notes and additional status information.
2174
2175           Say N if your target does not have VFP hardware.
2176
2177 config VFPv3
2178         bool
2179         depends on VFP
2180         default y if CPU_V7
2181
2182 config NEON
2183         bool "Advanced SIMD (NEON) Extension support"
2184         depends on VFPv3 && CPU_V7
2185         help
2186           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2187           Extension.
2188
2189 endmenu
2190
2191 menu "Userspace binary formats"
2192
2193 source "fs/Kconfig.binfmt"
2194
2195 config ARTHUR
2196         tristate "RISC OS personality"
2197         depends on !AEABI
2198         help
2199           Say Y here to include the kernel code necessary if you want to run
2200           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2201           experimental; if this sounds frightening, say N and sleep in peace.
2202           You can also say M here to compile this support as a module (which
2203           will be called arthur).
2204
2205 endmenu
2206
2207 menu "Power management options"
2208
2209 source "kernel/power/Kconfig"
2210
2211 config ARCH_SUSPEND_POSSIBLE
2212         depends on !ARCH_S5PC100
2213         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2214                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2215         def_bool y
2216
2217 config ARM_CPU_SUSPEND
2218         def_bool PM_SLEEP
2219
2220 endmenu
2221
2222 source "net/Kconfig"
2223
2224 source "drivers/Kconfig"
2225
2226 source "fs/Kconfig"
2227
2228 source "arch/arm/Kconfig.debug"
2229
2230 source "security/Kconfig"
2231
2232 source "crypto/Kconfig"
2233
2234 source "lib/Kconfig"