arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_HAVE_CUSTOM_GPIO_H
   5         select HAVE_AOUT
   6         select HAVE_DMA_API_DEBUG
   7         select HAVE_IDE if PCI || ISA || PCMCIA
   8         select HAVE_DMA_ATTRS
   9         select HAVE_DMA_CONTIGUOUS if MMU
  10         select HAVE_MEMBLOCK
  11         select RTC_LIB
  12         select SYS_SUPPORTS_APM_EMULATION
  13         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  14         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  15         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  16         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  17         select HAVE_ARCH_KGDB
  18         select HAVE_ARCH_TRACEHOOK
  19         select HAVE_KPROBES if !XIP_KERNEL
  20         select HAVE_KRETPROBES if (HAVE_KPROBES)
  21         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  22         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  23         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  24         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  25         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  26         select HAVE_GENERIC_DMA_COHERENT
  27         select HAVE_KERNEL_GZIP
  28         select HAVE_KERNEL_LZO
  29         select HAVE_KERNEL_LZMA
  30         select HAVE_KERNEL_XZ
  31         select HAVE_IRQ_WORK
  32         select HAVE_PERF_EVENTS
  33         select PERF_USE_VMALLOC
  34         select HAVE_REGS_AND_STACK_ACCESS_API
  35         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  36         select HAVE_C_RECORDMCOUNT
  37         select HAVE_GENERIC_HARDIRQS
  38         select HARDIRQS_SW_RESEND
  39         select GENERIC_IRQ_PROBE
  40         select GENERIC_IRQ_SHOW
  41         select ARCH_WANT_IPC_PARSE_VERSION
  42         select HARDIRQS_SW_RESEND
  43         select CPU_PM if (SUSPEND || CPU_IDLE)
  44         select GENERIC_PCI_IOMAP
  45         select HAVE_BPF_JIT
  46         select GENERIC_SMP_IDLE_THREAD
  47         select KTIME_SCALAR
  48         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  49         select GENERIC_STRNCPY_FROM_USER
  50         select GENERIC_STRNLEN_USER
  51         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
  52         help
  53           The ARM series is a line of low-power-consumption RISC chip designs
  54           licensed by ARM Ltd and targeted at embedded applications and
  55           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  56           manufactured, but legacy ARM-based PC hardware remains popular in
  57           Europe.  There is an ARM Linux project with a web page at
  58           <http://www.arm.linux.org.uk/>.
  59
  60 config ARM_HAS_SG_CHAIN
  61         bool
  62
  63 config NEED_SG_DMA_LENGTH
  64         bool
  65
  66 config ARM_DMA_USE_IOMMU
  67         select NEED_SG_DMA_LENGTH
  68         select ARM_HAS_SG_CHAIN
  69         bool
  70
  71 config HAVE_PWM
  72         bool
  73
  74 config MIGHT_HAVE_PCI
  75         bool
  76
  77 config SYS_SUPPORTS_APM_EMULATION
  78         bool
  79
  80 config GENERIC_GPIO
  81         bool
  82
  83 config HAVE_TCM
  84         bool
  85         select GENERIC_ALLOCATOR
  86
  87 config HAVE_PROC_CPU
  88         bool
  89
  90 config NO_IOPORT
  91         bool
  92
  93 config EISA
  94         bool
  95         ---help---
  96           The Extended Industry Standard Architecture (EISA) bus was
  97           developed as an open alternative to the IBM MicroChannel bus.
  98
  99           The EISA bus provided some of the features of the IBM MicroChannel
 100           bus while maintaining backward compatibility with cards made for
 101           the older ISA bus.  The EISA bus saw limited use between 1988 and
 102           1995 when it was made obsolete by the PCI bus.
 103
 104           Say Y here if you are building a kernel for an EISA-based machine.
 105
 106           Otherwise, say N.
 107
 108 config SBUS
 109         bool
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config RWSEM_GENERIC_SPINLOCK
 129         bool
 130         default y
 131
 132 config RWSEM_XCHGADD_ALGORITHM
 133         bool
 134
 135 config ARCH_HAS_ILOG2_U32
 136         bool
 137
 138 config ARCH_HAS_ILOG2_U64
 139         bool
 140
 141 config ARCH_HAS_CPUFREQ
 142         bool
 143         help
 144           Internal node to signify that the ARCH has CPUFREQ support
 145           and that the relevant menu configurations are displayed for
 146           it.
 147
 148 config GENERIC_HWEIGHT
 149         bool
 150         default y
 151
 152 config GENERIC_CALIBRATE_DELAY
 153         bool
 154         default y
 155
 156 config ARCH_MAY_HAVE_PC_FDC
 157         bool
 158
 159 config ZONE_DMA
 160         bool
 161
 162 config NEED_DMA_MAP_STATE
 163        def_bool y
 164
 165 config ARCH_HAS_DMA_SET_COHERENT_MASK
 166         bool
 167
 168 config GENERIC_ISA_DMA
 169         bool
 170
 171 config FIQ
 172         bool
 173
 174 config NEED_RET_TO_USER
 175         bool
 176
 177 config ARCH_MTD_XIP
 178         bool
 179
 180 config VECTORS_BASE
 181         hex
 182         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 183         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 184         default 0x00000000
 185         help
 186           The base address of exception vectors.
 187
 188 config ARM_PATCH_PHYS_VIRT
 189         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 190         default y
 191         depends on !XIP_KERNEL && MMU
 192         depends on !ARCH_REALVIEW || !SPARSEMEM
 193         help
 194           Patch phys-to-virt and virt-to-phys translation functions at
 195           boot and module load time according to the position of the
 196           kernel in system memory.
 197
 198           This can only be used with non-XIP MMU kernels where the base
 199           of physical memory is at a 16MB boundary.
 200
 201           Only disable this option if you know that you do not require
 202           this feature (eg, building a kernel for a single machine) and
 203           you need to shrink the kernel to the minimal size.
 204
 205 config NEED_MACH_GPIO_H
 206         bool
 207         help
 208           Select this when mach/gpio.h is required to provide special
 209           definitions for this platform. The need for mach/gpio.h should
 210           be avoided when possible.
 211
 212 config NEED_MACH_IO_H
 213         bool
 214         help
 215           Select this when mach/io.h is required to provide special
 216           definitions for this platform.  The need for mach/io.h should
 217           be avoided when possible.
 218
 219 config NEED_MACH_MEMORY_H
 220         bool
 221         help
 222           Select this when mach/memory.h is required to provide special
 223           definitions for this platform.  The need for mach/memory.h should
 224           be avoided when possible.
 225
 226 config PHYS_OFFSET
 227         hex "Physical address of main memory" if MMU
 228         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 229         default DRAM_BASE if !MMU
 230         help
 231           Please provide the physical address corresponding to the
 232           location of main memory in your system.
 233
 234 config GENERIC_BUG
 235         def_bool y
 236         depends on BUG
 237
 238 source "init/Kconfig"
 239
 240 source "kernel/Kconfig.freezer"
 241
 242 menu "System Type"
 243
 244 config MMU
 245         bool "MMU-based Paged Memory Management Support"
 246         default y
 247         help
 248           Select if you want MMU-based virtualised addressing space
 249           support by paged memory management. If unsure, say 'Y'.
 250
 251 #
 252 # The "ARM system type" choice list is ordered alphabetically by option
 253 # text.  Please add new entries in the option alphabetic order.
 254 #
 255 choice
 256         prompt "ARM system type"
 257         default ARCH_MULTIPLATFORM
 258
 259 config ARCH_MULTIPLATFORM
 260         bool "Allow multiple platforms to be selected"
 261         select ARM_PATCH_PHYS_VIRT
 262         select AUTO_ZRELADDR
 263         select COMMON_CLK
 264         select MULTI_IRQ_HANDLER
 265         select SPARSE_IRQ
 266         select USE_OF
 267         depends on MMU
 268
 269 config ARCH_INTEGRATOR
 270         bool "ARM Ltd. Integrator family"
 271         select ARM_AMBA
 272         select ARCH_HAS_CPUFREQ
 273         select COMMON_CLK
 274         select COMMON_CLK_VERSATILE
 275         select HAVE_TCM
 276         select ICST
 277         select GENERIC_CLOCKEVENTS
 278         select PLAT_VERSATILE
 279         select PLAT_VERSATILE_FPGA_IRQ
 280         select NEED_MACH_MEMORY_H
 281         select SPARSE_IRQ
 282         select MULTI_IRQ_HANDLER
 283         help
 284           Support for ARM's Integrator platform.
 285
 286 config ARCH_REALVIEW
 287         bool "ARM Ltd. RealView family"
 288         select ARM_AMBA
 289         select COMMON_CLK
 290         select COMMON_CLK_VERSATILE
 291         select ICST
 292         select GENERIC_CLOCKEVENTS
 293         select ARCH_WANT_OPTIONAL_GPIOLIB
 294         select PLAT_VERSATILE
 295         select PLAT_VERSATILE_CLCD
 296         select ARM_TIMER_SP804
 297         select GPIO_PL061 if GPIOLIB
 298         select NEED_MACH_MEMORY_H
 299         help
 300           This enables support for ARM Ltd RealView boards.
 301
 302 config ARCH_VERSATILE
 303         bool "ARM Ltd. Versatile family"
 304         select ARM_AMBA
 305         select ARM_VIC
 306         select CLKDEV_LOOKUP
 307         select HAVE_MACH_CLKDEV
 308         select ICST
 309         select GENERIC_CLOCKEVENTS
 310         select ARCH_WANT_OPTIONAL_GPIOLIB
 311         select PLAT_VERSATILE
 312         select PLAT_VERSATILE_CLOCK
 313         select PLAT_VERSATILE_CLCD
 314         select PLAT_VERSATILE_FPGA_IRQ
 315         select ARM_TIMER_SP804
 316         help
 317           This enables support for ARM Ltd Versatile board.
 318
 319 config ARCH_AT91
 320         bool "Atmel AT91"
 321         select ARCH_REQUIRE_GPIOLIB
 322         select HAVE_CLK
 323         select CLKDEV_LOOKUP
 324         select IRQ_DOMAIN
 325         select NEED_MACH_GPIO_H
 326         select NEED_MACH_IO_H if PCCARD
 327         help
 328           This enables support for systems based on Atmel
 329           AT91RM9200 and AT91SAM9* processors.
 330
 331 config ARCH_BCM2835
 332         bool "Broadcom BCM2835 family"
 333         select ARCH_WANT_OPTIONAL_GPIOLIB
 334         select ARM_AMBA
 335         select ARM_ERRATA_411920
 336         select ARM_TIMER_SP804
 337         select CLKDEV_LOOKUP
 338         select COMMON_CLK
 339         select CPU_V6
 340         select GENERIC_CLOCKEVENTS
 341         select MULTI_IRQ_HANDLER
 342         select SPARSE_IRQ
 343         select USE_OF
 344         help
 345           This enables support for the Broadcom BCM2835 SoC. This SoC is
 346           use in the Raspberry Pi, and Roku 2 devices.
 347
 348 config ARCH_CLPS711X
 349         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 350         select CPU_ARM720T
 351         select ARCH_USES_GETTIMEOFFSET
 352         select COMMON_CLK
 353         select CLKDEV_LOOKUP
 354         select NEED_MACH_MEMORY_H
 355         help
 356           Support for Cirrus Logic 711x/721x/731x based boards.
 357
 358 config ARCH_CNS3XXX
 359         bool "Cavium Networks CNS3XXX family"
 360         select CPU_V6K
 361         select GENERIC_CLOCKEVENTS
 362         select ARM_GIC
 363         select MIGHT_HAVE_CACHE_L2X0
 364         select MIGHT_HAVE_PCI
 365         select PCI_DOMAINS if PCI
 366         help
 367           Support for Cavium Networks CNS3XXX platform.
 368
 369 config ARCH_GEMINI
 370         bool "Cortina Systems Gemini"
 371         select CPU_FA526
 372         select ARCH_REQUIRE_GPIOLIB
 373         select ARCH_USES_GETTIMEOFFSET
 374         help
 375           Support for the Cortina Systems Gemini family SoCs
 376
 377 config ARCH_SIRF
 378         bool "CSR SiRF"
 379         select NO_IOPORT
 380         select ARCH_REQUIRE_GPIOLIB
 381         select GENERIC_CLOCKEVENTS
 382         select COMMON_CLK
 383         select GENERIC_IRQ_CHIP
 384         select MIGHT_HAVE_CACHE_L2X0
 385         select PINCTRL
 386         select PINCTRL_SIRF
 387         select USE_OF
 388         help
 389           Support for CSR SiRFprimaII/Marco/Polo platforms
 390
 391 config ARCH_EBSA110
 392         bool "EBSA-110"
 393         select CPU_SA110
 394         select ISA
 395         select NO_IOPORT
 396         select ARCH_USES_GETTIMEOFFSET
 397         select NEED_MACH_IO_H
 398         select NEED_MACH_MEMORY_H
 399         help
 400           This is an evaluation board for the StrongARM processor available
 401           from Digital. It has limited hardware on-board, including an
 402           Ethernet interface, two PCMCIA sockets, two serial ports and a
 403           parallel port.
 404
 405 config ARCH_EP93XX
 406         bool "EP93xx-based"
 407         select CPU_ARM920T
 408         select ARM_AMBA
 409         select ARM_VIC
 410         select CLKDEV_LOOKUP
 411         select ARCH_REQUIRE_GPIOLIB
 412         select ARCH_HAS_HOLES_MEMORYMODEL
 413         select ARCH_USES_GETTIMEOFFSET
 414         select NEED_MACH_MEMORY_H
 415         help
 416           This enables support for the Cirrus EP93xx series of CPUs.
 417
 418 config ARCH_FOOTBRIDGE
 419         bool "FootBridge"
 420         select CPU_SA110
 421         select FOOTBRIDGE
 422         select GENERIC_CLOCKEVENTS
 423         select HAVE_IDE
 424         select NEED_MACH_IO_H if !MMU
 425         select NEED_MACH_MEMORY_H
 426         help
 427           Support for systems based on the DC21285 companion chip
 428           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 429
 430 config ARCH_MXC
 431         bool "Freescale MXC/iMX-based"
 432         select GENERIC_CLOCKEVENTS
 433         select ARCH_REQUIRE_GPIOLIB
 434         select CLKDEV_LOOKUP
 435         select CLKSRC_MMIO
 436         select GENERIC_IRQ_CHIP
 437         select MULTI_IRQ_HANDLER
 438         select SPARSE_IRQ
 439         select USE_OF
 440         help
 441           Support for Freescale MXC/iMX-based family of processors
 442
 443 config ARCH_MXS
 444         bool "Freescale MXS-based"
 445         select GENERIC_CLOCKEVENTS
 446         select ARCH_REQUIRE_GPIOLIB
 447         select CLKDEV_LOOKUP
 448         select CLKSRC_MMIO
 449         select COMMON_CLK
 450         select HAVE_CLK_PREPARE
 451         select MULTI_IRQ_HANDLER
 452         select PINCTRL
 453         select SPARSE_IRQ
 454         select USE_OF
 455         help
 456           Support for Freescale MXS-based family of processors
 457
 458 config ARCH_NETX
 459         bool "Hilscher NetX based"
 460         select CLKSRC_MMIO
 461         select CPU_ARM926T
 462         select ARM_VIC
 463         select GENERIC_CLOCKEVENTS
 464         help
 465           This enables support for systems based on the Hilscher NetX Soc
 466
 467 config ARCH_H720X
 468         bool "Hynix HMS720x-based"
 469         select CPU_ARM720T
 470         select ISA_DMA_API
 471         select ARCH_USES_GETTIMEOFFSET
 472         help
 473           This enables support for systems based on the Hynix HMS720x
 474
 475 config ARCH_IOP13XX
 476         bool "IOP13xx-based"
 477         depends on MMU
 478         select CPU_XSC3
 479         select PLAT_IOP
 480         select PCI
 481         select ARCH_SUPPORTS_MSI
 482         select VMSPLIT_1G
 483         select NEED_MACH_MEMORY_H
 484         select NEED_RET_TO_USER
 485         help
 486           Support for Intel's IOP13XX (XScale) family of processors.
 487
 488 config ARCH_IOP32X
 489         bool "IOP32x-based"
 490         depends on MMU
 491         select CPU_XSCALE
 492         select NEED_MACH_GPIO_H
 493         select NEED_MACH_IO_H
 494         select NEED_RET_TO_USER
 495         select PLAT_IOP
 496         select PCI
 497         select ARCH_REQUIRE_GPIOLIB
 498         help
 499           Support for Intel's 80219 and IOP32X (XScale) family of
 500           processors.
 501
 502 config ARCH_IOP33X
 503         bool "IOP33x-based"
 504         depends on MMU
 505         select CPU_XSCALE
 506         select NEED_MACH_GPIO_H
 507         select NEED_MACH_IO_H
 508         select NEED_RET_TO_USER
 509         select PLAT_IOP
 510         select PCI
 511         select ARCH_REQUIRE_GPIOLIB
 512         help
 513           Support for Intel's IOP33X (XScale) family of processors.
 514
 515 config ARCH_IXP4XX
 516         bool "IXP4xx-based"
 517         depends on MMU
 518         select ARCH_HAS_DMA_SET_COHERENT_MASK
 519         select CLKSRC_MMIO
 520         select CPU_XSCALE
 521         select ARCH_REQUIRE_GPIOLIB
 522         select GENERIC_CLOCKEVENTS
 523         select MIGHT_HAVE_PCI
 524         select NEED_MACH_IO_H
 525         select DMABOUNCE if PCI
 526         help
 527           Support for Intel's IXP4XX (XScale) family of processors.
 528
 529 config ARCH_DOVE
 530         bool "Marvell Dove"
 531         select CPU_V7
 532         select ARCH_REQUIRE_GPIOLIB
 533         select GENERIC_CLOCKEVENTS
 534         select MIGHT_HAVE_PCI
 535         select PLAT_ORION_LEGACY
 536         select USB_ARCH_HAS_EHCI
 537         help
 538           Support for the Marvell Dove SoC 88AP510
 539
 540 config ARCH_KIRKWOOD
 541         bool "Marvell Kirkwood"
 542         select CPU_FEROCEON
 543         select PCI
 544         select ARCH_REQUIRE_GPIOLIB
 545         select GENERIC_CLOCKEVENTS
 546         select PLAT_ORION_LEGACY
 547         help
 548           Support for the following Marvell Kirkwood series SoCs:
 549           88F6180, 88F6192 and 88F6281.
 550
 551 config ARCH_LPC32XX
 552         bool "NXP LPC32XX"
 553         select CLKSRC_MMIO
 554         select CPU_ARM926T
 555         select ARCH_REQUIRE_GPIOLIB
 556         select HAVE_IDE
 557         select ARM_AMBA
 558         select USB_ARCH_HAS_OHCI
 559         select CLKDEV_LOOKUP
 560         select GENERIC_CLOCKEVENTS
 561         select USE_OF
 562         select HAVE_PWM
 563         help
 564           Support for the NXP LPC32XX family of processors
 565
 566 config ARCH_MV78XX0
 567         bool "Marvell MV78xx0"
 568         select CPU_FEROCEON
 569         select PCI
 570         select ARCH_REQUIRE_GPIOLIB
 571         select GENERIC_CLOCKEVENTS
 572         select PLAT_ORION_LEGACY
 573         help
 574           Support for the following Marvell MV78xx0 series SoCs:
 575           MV781x0, MV782x0.
 576
 577 config ARCH_ORION5X
 578         bool "Marvell Orion"
 579         depends on MMU
 580         select CPU_FEROCEON
 581         select PCI
 582         select ARCH_REQUIRE_GPIOLIB
 583         select GENERIC_CLOCKEVENTS
 584         select PLAT_ORION_LEGACY
 585         help
 586           Support for the following Marvell Orion 5x series SoCs:
 587           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 588           Orion-2 (5281), Orion-1-90 (6183).
 589
 590 config ARCH_MMP
 591         bool "Marvell PXA168/910/MMP2"
 592         depends on MMU
 593         select ARCH_REQUIRE_GPIOLIB
 594         select CLKDEV_LOOKUP
 595         select GENERIC_CLOCKEVENTS
 596         select GPIO_PXA
 597         select IRQ_DOMAIN
 598         select PLAT_PXA
 599         select SPARSE_IRQ
 600         select GENERIC_ALLOCATOR
 601         select NEED_MACH_GPIO_H
 602         help
 603           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 604
 605 config ARCH_KS8695
 606         bool "Micrel/Kendin KS8695"
 607         select CPU_ARM922T
 608         select ARCH_REQUIRE_GPIOLIB
 609         select NEED_MACH_MEMORY_H
 610         select CLKSRC_MMIO
 611         select GENERIC_CLOCKEVENTS
 612         help
 613           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 614           System-on-Chip devices.
 615
 616 config ARCH_W90X900
 617         bool "Nuvoton W90X900 CPU"
 618         select CPU_ARM926T
 619         select ARCH_REQUIRE_GPIOLIB
 620         select CLKDEV_LOOKUP
 621         select CLKSRC_MMIO
 622         select GENERIC_CLOCKEVENTS
 623         help
 624           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 625           At present, the w90x900 has been renamed nuc900, regarding
 626           the ARM series product line, you can login the following
 627           link address to know more.
 628
 629           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 630                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 631
 632 config ARCH_TEGRA
 633         bool "NVIDIA Tegra"
 634         select CLKDEV_LOOKUP
 635         select CLKSRC_MMIO
 636         select GENERIC_CLOCKEVENTS
 637         select GENERIC_GPIO
 638         select HAVE_CLK
 639         select HAVE_SMP
 640         select MIGHT_HAVE_CACHE_L2X0
 641         select ARCH_HAS_CPUFREQ
 642         select USE_OF
 643         select COMMON_CLK
 644         help
 645           This enables support for NVIDIA Tegra based systems (Tegra APX,
 646           Tegra 6xx and Tegra 2 series).
 647
 648 config ARCH_PXA
 649         bool "PXA2xx/PXA3xx-based"
 650         depends on MMU
 651         select ARCH_MTD_XIP
 652         select ARCH_HAS_CPUFREQ
 653         select CLKDEV_LOOKUP
 654         select CLKSRC_MMIO
 655         select ARCH_REQUIRE_GPIOLIB
 656         select GENERIC_CLOCKEVENTS
 657         select GPIO_PXA
 658         select PLAT_PXA
 659         select SPARSE_IRQ
 660         select AUTO_ZRELADDR
 661         select MULTI_IRQ_HANDLER
 662         select ARM_CPU_SUSPEND if PM
 663         select HAVE_IDE
 664         select NEED_MACH_GPIO_H
 665         help
 666           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 667
 668 config ARCH_MSM
 669         bool "Qualcomm MSM"
 670         select HAVE_CLK
 671         select GENERIC_CLOCKEVENTS
 672         select ARCH_REQUIRE_GPIOLIB
 673         select CLKDEV_LOOKUP
 674         help
 675           Support for Qualcomm MSM/QSD based systems.  This runs on the
 676           apps processor of the MSM/QSD and depends on a shared memory
 677           interface to the modem processor which runs the baseband
 678           stack and controls some vital subsystems
 679           (clock and power control, etc).
 680
 681 config ARCH_SHMOBILE
 682         bool "Renesas SH-Mobile / R-Mobile"
 683         select HAVE_CLK
 684         select CLKDEV_LOOKUP
 685         select HAVE_MACH_CLKDEV
 686         select HAVE_SMP
 687         select GENERIC_CLOCKEVENTS
 688         select MIGHT_HAVE_CACHE_L2X0
 689         select NO_IOPORT
 690         select SPARSE_IRQ
 691         select MULTI_IRQ_HANDLER
 692         select PM_GENERIC_DOMAINS if PM
 693         select NEED_MACH_MEMORY_H
 694         help
 695           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 696
 697 config ARCH_RPC
 698         bool "RiscPC"
 699         select ARCH_ACORN
 700         select FIQ
 701         select ARCH_MAY_HAVE_PC_FDC
 702         select HAVE_PATA_PLATFORM
 703         select ISA_DMA_API
 704         select NO_IOPORT
 705         select ARCH_SPARSEMEM_ENABLE
 706         select ARCH_USES_GETTIMEOFFSET
 707         select HAVE_IDE
 708         select NEED_MACH_IO_H
 709         select NEED_MACH_MEMORY_H
 710         help
 711           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 712           CD-ROM interface, serial and parallel port, and the floppy drive.
 713
 714 config ARCH_SA1100
 715         bool "SA1100-based"
 716         select CLKSRC_MMIO
 717         select CPU_SA1100
 718         select ISA
 719         select ARCH_SPARSEMEM_ENABLE
 720         select ARCH_MTD_XIP
 721         select ARCH_HAS_CPUFREQ
 722         select CPU_FREQ
 723         select GENERIC_CLOCKEVENTS
 724         select CLKDEV_LOOKUP
 725         select ARCH_REQUIRE_GPIOLIB
 726         select HAVE_IDE
 727         select NEED_MACH_GPIO_H
 728         select NEED_MACH_MEMORY_H
 729         select SPARSE_IRQ
 730         help
 731           Support for StrongARM 11x0 based boards.
 732
 733 config ARCH_S3C24XX
 734         bool "Samsung S3C24XX SoCs"
 735         select GENERIC_GPIO
 736         select ARCH_HAS_CPUFREQ
 737         select HAVE_CLK
 738         select CLKDEV_LOOKUP
 739         select ARCH_USES_GETTIMEOFFSET
 740         select HAVE_S3C2410_I2C if I2C
 741         select HAVE_S3C_RTC if RTC_CLASS
 742         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 743         select NEED_MACH_GPIO_H
 744         select NEED_MACH_IO_H
 745         help
 746           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 747           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 748           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 749           Samsung SMDK2410 development board (and derivatives).
 750
 751 config ARCH_S3C64XX
 752         bool "Samsung S3C64XX"
 753         select PLAT_SAMSUNG
 754         select CPU_V6
 755         select ARM_VIC
 756         select HAVE_CLK
 757         select HAVE_TCM
 758         select CLKDEV_LOOKUP
 759         select NO_IOPORT
 760         select ARCH_USES_GETTIMEOFFSET
 761         select ARCH_HAS_CPUFREQ
 762         select ARCH_REQUIRE_GPIOLIB
 763         select SAMSUNG_CLKSRC
 764         select SAMSUNG_IRQ_VIC_TIMER
 765         select S3C_GPIO_TRACK
 766         select S3C_DEV_NAND
 767         select USB_ARCH_HAS_OHCI
 768         select SAMSUNG_GPIOLIB_4BIT
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 771         select NEED_MACH_GPIO_H
 772         help
 773           Samsung S3C64XX series based systems
 774
 775 config ARCH_S5P64X0
 776         bool "Samsung S5P6440 S5P6450"
 777         select CPU_V6
 778         select GENERIC_GPIO
 779         select HAVE_CLK
 780         select CLKDEV_LOOKUP
 781         select CLKSRC_MMIO
 782         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 783         select GENERIC_CLOCKEVENTS
 784         select HAVE_S3C2410_I2C if I2C
 785         select HAVE_S3C_RTC if RTC_CLASS
 786         select NEED_MACH_GPIO_H
 787         help
 788           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 789           SMDK6450.
 790
 791 config ARCH_S5PC100
 792         bool "Samsung S5PC100"
 793         select GENERIC_GPIO
 794         select HAVE_CLK
 795         select CLKDEV_LOOKUP
 796         select CPU_V7
 797         select ARCH_USES_GETTIMEOFFSET
 798         select HAVE_S3C2410_I2C if I2C
 799         select HAVE_S3C_RTC if RTC_CLASS
 800         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 801         select NEED_MACH_GPIO_H
 802         help
 803           Samsung S5PC100 series based systems
 804
 805 config ARCH_S5PV210
 806         bool "Samsung S5PV210/S5PC110"
 807         select CPU_V7
 808         select ARCH_SPARSEMEM_ENABLE
 809         select ARCH_HAS_HOLES_MEMORYMODEL
 810         select GENERIC_GPIO
 811         select HAVE_CLK
 812         select CLKDEV_LOOKUP
 813         select CLKSRC_MMIO
 814         select ARCH_HAS_CPUFREQ
 815         select GENERIC_CLOCKEVENTS
 816         select HAVE_S3C2410_I2C if I2C
 817         select HAVE_S3C_RTC if RTC_CLASS
 818         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 819         select NEED_MACH_GPIO_H
 820         select NEED_MACH_MEMORY_H
 821         help
 822           Samsung S5PV210/S5PC110 series based systems
 823
 824 config ARCH_EXYNOS
 825         bool "SAMSUNG EXYNOS"
 826         select CPU_V7
 827         select ARCH_SPARSEMEM_ENABLE
 828         select ARCH_HAS_HOLES_MEMORYMODEL
 829         select GENERIC_GPIO
 830         select HAVE_CLK
 831         select CLKDEV_LOOKUP
 832         select ARCH_HAS_CPUFREQ
 833         select GENERIC_CLOCKEVENTS
 834         select HAVE_S3C_RTC if RTC_CLASS
 835         select HAVE_S3C2410_I2C if I2C
 836         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 837         select NEED_MACH_GPIO_H
 838         select NEED_MACH_MEMORY_H
 839         help
 840           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 841
 842 config ARCH_SHARK
 843         bool "Shark"
 844         select CPU_SA110
 845         select ISA
 846         select ISA_DMA
 847         select ZONE_DMA
 848         select PCI
 849         select ARCH_USES_GETTIMEOFFSET
 850         select NEED_MACH_MEMORY_H
 851         help
 852           Support for the StrongARM based Digital DNARD machine, also known
 853           as "Shark" (<http://www.shark-linux.de/shark.html>).
 854
 855 config ARCH_U300
 856         bool "ST-Ericsson U300 Series"
 857         depends on MMU
 858         select CLKSRC_MMIO
 859         select CPU_ARM926T
 860         select HAVE_TCM
 861         select ARM_AMBA
 862         select ARM_PATCH_PHYS_VIRT
 863         select ARM_VIC
 864         select GENERIC_CLOCKEVENTS
 865         select CLKDEV_LOOKUP
 866         select COMMON_CLK
 867         select GENERIC_GPIO
 868         select ARCH_REQUIRE_GPIOLIB
 869         select SPARSE_IRQ
 870         help
 871           Support for ST-Ericsson U300 series mobile platforms.
 872
 873 config ARCH_U8500
 874         bool "ST-Ericsson U8500 Series"
 875         depends on MMU
 876         select CPU_V7
 877         select ARM_AMBA
 878         select GENERIC_CLOCKEVENTS
 879         select CLKDEV_LOOKUP
 880         select ARCH_REQUIRE_GPIOLIB
 881         select ARCH_HAS_CPUFREQ
 882         select HAVE_SMP
 883         select MIGHT_HAVE_CACHE_L2X0
 884         help
 885           Support for ST-Ericsson's Ux500 architecture
 886
 887 config ARCH_NOMADIK
 888         bool "STMicroelectronics Nomadik"
 889         select ARM_AMBA
 890         select ARM_VIC
 891         select CPU_ARM926T
 892         select COMMON_CLK
 893         select GENERIC_CLOCKEVENTS
 894         select PINCTRL
 895         select PINCTRL_STN8815
 896         select MIGHT_HAVE_CACHE_L2X0
 897         select ARCH_REQUIRE_GPIOLIB
 898         help
 899           Support for the Nomadik platform by ST-Ericsson
 900
 901 config ARCH_DAVINCI
 902         bool "TI DaVinci"
 903         select GENERIC_CLOCKEVENTS
 904         select ARCH_REQUIRE_GPIOLIB
 905         select ZONE_DMA
 906         select HAVE_IDE
 907         select CLKDEV_LOOKUP
 908         select GENERIC_ALLOCATOR
 909         select GENERIC_IRQ_CHIP
 910         select ARCH_HAS_HOLES_MEMORYMODEL
 911         select NEED_MACH_GPIO_H
 912         help
 913           Support for TI's DaVinci platform.
 914
 915 config ARCH_OMAP
 916         bool "TI OMAP"
 917         depends on MMU
 918         select HAVE_CLK
 919         select ARCH_REQUIRE_GPIOLIB
 920         select ARCH_HAS_CPUFREQ
 921         select CLKSRC_MMIO
 922         select GENERIC_CLOCKEVENTS
 923         select ARCH_HAS_HOLES_MEMORYMODEL
 924         select NEED_MACH_GPIO_H
 925         help
 926           Support for TI's OMAP platform (OMAP1/2/3/4).
 927
 928 config PLAT_SPEAR
 929         bool "ST SPEAr"
 930         select ARM_AMBA
 931         select ARCH_REQUIRE_GPIOLIB
 932         select CLKDEV_LOOKUP
 933         select COMMON_CLK
 934         select CLKSRC_MMIO
 935         select GENERIC_CLOCKEVENTS
 936         select HAVE_CLK
 937         help
 938           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 939
 940 config ARCH_VT8500
 941         bool "VIA/WonderMedia 85xx"
 942         select CPU_ARM926T
 943         select GENERIC_GPIO
 944         select ARCH_HAS_CPUFREQ
 945         select GENERIC_CLOCKEVENTS
 946         select ARCH_REQUIRE_GPIOLIB
 947         select USE_OF
 948         select COMMON_CLK
 949         select HAVE_CLK
 950         select CLKDEV_LOOKUP
 951         help
 952           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 953
 954 config ARCH_ZYNQ
 955         bool "Xilinx Zynq ARM Cortex A9 Platform"
 956         select CPU_V7
 957         select GENERIC_CLOCKEVENTS
 958         select CLKDEV_LOOKUP
 959         select ARM_GIC
 960         select ARM_AMBA
 961         select ICST
 962         select MIGHT_HAVE_CACHE_L2X0
 963         select USE_OF
 964         help
 965           Support for Xilinx Zynq ARM Cortex A9 Platform
 966 endchoice
 967
 968 menu "Multiple platform selection"
 969         depends on ARCH_MULTIPLATFORM
 970
 971 comment "CPU Core family selection"
 972
 973 config ARCH_MULTI_V4
 974         bool "ARMv4 based platforms (FA526, StrongARM)"
 975         select ARCH_MULTI_V4_V5
 976         depends on !ARCH_MULTI_V6_V7
 977
 978 config ARCH_MULTI_V4T
 979         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 980         select ARCH_MULTI_V4_V5
 981         depends on !ARCH_MULTI_V6_V7
 982
 983 config ARCH_MULTI_V5
 984         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 985         select ARCH_MULTI_V4_V5
 986         depends on !ARCH_MULTI_V6_V7
 987
 988 config ARCH_MULTI_V4_V5
 989         bool
 990
 991 config ARCH_MULTI_V6
 992         bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
 993         select CPU_V6
 994         select ARCH_MULTI_V6_V7
 995
 996 config ARCH_MULTI_V7
 997         bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
 998         select CPU_V7
 999         select ARCH_VEXPRESS
1000         default y
1001         select ARCH_MULTI_V6_V7
1002
1003 config ARCH_MULTI_V6_V7
1004         bool
1005
1006 config ARCH_MULTI_CPU_AUTO
1007         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1008         select ARCH_MULTI_V5
1009
1010 endmenu
1011
1012 #
1013 # This is sorted alphabetically by mach-* pathname.  However, plat-*
1014 # Kconfigs may be included either alphabetically (according to the
1015 # plat- suffix) or along side the corresponding mach-* source.
1016 #
1017 source "arch/arm/mach-mvebu/Kconfig"
1018
1019 source "arch/arm/mach-at91/Kconfig"
1020
1021 source "arch/arm/mach-clps711x/Kconfig"
1022
1023 source "arch/arm/mach-cns3xxx/Kconfig"
1024
1025 source "arch/arm/mach-davinci/Kconfig"
1026
1027 source "arch/arm/mach-dove/Kconfig"
1028
1029 source "arch/arm/mach-ep93xx/Kconfig"
1030
1031 source "arch/arm/mach-footbridge/Kconfig"
1032
1033 source "arch/arm/mach-gemini/Kconfig"
1034
1035 source "arch/arm/mach-h720x/Kconfig"
1036
1037 source "arch/arm/mach-highbank/Kconfig"
1038
1039 source "arch/arm/mach-integrator/Kconfig"
1040
1041 source "arch/arm/mach-iop32x/Kconfig"
1042
1043 source "arch/arm/mach-iop33x/Kconfig"
1044
1045 source "arch/arm/mach-iop13xx/Kconfig"
1046
1047 source "arch/arm/mach-ixp4xx/Kconfig"
1048
1049 source "arch/arm/mach-kirkwood/Kconfig"
1050
1051 source "arch/arm/mach-ks8695/Kconfig"
1052
1053 source "arch/arm/mach-msm/Kconfig"
1054
1055 source "arch/arm/mach-mv78xx0/Kconfig"
1056
1057 source "arch/arm/plat-mxc/Kconfig"
1058
1059 source "arch/arm/mach-mxs/Kconfig"
1060
1061 source "arch/arm/mach-netx/Kconfig"
1062
1063 source "arch/arm/mach-nomadik/Kconfig"
1064 source "arch/arm/plat-nomadik/Kconfig"
1065
1066 source "arch/arm/plat-omap/Kconfig"
1067
1068 source "arch/arm/mach-omap1/Kconfig"
1069
1070 source "arch/arm/mach-omap2/Kconfig"
1071
1072 source "arch/arm/mach-orion5x/Kconfig"
1073
1074 source "arch/arm/mach-picoxcell/Kconfig"
1075
1076 source "arch/arm/mach-pxa/Kconfig"
1077 source "arch/arm/plat-pxa/Kconfig"
1078
1079 source "arch/arm/mach-mmp/Kconfig"
1080
1081 source "arch/arm/mach-realview/Kconfig"
1082
1083 source "arch/arm/mach-sa1100/Kconfig"
1084
1085 source "arch/arm/plat-samsung/Kconfig"
1086 source "arch/arm/plat-s3c24xx/Kconfig"
1087
1088 source "arch/arm/mach-socfpga/Kconfig"
1089
1090 source "arch/arm/plat-spear/Kconfig"
1091
1092 source "arch/arm/mach-s3c24xx/Kconfig"
1093 if ARCH_S3C24XX
1094 source "arch/arm/mach-s3c2412/Kconfig"
1095 source "arch/arm/mach-s3c2440/Kconfig"
1096 endif
1097
1098 if ARCH_S3C64XX
1099 source "arch/arm/mach-s3c64xx/Kconfig"
1100 endif
1101
1102 source "arch/arm/mach-s5p64x0/Kconfig"
1103
1104 source "arch/arm/mach-s5pc100/Kconfig"
1105
1106 source "arch/arm/mach-s5pv210/Kconfig"
1107
1108 source "arch/arm/mach-exynos/Kconfig"
1109
1110 source "arch/arm/mach-shmobile/Kconfig"
1111
1112 source "arch/arm/mach-prima2/Kconfig"
1113
1114 source "arch/arm/mach-tegra/Kconfig"
1115
1116 source "arch/arm/mach-u300/Kconfig"
1117
1118 source "arch/arm/mach-ux500/Kconfig"
1119
1120 source "arch/arm/mach-versatile/Kconfig"
1121
1122 source "arch/arm/mach-vexpress/Kconfig"
1123 source "arch/arm/plat-versatile/Kconfig"
1124
1125 source "arch/arm/mach-w90x900/Kconfig"
1126
1127 # Definitions to make life easier
1128 config ARCH_ACORN
1129         bool
1130
1131 config PLAT_IOP
1132         bool
1133         select GENERIC_CLOCKEVENTS
1134
1135 config PLAT_ORION
1136         bool
1137         select CLKSRC_MMIO
1138         select GENERIC_IRQ_CHIP
1139         select IRQ_DOMAIN
1140         select COMMON_CLK
1141
1142 config PLAT_ORION_LEGACY
1143         bool
1144         select PLAT_ORION
1145
1146 config PLAT_PXA
1147         bool
1148
1149 config PLAT_VERSATILE
1150         bool
1151
1152 config ARM_TIMER_SP804
1153         bool
1154         select CLKSRC_MMIO
1155         select HAVE_SCHED_CLOCK
1156
1157 source arch/arm/mm/Kconfig
1158
1159 config ARM_NR_BANKS
1160         int
1161         default 16 if ARCH_EP93XX
1162         default 8
1163
1164 config IWMMXT
1165         bool "Enable iWMMXt support"
1166         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1167         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1168         help
1169           Enable support for iWMMXt context switching at run time if
1170           running on a CPU that supports it.
1171
1172 config XSCALE_PMU
1173         bool
1174         depends on CPU_XSCALE
1175         default y
1176
1177 config MULTI_IRQ_HANDLER
1178         bool
1179         help
1180           Allow each machine to specify it's own IRQ handler at run time.
1181
1182 if !MMU
1183 source "arch/arm/Kconfig-nommu"
1184 endif
1185
1186 config ARM_ERRATA_326103
1187         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1188         depends on CPU_V6
1189         help
1190           Executing a SWP instruction to read-only memory does not set bit 11
1191           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1192           treat the access as a read, preventing a COW from occurring and
1193           causing the faulting task to livelock.
1194
1195 config ARM_ERRATA_411920
1196         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1197         depends on CPU_V6 || CPU_V6K
1198         help
1199           Invalidation of the Instruction Cache operation can
1200           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1201           It does not affect the MPCore. This option enables the ARM Ltd.
1202           recommended workaround.
1203
1204 config ARM_ERRATA_430973
1205         bool "ARM errata: Stale prediction on replaced interworking branch"
1206         depends on CPU_V7
1207         help
1208           This option enables the workaround for the 430973 Cortex-A8
1209           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1210           interworking branch is replaced with another code sequence at the
1211           same virtual address, whether due to self-modifying code or virtual
1212           to physical address re-mapping, Cortex-A8 does not recover from the
1213           stale interworking branch prediction. This results in Cortex-A8
1214           executing the new code sequence in the incorrect ARM or Thumb state.
1215           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1216           and also flushes the branch target cache at every context switch.
1217           Note that setting specific bits in the ACTLR register may not be
1218           available in non-secure mode.
1219
1220 config ARM_ERRATA_458693
1221         bool "ARM errata: Processor deadlock when a false hazard is created"
1222         depends on CPU_V7
1223         help
1224           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1225           erratum. For very specific sequences of memory operations, it is
1226           possible for a hazard condition intended for a cache line to instead
1227           be incorrectly associated with a different cache line. This false
1228           hazard might then cause a processor deadlock. The workaround enables
1229           the L1 caching of the NEON accesses and disables the PLD instruction
1230           in the ACTLR register. Note that setting specific bits in the ACTLR
1231           register may not be available in non-secure mode.
1232
1233 config ARM_ERRATA_460075
1234         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1235         depends on CPU_V7
1236         help
1237           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1238           erratum. Any asynchronous access to the L2 cache may encounter a
1239           situation in which recent store transactions to the L2 cache are lost
1240           and overwritten with stale memory contents from external memory. The
1241           workaround disables the write-allocate mode for the L2 cache via the
1242           ACTLR register. Note that setting specific bits in the ACTLR register
1243           may not be available in non-secure mode.
1244
1245 config ARM_ERRATA_742230
1246         bool "ARM errata: DMB operation may be faulty"
1247         depends on CPU_V7 && SMP
1248         help
1249           This option enables the workaround for the 742230 Cortex-A9
1250           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1251           between two write operations may not ensure the correct visibility
1252           ordering of the two writes. This workaround sets a specific bit in
1253           the diagnostic register of the Cortex-A9 which causes the DMB
1254           instruction to behave as a DSB, ensuring the correct behaviour of
1255           the two writes.
1256
1257 config ARM_ERRATA_742231
1258         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1259         depends on CPU_V7 && SMP
1260         help
1261           This option enables the workaround for the 742231 Cortex-A9
1262           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1263           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1264           accessing some data located in the same cache line, may get corrupted
1265           data due to bad handling of the address hazard when the line gets
1266           replaced from one of the CPUs at the same time as another CPU is
1267           accessing it. This workaround sets specific bits in the diagnostic
1268           register of the Cortex-A9 which reduces the linefill issuing
1269           capabilities of the processor.
1270
1271 config PL310_ERRATA_588369
1272         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1273         depends on CACHE_L2X0
1274         help
1275            The PL310 L2 cache controller implements three types of Clean &
1276            Invalidate maintenance operations: by Physical Address
1277            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1278            They are architecturally defined to behave as the execution of a
1279            clean operation followed immediately by an invalidate operation,
1280            both performing to the same memory location. This functionality
1281            is not correctly implemented in PL310 as clean lines are not
1282            invalidated as a result of these operations.
1283
1284 config ARM_ERRATA_720789
1285         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1286         depends on CPU_V7
1287         help
1288           This option enables the workaround for the 720789 Cortex-A9 (prior to
1289           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1290           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1291           As a consequence of this erratum, some TLB entries which should be
1292           invalidated are not, resulting in an incoherency in the system page
1293           tables. The workaround changes the TLB flushing routines to invalidate
1294           entries regardless of the ASID.
1295
1296 config PL310_ERRATA_727915
1297         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1298         depends on CACHE_L2X0
1299         help
1300           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1301           operation (offset 0x7FC). This operation runs in background so that
1302           PL310 can handle normal accesses while it is in progress. Under very
1303           rare circumstances, due to this erratum, write data can be lost when
1304           PL310 treats a cacheable write transaction during a Clean &
1305           Invalidate by Way operation.
1306
1307 config ARM_ERRATA_743622
1308         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1309         depends on CPU_V7
1310         help
1311           This option enables the workaround for the 743622 Cortex-A9
1312           (r2p*) erratum. Under very rare conditions, a faulty
1313           optimisation in the Cortex-A9 Store Buffer may lead to data
1314           corruption. This workaround sets a specific bit in the diagnostic
1315           register of the Cortex-A9 which disables the Store Buffer
1316           optimisation, preventing the defect from occurring. This has no
1317           visible impact on the overall performance or power consumption of the
1318           processor.
1319
1320 config ARM_ERRATA_751472
1321         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1322         depends on CPU_V7
1323         help
1324           This option enables the workaround for the 751472 Cortex-A9 (prior
1325           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1326           completion of a following broadcasted operation if the second
1327           operation is received by a CPU before the ICIALLUIS has completed,
1328           potentially leading to corrupted entries in the cache or TLB.
1329
1330 config PL310_ERRATA_753970
1331         bool "PL310 errata: cache sync operation may be faulty"
1332         depends on CACHE_PL310
1333         help
1334           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1335
1336           Under some condition the effect of cache sync operation on
1337           the store buffer still remains when the operation completes.
1338           This means that the store buffer is always asked to drain and
1339           this prevents it from merging any further writes. The workaround
1340           is to replace the normal offset of cache sync operation (0x730)
1341           by another offset targeting an unmapped PL310 register 0x740.
1342           This has the same effect as the cache sync operation: store buffer
1343           drain and waiting for all buffers empty.
1344
1345 config ARM_ERRATA_754322
1346         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1347         depends on CPU_V7
1348         help
1349           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1350           r3p*) erratum. A speculative memory access may cause a page table walk
1351           which starts prior to an ASID switch but completes afterwards. This
1352           can populate the micro-TLB with a stale entry which may be hit with
1353           the new ASID. This workaround places two dsb instructions in the mm
1354           switching code so that no page table walks can cross the ASID switch.
1355
1356 config ARM_ERRATA_754327
1357         bool "ARM errata: no automatic Store Buffer drain"
1358         depends on CPU_V7 && SMP
1359         help
1360           This option enables the workaround for the 754327 Cortex-A9 (prior to
1361           r2p0) erratum. The Store Buffer does not have any automatic draining
1362           mechanism and therefore a livelock may occur if an external agent
1363           continuously polls a memory location waiting to observe an update.
1364           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1365           written polling loops from denying visibility of updates to memory.
1366
1367 config ARM_ERRATA_364296
1368         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1369         depends on CPU_V6 && !SMP
1370         help
1371           This options enables the workaround for the 364296 ARM1136
1372           r0p2 erratum (possible cache data corruption with
1373           hit-under-miss enabled). It sets the undocumented bit 31 in
1374           the auxiliary control register and the FI bit in the control
1375           register, thus disabling hit-under-miss without putting the
1376           processor into full low interrupt latency mode. ARM11MPCore
1377           is not affected.
1378
1379 config ARM_ERRATA_764369
1380         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1381         depends on CPU_V7 && SMP
1382         help
1383           This option enables the workaround for erratum 764369
1384           affecting Cortex-A9 MPCore with two or more processors (all
1385           current revisions). Under certain timing circumstances, a data
1386           cache line maintenance operation by MVA targeting an Inner
1387           Shareable memory region may fail to proceed up to either the
1388           Point of Coherency or to the Point of Unification of the
1389           system. This workaround adds a DSB instruction before the
1390           relevant cache maintenance functions and sets a specific bit
1391           in the diagnostic control register of the SCU.
1392
1393 config PL310_ERRATA_769419
1394         bool "PL310 errata: no automatic Store Buffer drain"
1395         depends on CACHE_L2X0
1396         help
1397           On revisions of the PL310 prior to r3p2, the Store Buffer does
1398           not automatically drain. This can cause normal, non-cacheable
1399           writes to be retained when the memory system is idle, leading
1400           to suboptimal I/O performance for drivers using coherent DMA.
1401           This option adds a write barrier to the cpu_idle loop so that,
1402           on systems with an outer cache, the store buffer is drained
1403           explicitly.
1404
1405 endmenu
1406
1407 source "arch/arm/common/Kconfig"
1408
1409 menu "Bus support"
1410
1411 config ARM_AMBA
1412         bool
1413
1414 config ISA
1415         bool
1416         help
1417           Find out whether you have ISA slots on your motherboard.  ISA is the
1418           name of a bus system, i.e. the way the CPU talks to the other stuff
1419           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1420           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1421           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1422
1423 # Select ISA DMA controller support
1424 config ISA_DMA
1425         bool
1426         select ISA_DMA_API
1427
1428 # Select ISA DMA interface
1429 config ISA_DMA_API
1430         bool
1431
1432 config PCI
1433         bool "PCI support" if MIGHT_HAVE_PCI
1434         help
1435           Find out whether you have a PCI motherboard. PCI is the name of a
1436           bus system, i.e. the way the CPU talks to the other stuff inside
1437           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1438           VESA. If you have PCI, say Y, otherwise N.
1439
1440 config PCI_DOMAINS
1441         bool
1442         depends on PCI
1443
1444 config PCI_NANOENGINE
1445         bool "BSE nanoEngine PCI support"
1446         depends on SA1100_NANOENGINE
1447         help
1448           Enable PCI on the BSE nanoEngine board.
1449
1450 config PCI_SYSCALL
1451         def_bool PCI
1452
1453 # Select the host bridge type
1454 config PCI_HOST_VIA82C505
1455         bool
1456         depends on PCI && ARCH_SHARK
1457         default y
1458
1459 config PCI_HOST_ITE8152
1460         bool
1461         depends on PCI && MACH_ARMCORE
1462         default y
1463         select DMABOUNCE
1464
1465 source "drivers/pci/Kconfig"
1466
1467 source "drivers/pcmcia/Kconfig"
1468
1469 endmenu
1470
1471 menu "Kernel Features"
1472
1473 config HAVE_SMP
1474         bool
1475         help
1476           This option should be selected by machines which have an SMP-
1477           capable CPU.
1478
1479           The only effect of this option is to make the SMP-related
1480           options available to the user for configuration.
1481
1482 config SMP
1483         bool "Symmetric Multi-Processing"
1484         depends on CPU_V6K || CPU_V7
1485         depends on GENERIC_CLOCKEVENTS
1486         depends on HAVE_SMP
1487         depends on MMU
1488         select USE_GENERIC_SMP_HELPERS
1489         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1490         help
1491           This enables support for systems with more than one CPU. If you have
1492           a system with only one CPU, like most personal computers, say N. If
1493           you have a system with more than one CPU, say Y.
1494
1495           If you say N here, the kernel will run on single and multiprocessor
1496           machines, but will use only one CPU of a multiprocessor machine. If
1497           you say Y here, the kernel will run on many, but not all, single
1498           processor machines. On a single processor machine, the kernel will
1499           run faster if you say N here.
1500
1501           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1502           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1503           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1504
1505           If you don't know what to do here, say N.
1506
1507 config SMP_ON_UP
1508         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1509         depends on EXPERIMENTAL
1510         depends on SMP && !XIP_KERNEL
1511         default y
1512         help
1513           SMP kernels contain instructions which fail on non-SMP processors.
1514           Enabling this option allows the kernel to modify itself to make
1515           these instructions safe.  Disabling it allows about 1K of space
1516           savings.
1517
1518           If you don't know what to do here, say Y.
1519
1520 config ARM_CPU_TOPOLOGY
1521         bool "Support cpu topology definition"
1522         depends on SMP && CPU_V7
1523         default y
1524         help
1525           Support ARM cpu topology definition. The MPIDR register defines
1526           affinity between processors which is then used to describe the cpu
1527           topology of an ARM System.
1528
1529 config SCHED_MC
1530         bool "Multi-core scheduler support"
1531         depends on ARM_CPU_TOPOLOGY
1532         help
1533           Multi-core scheduler support improves the CPU scheduler's decision
1534           making when dealing with multi-core CPU chips at a cost of slightly
1535           increased overhead in some places. If unsure say N here.
1536
1537 config SCHED_SMT
1538         bool "SMT scheduler support"
1539         depends on ARM_CPU_TOPOLOGY
1540         help
1541           Improves the CPU scheduler's decision making when dealing with
1542           MultiThreading at a cost of slightly increased overhead in some
1543           places. If unsure say N here.
1544
1545 config HAVE_ARM_SCU
1546         bool
1547         help
1548           This option enables support for the ARM system coherency unit
1549
1550 config ARM_ARCH_TIMER
1551         bool "Architected timer support"
1552         depends on CPU_V7
1553         help
1554           This option enables support for the ARM architected timer
1555
1556 config HAVE_ARM_TWD
1557         bool
1558         depends on SMP
1559         help
1560           This options enables support for the ARM timer and watchdog unit
1561
1562 choice
1563         prompt "Memory split"
1564         default VMSPLIT_3G
1565         help
1566           Select the desired split between kernel and user memory.
1567
1568           If you are not absolutely sure what you are doing, leave this
1569           option alone!
1570
1571         config VMSPLIT_3G
1572                 bool "3G/1G user/kernel split"
1573         config VMSPLIT_2G
1574                 bool "2G/2G user/kernel split"
1575         config VMSPLIT_1G
1576                 bool "1G/3G user/kernel split"
1577 endchoice
1578
1579 config PAGE_OFFSET
1580         hex
1581         default 0x40000000 if VMSPLIT_1G
1582         default 0x80000000 if VMSPLIT_2G
1583         default 0xC0000000
1584
1585 config NR_CPUS
1586         int "Maximum number of CPUs (2-32)"
1587         range 2 32
1588         depends on SMP
1589         default "4"
1590
1591 config HOTPLUG_CPU
1592         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1593         depends on SMP && HOTPLUG && EXPERIMENTAL
1594         help
1595           Say Y here to experiment with turning CPUs off and on.  CPUs
1596           can be controlled through /sys/devices/system/cpu.
1597
1598 config LOCAL_TIMERS
1599         bool "Use local timer interrupts"
1600         depends on SMP
1601         default y
1602         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1603         help
1604           Enable support for local timers on SMP platforms, rather then the
1605           legacy IPI broadcast method.  Local timers allows the system
1606           accounting to be spread across the timer interval, preventing a
1607           "thundering herd" at every timer tick.
1608
1609 config ARCH_NR_GPIO
1610         int
1611         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1612         default 355 if ARCH_U8500
1613         default 264 if MACH_H4700
1614         default 512 if SOC_OMAP5
1615         default 288 if ARCH_VT8500
1616         default 0
1617         help
1618           Maximum number of GPIOs in the system.
1619
1620           If unsure, leave the default value.
1621
1622 source kernel/Kconfig.preempt
1623
1624 config HZ
1625         int
1626         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1627                 ARCH_S5PV210 || ARCH_EXYNOS4
1628         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1629         default AT91_TIMER_HZ if ARCH_AT91
1630         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1631         default 100
1632
1633 config THUMB2_KERNEL
1634         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1635         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1636         select AEABI
1637         select ARM_ASM_UNIFIED
1638         select ARM_UNWIND
1639         help
1640           By enabling this option, the kernel will be compiled in
1641           Thumb-2 mode. A compiler/assembler that understand the unified
1642           ARM-Thumb syntax is needed.
1643
1644           If unsure, say N.
1645
1646 config THUMB2_AVOID_R_ARM_THM_JUMP11
1647         bool "Work around buggy Thumb-2 short branch relocations in gas"
1648         depends on THUMB2_KERNEL && MODULES
1649         default y
1650         help
1651           Various binutils versions can resolve Thumb-2 branches to
1652           locally-defined, preemptible global symbols as short-range "b.n"
1653           branch instructions.
1654
1655           This is a problem, because there's no guarantee the final
1656           destination of the symbol, or any candidate locations for a
1657           trampoline, are within range of the branch.  For this reason, the
1658           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1659           relocation in modules at all, and it makes little sense to add
1660           support.
1661
1662           The symptom is that the kernel fails with an "unsupported
1663           relocation" error when loading some modules.
1664
1665           Until fixed tools are available, passing
1666           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1667           code which hits this problem, at the cost of a bit of extra runtime
1668           stack usage in some cases.
1669
1670           The problem is described in more detail at:
1671               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1672
1673           Only Thumb-2 kernels are affected.
1674
1675           Unless you are sure your tools don't have this problem, say Y.
1676
1677 config ARM_ASM_UNIFIED
1678         bool
1679
1680 config AEABI
1681         bool "Use the ARM EABI to compile the kernel"
1682         help
1683           This option allows for the kernel to be compiled using the latest
1684           ARM ABI (aka EABI).  This is only useful if you are using a user
1685           space environment that is also compiled with EABI.
1686
1687           Since there are major incompatibilities between the legacy ABI and
1688           EABI, especially with regard to structure member alignment, this
1689           option also changes the kernel syscall calling convention to
1690           disambiguate both ABIs and allow for backward compatibility support
1691           (selected with CONFIG_OABI_COMPAT).
1692
1693           To use this you need GCC version 4.0.0 or later.
1694
1695 config OABI_COMPAT
1696         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1697         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1698         default y
1699         help
1700           This option preserves the old syscall interface along with the
1701           new (ARM EABI) one. It also provides a compatibility layer to
1702           intercept syscalls that have structure arguments which layout
1703           in memory differs between the legacy ABI and the new ARM EABI
1704           (only for non "thumb" binaries). This option adds a tiny
1705           overhead to all syscalls and produces a slightly larger kernel.
1706           If you know you'll be using only pure EABI user space then you
1707           can say N here. If this option is not selected and you attempt
1708           to execute a legacy ABI binary then the result will be
1709           UNPREDICTABLE (in fact it can be predicted that it won't work
1710           at all). If in doubt say Y.
1711
1712 config ARCH_HAS_HOLES_MEMORYMODEL
1713         bool
1714
1715 config ARCH_SPARSEMEM_ENABLE
1716         bool
1717
1718 config ARCH_SPARSEMEM_DEFAULT
1719         def_bool ARCH_SPARSEMEM_ENABLE
1720
1721 config ARCH_SELECT_MEMORY_MODEL
1722         def_bool ARCH_SPARSEMEM_ENABLE
1723
1724 config HAVE_ARCH_PFN_VALID
1725         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1726
1727 config HIGHMEM
1728         bool "High Memory Support"
1729         depends on MMU
1730         help
1731           The address space of ARM processors is only 4 Gigabytes large
1732           and it has to accommodate user address space, kernel address
1733           space as well as some memory mapped IO. That means that, if you
1734           have a large amount of physical memory and/or IO, not all of the
1735           memory can be "permanently mapped" by the kernel. The physical
1736           memory that is not permanently mapped is called "high memory".
1737
1738           Depending on the selected kernel/user memory split, minimum
1739           vmalloc space and actual amount of RAM, you may not need this
1740           option which should result in a slightly faster kernel.
1741
1742           If unsure, say n.
1743
1744 config HIGHPTE
1745         bool "Allocate 2nd-level pagetables from highmem"
1746         depends on HIGHMEM
1747
1748 config HW_PERF_EVENTS
1749         bool "Enable hardware performance counter support for perf events"
1750         depends on PERF_EVENTS
1751         default y
1752         help
1753           Enable hardware performance counter support for perf events. If
1754           disabled, perf events will use software events only.
1755
1756 source "mm/Kconfig"
1757
1758 config FORCE_MAX_ZONEORDER
1759         int "Maximum zone order" if ARCH_SHMOBILE
1760         range 11 64 if ARCH_SHMOBILE
1761         default "9" if SA1111
1762         default "11"
1763         help
1764           The kernel memory allocator divides physically contiguous memory
1765           blocks into "zones", where each zone is a power of two number of
1766           pages.  This option selects the largest power of two that the kernel
1767           keeps in the memory allocator.  If you need to allocate very large
1768           blocks of physically contiguous memory, then you may need to
1769           increase this value.
1770
1771           This config option is actually maximum order plus one. For example,
1772           a value of 11 means that the largest free memory block is 2^10 pages.
1773
1774 config ALIGNMENT_TRAP
1775         bool
1776         depends on CPU_CP15_MMU
1777         default y if !ARCH_EBSA110
1778         select HAVE_PROC_CPU if PROC_FS
1779         help
1780           ARM processors cannot fetch/store information which is not
1781           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1782           address divisible by 4. On 32-bit ARM processors, these non-aligned
1783           fetch/store instructions will be emulated in software if you say
1784           here, which has a severe performance impact. This is necessary for
1785           correct operation of some network protocols. With an IP-only
1786           configuration it is safe to say N, otherwise say Y.
1787
1788 config UACCESS_WITH_MEMCPY
1789         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1790         depends on MMU && EXPERIMENTAL
1791         default y if CPU_FEROCEON
1792         help
1793           Implement faster copy_to_user and clear_user methods for CPU
1794           cores where a 8-word STM instruction give significantly higher
1795           memory write throughput than a sequence of individual 32bit stores.
1796
1797           A possible side effect is a slight increase in scheduling latency
1798           between threads sharing the same address space if they invoke
1799           such copy operations with large buffers.
1800
1801           However, if the CPU data cache is using a write-allocate mode,
1802           this option is unlikely to provide any performance gain.
1803
1804 config SECCOMP
1805         bool
1806         prompt "Enable seccomp to safely compute untrusted bytecode"
1807         ---help---
1808           This kernel feature is useful for number crunching applications
1809           that may need to compute untrusted bytecode during their
1810           execution. By using pipes or other transports made available to
1811           the process as file descriptors supporting the read/write
1812           syscalls, it's possible to isolate those applications in
1813           their own address space using seccomp. Once seccomp is
1814           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1815           and the task is only allowed to execute a few safe syscalls
1816           defined by each seccomp mode.
1817
1818 config CC_STACKPROTECTOR
1819         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1820         depends on EXPERIMENTAL
1821         help
1822           This option turns on the -fstack-protector GCC feature. This
1823           feature puts, at the beginning of functions, a canary value on
1824           the stack just before the return address, and validates
1825           the value just before actually returning.  Stack based buffer
1826           overflows (that need to overwrite this return address) now also
1827           overwrite the canary, which gets detected and the attack is then
1828           neutralized via a kernel panic.
1829           This feature requires gcc version 4.2 or above.
1830
1831 config DEPRECATED_PARAM_STRUCT
1832         bool "Provide old way to pass kernel parameters"
1833         help
1834           This was deprecated in 2001 and announced to live on for 5 years.
1835           Some old boot loaders still use this way.
1836
1837 config XEN_DOM0
1838         def_bool y
1839         depends on XEN
1840
1841 config XEN
1842         bool "Xen guest support on ARM (EXPERIMENTAL)"
1843         depends on EXPERIMENTAL && ARM && OF
1844         help
1845           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1846
1847 endmenu
1848
1849 menu "Boot options"
1850
1851 config USE_OF
1852         bool "Flattened Device Tree support"
1853         select OF
1854         select OF_EARLY_FLATTREE
1855         select IRQ_DOMAIN
1856         help
1857           Include support for flattened device tree machine descriptions.
1858
1859 # Compressed boot loader in ROM.  Yes, we really want to ask about
1860 # TEXT and BSS so we preserve their values in the config files.
1861 config ZBOOT_ROM_TEXT
1862         hex "Compressed ROM boot loader base address"
1863         default "0"
1864         help
1865           The physical address at which the ROM-able zImage is to be
1866           placed in the target.  Platforms which normally make use of
1867           ROM-able zImage formats normally set this to a suitable
1868           value in their defconfig file.
1869
1870           If ZBOOT_ROM is not enabled, this has no effect.
1871
1872 config ZBOOT_ROM_BSS
1873         hex "Compressed ROM boot loader BSS address"
1874         default "0"
1875         help
1876           The base address of an area of read/write memory in the target
1877           for the ROM-able zImage which must be available while the
1878           decompressor is running. It must be large enough to hold the
1879           entire decompressed kernel plus an additional 128 KiB.
1880           Platforms which normally make use of ROM-able zImage formats
1881           normally set this to a suitable value in their defconfig file.
1882
1883           If ZBOOT_ROM is not enabled, this has no effect.
1884
1885 config ZBOOT_ROM
1886         bool "Compressed boot loader in ROM/flash"
1887         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1888         help
1889           Say Y here if you intend to execute your compressed kernel image
1890           (zImage) directly from ROM or flash.  If unsure, say N.
1891
1892 choice
1893         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1894         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1895         default ZBOOT_ROM_NONE
1896         help
1897           Include experimental SD/MMC loading code in the ROM-able zImage.
1898           With this enabled it is possible to write the ROM-able zImage
1899           kernel image to an MMC or SD card and boot the kernel straight
1900           from the reset vector. At reset the processor Mask ROM will load
1901           the first part of the ROM-able zImage which in turn loads the
1902           rest the kernel image to RAM.
1903
1904 config ZBOOT_ROM_NONE
1905         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1906         help
1907           Do not load image from SD or MMC
1908
1909 config ZBOOT_ROM_MMCIF
1910         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1911         help
1912           Load image from MMCIF hardware block.
1913
1914 config ZBOOT_ROM_SH_MOBILE_SDHI
1915         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1916         help
1917           Load image from SDHI hardware block
1918
1919 endchoice
1920
1921 config ARM_APPENDED_DTB
1922         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1923         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1924         help
1925           With this option, the boot code will look for a device tree binary
1926           (DTB) appended to zImage
1927           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1928
1929           This is meant as a backward compatibility convenience for those
1930           systems with a bootloader that can't be upgraded to accommodate
1931           the documented boot protocol using a device tree.
1932
1933           Beware that there is very little in terms of protection against
1934           this option being confused by leftover garbage in memory that might
1935           look like a DTB header after a reboot if no actual DTB is appended
1936           to zImage.  Do not leave this option active in a production kernel
1937           if you don't intend to always append a DTB.  Proper passing of the
1938           location into r2 of a bootloader provided DTB is always preferable
1939           to this option.
1940
1941 config ARM_ATAG_DTB_COMPAT
1942         bool "Supplement the appended DTB with traditional ATAG information"
1943         depends on ARM_APPENDED_DTB
1944         help
1945           Some old bootloaders can't be updated to a DTB capable one, yet
1946           they provide ATAGs with memory configuration, the ramdisk address,
1947           the kernel cmdline string, etc.  Such information is dynamically
1948           provided by the bootloader and can't always be stored in a static
1949           DTB.  To allow a device tree enabled kernel to be used with such
1950           bootloaders, this option allows zImage to extract the information
1951           from the ATAG list and store it at run time into the appended DTB.
1952
1953 choice
1954         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1955         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1956
1957 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1958         bool "Use bootloader kernel arguments if available"
1959         help
1960           Uses the command-line options passed by the boot loader instead of
1961           the device tree bootargs property. If the boot loader doesn't provide
1962           any, the device tree bootargs property will be used.
1963
1964 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1965         bool "Extend with bootloader kernel arguments"
1966         help
1967           The command-line arguments provided by the boot loader will be
1968           appended to the the device tree bootargs property.
1969
1970 endchoice
1971
1972 config CMDLINE
1973         string "Default kernel command string"
1974         default ""
1975         help
1976           On some architectures (EBSA110 and CATS), there is currently no way
1977           for the boot loader to pass arguments to the kernel. For these
1978           architectures, you should supply some command-line options at build
1979           time by entering them here. As a minimum, you should specify the
1980           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1981
1982 choice
1983         prompt "Kernel command line type" if CMDLINE != ""
1984         default CMDLINE_FROM_BOOTLOADER
1985
1986 config CMDLINE_FROM_BOOTLOADER
1987         bool "Use bootloader kernel arguments if available"
1988         help
1989           Uses the command-line options passed by the boot loader. If
1990           the boot loader doesn't provide any, the default kernel command
1991           string provided in CMDLINE will be used.
1992
1993 config CMDLINE_EXTEND
1994         bool "Extend bootloader kernel arguments"
1995         help
1996           The command-line arguments provided by the boot loader will be
1997           appended to the default kernel command string.
1998
1999 config CMDLINE_FORCE
2000         bool "Always use the default kernel command string"
2001         help
2002           Always use the default kernel command string, even if the boot
2003           loader passes other arguments to the kernel.
2004           This is useful if you cannot or don't want to change the
2005           command-line options your boot loader passes to the kernel.
2006 endchoice
2007
2008 config XIP_KERNEL
2009         bool "Kernel Execute-In-Place from ROM"
2010         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2011         help
2012           Execute-In-Place allows the kernel to run from non-volatile storage
2013           directly addressable by the CPU, such as NOR flash. This saves RAM
2014           space since the text section of the kernel is not loaded from flash
2015           to RAM.  Read-write sections, such as the data section and stack,
2016           are still copied to RAM.  The XIP kernel is not compressed since
2017           it has to run directly from flash, so it will take more space to
2018           store it.  The flash address used to link the kernel object files,
2019           and for storing it, is configuration dependent. Therefore, if you
2020           say Y here, you must know the proper physical address where to
2021           store the kernel image depending on your own flash memory usage.
2022
2023           Also note that the make target becomes "make xipImage" rather than
2024           "make zImage" or "make Image".  The final kernel binary to put in
2025           ROM memory will be arch/arm/boot/xipImage.
2026
2027           If unsure, say N.
2028
2029 config XIP_PHYS_ADDR
2030         hex "XIP Kernel Physical Location"
2031         depends on XIP_KERNEL
2032         default "0x00080000"
2033         help
2034           This is the physical address in your flash memory the kernel will
2035           be linked for and stored to.  This address is dependent on your
2036           own flash usage.
2037
2038 config KEXEC
2039         bool "Kexec system call (EXPERIMENTAL)"
2040         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2041         help
2042           kexec is a system call that implements the ability to shutdown your
2043           current kernel, and to start another kernel.  It is like a reboot
2044           but it is independent of the system firmware.   And like a reboot
2045           you can start any kernel with it, not just Linux.
2046
2047           It is an ongoing process to be certain the hardware in a machine
2048           is properly shutdown, so do not be surprised if this code does not
2049           initially work for you.  It may help to enable device hotplugging
2050           support.
2051
2052 config ATAGS_PROC
2053         bool "Export atags in procfs"
2054         depends on KEXEC
2055         default y
2056         help
2057           Should the atags used to boot the kernel be exported in an "atags"
2058           file in procfs. Useful with kexec.
2059
2060 config CRASH_DUMP
2061         bool "Build kdump crash kernel (EXPERIMENTAL)"
2062         depends on EXPERIMENTAL
2063         help
2064           Generate crash dump after being started by kexec. This should
2065           be normally only set in special crash dump kernels which are
2066           loaded in the main kernel with kexec-tools into a specially
2067           reserved region and then later executed after a crash by
2068           kdump/kexec. The crash dump kernel must be compiled to a
2069           memory address not used by the main kernel
2070
2071           For more details see Documentation/kdump/kdump.txt
2072
2073 config AUTO_ZRELADDR
2074         bool "Auto calculation of the decompressed kernel image address"
2075         depends on !ZBOOT_ROM && !ARCH_U300
2076         help
2077           ZRELADDR is the physical address where the decompressed kernel
2078           image will be placed. If AUTO_ZRELADDR is selected, the address
2079           will be determined at run-time by masking the current IP with
2080           0xf8000000. This assumes the zImage being placed in the first 128MB
2081           from start of memory.
2082
2083 endmenu
2084
2085 menu "CPU Power Management"
2086
2087 if ARCH_HAS_CPUFREQ
2088
2089 source "drivers/cpufreq/Kconfig"
2090
2091 config CPU_FREQ_IMX
2092         tristate "CPUfreq driver for i.MX CPUs"
2093         depends on ARCH_MXC && CPU_FREQ
2094         select CPU_FREQ_TABLE
2095         help
2096           This enables the CPUfreq driver for i.MX CPUs.
2097
2098 config CPU_FREQ_SA1100
2099         bool
2100
2101 config CPU_FREQ_SA1110
2102         bool
2103
2104 config CPU_FREQ_INTEGRATOR
2105         tristate "CPUfreq driver for ARM Integrator CPUs"
2106         depends on ARCH_INTEGRATOR && CPU_FREQ
2107         default y
2108         help
2109           This enables the CPUfreq driver for ARM Integrator CPUs.
2110
2111           For details, take a look at <file:Documentation/cpu-freq>.
2112
2113           If in doubt, say Y.
2114
2115 config CPU_FREQ_PXA
2116         bool
2117         depends on CPU_FREQ && ARCH_PXA && PXA25x
2118         default y
2119         select CPU_FREQ_TABLE
2120         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2121
2122 config CPU_FREQ_S3C
2123         bool
2124         help
2125           Internal configuration node for common cpufreq on Samsung SoC
2126
2127 config CPU_FREQ_S3C24XX
2128         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2129         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2130         select CPU_FREQ_S3C
2131         help
2132           This enables the CPUfreq driver for the Samsung S3C24XX family
2133           of CPUs.
2134
2135           For details, take a look at <file:Documentation/cpu-freq>.
2136
2137           If in doubt, say N.
2138
2139 config CPU_FREQ_S3C24XX_PLL
2140         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2141         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2142         help
2143           Compile in support for changing the PLL frequency from the
2144           S3C24XX series CPUfreq driver. The PLL takes time to settle
2145           after a frequency change, so by default it is not enabled.
2146
2147           This also means that the PLL tables for the selected CPU(s) will
2148           be built which may increase the size of the kernel image.
2149
2150 config CPU_FREQ_S3C24XX_DEBUG
2151         bool "Debug CPUfreq Samsung driver core"
2152         depends on CPU_FREQ_S3C24XX
2153         help
2154           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2155
2156 config CPU_FREQ_S3C24XX_IODEBUG
2157         bool "Debug CPUfreq Samsung driver IO timing"
2158         depends on CPU_FREQ_S3C24XX
2159         help
2160           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2161
2162 config CPU_FREQ_S3C24XX_DEBUGFS
2163         bool "Export debugfs for CPUFreq"
2164         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2165         help
2166           Export status information via debugfs.
2167
2168 endif
2169
2170 source "drivers/cpuidle/Kconfig"
2171
2172 endmenu
2173
2174 menu "Floating point emulation"
2175
2176 comment "At least one emulation must be selected"
2177
2178 config FPE_NWFPE
2179         bool "NWFPE math emulation"
2180         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2181         ---help---
2182           Say Y to include the NWFPE floating point emulator in the kernel.
2183           This is necessary to run most binaries. Linux does not currently
2184           support floating point hardware so you need to say Y here even if
2185           your machine has an FPA or floating point co-processor podule.
2186
2187           You may say N here if you are going to load the Acorn FPEmulator
2188           early in the bootup.
2189
2190 config FPE_NWFPE_XP
2191         bool "Support extended precision"
2192         depends on FPE_NWFPE
2193         help
2194           Say Y to include 80-bit support in the kernel floating-point
2195           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2196           Note that gcc does not generate 80-bit operations by default,
2197           so in most cases this option only enlarges the size of the
2198           floating point emulator without any good reason.
2199
2200           You almost surely want to say N here.
2201
2202 config FPE_FASTFPE
2203         bool "FastFPE math emulation (EXPERIMENTAL)"
2204         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2205         ---help---
2206           Say Y here to include the FAST floating point emulator in the kernel.
2207           This is an experimental much faster emulator which now also has full
2208           precision for the mantissa.  It does not support any exceptions.
2209           It is very simple, and approximately 3-6 times faster than NWFPE.
2210
2211           It should be sufficient for most programs.  It may be not suitable
2212           for scientific calculations, but you have to check this for yourself.
2213           If you do not feel you need a faster FP emulation you should better
2214           choose NWFPE.
2215
2216 config VFP
2217         bool "VFP-format floating point maths"
2218         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2219         help
2220           Say Y to include VFP support code in the kernel. This is needed
2221           if your hardware includes a VFP unit.
2222
2223           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2224           release notes and additional status information.
2225
2226           Say N if your target does not have VFP hardware.
2227
2228 config VFPv3
2229         bool
2230         depends on VFP
2231         default y if CPU_V7
2232
2233 config NEON
2234         bool "Advanced SIMD (NEON) Extension support"
2235         depends on VFPv3 && CPU_V7
2236         help
2237           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2238           Extension.
2239
2240 endmenu
2241
2242 menu "Userspace binary formats"
2243
2244 source "fs/Kconfig.binfmt"
2245
2246 config ARTHUR
2247         tristate "RISC OS personality"
2248         depends on !AEABI
2249         help
2250           Say Y here to include the kernel code necessary if you want to run
2251           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2252           experimental; if this sounds frightening, say N and sleep in peace.
2253           You can also say M here to compile this support as a module (which
2254           will be called arthur).
2255
2256 endmenu
2257
2258 menu "Power management options"
2259
2260 source "kernel/power/Kconfig"
2261
2262 config ARCH_SUSPEND_POSSIBLE
2263         depends on !ARCH_S5PC100
2264         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2265                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2266         def_bool y
2267
2268 config ARM_CPU_SUSPEND
2269         def_bool PM_SLEEP
2270
2271 endmenu
2272
2273 source "net/Kconfig"
2274
2275 source "drivers/Kconfig"
2276
2277 source "fs/Kconfig"
2278
2279 source "arch/arm/Kconfig.debug"
2280
2281 source "security/Kconfig"
2282
2283 source "crypto/Kconfig"
2284
2285 source "lib/Kconfig"