arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         help
  32           The ARM series is a line of low-power-consumption RISC chip designs
  33           licensed by ARM Ltd and targeted at embedded applications and
  34           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  35           manufactured, but legacy ARM-based PC hardware remains popular in
  36           Europe.  There is an ARM Linux project with a web page at
  37           <http://www.arm.linux.org.uk/>.
  38
  39 config HAVE_PWM
  40         bool
  41
  42 config MIGHT_HAVE_PCI
  43         bool
  44
  45 config SYS_SUPPORTS_APM_EMULATION
  46         bool
  47
  48 config HAVE_SCHED_CLOCK
  49         bool
  50
  51 config GENERIC_GPIO
  52         bool
  53
  54 config ARCH_USES_GETTIMEOFFSET
  55         bool
  56         default n
  57
  58 config GENERIC_CLOCKEVENTS
  59         bool
  60
  61 config GENERIC_CLOCKEVENTS_BROADCAST
  62         bool
  63         depends on GENERIC_CLOCKEVENTS
  64         default y if SMP
  65
  66 config KTIME_SCALAR
  67         bool
  68         default y
  69
  70 config HAVE_TCM
  71         bool
  72         select GENERIC_ALLOCATOR
  73
  74 config HAVE_PROC_CPU
  75         bool
  76
  77 config NO_IOPORT
  78         bool
  79
  80 config EISA
  81         bool
  82         ---help---
  83           The Extended Industry Standard Architecture (EISA) bus was
  84           developed as an open alternative to the IBM MicroChannel bus.
  85
  86           The EISA bus provided some of the features of the IBM MicroChannel
  87           bus while maintaining backward compatibility with cards made for
  88           the older ISA bus.  The EISA bus saw limited use between 1988 and
  89           1995 when it was made obsolete by the PCI bus.
  90
  91           Say Y here if you are building a kernel for an EISA-based machine.
  92
  93           Otherwise, say N.
  94
  95 config SBUS
  96         bool
  97
  98 config MCA
  99         bool
 100         help
 101           MicroChannel Architecture is found in some IBM PS/2 machines and
 102           laptops.  It is a bus system similar to PCI or ISA. See
 103           <file:Documentation/mca.txt> (and especially the web page given
 104           there) before attempting to build an MCA bus kernel.
 105
 106 config STACKTRACE_SUPPORT
 107         bool
 108         default y
 109
 110 config HAVE_LATENCYTOP_SUPPORT
 111         bool
 112         depends on !SMP
 113         default y
 114
 115 config LOCKDEP_SUPPORT
 116         bool
 117         default y
 118
 119 config TRACE_IRQFLAGS_SUPPORT
 120         bool
 121         default y
 122
 123 config HARDIRQS_SW_RESEND
 124         bool
 125         default y
 126
 127 config GENERIC_IRQ_PROBE
 128         bool
 129         default y
 130
 131 config GENERIC_LOCKBREAK
 132         bool
 133         default y
 134         depends on SMP && PREEMPT
 135
 136 config RWSEM_GENERIC_SPINLOCK
 137         bool
 138         default y
 139
 140 config RWSEM_XCHGADD_ALGORITHM
 141         bool
 142
 143 config ARCH_HAS_ILOG2_U32
 144         bool
 145
 146 config ARCH_HAS_ILOG2_U64
 147         bool
 148
 149 config ARCH_HAS_CPUFREQ
 150         bool
 151         help
 152           Internal node to signify that the ARCH has CPUFREQ support
 153           and that the relevant menu configurations are displayed for
 154           it.
 155
 156 config ARCH_HAS_CPU_IDLE_WAIT
 157        def_bool y
 158
 159 config GENERIC_HWEIGHT
 160         bool
 161         default y
 162
 163 config GENERIC_CALIBRATE_DELAY
 164         bool
 165         default y
 166
 167 config ARCH_MAY_HAVE_PC_FDC
 168         bool
 169
 170 config ZONE_DMA
 171         bool
 172
 173 config NEED_DMA_MAP_STATE
 174        def_bool y
 175
 176 config GENERIC_ISA_DMA
 177         bool
 178
 179 config FIQ
 180         bool
 181
 182 config ARCH_MTD_XIP
 183         bool
 184
 185 config VECTORS_BASE
 186         hex
 187         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 188         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 189         default 0x00000000
 190         help
 191           The base address of exception vectors.
 192
 193 config ARM_PATCH_PHYS_VIRT
 194         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 195         depends on EXPERIMENTAL
 196         depends on !XIP_KERNEL && MMU
 197         depends on !ARCH_REALVIEW || !SPARSEMEM
 198         help
 199           Patch phys-to-virt translation functions at runtime according to
 200           the position of the kernel in system memory.
 201
 202           This can only be used with non-XIP with MMU kernels where
 203           the base of physical memory is at a 16MB boundary.
 204
 205 config ARM_PATCH_PHYS_VIRT_16BIT
 206         def_bool y
 207         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 208
 209 source "init/Kconfig"
 210
 211 source "kernel/Kconfig.freezer"
 212
 213 menu "System Type"
 214
 215 config MMU
 216         bool "MMU-based Paged Memory Management Support"
 217         default y
 218         help
 219           Select if you want MMU-based virtualised addressing space
 220           support by paged memory management. If unsure, say 'Y'.
 221
 222 #
 223 # The "ARM system type" choice list is ordered alphabetically by option
 224 # text.  Please add new entries in the option alphabetic order.
 225 #
 226 choice
 227         prompt "ARM system type"
 228         default ARCH_VERSATILE
 229
 230 config ARCH_INTEGRATOR
 231         bool "ARM Ltd. Integrator family"
 232         select ARM_AMBA
 233         select ARCH_HAS_CPUFREQ
 234         select CLKDEV_LOOKUP
 235         select ICST
 236         select GENERIC_CLOCKEVENTS
 237         select PLAT_VERSATILE
 238         help
 239           Support for ARM's Integrator platform.
 240
 241 config ARCH_REALVIEW
 242         bool "ARM Ltd. RealView family"
 243         select ARM_AMBA
 244         select CLKDEV_LOOKUP
 245         select HAVE_SCHED_CLOCK
 246         select ICST
 247         select GENERIC_CLOCKEVENTS
 248         select ARCH_WANT_OPTIONAL_GPIOLIB
 249         select PLAT_VERSATILE
 250         select ARM_TIMER_SP804
 251         select GPIO_PL061 if GPIOLIB
 252         help
 253           This enables support for ARM Ltd RealView boards.
 254
 255 config ARCH_VERSATILE
 256         bool "ARM Ltd. Versatile family"
 257         select ARM_AMBA
 258         select ARM_VIC
 259         select CLKDEV_LOOKUP
 260         select HAVE_SCHED_CLOCK
 261         select ICST
 262         select GENERIC_CLOCKEVENTS
 263         select ARCH_WANT_OPTIONAL_GPIOLIB
 264         select PLAT_VERSATILE
 265         select ARM_TIMER_SP804
 266         help
 267           This enables support for ARM Ltd Versatile board.
 268
 269 config ARCH_VEXPRESS
 270         bool "ARM Ltd. Versatile Express family"
 271         select ARCH_WANT_OPTIONAL_GPIOLIB
 272         select ARM_AMBA
 273         select ARM_TIMER_SP804
 274         select CLKDEV_LOOKUP
 275         select GENERIC_CLOCKEVENTS
 276         select HAVE_CLK
 277         select HAVE_SCHED_CLOCK
 278         select ICST
 279         select PLAT_VERSATILE
 280         help
 281           This enables support for the ARM Ltd Versatile Express boards.
 282
 283 config ARCH_AT91
 284         bool "Atmel AT91"
 285         select ARCH_REQUIRE_GPIOLIB
 286         select HAVE_CLK
 287         help
 288           This enables support for systems based on the Atmel AT91RM9200,
 289           AT91SAM9 and AT91CAP9 processors.
 290
 291 config ARCH_BCMRING
 292         bool "Broadcom BCMRING"
 293         depends on MMU
 294         select CPU_V6
 295         select ARM_AMBA
 296         select CLKDEV_LOOKUP
 297         select GENERIC_CLOCKEVENTS
 298         select ARCH_WANT_OPTIONAL_GPIOLIB
 299         help
 300           Support for Broadcom's BCMRing platform.
 301
 302 config ARCH_CLPS711X
 303         bool "Cirrus Logic CLPS711x/EP721x-based"
 304         select CPU_ARM720T
 305         select ARCH_USES_GETTIMEOFFSET
 306         help
 307           Support for Cirrus Logic 711x/721x based boards.
 308
 309 config ARCH_CNS3XXX
 310         bool "Cavium Networks CNS3XXX family"
 311         select CPU_V6
 312         select GENERIC_CLOCKEVENTS
 313         select ARM_GIC
 314         select MIGHT_HAVE_PCI
 315         select PCI_DOMAINS if PCI
 316         help
 317           Support for Cavium Networks CNS3XXX platform.
 318
 319 config ARCH_GEMINI
 320         bool "Cortina Systems Gemini"
 321         select CPU_FA526
 322         select ARCH_REQUIRE_GPIOLIB
 323         select ARCH_USES_GETTIMEOFFSET
 324         help
 325           Support for the Cortina Systems Gemini family SoCs
 326
 327 config ARCH_EBSA110
 328         bool "EBSA-110"
 329         select CPU_SA110
 330         select ISA
 331         select NO_IOPORT
 332         select ARCH_USES_GETTIMEOFFSET
 333         help
 334           This is an evaluation board for the StrongARM processor available
 335           from Digital. It has limited hardware on-board, including an
 336           Ethernet interface, two PCMCIA sockets, two serial ports and a
 337           parallel port.
 338
 339 config ARCH_EP93XX
 340         bool "EP93xx-based"
 341         select CPU_ARM920T
 342         select ARM_AMBA
 343         select ARM_VIC
 344         select CLKDEV_LOOKUP
 345         select ARCH_REQUIRE_GPIOLIB
 346         select ARCH_HAS_HOLES_MEMORYMODEL
 347         select ARCH_USES_GETTIMEOFFSET
 348         help
 349           This enables support for the Cirrus EP93xx series of CPUs.
 350
 351 config ARCH_FOOTBRIDGE
 352         bool "FootBridge"
 353         select CPU_SA110
 354         select FOOTBRIDGE
 355         select GENERIC_CLOCKEVENTS
 356         help
 357           Support for systems based on the DC21285 companion chip
 358           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 359
 360 config ARCH_MXC
 361         bool "Freescale MXC/iMX-based"
 362         select GENERIC_CLOCKEVENTS
 363         select ARCH_REQUIRE_GPIOLIB
 364         select CLKDEV_LOOKUP
 365         help
 366           Support for Freescale MXC/iMX-based family of processors
 367
 368 config ARCH_MXS
 369         bool "Freescale MXS-based"
 370         select GENERIC_CLOCKEVENTS
 371         select ARCH_REQUIRE_GPIOLIB
 372         select CLKDEV_LOOKUP
 373         help
 374           Support for Freescale MXS-based family of processors
 375
 376 config ARCH_STMP3XXX
 377         bool "Freescale STMP3xxx"
 378         select CPU_ARM926T
 379         select CLKDEV_LOOKUP
 380         select ARCH_REQUIRE_GPIOLIB
 381         select GENERIC_CLOCKEVENTS
 382         select USB_ARCH_HAS_EHCI
 383         help
 384           Support for systems based on the Freescale 3xxx CPUs.
 385
 386 config ARCH_NETX
 387         bool "Hilscher NetX based"
 388         select CPU_ARM926T
 389         select ARM_VIC
 390         select GENERIC_CLOCKEVENTS
 391         help
 392           This enables support for systems based on the Hilscher NetX Soc
 393
 394 config ARCH_H720X
 395         bool "Hynix HMS720x-based"
 396         select CPU_ARM720T
 397         select ISA_DMA_API
 398         select ARCH_USES_GETTIMEOFFSET
 399         help
 400           This enables support for systems based on the Hynix HMS720x
 401
 402 config ARCH_IOP13XX
 403         bool "IOP13xx-based"
 404         depends on MMU
 405         select CPU_XSC3
 406         select PLAT_IOP
 407         select PCI
 408         select ARCH_SUPPORTS_MSI
 409         select VMSPLIT_1G
 410         help
 411           Support for Intel's IOP13XX (XScale) family of processors.
 412
 413 config ARCH_IOP32X
 414         bool "IOP32x-based"
 415         depends on MMU
 416         select CPU_XSCALE
 417         select PLAT_IOP
 418         select PCI
 419         select ARCH_REQUIRE_GPIOLIB
 420         help
 421           Support for Intel's 80219 and IOP32X (XScale) family of
 422           processors.
 423
 424 config ARCH_IOP33X
 425         bool "IOP33x-based"
 426         depends on MMU
 427         select CPU_XSCALE
 428         select PLAT_IOP
 429         select PCI
 430         select ARCH_REQUIRE_GPIOLIB
 431         help
 432           Support for Intel's IOP33X (XScale) family of processors.
 433
 434 config ARCH_IXP23XX
 435         bool "IXP23XX-based"
 436         depends on MMU
 437         select CPU_XSC3
 438         select PCI
 439         select ARCH_USES_GETTIMEOFFSET
 440         help
 441           Support for Intel's IXP23xx (XScale) family of processors.
 442
 443 config ARCH_IXP2000
 444         bool "IXP2400/2800-based"
 445         depends on MMU
 446         select CPU_XSCALE
 447         select PCI
 448         select ARCH_USES_GETTIMEOFFSET
 449         help
 450           Support for Intel's IXP2400/2800 (XScale) family of processors.
 451
 452 config ARCH_IXP4XX
 453         bool "IXP4xx-based"
 454         depends on MMU
 455         select CPU_XSCALE
 456         select GENERIC_GPIO
 457         select GENERIC_CLOCKEVENTS
 458         select HAVE_SCHED_CLOCK
 459         select MIGHT_HAVE_PCI
 460         select DMABOUNCE if PCI
 461         help
 462           Support for Intel's IXP4XX (XScale) family of processors.
 463
 464 config ARCH_DOVE
 465         bool "Marvell Dove"
 466         select CPU_V6K
 467         select PCI
 468         select ARCH_REQUIRE_GPIOLIB
 469         select GENERIC_CLOCKEVENTS
 470         select PLAT_ORION
 471         help
 472           Support for the Marvell Dove SoC 88AP510
 473
 474 config ARCH_KIRKWOOD
 475         bool "Marvell Kirkwood"
 476         select CPU_FEROCEON
 477         select PCI
 478         select ARCH_REQUIRE_GPIOLIB
 479         select GENERIC_CLOCKEVENTS
 480         select PLAT_ORION
 481         help
 482           Support for the following Marvell Kirkwood series SoCs:
 483           88F6180, 88F6192 and 88F6281.
 484
 485 config ARCH_LOKI
 486         bool "Marvell Loki (88RC8480)"
 487         select CPU_FEROCEON
 488         select GENERIC_CLOCKEVENTS
 489         select PLAT_ORION
 490         help
 491           Support for the Marvell Loki (88RC8480) SoC.
 492
 493 config ARCH_LPC32XX
 494         bool "NXP LPC32XX"
 495         select CPU_ARM926T
 496         select ARCH_REQUIRE_GPIOLIB
 497         select HAVE_IDE
 498         select ARM_AMBA
 499         select USB_ARCH_HAS_OHCI
 500         select CLKDEV_LOOKUP
 501         select GENERIC_TIME
 502         select GENERIC_CLOCKEVENTS
 503         help
 504           Support for the NXP LPC32XX family of processors
 505
 506 config ARCH_MV78XX0
 507         bool "Marvell MV78xx0"
 508         select CPU_FEROCEON
 509         select PCI
 510         select ARCH_REQUIRE_GPIOLIB
 511         select GENERIC_CLOCKEVENTS
 512         select PLAT_ORION
 513         help
 514           Support for the following Marvell MV78xx0 series SoCs:
 515           MV781x0, MV782x0.
 516
 517 config ARCH_ORION5X
 518         bool "Marvell Orion"
 519         depends on MMU
 520         select CPU_FEROCEON
 521         select PCI
 522         select ARCH_REQUIRE_GPIOLIB
 523         select GENERIC_CLOCKEVENTS
 524         select PLAT_ORION
 525         help
 526           Support for the following Marvell Orion 5x series SoCs:
 527           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 528           Orion-2 (5281), Orion-1-90 (6183).
 529
 530 config ARCH_MMP
 531         bool "Marvell PXA168/910/MMP2"
 532         depends on MMU
 533         select ARCH_REQUIRE_GPIOLIB
 534         select CLKDEV_LOOKUP
 535         select GENERIC_CLOCKEVENTS
 536         select HAVE_SCHED_CLOCK
 537         select TICK_ONESHOT
 538         select PLAT_PXA
 539         select SPARSE_IRQ
 540         help
 541           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 542
 543 config ARCH_KS8695
 544         bool "Micrel/Kendin KS8695"
 545         select CPU_ARM922T
 546         select ARCH_REQUIRE_GPIOLIB
 547         select ARCH_USES_GETTIMEOFFSET
 548         help
 549           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 550           System-on-Chip devices.
 551
 552 config ARCH_NS9XXX
 553         bool "NetSilicon NS9xxx"
 554         select CPU_ARM926T
 555         select GENERIC_GPIO
 556         select GENERIC_CLOCKEVENTS
 557         select HAVE_CLK
 558         help
 559           Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
 560           System.
 561
 562           <http://www.digi.com/products/microprocessors/index.jsp>
 563
 564 config ARCH_W90X900
 565         bool "Nuvoton W90X900 CPU"
 566         select CPU_ARM926T
 567         select ARCH_REQUIRE_GPIOLIB
 568         select CLKDEV_LOOKUP
 569         select GENERIC_CLOCKEVENTS
 570         help
 571           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 572           At present, the w90x900 has been renamed nuc900, regarding
 573           the ARM series product line, you can login the following
 574           link address to know more.
 575
 576           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 577                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 578
 579 config ARCH_NUC93X
 580         bool "Nuvoton NUC93X CPU"
 581         select CPU_ARM926T
 582         select CLKDEV_LOOKUP
 583         help
 584           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 585           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 586
 587 config ARCH_TEGRA
 588         bool "NVIDIA Tegra"
 589         select CLKDEV_LOOKUP
 590         select GENERIC_TIME
 591         select GENERIC_CLOCKEVENTS
 592         select GENERIC_GPIO
 593         select HAVE_CLK
 594         select HAVE_SCHED_CLOCK
 595         select ARCH_HAS_BARRIERS if CACHE_L2X0
 596         select ARCH_HAS_CPUFREQ
 597         help
 598           This enables support for NVIDIA Tegra based systems (Tegra APX,
 599           Tegra 6xx and Tegra 2 series).
 600
 601 config ARCH_PNX4008
 602         bool "Philips Nexperia PNX4008 Mobile"
 603         select CPU_ARM926T
 604         select CLKDEV_LOOKUP
 605         select ARCH_USES_GETTIMEOFFSET
 606         help
 607           This enables support for Philips PNX4008 mobile platform.
 608
 609 config ARCH_PXA
 610         bool "PXA2xx/PXA3xx-based"
 611         depends on MMU
 612         select ARCH_MTD_XIP
 613         select ARCH_HAS_CPUFREQ
 614         select CLKDEV_LOOKUP
 615         select ARCH_REQUIRE_GPIOLIB
 616         select GENERIC_CLOCKEVENTS
 617         select HAVE_SCHED_CLOCK
 618         select TICK_ONESHOT
 619         select PLAT_PXA
 620         select SPARSE_IRQ
 621         help
 622           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 623
 624 config ARCH_MSM
 625         bool "Qualcomm MSM"
 626         select HAVE_CLK
 627         select GENERIC_CLOCKEVENTS
 628         select ARCH_REQUIRE_GPIOLIB
 629         help
 630           Support for Qualcomm MSM/QSD based systems.  This runs on the
 631           apps processor of the MSM/QSD and depends on a shared memory
 632           interface to the modem processor which runs the baseband
 633           stack and controls some vital subsystems
 634           (clock and power control, etc).
 635
 636 config ARCH_SHMOBILE
 637         bool "Renesas SH-Mobile / R-Mobile"
 638         select HAVE_CLK
 639         select CLKDEV_LOOKUP
 640         select GENERIC_CLOCKEVENTS
 641         select NO_IOPORT
 642         select SPARSE_IRQ
 643         select MULTI_IRQ_HANDLER
 644         help
 645           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 646
 647 config ARCH_RPC
 648         bool "RiscPC"
 649         select ARCH_ACORN
 650         select FIQ
 651         select TIMER_ACORN
 652         select ARCH_MAY_HAVE_PC_FDC
 653         select HAVE_PATA_PLATFORM
 654         select ISA_DMA_API
 655         select NO_IOPORT
 656         select ARCH_SPARSEMEM_ENABLE
 657         select ARCH_USES_GETTIMEOFFSET
 658         help
 659           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 660           CD-ROM interface, serial and parallel port, and the floppy drive.
 661
 662 config ARCH_SA1100
 663         bool "SA1100-based"
 664         select CPU_SA1100
 665         select ISA
 666         select ARCH_SPARSEMEM_ENABLE
 667         select ARCH_MTD_XIP
 668         select ARCH_HAS_CPUFREQ
 669         select CPU_FREQ
 670         select GENERIC_CLOCKEVENTS
 671         select HAVE_CLK
 672         select HAVE_SCHED_CLOCK
 673         select TICK_ONESHOT
 674         select ARCH_REQUIRE_GPIOLIB
 675         help
 676           Support for StrongARM 11x0 based boards.
 677
 678 config ARCH_S3C2410
 679         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 680         select GENERIC_GPIO
 681         select ARCH_HAS_CPUFREQ
 682         select HAVE_CLK
 683         select ARCH_USES_GETTIMEOFFSET
 684         select HAVE_S3C2410_I2C if I2C
 685         help
 686           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 687           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 688           the Samsung SMDK2410 development board (and derivatives).
 689
 690           Note, the S3C2416 and the S3C2450 are so close that they even share
 691           the same SoC ID code. This means that there is no seperate machine
 692           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 693
 694 config ARCH_S3C64XX
 695         bool "Samsung S3C64XX"
 696         select PLAT_SAMSUNG
 697         select CPU_V6
 698         select ARM_VIC
 699         select HAVE_CLK
 700         select NO_IOPORT
 701         select ARCH_USES_GETTIMEOFFSET
 702         select ARCH_HAS_CPUFREQ
 703         select ARCH_REQUIRE_GPIOLIB
 704         select SAMSUNG_CLKSRC
 705         select SAMSUNG_IRQ_VIC_TIMER
 706         select SAMSUNG_IRQ_UART
 707         select S3C_GPIO_TRACK
 708         select S3C_GPIO_PULL_UPDOWN
 709         select S3C_GPIO_CFG_S3C24XX
 710         select S3C_GPIO_CFG_S3C64XX
 711         select S3C_DEV_NAND
 712         select USB_ARCH_HAS_OHCI
 713         select SAMSUNG_GPIOLIB_4BIT
 714         select HAVE_S3C2410_I2C if I2C
 715         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 716         help
 717           Samsung S3C64XX series based systems
 718
 719 config ARCH_S5P64X0
 720         bool "Samsung S5P6440 S5P6450"
 721         select CPU_V6
 722         select GENERIC_GPIO
 723         select HAVE_CLK
 724         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 725         select ARCH_USES_GETTIMEOFFSET
 726         select HAVE_S3C2410_I2C if I2C
 727         select HAVE_S3C_RTC if RTC_CLASS
 728         help
 729           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 730           SMDK6450.
 731
 732 config ARCH_S5P6442
 733         bool "Samsung S5P6442"
 734         select CPU_V6
 735         select GENERIC_GPIO
 736         select HAVE_CLK
 737         select ARCH_USES_GETTIMEOFFSET
 738         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 739         help
 740           Samsung S5P6442 CPU based systems
 741
 742 config ARCH_S5PC100
 743         bool "Samsung S5PC100"
 744         select GENERIC_GPIO
 745         select HAVE_CLK
 746         select CPU_V7
 747         select ARM_L1_CACHE_SHIFT_6
 748         select ARCH_USES_GETTIMEOFFSET
 749         select HAVE_S3C2410_I2C if I2C
 750         select HAVE_S3C_RTC if RTC_CLASS
 751         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 752         help
 753           Samsung S5PC100 series based systems
 754
 755 config ARCH_S5PV210
 756         bool "Samsung S5PV210/S5PC110"
 757         select CPU_V7
 758         select ARCH_SPARSEMEM_ENABLE
 759         select GENERIC_GPIO
 760         select HAVE_CLK
 761         select ARM_L1_CACHE_SHIFT_6
 762         select ARCH_HAS_CPUFREQ
 763         select ARCH_USES_GETTIMEOFFSET
 764         select HAVE_S3C2410_I2C if I2C
 765         select HAVE_S3C_RTC if RTC_CLASS
 766         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 767         help
 768           Samsung S5PV210/S5PC110 series based systems
 769
 770 config ARCH_S5PV310
 771         bool "Samsung S5PV310/S5PC210"
 772         select CPU_V7
 773         select ARCH_SPARSEMEM_ENABLE
 774         select GENERIC_GPIO
 775         select HAVE_CLK
 776         select ARCH_HAS_CPUFREQ
 777         select GENERIC_CLOCKEVENTS
 778         select HAVE_S3C_RTC if RTC_CLASS
 779         select HAVE_S3C2410_I2C if I2C
 780         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 781         help
 782           Samsung S5PV310 series based systems
 783
 784 config ARCH_SHARK
 785         bool "Shark"
 786         select CPU_SA110
 787         select ISA
 788         select ISA_DMA
 789         select ZONE_DMA
 790         select PCI
 791         select ARCH_USES_GETTIMEOFFSET
 792         help
 793           Support for the StrongARM based Digital DNARD machine, also known
 794           as "Shark" (<http://www.shark-linux.de/shark.html>).
 795
 796 config ARCH_TCC_926
 797         bool "Telechips TCC ARM926-based systems"
 798         select CPU_ARM926T
 799         select HAVE_CLK
 800         select CLKDEV_LOOKUP
 801         select GENERIC_CLOCKEVENTS
 802         help
 803           Support for Telechips TCC ARM926-based systems.
 804
 805 config ARCH_U300
 806         bool "ST-Ericsson U300 Series"
 807         depends on MMU
 808         select CPU_ARM926T
 809         select HAVE_SCHED_CLOCK
 810         select HAVE_TCM
 811         select ARM_AMBA
 812         select ARM_VIC
 813         select GENERIC_CLOCKEVENTS
 814         select CLKDEV_LOOKUP
 815         select GENERIC_GPIO
 816         help
 817           Support for ST-Ericsson U300 series mobile platforms.
 818
 819 config ARCH_U8500
 820         bool "ST-Ericsson U8500 Series"
 821         select CPU_V7
 822         select ARM_AMBA
 823         select GENERIC_CLOCKEVENTS
 824         select CLKDEV_LOOKUP
 825         select ARCH_REQUIRE_GPIOLIB
 826         select ARCH_HAS_CPUFREQ
 827         help
 828           Support for ST-Ericsson's Ux500 architecture
 829
 830 config ARCH_NOMADIK
 831         bool "STMicroelectronics Nomadik"
 832         select ARM_AMBA
 833         select ARM_VIC
 834         select CPU_ARM926T
 835         select CLKDEV_LOOKUP
 836         select GENERIC_CLOCKEVENTS
 837         select ARCH_REQUIRE_GPIOLIB
 838         help
 839           Support for the Nomadik platform by ST-Ericsson
 840
 841 config ARCH_DAVINCI
 842         bool "TI DaVinci"
 843         select GENERIC_CLOCKEVENTS
 844         select ARCH_REQUIRE_GPIOLIB
 845         select ZONE_DMA
 846         select HAVE_IDE
 847         select CLKDEV_LOOKUP
 848         select GENERIC_ALLOCATOR
 849         select ARCH_HAS_HOLES_MEMORYMODEL
 850         help
 851           Support for TI's DaVinci platform.
 852
 853 config ARCH_OMAP
 854         bool "TI OMAP"
 855         select HAVE_CLK
 856         select ARCH_REQUIRE_GPIOLIB
 857         select ARCH_HAS_CPUFREQ
 858         select GENERIC_CLOCKEVENTS
 859         select HAVE_SCHED_CLOCK
 860         select ARCH_HAS_HOLES_MEMORYMODEL
 861         help
 862           Support for TI's OMAP platform (OMAP1/2/3/4).
 863
 864 config PLAT_SPEAR
 865         bool "ST SPEAr"
 866         select ARM_AMBA
 867         select ARCH_REQUIRE_GPIOLIB
 868         select CLKDEV_LOOKUP
 869         select GENERIC_CLOCKEVENTS
 870         select HAVE_CLK
 871         help
 872           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 873
 874 config ARCH_VT8500
 875         bool "VIA/WonderMedia 85xx"
 876         select CPU_ARM926T
 877         select GENERIC_GPIO
 878         select ARCH_HAS_CPUFREQ
 879         select GENERIC_CLOCKEVENTS
 880         select ARCH_REQUIRE_GPIOLIB
 881         select HAVE_PWM
 882         help
 883           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 884 endchoice
 885
 886 #
 887 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 888 # Kconfigs may be included either alphabetically (according to the
 889 # plat- suffix) or along side the corresponding mach-* source.
 890 #
 891 source "arch/arm/mach-at91/Kconfig"
 892
 893 source "arch/arm/mach-bcmring/Kconfig"
 894
 895 source "arch/arm/mach-clps711x/Kconfig"
 896
 897 source "arch/arm/mach-cns3xxx/Kconfig"
 898
 899 source "arch/arm/mach-davinci/Kconfig"
 900
 901 source "arch/arm/mach-dove/Kconfig"
 902
 903 source "arch/arm/mach-ep93xx/Kconfig"
 904
 905 source "arch/arm/mach-footbridge/Kconfig"
 906
 907 source "arch/arm/mach-gemini/Kconfig"
 908
 909 source "arch/arm/mach-h720x/Kconfig"
 910
 911 source "arch/arm/mach-integrator/Kconfig"
 912
 913 source "arch/arm/mach-iop32x/Kconfig"
 914
 915 source "arch/arm/mach-iop33x/Kconfig"
 916
 917 source "arch/arm/mach-iop13xx/Kconfig"
 918
 919 source "arch/arm/mach-ixp4xx/Kconfig"
 920
 921 source "arch/arm/mach-ixp2000/Kconfig"
 922
 923 source "arch/arm/mach-ixp23xx/Kconfig"
 924
 925 source "arch/arm/mach-kirkwood/Kconfig"
 926
 927 source "arch/arm/mach-ks8695/Kconfig"
 928
 929 source "arch/arm/mach-loki/Kconfig"
 930
 931 source "arch/arm/mach-lpc32xx/Kconfig"
 932
 933 source "arch/arm/mach-msm/Kconfig"
 934
 935 source "arch/arm/mach-mv78xx0/Kconfig"
 936
 937 source "arch/arm/plat-mxc/Kconfig"
 938
 939 source "arch/arm/mach-mxs/Kconfig"
 940
 941 source "arch/arm/mach-netx/Kconfig"
 942
 943 source "arch/arm/mach-nomadik/Kconfig"
 944 source "arch/arm/plat-nomadik/Kconfig"
 945
 946 source "arch/arm/mach-ns9xxx/Kconfig"
 947
 948 source "arch/arm/mach-nuc93x/Kconfig"
 949
 950 source "arch/arm/plat-omap/Kconfig"
 951
 952 source "arch/arm/mach-omap1/Kconfig"
 953
 954 source "arch/arm/mach-omap2/Kconfig"
 955
 956 source "arch/arm/mach-orion5x/Kconfig"
 957
 958 source "arch/arm/mach-pxa/Kconfig"
 959 source "arch/arm/plat-pxa/Kconfig"
 960
 961 source "arch/arm/mach-mmp/Kconfig"
 962
 963 source "arch/arm/mach-realview/Kconfig"
 964
 965 source "arch/arm/mach-sa1100/Kconfig"
 966
 967 source "arch/arm/plat-samsung/Kconfig"
 968 source "arch/arm/plat-s3c24xx/Kconfig"
 969 source "arch/arm/plat-s5p/Kconfig"
 970
 971 source "arch/arm/plat-spear/Kconfig"
 972
 973 source "arch/arm/plat-tcc/Kconfig"
 974
 975 if ARCH_S3C2410
 976 source "arch/arm/mach-s3c2400/Kconfig"
 977 source "arch/arm/mach-s3c2410/Kconfig"
 978 source "arch/arm/mach-s3c2412/Kconfig"
 979 source "arch/arm/mach-s3c2416/Kconfig"
 980 source "arch/arm/mach-s3c2440/Kconfig"
 981 source "arch/arm/mach-s3c2443/Kconfig"
 982 endif
 983
 984 if ARCH_S3C64XX
 985 source "arch/arm/mach-s3c64xx/Kconfig"
 986 endif
 987
 988 source "arch/arm/mach-s5p64x0/Kconfig"
 989
 990 source "arch/arm/mach-s5p6442/Kconfig"
 991
 992 source "arch/arm/mach-s5pc100/Kconfig"
 993
 994 source "arch/arm/mach-s5pv210/Kconfig"
 995
 996 source "arch/arm/mach-s5pv310/Kconfig"
 997
 998 source "arch/arm/mach-shmobile/Kconfig"
 999
1000 source "arch/arm/plat-stmp3xxx/Kconfig"
1001
1002 source "arch/arm/mach-tegra/Kconfig"
1003
1004 source "arch/arm/mach-u300/Kconfig"
1005
1006 source "arch/arm/mach-ux500/Kconfig"
1007
1008 source "arch/arm/mach-versatile/Kconfig"
1009
1010 source "arch/arm/mach-vexpress/Kconfig"
1011
1012 source "arch/arm/mach-vt8500/Kconfig"
1013
1014 source "arch/arm/mach-w90x900/Kconfig"
1015
1016 # Definitions to make life easier
1017 config ARCH_ACORN
1018         bool
1019
1020 config PLAT_IOP
1021         bool
1022         select GENERIC_CLOCKEVENTS
1023         select HAVE_SCHED_CLOCK
1024
1025 config PLAT_ORION
1026         bool
1027         select HAVE_SCHED_CLOCK
1028
1029 config PLAT_PXA
1030         bool
1031
1032 config PLAT_VERSATILE
1033         bool
1034
1035 config ARM_TIMER_SP804
1036         bool
1037
1038 source arch/arm/mm/Kconfig
1039
1040 config IWMMXT
1041         bool "Enable iWMMXt support"
1042         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1043         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1044         help
1045           Enable support for iWMMXt context switching at run time if
1046           running on a CPU that supports it.
1047
1048 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1049 config XSCALE_PMU
1050         bool
1051         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1052         default y
1053
1054 config CPU_HAS_PMU
1055         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1056                    (!ARCH_OMAP3 || OMAP3_EMU)
1057         default y
1058         bool
1059
1060 config MULTI_IRQ_HANDLER
1061         bool
1062         help
1063           Allow each machine to specify it's own IRQ handler at run time.
1064
1065 if !MMU
1066 source "arch/arm/Kconfig-nommu"
1067 endif
1068
1069 config ARM_ERRATA_411920
1070         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1071         depends on CPU_V6 || CPU_V6K
1072         help
1073           Invalidation of the Instruction Cache operation can
1074           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1075           It does not affect the MPCore. This option enables the ARM Ltd.
1076           recommended workaround.
1077
1078 config ARM_ERRATA_430973
1079         bool "ARM errata: Stale prediction on replaced interworking branch"
1080         depends on CPU_V7
1081         help
1082           This option enables the workaround for the 430973 Cortex-A8
1083           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1084           interworking branch is replaced with another code sequence at the
1085           same virtual address, whether due to self-modifying code or virtual
1086           to physical address re-mapping, Cortex-A8 does not recover from the
1087           stale interworking branch prediction. This results in Cortex-A8
1088           executing the new code sequence in the incorrect ARM or Thumb state.
1089           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1090           and also flushes the branch target cache at every context switch.
1091           Note that setting specific bits in the ACTLR register may not be
1092           available in non-secure mode.
1093
1094 config ARM_ERRATA_458693
1095         bool "ARM errata: Processor deadlock when a false hazard is created"
1096         depends on CPU_V7
1097         help
1098           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1099           erratum. For very specific sequences of memory operations, it is
1100           possible for a hazard condition intended for a cache line to instead
1101           be incorrectly associated with a different cache line. This false
1102           hazard might then cause a processor deadlock. The workaround enables
1103           the L1 caching of the NEON accesses and disables the PLD instruction
1104           in the ACTLR register. Note that setting specific bits in the ACTLR
1105           register may not be available in non-secure mode.
1106
1107 config ARM_ERRATA_460075
1108         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1109         depends on CPU_V7
1110         help
1111           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1112           erratum. Any asynchronous access to the L2 cache may encounter a
1113           situation in which recent store transactions to the L2 cache are lost
1114           and overwritten with stale memory contents from external memory. The
1115           workaround disables the write-allocate mode for the L2 cache via the
1116           ACTLR register. Note that setting specific bits in the ACTLR register
1117           may not be available in non-secure mode.
1118
1119 config ARM_ERRATA_742230
1120         bool "ARM errata: DMB operation may be faulty"
1121         depends on CPU_V7 && SMP
1122         help
1123           This option enables the workaround for the 742230 Cortex-A9
1124           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1125           between two write operations may not ensure the correct visibility
1126           ordering of the two writes. This workaround sets a specific bit in
1127           the diagnostic register of the Cortex-A9 which causes the DMB
1128           instruction to behave as a DSB, ensuring the correct behaviour of
1129           the two writes.
1130
1131 config ARM_ERRATA_742231
1132         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1133         depends on CPU_V7 && SMP
1134         help
1135           This option enables the workaround for the 742231 Cortex-A9
1136           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1137           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1138           accessing some data located in the same cache line, may get corrupted
1139           data due to bad handling of the address hazard when the line gets
1140           replaced from one of the CPUs at the same time as another CPU is
1141           accessing it. This workaround sets specific bits in the diagnostic
1142           register of the Cortex-A9 which reduces the linefill issuing
1143           capabilities of the processor.
1144
1145 config PL310_ERRATA_588369
1146         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1147         depends on CACHE_L2X0
1148         help
1149            The PL310 L2 cache controller implements three types of Clean &
1150            Invalidate maintenance operations: by Physical Address
1151            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1152            They are architecturally defined to behave as the execution of a
1153            clean operation followed immediately by an invalidate operation,
1154            both performing to the same memory location. This functionality
1155            is not correctly implemented in PL310 as clean lines are not
1156            invalidated as a result of these operations.
1157
1158 config ARM_ERRATA_720789
1159         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1160         depends on CPU_V7 && SMP
1161         help
1162           This option enables the workaround for the 720789 Cortex-A9 (prior to
1163           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1164           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1165           As a consequence of this erratum, some TLB entries which should be
1166           invalidated are not, resulting in an incoherency in the system page
1167           tables. The workaround changes the TLB flushing routines to invalidate
1168           entries regardless of the ASID.
1169
1170 config PL310_ERRATA_727915
1171         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1172         depends on CACHE_L2X0
1173         help
1174           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1175           operation (offset 0x7FC). This operation runs in background so that
1176           PL310 can handle normal accesses while it is in progress. Under very
1177           rare circumstances, due to this erratum, write data can be lost when
1178           PL310 treats a cacheable write transaction during a Clean &
1179           Invalidate by Way operation.
1180
1181 config ARM_ERRATA_743622
1182         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1183         depends on CPU_V7
1184         help
1185           This option enables the workaround for the 743622 Cortex-A9
1186           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1187           optimisation in the Cortex-A9 Store Buffer may lead to data
1188           corruption. This workaround sets a specific bit in the diagnostic
1189           register of the Cortex-A9 which disables the Store Buffer
1190           optimisation, preventing the defect from occurring. This has no
1191           visible impact on the overall performance or power consumption of the
1192           processor.
1193
1194 config ARM_ERRATA_751472
1195         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1196         depends on CPU_V7 && SMP
1197         help
1198           This option enables the workaround for the 751472 Cortex-A9 (prior
1199           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1200           completion of a following broadcasted operation if the second
1201           operation is received by a CPU before the ICIALLUIS has completed,
1202           potentially leading to corrupted entries in the cache or TLB.
1203
1204 config ARM_ERRATA_753970
1205         bool "ARM errata: cache sync operation may be faulty"
1206         depends on CACHE_PL310
1207         help
1208           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1209
1210           Under some condition the effect of cache sync operation on
1211           the store buffer still remains when the operation completes.
1212           This means that the store buffer is always asked to drain and
1213           this prevents it from merging any further writes. The workaround
1214           is to replace the normal offset of cache sync operation (0x730)
1215           by another offset targeting an unmapped PL310 register 0x740.
1216           This has the same effect as the cache sync operation: store buffer
1217           drain and waiting for all buffers empty.
1218
1219 config ARM_ERRATA_754322
1220         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1221         depends on CPU_V7
1222         help
1223           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1224           r3p*) erratum. A speculative memory access may cause a page table walk
1225           which starts prior to an ASID switch but completes afterwards. This
1226           can populate the micro-TLB with a stale entry which may be hit with
1227           the new ASID. This workaround places two dsb instructions in the mm
1228           switching code so that no page table walks can cross the ASID switch.
1229
1230 config ARM_ERRATA_754327
1231         bool "ARM errata: no automatic Store Buffer drain"
1232         depends on CPU_V7 && SMP
1233         help
1234           This option enables the workaround for the 754327 Cortex-A9 (prior to
1235           r2p0) erratum. The Store Buffer does not have any automatic draining
1236           mechanism and therefore a livelock may occur if an external agent
1237           continuously polls a memory location waiting to observe an update.
1238           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1239           written polling loops from denying visibility of updates to memory.
1240
1241 endmenu
1242
1243 source "arch/arm/common/Kconfig"
1244
1245 menu "Bus support"
1246
1247 config ARM_AMBA
1248         bool
1249
1250 config ISA
1251         bool
1252         help
1253           Find out whether you have ISA slots on your motherboard.  ISA is the
1254           name of a bus system, i.e. the way the CPU talks to the other stuff
1255           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1256           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1257           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1258
1259 # Select ISA DMA controller support
1260 config ISA_DMA
1261         bool
1262         select ISA_DMA_API
1263
1264 # Select ISA DMA interface
1265 config ISA_DMA_API
1266         bool
1267
1268 config PCI
1269         bool "PCI support" if MIGHT_HAVE_PCI
1270         help
1271           Find out whether you have a PCI motherboard. PCI is the name of a
1272           bus system, i.e. the way the CPU talks to the other stuff inside
1273           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1274           VESA. If you have PCI, say Y, otherwise N.
1275
1276 config PCI_DOMAINS
1277         bool
1278         depends on PCI
1279
1280 config PCI_NANOENGINE
1281         bool "BSE nanoEngine PCI support"
1282         depends on SA1100_NANOENGINE
1283         help
1284           Enable PCI on the BSE nanoEngine board.
1285
1286 config PCI_SYSCALL
1287         def_bool PCI
1288
1289 # Select the host bridge type
1290 config PCI_HOST_VIA82C505
1291         bool
1292         depends on PCI && ARCH_SHARK
1293         default y
1294
1295 config PCI_HOST_ITE8152
1296         bool
1297         depends on PCI && MACH_ARMCORE
1298         default y
1299         select DMABOUNCE
1300
1301 source "drivers/pci/Kconfig"
1302
1303 source "drivers/pcmcia/Kconfig"
1304
1305 endmenu
1306
1307 menu "Kernel Features"
1308
1309 source "kernel/time/Kconfig"
1310
1311 config SMP
1312         bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1313         depends on EXPERIMENTAL
1314         depends on CPU_V6K || CPU_V7
1315         depends on GENERIC_CLOCKEVENTS
1316         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1317                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1318                  ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1319                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1320         select USE_GENERIC_SMP_HELPERS
1321         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1322         help
1323           This enables support for systems with more than one CPU. If you have
1324           a system with only one CPU, like most personal computers, say N. If
1325           you have a system with more than one CPU, say Y.
1326
1327           If you say N here, the kernel will run on single and multiprocessor
1328           machines, but will use only one CPU of a multiprocessor machine. If
1329           you say Y here, the kernel will run on many, but not all, single
1330           processor machines. On a single processor machine, the kernel will
1331           run faster if you say N here.
1332
1333           See also <file:Documentation/i386/IO-APIC.txt>,
1334           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1335           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1336
1337           If you don't know what to do here, say N.
1338
1339 config SMP_ON_UP
1340         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1341         depends on EXPERIMENTAL
1342         depends on SMP && !XIP_KERNEL
1343         default y
1344         help
1345           SMP kernels contain instructions which fail on non-SMP processors.
1346           Enabling this option allows the kernel to modify itself to make
1347           these instructions safe.  Disabling it allows about 1K of space
1348           savings.
1349
1350           If you don't know what to do here, say Y.
1351
1352 config HAVE_ARM_SCU
1353         bool
1354         depends on SMP
1355         help
1356           This option enables support for the ARM system coherency unit
1357
1358 config HAVE_ARM_TWD
1359         bool
1360         depends on SMP
1361         select TICK_ONESHOT
1362         help
1363           This options enables support for the ARM timer and watchdog unit
1364
1365 choice
1366         prompt "Memory split"
1367         default VMSPLIT_3G
1368         help
1369           Select the desired split between kernel and user memory.
1370
1371           If you are not absolutely sure what you are doing, leave this
1372           option alone!
1373
1374         config VMSPLIT_3G
1375                 bool "3G/1G user/kernel split"
1376         config VMSPLIT_2G
1377                 bool "2G/2G user/kernel split"
1378         config VMSPLIT_1G
1379                 bool "1G/3G user/kernel split"
1380 endchoice
1381
1382 config PAGE_OFFSET
1383         hex
1384         default 0x40000000 if VMSPLIT_1G
1385         default 0x80000000 if VMSPLIT_2G
1386         default 0xC0000000
1387
1388 config NR_CPUS
1389         int "Maximum number of CPUs (2-32)"
1390         range 2 32
1391         depends on SMP
1392         default "4"
1393
1394 config HOTPLUG_CPU
1395         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1396         depends on SMP && HOTPLUG && EXPERIMENTAL
1397         depends on !ARCH_MSM
1398         help
1399           Say Y here to experiment with turning CPUs off and on.  CPUs
1400           can be controlled through /sys/devices/system/cpu.
1401
1402 config LOCAL_TIMERS
1403         bool "Use local timer interrupts"
1404         depends on SMP
1405         default y
1406         select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1407         help
1408           Enable support for local timers on SMP platforms, rather then the
1409           legacy IPI broadcast method.  Local timers allows the system
1410           accounting to be spread across the timer interval, preventing a
1411           "thundering herd" at every timer tick.
1412
1413 source kernel/Kconfig.preempt
1414
1415 config HZ
1416         int
1417         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1418                 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1419         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1420         default AT91_TIMER_HZ if ARCH_AT91
1421         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1422         default 100
1423
1424 config THUMB2_KERNEL
1425         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1426         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1427         select AEABI
1428         select ARM_ASM_UNIFIED
1429         help
1430           By enabling this option, the kernel will be compiled in
1431           Thumb-2 mode. A compiler/assembler that understand the unified
1432           ARM-Thumb syntax is needed.
1433
1434           If unsure, say N.
1435
1436 config THUMB2_AVOID_R_ARM_THM_JUMP11
1437         bool "Work around buggy Thumb-2 short branch relocations in gas"
1438         depends on THUMB2_KERNEL && MODULES
1439         default y
1440         help
1441           Various binutils versions can resolve Thumb-2 branches to
1442           locally-defined, preemptible global symbols as short-range "b.n"
1443           branch instructions.
1444
1445           This is a problem, because there's no guarantee the final
1446           destination of the symbol, or any candidate locations for a
1447           trampoline, are within range of the branch.  For this reason, the
1448           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1449           relocation in modules at all, and it makes little sense to add
1450           support.
1451
1452           The symptom is that the kernel fails with an "unsupported
1453           relocation" error when loading some modules.
1454
1455           Until fixed tools are available, passing
1456           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1457           code which hits this problem, at the cost of a bit of extra runtime
1458           stack usage in some cases.
1459
1460           The problem is described in more detail at:
1461               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1462
1463           Only Thumb-2 kernels are affected.
1464
1465           Unless you are sure your tools don't have this problem, say Y.
1466
1467 config ARM_ASM_UNIFIED
1468         bool
1469
1470 config AEABI
1471         bool "Use the ARM EABI to compile the kernel"
1472         help
1473           This option allows for the kernel to be compiled using the latest
1474           ARM ABI (aka EABI).  This is only useful if you are using a user
1475           space environment that is also compiled with EABI.
1476
1477           Since there are major incompatibilities between the legacy ABI and
1478           EABI, especially with regard to structure member alignment, this
1479           option also changes the kernel syscall calling convention to
1480           disambiguate both ABIs and allow for backward compatibility support
1481           (selected with CONFIG_OABI_COMPAT).
1482
1483           To use this you need GCC version 4.0.0 or later.
1484
1485 config OABI_COMPAT
1486         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1487         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1488         default y
1489         help
1490           This option preserves the old syscall interface along with the
1491           new (ARM EABI) one. It also provides a compatibility layer to
1492           intercept syscalls that have structure arguments which layout
1493           in memory differs between the legacy ABI and the new ARM EABI
1494           (only for non "thumb" binaries). This option adds a tiny
1495           overhead to all syscalls and produces a slightly larger kernel.
1496           If you know you'll be using only pure EABI user space then you
1497           can say N here. If this option is not selected and you attempt
1498           to execute a legacy ABI binary then the result will be
1499           UNPREDICTABLE (in fact it can be predicted that it won't work
1500           at all). If in doubt say Y.
1501
1502 config ARCH_HAS_HOLES_MEMORYMODEL
1503         bool
1504
1505 config ARCH_SPARSEMEM_ENABLE
1506         bool
1507
1508 config ARCH_SPARSEMEM_DEFAULT
1509         def_bool ARCH_SPARSEMEM_ENABLE
1510
1511 config ARCH_SELECT_MEMORY_MODEL
1512         def_bool ARCH_SPARSEMEM_ENABLE
1513
1514 config HIGHMEM
1515         bool "High Memory Support (EXPERIMENTAL)"
1516         depends on MMU && EXPERIMENTAL
1517         help
1518           The address space of ARM processors is only 4 Gigabytes large
1519           and it has to accommodate user address space, kernel address
1520           space as well as some memory mapped IO. That means that, if you
1521           have a large amount of physical memory and/or IO, not all of the
1522           memory can be "permanently mapped" by the kernel. The physical
1523           memory that is not permanently mapped is called "high memory".
1524
1525           Depending on the selected kernel/user memory split, minimum
1526           vmalloc space and actual amount of RAM, you may not need this
1527           option which should result in a slightly faster kernel.
1528
1529           If unsure, say n.
1530
1531 config HIGHPTE
1532         bool "Allocate 2nd-level pagetables from highmem"
1533         depends on HIGHMEM
1534         depends on !OUTER_CACHE
1535
1536 config HW_PERF_EVENTS
1537         bool "Enable hardware performance counter support for perf events"
1538         depends on PERF_EVENTS && CPU_HAS_PMU
1539         default y
1540         help
1541           Enable hardware performance counter support for perf events. If
1542           disabled, perf events will use software events only.
1543
1544 source "mm/Kconfig"
1545
1546 config FORCE_MAX_ZONEORDER
1547         int "Maximum zone order" if ARCH_SHMOBILE
1548         range 11 64 if ARCH_SHMOBILE
1549         default "9" if SA1111
1550         default "11"
1551         help
1552           The kernel memory allocator divides physically contiguous memory
1553           blocks into "zones", where each zone is a power of two number of
1554           pages.  This option selects the largest power of two that the kernel
1555           keeps in the memory allocator.  If you need to allocate very large
1556           blocks of physically contiguous memory, then you may need to
1557           increase this value.
1558
1559           This config option is actually maximum order plus one. For example,
1560           a value of 11 means that the largest free memory block is 2^10 pages.
1561
1562 config LEDS
1563         bool "Timer and CPU usage LEDs"
1564         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1565                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1566                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1567                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1568                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1569                    ARCH_AT91 || ARCH_DAVINCI || \
1570                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1571         help
1572           If you say Y here, the LEDs on your machine will be used
1573           to provide useful information about your current system status.
1574
1575           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1576           be able to select which LEDs are active using the options below. If
1577           you are compiling a kernel for the EBSA-110 or the LART however, the
1578           red LED will simply flash regularly to indicate that the system is
1579           still functional. It is safe to say Y here if you have a CATS
1580           system, but the driver will do nothing.
1581
1582 config LEDS_TIMER
1583         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1584                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1585                             || MACH_OMAP_PERSEUS2
1586         depends on LEDS
1587         depends on !GENERIC_CLOCKEVENTS
1588         default y if ARCH_EBSA110
1589         help
1590           If you say Y here, one of the system LEDs (the green one on the
1591           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1592           will flash regularly to indicate that the system is still
1593           operational. This is mainly useful to kernel hackers who are
1594           debugging unstable kernels.
1595
1596           The LART uses the same LED for both Timer LED and CPU usage LED
1597           functions. You may choose to use both, but the Timer LED function
1598           will overrule the CPU usage LED.
1599
1600 config LEDS_CPU
1601         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1602                         !ARCH_OMAP) \
1603                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1604                         || MACH_OMAP_PERSEUS2
1605         depends on LEDS
1606         help
1607           If you say Y here, the red LED will be used to give a good real
1608           time indication of CPU usage, by lighting whenever the idle task
1609           is not currently executing.
1610
1611           The LART uses the same LED for both Timer LED and CPU usage LED
1612           functions. You may choose to use both, but the Timer LED function
1613           will overrule the CPU usage LED.
1614
1615 config ALIGNMENT_TRAP
1616         bool
1617         depends on CPU_CP15_MMU
1618         default y if !ARCH_EBSA110
1619         select HAVE_PROC_CPU if PROC_FS
1620         help
1621           ARM processors cannot fetch/store information which is not
1622           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1623           address divisible by 4. On 32-bit ARM processors, these non-aligned
1624           fetch/store instructions will be emulated in software if you say
1625           here, which has a severe performance impact. This is necessary for
1626           correct operation of some network protocols. With an IP-only
1627           configuration it is safe to say N, otherwise say Y.
1628
1629 config UACCESS_WITH_MEMCPY
1630         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1631         depends on MMU && EXPERIMENTAL
1632         default y if CPU_FEROCEON
1633         help
1634           Implement faster copy_to_user and clear_user methods for CPU
1635           cores where a 8-word STM instruction give significantly higher
1636           memory write throughput than a sequence of individual 32bit stores.
1637
1638           A possible side effect is a slight increase in scheduling latency
1639           between threads sharing the same address space if they invoke
1640           such copy operations with large buffers.
1641
1642           However, if the CPU data cache is using a write-allocate mode,
1643           this option is unlikely to provide any performance gain.
1644
1645 config SECCOMP
1646         bool
1647         prompt "Enable seccomp to safely compute untrusted bytecode"
1648         ---help---
1649           This kernel feature is useful for number crunching applications
1650           that may need to compute untrusted bytecode during their
1651           execution. By using pipes or other transports made available to
1652           the process as file descriptors supporting the read/write
1653           syscalls, it's possible to isolate those applications in
1654           their own address space using seccomp. Once seccomp is
1655           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1656           and the task is only allowed to execute a few safe syscalls
1657           defined by each seccomp mode.
1658
1659 config CC_STACKPROTECTOR
1660         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1661         depends on EXPERIMENTAL
1662         help
1663           This option turns on the -fstack-protector GCC feature. This
1664           feature puts, at the beginning of functions, a canary value on
1665           the stack just before the return address, and validates
1666           the value just before actually returning.  Stack based buffer
1667           overflows (that need to overwrite this return address) now also
1668           overwrite the canary, which gets detected and the attack is then
1669           neutralized via a kernel panic.
1670           This feature requires gcc version 4.2 or above.
1671
1672 config DEPRECATED_PARAM_STRUCT
1673         bool "Provide old way to pass kernel parameters"
1674         help
1675           This was deprecated in 2001 and announced to live on for 5 years.
1676           Some old boot loaders still use this way.
1677
1678 endmenu
1679
1680 menu "Boot options"
1681
1682 # Compressed boot loader in ROM.  Yes, we really want to ask about
1683 # TEXT and BSS so we preserve their values in the config files.
1684 config ZBOOT_ROM_TEXT
1685         hex "Compressed ROM boot loader base address"
1686         default "0"
1687         help
1688           The physical address at which the ROM-able zImage is to be
1689           placed in the target.  Platforms which normally make use of
1690           ROM-able zImage formats normally set this to a suitable
1691           value in their defconfig file.
1692
1693           If ZBOOT_ROM is not enabled, this has no effect.
1694
1695 config ZBOOT_ROM_BSS
1696         hex "Compressed ROM boot loader BSS address"
1697         default "0"
1698         help
1699           The base address of an area of read/write memory in the target
1700           for the ROM-able zImage which must be available while the
1701           decompressor is running. It must be large enough to hold the
1702           entire decompressed kernel plus an additional 128 KiB.
1703           Platforms which normally make use of ROM-able zImage formats
1704           normally set this to a suitable value in their defconfig file.
1705
1706           If ZBOOT_ROM is not enabled, this has no effect.
1707
1708 config ZBOOT_ROM
1709         bool "Compressed boot loader in ROM/flash"
1710         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1711         help
1712           Say Y here if you intend to execute your compressed kernel image
1713           (zImage) directly from ROM or flash.  If unsure, say N.
1714
1715 config ZBOOT_ROM_MMCIF
1716         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1717         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1718         help
1719           Say Y here to include experimental MMCIF loading code in the
1720           ROM-able zImage. With this enabled it is possible to write the
1721           the ROM-able zImage kernel image to an MMC card and boot the
1722           kernel straight from the reset vector. At reset the processor
1723           Mask ROM will load the first part of the the ROM-able zImage
1724           which in turn loads the rest the kernel image to RAM using the
1725           MMCIF hardware block.
1726
1727 config CMDLINE
1728         string "Default kernel command string"
1729         default ""
1730         help
1731           On some architectures (EBSA110 and CATS), there is currently no way
1732           for the boot loader to pass arguments to the kernel. For these
1733           architectures, you should supply some command-line options at build
1734           time by entering them here. As a minimum, you should specify the
1735           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1736
1737 config CMDLINE_FORCE
1738         bool "Always use the default kernel command string"
1739         depends on CMDLINE != ""
1740         help
1741           Always use the default kernel command string, even if the boot
1742           loader passes other arguments to the kernel.
1743           This is useful if you cannot or don't want to change the
1744           command-line options your boot loader passes to the kernel.
1745
1746           If unsure, say N.
1747
1748 config XIP_KERNEL
1749         bool "Kernel Execute-In-Place from ROM"
1750         depends on !ZBOOT_ROM
1751         help
1752           Execute-In-Place allows the kernel to run from non-volatile storage
1753           directly addressable by the CPU, such as NOR flash. This saves RAM
1754           space since the text section of the kernel is not loaded from flash
1755           to RAM.  Read-write sections, such as the data section and stack,
1756           are still copied to RAM.  The XIP kernel is not compressed since
1757           it has to run directly from flash, so it will take more space to
1758           store it.  The flash address used to link the kernel object files,
1759           and for storing it, is configuration dependent. Therefore, if you
1760           say Y here, you must know the proper physical address where to
1761           store the kernel image depending on your own flash memory usage.
1762
1763           Also note that the make target becomes "make xipImage" rather than
1764           "make zImage" or "make Image".  The final kernel binary to put in
1765           ROM memory will be arch/arm/boot/xipImage.
1766
1767           If unsure, say N.
1768
1769 config XIP_PHYS_ADDR
1770         hex "XIP Kernel Physical Location"
1771         depends on XIP_KERNEL
1772         default "0x00080000"
1773         help
1774           This is the physical address in your flash memory the kernel will
1775           be linked for and stored to.  This address is dependent on your
1776           own flash usage.
1777
1778 config KEXEC
1779         bool "Kexec system call (EXPERIMENTAL)"
1780         depends on EXPERIMENTAL
1781         help
1782           kexec is a system call that implements the ability to shutdown your
1783           current kernel, and to start another kernel.  It is like a reboot
1784           but it is independent of the system firmware.   And like a reboot
1785           you can start any kernel with it, not just Linux.
1786
1787           It is an ongoing process to be certain the hardware in a machine
1788           is properly shutdown, so do not be surprised if this code does not
1789           initially work for you.  It may help to enable device hotplugging
1790           support.
1791
1792 config ATAGS_PROC
1793         bool "Export atags in procfs"
1794         depends on KEXEC
1795         default y
1796         help
1797           Should the atags used to boot the kernel be exported in an "atags"
1798           file in procfs. Useful with kexec.
1799
1800 config CRASH_DUMP
1801         bool "Build kdump crash kernel (EXPERIMENTAL)"
1802         depends on EXPERIMENTAL
1803         help
1804           Generate crash dump after being started by kexec. This should
1805           be normally only set in special crash dump kernels which are
1806           loaded in the main kernel with kexec-tools into a specially
1807           reserved region and then later executed after a crash by
1808           kdump/kexec. The crash dump kernel must be compiled to a
1809           memory address not used by the main kernel
1810
1811           For more details see Documentation/kdump/kdump.txt
1812
1813 config AUTO_ZRELADDR
1814         bool "Auto calculation of the decompressed kernel image address"
1815         depends on !ZBOOT_ROM && !ARCH_U300
1816         help
1817           ZRELADDR is the physical address where the decompressed kernel
1818           image will be placed. If AUTO_ZRELADDR is selected, the address
1819           will be determined at run-time by masking the current IP with
1820           0xf8000000. This assumes the zImage being placed in the first 128MB
1821           from start of memory.
1822
1823 endmenu
1824
1825 menu "CPU Power Management"
1826
1827 if ARCH_HAS_CPUFREQ
1828
1829 source "drivers/cpufreq/Kconfig"
1830
1831 config CPU_FREQ_IMX
1832         tristate "CPUfreq driver for i.MX CPUs"
1833         depends on ARCH_MXC && CPU_FREQ
1834         help
1835           This enables the CPUfreq driver for i.MX CPUs.
1836
1837 config CPU_FREQ_SA1100
1838         bool
1839
1840 config CPU_FREQ_SA1110
1841         bool
1842
1843 config CPU_FREQ_INTEGRATOR
1844         tristate "CPUfreq driver for ARM Integrator CPUs"
1845         depends on ARCH_INTEGRATOR && CPU_FREQ
1846         default y
1847         help
1848           This enables the CPUfreq driver for ARM Integrator CPUs.
1849
1850           For details, take a look at <file:Documentation/cpu-freq>.
1851
1852           If in doubt, say Y.
1853
1854 config CPU_FREQ_PXA
1855         bool
1856         depends on CPU_FREQ && ARCH_PXA && PXA25x
1857         default y
1858         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1859
1860 config CPU_FREQ_S3C64XX
1861         bool "CPUfreq support for Samsung S3C64XX CPUs"
1862         depends on CPU_FREQ && CPU_S3C6410
1863
1864 config CPU_FREQ_S3C
1865         bool
1866         help
1867           Internal configuration node for common cpufreq on Samsung SoC
1868
1869 config CPU_FREQ_S3C24XX
1870         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1871         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1872         select CPU_FREQ_S3C
1873         help
1874           This enables the CPUfreq driver for the Samsung S3C24XX family
1875           of CPUs.
1876
1877           For details, take a look at <file:Documentation/cpu-freq>.
1878
1879           If in doubt, say N.
1880
1881 config CPU_FREQ_S3C24XX_PLL
1882         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1883         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1884         help
1885           Compile in support for changing the PLL frequency from the
1886           S3C24XX series CPUfreq driver. The PLL takes time to settle
1887           after a frequency change, so by default it is not enabled.
1888
1889           This also means that the PLL tables for the selected CPU(s) will
1890           be built which may increase the size of the kernel image.
1891
1892 config CPU_FREQ_S3C24XX_DEBUG
1893         bool "Debug CPUfreq Samsung driver core"
1894         depends on CPU_FREQ_S3C24XX
1895         help
1896           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1897
1898 config CPU_FREQ_S3C24XX_IODEBUG
1899         bool "Debug CPUfreq Samsung driver IO timing"
1900         depends on CPU_FREQ_S3C24XX
1901         help
1902           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1903
1904 config CPU_FREQ_S3C24XX_DEBUGFS
1905         bool "Export debugfs for CPUFreq"
1906         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1907         help
1908           Export status information via debugfs.
1909
1910 endif
1911
1912 source "drivers/cpuidle/Kconfig"
1913
1914 endmenu
1915
1916 menu "Floating point emulation"
1917
1918 comment "At least one emulation must be selected"
1919
1920 config FPE_NWFPE
1921         bool "NWFPE math emulation"
1922         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1923         ---help---
1924           Say Y to include the NWFPE floating point emulator in the kernel.
1925           This is necessary to run most binaries. Linux does not currently
1926           support floating point hardware so you need to say Y here even if
1927           your machine has an FPA or floating point co-processor podule.
1928
1929           You may say N here if you are going to load the Acorn FPEmulator
1930           early in the bootup.
1931
1932 config FPE_NWFPE_XP
1933         bool "Support extended precision"
1934         depends on FPE_NWFPE
1935         help
1936           Say Y to include 80-bit support in the kernel floating-point
1937           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1938           Note that gcc does not generate 80-bit operations by default,
1939           so in most cases this option only enlarges the size of the
1940           floating point emulator without any good reason.
1941
1942           You almost surely want to say N here.
1943
1944 config FPE_FASTFPE
1945         bool "FastFPE math emulation (EXPERIMENTAL)"
1946         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1947         ---help---
1948           Say Y here to include the FAST floating point emulator in the kernel.
1949           This is an experimental much faster emulator which now also has full
1950           precision for the mantissa.  It does not support any exceptions.
1951           It is very simple, and approximately 3-6 times faster than NWFPE.
1952
1953           It should be sufficient for most programs.  It may be not suitable
1954           for scientific calculations, but you have to check this for yourself.
1955           If you do not feel you need a faster FP emulation you should better
1956           choose NWFPE.
1957
1958 config VFP
1959         bool "VFP-format floating point maths"
1960         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1961         help
1962           Say Y to include VFP support code in the kernel. This is needed
1963           if your hardware includes a VFP unit.
1964
1965           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1966           release notes and additional status information.
1967
1968           Say N if your target does not have VFP hardware.
1969
1970 config VFPv3
1971         bool
1972         depends on VFP
1973         default y if CPU_V7
1974
1975 config NEON
1976         bool "Advanced SIMD (NEON) Extension support"
1977         depends on VFPv3 && CPU_V7
1978         help
1979           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1980           Extension.
1981
1982 endmenu
1983
1984 menu "Userspace binary formats"
1985
1986 source "fs/Kconfig.binfmt"
1987
1988 config ARTHUR
1989         tristate "RISC OS personality"
1990         depends on !AEABI
1991         help
1992           Say Y here to include the kernel code necessary if you want to run
1993           Acorn RISC OS/Arthur binaries under Linux. This code is still very
1994           experimental; if this sounds frightening, say N and sleep in peace.
1995           You can also say M here to compile this support as a module (which
1996           will be called arthur).
1997
1998 endmenu
1999
2000 menu "Power management options"
2001
2002 source "kernel/power/Kconfig"
2003
2004 config ARCH_SUSPEND_POSSIBLE
2005         def_bool y
2006
2007 endmenu
2008
2009 source "net/Kconfig"
2010
2011 source "drivers/Kconfig"
2012
2013 source "fs/Kconfig"
2014
2015 source "arch/arm/Kconfig.debug"
2016
2017 source "security/Kconfig"
2018
2019 source "crypto/Kconfig"
2020
2021 source "lib/Kconfig"