arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  13         select HAVE_ARCH_KGDB
  14         select HAVE_ARCH_TRACEHOOK
  15         select HAVE_KPROBES if !XIP_KERNEL
  16         select HAVE_KRETPROBES if (HAVE_KPROBES)
  17         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  18         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  19         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  20         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  21         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  22         select HAVE_GENERIC_DMA_COHERENT
  23         select HAVE_KERNEL_GZIP
  24         select HAVE_KERNEL_LZO
  25         select HAVE_KERNEL_LZMA
  26         select HAVE_KERNEL_XZ
  27         select HAVE_IRQ_WORK
  28         select HAVE_PERF_EVENTS
  29         select PERF_USE_VMALLOC
  30         select HAVE_REGS_AND_STACK_ACCESS_API
  31         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  32         select HAVE_C_RECORDMCOUNT
  33         select HAVE_GENERIC_HARDIRQS
  34         select HARDIRQS_SW_RESEND
  35         select GENERIC_IRQ_PROBE
  36         select GENERIC_IRQ_SHOW
  37         select GENERIC_IRQ_PROBE
  38         select HARDIRQS_SW_RESEND
  39         select CPU_PM if (SUSPEND || CPU_IDLE)
  40         select GENERIC_PCI_IOMAP
  41         select HAVE_BPF_JIT
  42         select GENERIC_SMP_IDLE_THREAD
  43         help
  44           The ARM series is a line of low-power-consumption RISC chip designs
  45           licensed by ARM Ltd and targeted at embedded applications and
  46           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  47           manufactured, but legacy ARM-based PC hardware remains popular in
  48           Europe.  There is an ARM Linux project with a web page at
  49           <http://www.arm.linux.org.uk/>.
  50
  51 config ARM_HAS_SG_CHAIN
  52         bool
  53
  54 config HAVE_PWM
  55         bool
  56
  57 config MIGHT_HAVE_PCI
  58         bool
  59
  60 config SYS_SUPPORTS_APM_EMULATION
  61         bool
  62
  63 config GENERIC_GPIO
  64         bool
  65
  66 config ARCH_USES_GETTIMEOFFSET
  67         bool
  68         default n
  69
  70 config GENERIC_CLOCKEVENTS
  71         bool
  72
  73 config GENERIC_CLOCKEVENTS_BROADCAST
  74         bool
  75         depends on GENERIC_CLOCKEVENTS
  76         default y if SMP
  77
  78 config KTIME_SCALAR
  79         bool
  80         default y
  81
  82 config HAVE_TCM
  83         bool
  84         select GENERIC_ALLOCATOR
  85
  86 config HAVE_PROC_CPU
  87         bool
  88
  89 config NO_IOPORT
  90         bool
  91
  92 config EISA
  93         bool
  94         ---help---
  95           The Extended Industry Standard Architecture (EISA) bus was
  96           developed as an open alternative to the IBM MicroChannel bus.
  97
  98           The EISA bus provided some of the features of the IBM MicroChannel
  99           bus while maintaining backward compatibility with cards made for
 100           the older ISA bus.  The EISA bus saw limited use between 1988 and
 101           1995 when it was made obsolete by the PCI bus.
 102
 103           Say Y here if you are building a kernel for an EISA-based machine.
 104
 105           Otherwise, say N.
 106
 107 config SBUS
 108         bool
 109
 110 config MCA
 111         bool
 112         help
 113           MicroChannel Architecture is found in some IBM PS/2 machines and
 114           laptops.  It is a bus system similar to PCI or ISA. See
 115           <file:Documentation/mca.txt> (and especially the web page given
 116           there) before attempting to build an MCA bus kernel.
 117
 118 config STACKTRACE_SUPPORT
 119         bool
 120         default y
 121
 122 config HAVE_LATENCYTOP_SUPPORT
 123         bool
 124         depends on !SMP
 125         default y
 126
 127 config LOCKDEP_SUPPORT
 128         bool
 129         default y
 130
 131 config TRACE_IRQFLAGS_SUPPORT
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config ARCH_HAS_DMA_SET_COHERENT_MASK
 178         bool
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config NEED_RET_TO_USER
 187         bool
 188
 189 config ARCH_MTD_XIP
 190         bool
 191
 192 config VECTORS_BASE
 193         hex
 194         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 195         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 196         default 0x00000000
 197         help
 198           The base address of exception vectors.
 199
 200 config ARM_PATCH_PHYS_VIRT
 201         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 202         default y
 203         depends on !XIP_KERNEL && MMU
 204         depends on !ARCH_REALVIEW || !SPARSEMEM
 205         help
 206           Patch phys-to-virt and virt-to-phys translation functions at
 207           boot and module load time according to the position of the
 208           kernel in system memory.
 209
 210           This can only be used with non-XIP MMU kernels where the base
 211           of physical memory is at a 16MB boundary.
 212
 213           Only disable this option if you know that you do not require
 214           this feature (eg, building a kernel for a single machine) and
 215           you need to shrink the kernel to the minimal size.
 216
 217 config NEED_MACH_IO_H
 218         bool
 219         help
 220           Select this when mach/io.h is required to provide special
 221           definitions for this platform.  The need for mach/io.h should
 222           be avoided when possible.
 223
 224 config NEED_MACH_MEMORY_H
 225         bool
 226         help
 227           Select this when mach/memory.h is required to provide special
 228           definitions for this platform.  The need for mach/memory.h should
 229           be avoided when possible.
 230
 231 config PHYS_OFFSET
 232         hex "Physical address of main memory" if MMU
 233         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 234         default DRAM_BASE if !MMU
 235         help
 236           Please provide the physical address corresponding to the
 237           location of main memory in your system.
 238
 239 config GENERIC_BUG
 240         def_bool y
 241         depends on BUG
 242
 243 source "init/Kconfig"
 244
 245 source "kernel/Kconfig.freezer"
 246
 247 menu "System Type"
 248
 249 config MMU
 250         bool "MMU-based Paged Memory Management Support"
 251         default y
 252         help
 253           Select if you want MMU-based virtualised addressing space
 254           support by paged memory management. If unsure, say 'Y'.
 255
 256 #
 257 # The "ARM system type" choice list is ordered alphabetically by option
 258 # text.  Please add new entries in the option alphabetic order.
 259 #
 260 choice
 261         prompt "ARM system type"
 262         default ARCH_VERSATILE
 263
 264 config ARCH_INTEGRATOR
 265         bool "ARM Ltd. Integrator family"
 266         select ARM_AMBA
 267         select ARCH_HAS_CPUFREQ
 268         select CLKDEV_LOOKUP
 269         select HAVE_MACH_CLKDEV
 270         select HAVE_TCM
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select PLAT_VERSATILE
 274         select PLAT_VERSATILE_FPGA_IRQ
 275         select NEED_MACH_IO_H
 276         select NEED_MACH_MEMORY_H
 277         select SPARSE_IRQ
 278         select MULTI_IRQ_HANDLER
 279         help
 280           Support for ARM's Integrator platform.
 281
 282 config ARCH_REALVIEW
 283         bool "ARM Ltd. RealView family"
 284         select ARM_AMBA
 285         select CLKDEV_LOOKUP
 286         select HAVE_MACH_CLKDEV
 287         select ICST
 288         select GENERIC_CLOCKEVENTS
 289         select ARCH_WANT_OPTIONAL_GPIOLIB
 290         select PLAT_VERSATILE
 291         select PLAT_VERSATILE_CLCD
 292         select ARM_TIMER_SP804
 293         select GPIO_PL061 if GPIOLIB
 294         select NEED_MACH_MEMORY_H
 295         help
 296           This enables support for ARM Ltd RealView boards.
 297
 298 config ARCH_VERSATILE
 299         bool "ARM Ltd. Versatile family"
 300         select ARM_AMBA
 301         select ARM_VIC
 302         select CLKDEV_LOOKUP
 303         select HAVE_MACH_CLKDEV
 304         select ICST
 305         select GENERIC_CLOCKEVENTS
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select PLAT_VERSATILE
 308         select PLAT_VERSATILE_CLCD
 309         select PLAT_VERSATILE_FPGA_IRQ
 310         select ARM_TIMER_SP804
 311         help
 312           This enables support for ARM Ltd Versatile board.
 313
 314 config ARCH_VEXPRESS
 315         bool "ARM Ltd. Versatile Express family"
 316         select ARCH_WANT_OPTIONAL_GPIOLIB
 317         select ARM_AMBA
 318         select ARM_TIMER_SP804
 319         select CLKDEV_LOOKUP
 320         select HAVE_MACH_CLKDEV
 321         select GENERIC_CLOCKEVENTS
 322         select HAVE_CLK
 323         select HAVE_PATA_PLATFORM
 324         select ICST
 325         select NO_IOPORT
 326         select PLAT_VERSATILE
 327         select PLAT_VERSATILE_CLCD
 328         help
 329           This enables support for the ARM Ltd Versatile Express boards.
 330
 331 config ARCH_AT91
 332         bool "Atmel AT91"
 333         select ARCH_REQUIRE_GPIOLIB
 334         select HAVE_CLK
 335         select CLKDEV_LOOKUP
 336         select IRQ_DOMAIN
 337         select NEED_MACH_IO_H if PCCARD
 338         help
 339           This enables support for systems based on Atmel
 340           AT91RM9200 and AT91SAM9* processors.
 341
 342 config ARCH_BCMRING
 343         bool "Broadcom BCMRING"
 344         depends on MMU
 345         select CPU_V6
 346         select ARM_AMBA
 347         select ARM_TIMER_SP804
 348         select CLKDEV_LOOKUP
 349         select GENERIC_CLOCKEVENTS
 350         select ARCH_WANT_OPTIONAL_GPIOLIB
 351         help
 352           Support for Broadcom's BCMRing platform.
 353
 354 config ARCH_HIGHBANK
 355         bool "Calxeda Highbank-based"
 356         select ARCH_WANT_OPTIONAL_GPIOLIB
 357         select ARM_AMBA
 358         select ARM_GIC
 359         select ARM_TIMER_SP804
 360         select CACHE_L2X0
 361         select CLKDEV_LOOKUP
 362         select CPU_V7
 363         select GENERIC_CLOCKEVENTS
 364         select HAVE_ARM_SCU
 365         select HAVE_SMP
 366         select SPARSE_IRQ
 367         select USE_OF
 368         help
 369           Support for the Calxeda Highbank SoC based boards.
 370
 371 config ARCH_CLPS711X
 372         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 373         select CPU_ARM720T
 374         select ARCH_USES_GETTIMEOFFSET
 375         select NEED_MACH_MEMORY_H
 376         help
 377           Support for Cirrus Logic 711x/721x/731x based boards.
 378
 379 config ARCH_CNS3XXX
 380         bool "Cavium Networks CNS3XXX family"
 381         select CPU_V6K
 382         select GENERIC_CLOCKEVENTS
 383         select ARM_GIC
 384         select MIGHT_HAVE_CACHE_L2X0
 385         select MIGHT_HAVE_PCI
 386         select PCI_DOMAINS if PCI
 387         help
 388           Support for Cavium Networks CNS3XXX platform.
 389
 390 config ARCH_GEMINI
 391         bool "Cortina Systems Gemini"
 392         select CPU_FA526
 393         select ARCH_REQUIRE_GPIOLIB
 394         select ARCH_USES_GETTIMEOFFSET
 395         help
 396           Support for the Cortina Systems Gemini family SoCs
 397
 398 config ARCH_PRIMA2
 399         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 400         select CPU_V7
 401         select NO_IOPORT
 402         select GENERIC_CLOCKEVENTS
 403         select CLKDEV_LOOKUP
 404         select GENERIC_IRQ_CHIP
 405         select MIGHT_HAVE_CACHE_L2X0
 406         select USE_OF
 407         select ZONE_DMA
 408         help
 409           Support for CSR SiRFSoC ARM Cortex A9 Platform
 410
 411 config ARCH_EBSA110
 412         bool "EBSA-110"
 413         select CPU_SA110
 414         select ISA
 415         select NO_IOPORT
 416         select ARCH_USES_GETTIMEOFFSET
 417         select NEED_MACH_IO_H
 418         select NEED_MACH_MEMORY_H
 419         help
 420           This is an evaluation board for the StrongARM processor available
 421           from Digital. It has limited hardware on-board, including an
 422           Ethernet interface, two PCMCIA sockets, two serial ports and a
 423           parallel port.
 424
 425 config ARCH_EP93XX
 426         bool "EP93xx-based"
 427         select CPU_ARM920T
 428         select ARM_AMBA
 429         select ARM_VIC
 430         select CLKDEV_LOOKUP
 431         select ARCH_REQUIRE_GPIOLIB
 432         select ARCH_HAS_HOLES_MEMORYMODEL
 433         select ARCH_USES_GETTIMEOFFSET
 434         select NEED_MACH_MEMORY_H
 435         help
 436           This enables support for the Cirrus EP93xx series of CPUs.
 437
 438 config ARCH_FOOTBRIDGE
 439         bool "FootBridge"
 440         select CPU_SA110
 441         select FOOTBRIDGE
 442         select GENERIC_CLOCKEVENTS
 443         select HAVE_IDE
 444         select NEED_MACH_IO_H
 445         select NEED_MACH_MEMORY_H
 446         help
 447           Support for systems based on the DC21285 companion chip
 448           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 449
 450 config ARCH_MXC
 451         bool "Freescale MXC/iMX-based"
 452         select GENERIC_CLOCKEVENTS
 453         select ARCH_REQUIRE_GPIOLIB
 454         select CLKDEV_LOOKUP
 455         select CLKSRC_MMIO
 456         select GENERIC_IRQ_CHIP
 457         select MULTI_IRQ_HANDLER
 458         help
 459           Support for Freescale MXC/iMX-based family of processors
 460
 461 config ARCH_MXS
 462         bool "Freescale MXS-based"
 463         select GENERIC_CLOCKEVENTS
 464         select ARCH_REQUIRE_GPIOLIB
 465         select CLKDEV_LOOKUP
 466         select CLKSRC_MMIO
 467         select HAVE_CLK_PREPARE
 468         help
 469           Support for Freescale MXS-based family of processors
 470
 471 config ARCH_NETX
 472         bool "Hilscher NetX based"
 473         select CLKSRC_MMIO
 474         select CPU_ARM926T
 475         select ARM_VIC
 476         select GENERIC_CLOCKEVENTS
 477         help
 478           This enables support for systems based on the Hilscher NetX Soc
 479
 480 config ARCH_H720X
 481         bool "Hynix HMS720x-based"
 482         select CPU_ARM720T
 483         select ISA_DMA_API
 484         select ARCH_USES_GETTIMEOFFSET
 485         help
 486           This enables support for systems based on the Hynix HMS720x
 487
 488 config ARCH_IOP13XX
 489         bool "IOP13xx-based"
 490         depends on MMU
 491         select CPU_XSC3
 492         select PLAT_IOP
 493         select PCI
 494         select ARCH_SUPPORTS_MSI
 495         select VMSPLIT_1G
 496         select NEED_MACH_IO_H
 497         select NEED_MACH_MEMORY_H
 498         select NEED_RET_TO_USER
 499         help
 500           Support for Intel's IOP13XX (XScale) family of processors.
 501
 502 config ARCH_IOP32X
 503         bool "IOP32x-based"
 504         depends on MMU
 505         select CPU_XSCALE
 506         select NEED_MACH_IO_H
 507         select NEED_RET_TO_USER
 508         select PLAT_IOP
 509         select PCI
 510         select ARCH_REQUIRE_GPIOLIB
 511         help
 512           Support for Intel's 80219 and IOP32X (XScale) family of
 513           processors.
 514
 515 config ARCH_IOP33X
 516         bool "IOP33x-based"
 517         depends on MMU
 518         select CPU_XSCALE
 519         select NEED_MACH_IO_H
 520         select NEED_RET_TO_USER
 521         select PLAT_IOP
 522         select PCI
 523         select ARCH_REQUIRE_GPIOLIB
 524         help
 525           Support for Intel's IOP33X (XScale) family of processors.
 526
 527 config ARCH_IXP4XX
 528         bool "IXP4xx-based"
 529         depends on MMU
 530         select ARCH_HAS_DMA_SET_COHERENT_MASK
 531         select CLKSRC_MMIO
 532         select CPU_XSCALE
 533         select GENERIC_GPIO
 534         select GENERIC_CLOCKEVENTS
 535         select MIGHT_HAVE_PCI
 536         select NEED_MACH_IO_H
 537         select DMABOUNCE if PCI
 538         help
 539           Support for Intel's IXP4XX (XScale) family of processors.
 540
 541 config ARCH_DOVE
 542         bool "Marvell Dove"
 543         select CPU_V7
 544         select PCI
 545         select ARCH_REQUIRE_GPIOLIB
 546         select GENERIC_CLOCKEVENTS
 547         select NEED_MACH_IO_H
 548         select PLAT_ORION
 549         help
 550           Support for the Marvell Dove SoC 88AP510
 551
 552 config ARCH_KIRKWOOD
 553         bool "Marvell Kirkwood"
 554         select CPU_FEROCEON
 555         select PCI
 556         select ARCH_REQUIRE_GPIOLIB
 557         select GENERIC_CLOCKEVENTS
 558         select NEED_MACH_IO_H
 559         select PLAT_ORION
 560         help
 561           Support for the following Marvell Kirkwood series SoCs:
 562           88F6180, 88F6192 and 88F6281.
 563
 564 config ARCH_LPC32XX
 565         bool "NXP LPC32XX"
 566         select CLKSRC_MMIO
 567         select CPU_ARM926T
 568         select ARCH_REQUIRE_GPIOLIB
 569         select HAVE_IDE
 570         select ARM_AMBA
 571         select USB_ARCH_HAS_OHCI
 572         select CLKDEV_LOOKUP
 573         select GENERIC_CLOCKEVENTS
 574         help
 575           Support for the NXP LPC32XX family of processors
 576
 577 config ARCH_MV78XX0
 578         bool "Marvell MV78xx0"
 579         select CPU_FEROCEON
 580         select PCI
 581         select ARCH_REQUIRE_GPIOLIB
 582         select GENERIC_CLOCKEVENTS
 583         select NEED_MACH_IO_H
 584         select PLAT_ORION
 585         help
 586           Support for the following Marvell MV78xx0 series SoCs:
 587           MV781x0, MV782x0.
 588
 589 config ARCH_ORION5X
 590         bool "Marvell Orion"
 591         depends on MMU
 592         select CPU_FEROCEON
 593         select PCI
 594         select ARCH_REQUIRE_GPIOLIB
 595         select GENERIC_CLOCKEVENTS
 596         select PLAT_ORION
 597         help
 598           Support for the following Marvell Orion 5x series SoCs:
 599           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 600           Orion-2 (5281), Orion-1-90 (6183).
 601
 602 config ARCH_MMP
 603         bool "Marvell PXA168/910/MMP2"
 604         depends on MMU
 605         select ARCH_REQUIRE_GPIOLIB
 606         select CLKDEV_LOOKUP
 607         select GENERIC_CLOCKEVENTS
 608         select GPIO_PXA
 609         select PLAT_PXA
 610         select SPARSE_IRQ
 611         select GENERIC_ALLOCATOR
 612         help
 613           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 614
 615 config ARCH_KS8695
 616         bool "Micrel/Kendin KS8695"
 617         select CPU_ARM922T
 618         select ARCH_REQUIRE_GPIOLIB
 619         select ARCH_USES_GETTIMEOFFSET
 620         select NEED_MACH_MEMORY_H
 621         help
 622           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 623           System-on-Chip devices.
 624
 625 config ARCH_W90X900
 626         bool "Nuvoton W90X900 CPU"
 627         select CPU_ARM926T
 628         select ARCH_REQUIRE_GPIOLIB
 629         select CLKDEV_LOOKUP
 630         select CLKSRC_MMIO
 631         select GENERIC_CLOCKEVENTS
 632         help
 633           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 634           At present, the w90x900 has been renamed nuc900, regarding
 635           the ARM series product line, you can login the following
 636           link address to know more.
 637
 638           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 639                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 640
 641 config ARCH_TEGRA
 642         bool "NVIDIA Tegra"
 643         select CLKDEV_LOOKUP
 644         select CLKSRC_MMIO
 645         select GENERIC_CLOCKEVENTS
 646         select GENERIC_GPIO
 647         select HAVE_CLK
 648         select HAVE_SMP
 649         select MIGHT_HAVE_CACHE_L2X0
 650         select NEED_MACH_IO_H if PCI
 651         select ARCH_HAS_CPUFREQ
 652         help
 653           This enables support for NVIDIA Tegra based systems (Tegra APX,
 654           Tegra 6xx and Tegra 2 series).
 655
 656 config ARCH_PICOXCELL
 657         bool "Picochip picoXcell"
 658         select ARCH_REQUIRE_GPIOLIB
 659         select ARM_PATCH_PHYS_VIRT
 660         select ARM_VIC
 661         select CPU_V6K
 662         select DW_APB_TIMER
 663         select GENERIC_CLOCKEVENTS
 664         select GENERIC_GPIO
 665         select HAVE_TCM
 666         select NO_IOPORT
 667         select SPARSE_IRQ
 668         select USE_OF
 669         help
 670           This enables support for systems based on the Picochip picoXcell
 671           family of Femtocell devices.  The picoxcell support requires device tree
 672           for all boards.
 673
 674 config ARCH_PNX4008
 675         bool "Philips Nexperia PNX4008 Mobile"
 676         select CPU_ARM926T
 677         select CLKDEV_LOOKUP
 678         select ARCH_USES_GETTIMEOFFSET
 679         help
 680           This enables support for Philips PNX4008 mobile platform.
 681
 682 config ARCH_PXA
 683         bool "PXA2xx/PXA3xx-based"
 684         depends on MMU
 685         select ARCH_MTD_XIP
 686         select ARCH_HAS_CPUFREQ
 687         select CLKDEV_LOOKUP
 688         select CLKSRC_MMIO
 689         select ARCH_REQUIRE_GPIOLIB
 690         select GENERIC_CLOCKEVENTS
 691         select GPIO_PXA
 692         select PLAT_PXA
 693         select SPARSE_IRQ
 694         select AUTO_ZRELADDR
 695         select MULTI_IRQ_HANDLER
 696         select ARM_CPU_SUSPEND if PM
 697         select HAVE_IDE
 698         help
 699           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 700
 701 config ARCH_MSM
 702         bool "Qualcomm MSM"
 703         select HAVE_CLK
 704         select GENERIC_CLOCKEVENTS
 705         select ARCH_REQUIRE_GPIOLIB
 706         select CLKDEV_LOOKUP
 707         help
 708           Support for Qualcomm MSM/QSD based systems.  This runs on the
 709           apps processor of the MSM/QSD and depends on a shared memory
 710           interface to the modem processor which runs the baseband
 711           stack and controls some vital subsystems
 712           (clock and power control, etc).
 713
 714 config ARCH_SHMOBILE
 715         bool "Renesas SH-Mobile / R-Mobile"
 716         select HAVE_CLK
 717         select CLKDEV_LOOKUP
 718         select HAVE_MACH_CLKDEV
 719         select HAVE_SMP
 720         select GENERIC_CLOCKEVENTS
 721         select MIGHT_HAVE_CACHE_L2X0
 722         select NO_IOPORT
 723         select SPARSE_IRQ
 724         select MULTI_IRQ_HANDLER
 725         select PM_GENERIC_DOMAINS if PM
 726         select NEED_MACH_MEMORY_H
 727         help
 728           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 729
 730 config ARCH_RPC
 731         bool "RiscPC"
 732         select ARCH_ACORN
 733         select FIQ
 734         select ARCH_MAY_HAVE_PC_FDC
 735         select HAVE_PATA_PLATFORM
 736         select ISA_DMA_API
 737         select NO_IOPORT
 738         select ARCH_SPARSEMEM_ENABLE
 739         select ARCH_USES_GETTIMEOFFSET
 740         select HAVE_IDE
 741         select NEED_MACH_IO_H
 742         select NEED_MACH_MEMORY_H
 743         help
 744           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 745           CD-ROM interface, serial and parallel port, and the floppy drive.
 746
 747 config ARCH_SA1100
 748         bool "SA1100-based"
 749         select CLKSRC_MMIO
 750         select CPU_SA1100
 751         select ISA
 752         select ARCH_SPARSEMEM_ENABLE
 753         select ARCH_MTD_XIP
 754         select ARCH_HAS_CPUFREQ
 755         select CPU_FREQ
 756         select GENERIC_CLOCKEVENTS
 757         select CLKDEV_LOOKUP
 758         select ARCH_REQUIRE_GPIOLIB
 759         select HAVE_IDE
 760         select NEED_MACH_MEMORY_H
 761         select SPARSE_IRQ
 762         help
 763           Support for StrongARM 11x0 based boards.
 764
 765 config ARCH_S3C24XX
 766         bool "Samsung S3C24XX SoCs"
 767         select GENERIC_GPIO
 768         select ARCH_HAS_CPUFREQ
 769         select HAVE_CLK
 770         select CLKDEV_LOOKUP
 771         select ARCH_USES_GETTIMEOFFSET
 772         select HAVE_S3C2410_I2C if I2C
 773         select HAVE_S3C_RTC if RTC_CLASS
 774         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 775         select NEED_MACH_IO_H
 776         help
 777           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 778           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 779           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 780           Samsung SMDK2410 development board (and derivatives).
 781
 782 config ARCH_S3C64XX
 783         bool "Samsung S3C64XX"
 784         select PLAT_SAMSUNG
 785         select CPU_V6
 786         select ARM_VIC
 787         select HAVE_CLK
 788         select HAVE_TCM
 789         select CLKDEV_LOOKUP
 790         select NO_IOPORT
 791         select ARCH_USES_GETTIMEOFFSET
 792         select ARCH_HAS_CPUFREQ
 793         select ARCH_REQUIRE_GPIOLIB
 794         select SAMSUNG_CLKSRC
 795         select SAMSUNG_IRQ_VIC_TIMER
 796         select S3C_GPIO_TRACK
 797         select S3C_DEV_NAND
 798         select USB_ARCH_HAS_OHCI
 799         select SAMSUNG_GPIOLIB_4BIT
 800         select HAVE_S3C2410_I2C if I2C
 801         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 802         help
 803           Samsung S3C64XX series based systems
 804
 805 config ARCH_S5P64X0
 806         bool "Samsung S5P6440 S5P6450"
 807         select CPU_V6
 808         select GENERIC_GPIO
 809         select HAVE_CLK
 810         select CLKDEV_LOOKUP
 811         select CLKSRC_MMIO
 812         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 813         select GENERIC_CLOCKEVENTS
 814         select HAVE_S3C2410_I2C if I2C
 815         select HAVE_S3C_RTC if RTC_CLASS
 816         help
 817           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 818           SMDK6450.
 819
 820 config ARCH_S5PC100
 821         bool "Samsung S5PC100"
 822         select GENERIC_GPIO
 823         select HAVE_CLK
 824         select CLKDEV_LOOKUP
 825         select CPU_V7
 826         select ARCH_USES_GETTIMEOFFSET
 827         select HAVE_S3C2410_I2C if I2C
 828         select HAVE_S3C_RTC if RTC_CLASS
 829         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 830         help
 831           Samsung S5PC100 series based systems
 832
 833 config ARCH_S5PV210
 834         bool "Samsung S5PV210/S5PC110"
 835         select CPU_V7
 836         select ARCH_SPARSEMEM_ENABLE
 837         select ARCH_HAS_HOLES_MEMORYMODEL
 838         select GENERIC_GPIO
 839         select HAVE_CLK
 840         select CLKDEV_LOOKUP
 841         select CLKSRC_MMIO
 842         select ARCH_HAS_CPUFREQ
 843         select GENERIC_CLOCKEVENTS
 844         select HAVE_S3C2410_I2C if I2C
 845         select HAVE_S3C_RTC if RTC_CLASS
 846         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 847         select NEED_MACH_MEMORY_H
 848         help
 849           Samsung S5PV210/S5PC110 series based systems
 850
 851 config ARCH_EXYNOS
 852         bool "SAMSUNG EXYNOS"
 853         select CPU_V7
 854         select ARCH_SPARSEMEM_ENABLE
 855         select ARCH_HAS_HOLES_MEMORYMODEL
 856         select GENERIC_GPIO
 857         select HAVE_CLK
 858         select CLKDEV_LOOKUP
 859         select ARCH_HAS_CPUFREQ
 860         select GENERIC_CLOCKEVENTS
 861         select HAVE_S3C_RTC if RTC_CLASS
 862         select HAVE_S3C2410_I2C if I2C
 863         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 864         select NEED_MACH_MEMORY_H
 865         help
 866           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 867
 868 config ARCH_SHARK
 869         bool "Shark"
 870         select CPU_SA110
 871         select ISA
 872         select ISA_DMA
 873         select ZONE_DMA
 874         select PCI
 875         select ARCH_USES_GETTIMEOFFSET
 876         select NEED_MACH_MEMORY_H
 877         select NEED_MACH_IO_H
 878         help
 879           Support for the StrongARM based Digital DNARD machine, also known
 880           as "Shark" (<http://www.shark-linux.de/shark.html>).
 881
 882 config ARCH_U300
 883         bool "ST-Ericsson U300 Series"
 884         depends on MMU
 885         select CLKSRC_MMIO
 886         select CPU_ARM926T
 887         select HAVE_TCM
 888         select ARM_AMBA
 889         select ARM_PATCH_PHYS_VIRT
 890         select ARM_VIC
 891         select GENERIC_CLOCKEVENTS
 892         select CLKDEV_LOOKUP
 893         select HAVE_MACH_CLKDEV
 894         select GENERIC_GPIO
 895         select ARCH_REQUIRE_GPIOLIB
 896         help
 897           Support for ST-Ericsson U300 series mobile platforms.
 898
 899 config ARCH_U8500
 900         bool "ST-Ericsson U8500 Series"
 901         depends on MMU
 902         select CPU_V7
 903         select ARM_AMBA
 904         select GENERIC_CLOCKEVENTS
 905         select CLKDEV_LOOKUP
 906         select ARCH_REQUIRE_GPIOLIB
 907         select ARCH_HAS_CPUFREQ
 908         select HAVE_SMP
 909         select MIGHT_HAVE_CACHE_L2X0
 910         help
 911           Support for ST-Ericsson's Ux500 architecture
 912
 913 config ARCH_NOMADIK
 914         bool "STMicroelectronics Nomadik"
 915         select ARM_AMBA
 916         select ARM_VIC
 917         select CPU_ARM926T
 918         select CLKDEV_LOOKUP
 919         select GENERIC_CLOCKEVENTS
 920         select MIGHT_HAVE_CACHE_L2X0
 921         select ARCH_REQUIRE_GPIOLIB
 922         help
 923           Support for the Nomadik platform by ST-Ericsson
 924
 925 config ARCH_DAVINCI
 926         bool "TI DaVinci"
 927         select GENERIC_CLOCKEVENTS
 928         select ARCH_REQUIRE_GPIOLIB
 929         select ZONE_DMA
 930         select HAVE_IDE
 931         select CLKDEV_LOOKUP
 932         select GENERIC_ALLOCATOR
 933         select GENERIC_IRQ_CHIP
 934         select ARCH_HAS_HOLES_MEMORYMODEL
 935         help
 936           Support for TI's DaVinci platform.
 937
 938 config ARCH_OMAP
 939         bool "TI OMAP"
 940         select HAVE_CLK
 941         select ARCH_REQUIRE_GPIOLIB
 942         select ARCH_HAS_CPUFREQ
 943         select CLKSRC_MMIO
 944         select GENERIC_CLOCKEVENTS
 945         select ARCH_HAS_HOLES_MEMORYMODEL
 946         help
 947           Support for TI's OMAP platform (OMAP1/2/3/4).
 948
 949 config PLAT_SPEAR
 950         bool "ST SPEAr"
 951         select ARM_AMBA
 952         select ARCH_REQUIRE_GPIOLIB
 953         select CLKDEV_LOOKUP
 954         select CLKSRC_MMIO
 955         select GENERIC_CLOCKEVENTS
 956         select HAVE_CLK
 957         help
 958           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 959
 960 config ARCH_VT8500
 961         bool "VIA/WonderMedia 85xx"
 962         select CPU_ARM926T
 963         select GENERIC_GPIO
 964         select ARCH_HAS_CPUFREQ
 965         select GENERIC_CLOCKEVENTS
 966         select ARCH_REQUIRE_GPIOLIB
 967         select HAVE_PWM
 968         help
 969           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 970
 971 config ARCH_ZYNQ
 972         bool "Xilinx Zynq ARM Cortex A9 Platform"
 973         select CPU_V7
 974         select GENERIC_CLOCKEVENTS
 975         select CLKDEV_LOOKUP
 976         select ARM_GIC
 977         select ARM_AMBA
 978         select ICST
 979         select MIGHT_HAVE_CACHE_L2X0
 980         select USE_OF
 981         help
 982           Support for Xilinx Zynq ARM Cortex A9 Platform
 983 endchoice
 984
 985 #
 986 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 987 # Kconfigs may be included either alphabetically (according to the
 988 # plat- suffix) or along side the corresponding mach-* source.
 989 #
 990 source "arch/arm/mach-at91/Kconfig"
 991
 992 source "arch/arm/mach-bcmring/Kconfig"
 993
 994 source "arch/arm/mach-clps711x/Kconfig"
 995
 996 source "arch/arm/mach-cns3xxx/Kconfig"
 997
 998 source "arch/arm/mach-davinci/Kconfig"
 999
1000 source "arch/arm/mach-dove/Kconfig"
1001
1002 source "arch/arm/mach-ep93xx/Kconfig"
1003
1004 source "arch/arm/mach-footbridge/Kconfig"
1005
1006 source "arch/arm/mach-gemini/Kconfig"
1007
1008 source "arch/arm/mach-h720x/Kconfig"
1009
1010 source "arch/arm/mach-integrator/Kconfig"
1011
1012 source "arch/arm/mach-iop32x/Kconfig"
1013
1014 source "arch/arm/mach-iop33x/Kconfig"
1015
1016 source "arch/arm/mach-iop13xx/Kconfig"
1017
1018 source "arch/arm/mach-ixp4xx/Kconfig"
1019
1020 source "arch/arm/mach-kirkwood/Kconfig"
1021
1022 source "arch/arm/mach-ks8695/Kconfig"
1023
1024 source "arch/arm/mach-lpc32xx/Kconfig"
1025
1026 source "arch/arm/mach-msm/Kconfig"
1027
1028 source "arch/arm/mach-mv78xx0/Kconfig"
1029
1030 source "arch/arm/plat-mxc/Kconfig"
1031
1032 source "arch/arm/mach-mxs/Kconfig"
1033
1034 source "arch/arm/mach-netx/Kconfig"
1035
1036 source "arch/arm/mach-nomadik/Kconfig"
1037 source "arch/arm/plat-nomadik/Kconfig"
1038
1039 source "arch/arm/plat-omap/Kconfig"
1040
1041 source "arch/arm/mach-omap1/Kconfig"
1042
1043 source "arch/arm/mach-omap2/Kconfig"
1044
1045 source "arch/arm/mach-orion5x/Kconfig"
1046
1047 source "arch/arm/mach-pxa/Kconfig"
1048 source "arch/arm/plat-pxa/Kconfig"
1049
1050 source "arch/arm/mach-mmp/Kconfig"
1051
1052 source "arch/arm/mach-realview/Kconfig"
1053
1054 source "arch/arm/mach-sa1100/Kconfig"
1055
1056 source "arch/arm/plat-samsung/Kconfig"
1057 source "arch/arm/plat-s3c24xx/Kconfig"
1058 source "arch/arm/plat-s5p/Kconfig"
1059
1060 source "arch/arm/plat-spear/Kconfig"
1061
1062 source "arch/arm/mach-s3c24xx/Kconfig"
1063 if ARCH_S3C24XX
1064 source "arch/arm/mach-s3c2412/Kconfig"
1065 source "arch/arm/mach-s3c2440/Kconfig"
1066 endif
1067
1068 if ARCH_S3C64XX
1069 source "arch/arm/mach-s3c64xx/Kconfig"
1070 endif
1071
1072 source "arch/arm/mach-s5p64x0/Kconfig"
1073
1074 source "arch/arm/mach-s5pc100/Kconfig"
1075
1076 source "arch/arm/mach-s5pv210/Kconfig"
1077
1078 source "arch/arm/mach-exynos/Kconfig"
1079
1080 source "arch/arm/mach-shmobile/Kconfig"
1081
1082 source "arch/arm/mach-tegra/Kconfig"
1083
1084 source "arch/arm/mach-u300/Kconfig"
1085
1086 source "arch/arm/mach-ux500/Kconfig"
1087
1088 source "arch/arm/mach-versatile/Kconfig"
1089
1090 source "arch/arm/mach-vexpress/Kconfig"
1091 source "arch/arm/plat-versatile/Kconfig"
1092
1093 source "arch/arm/mach-vt8500/Kconfig"
1094
1095 source "arch/arm/mach-w90x900/Kconfig"
1096
1097 # Definitions to make life easier
1098 config ARCH_ACORN
1099         bool
1100
1101 config PLAT_IOP
1102         bool
1103         select GENERIC_CLOCKEVENTS
1104
1105 config PLAT_ORION
1106         bool
1107         select CLKSRC_MMIO
1108         select GENERIC_IRQ_CHIP
1109
1110 config PLAT_PXA
1111         bool
1112
1113 config PLAT_VERSATILE
1114         bool
1115
1116 config ARM_TIMER_SP804
1117         bool
1118         select CLKSRC_MMIO
1119         select HAVE_SCHED_CLOCK
1120
1121 source arch/arm/mm/Kconfig
1122
1123 config ARM_NR_BANKS
1124         int
1125         default 16 if ARCH_EP93XX
1126         default 8
1127
1128 config IWMMXT
1129         bool "Enable iWMMXt support"
1130         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1131         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1132         help
1133           Enable support for iWMMXt context switching at run time if
1134           running on a CPU that supports it.
1135
1136 config XSCALE_PMU
1137         bool
1138         depends on CPU_XSCALE
1139         default y
1140
1141 config CPU_HAS_PMU
1142         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1143                    (!ARCH_OMAP3 || OMAP3_EMU)
1144         default y
1145         bool
1146
1147 config MULTI_IRQ_HANDLER
1148         bool
1149         help
1150           Allow each machine to specify it's own IRQ handler at run time.
1151
1152 if !MMU
1153 source "arch/arm/Kconfig-nommu"
1154 endif
1155
1156 config ARM_ERRATA_326103
1157         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1158         depends on CPU_V6
1159         help
1160           Executing a SWP instruction to read-only memory does not set bit 11
1161           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1162           treat the access as a read, preventing a COW from occurring and
1163           causing the faulting task to livelock.
1164
1165 config ARM_ERRATA_411920
1166         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1167         depends on CPU_V6 || CPU_V6K
1168         help
1169           Invalidation of the Instruction Cache operation can
1170           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1171           It does not affect the MPCore. This option enables the ARM Ltd.
1172           recommended workaround.
1173
1174 config ARM_ERRATA_430973
1175         bool "ARM errata: Stale prediction on replaced interworking branch"
1176         depends on CPU_V7
1177         help
1178           This option enables the workaround for the 430973 Cortex-A8
1179           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1180           interworking branch is replaced with another code sequence at the
1181           same virtual address, whether due to self-modifying code or virtual
1182           to physical address re-mapping, Cortex-A8 does not recover from the
1183           stale interworking branch prediction. This results in Cortex-A8
1184           executing the new code sequence in the incorrect ARM or Thumb state.
1185           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1186           and also flushes the branch target cache at every context switch.
1187           Note that setting specific bits in the ACTLR register may not be
1188           available in non-secure mode.
1189
1190 config ARM_ERRATA_458693
1191         bool "ARM errata: Processor deadlock when a false hazard is created"
1192         depends on CPU_V7
1193         help
1194           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1195           erratum. For very specific sequences of memory operations, it is
1196           possible for a hazard condition intended for a cache line to instead
1197           be incorrectly associated with a different cache line. This false
1198           hazard might then cause a processor deadlock. The workaround enables
1199           the L1 caching of the NEON accesses and disables the PLD instruction
1200           in the ACTLR register. Note that setting specific bits in the ACTLR
1201           register may not be available in non-secure mode.
1202
1203 config ARM_ERRATA_460075
1204         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1205         depends on CPU_V7
1206         help
1207           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1208           erratum. Any asynchronous access to the L2 cache may encounter a
1209           situation in which recent store transactions to the L2 cache are lost
1210           and overwritten with stale memory contents from external memory. The
1211           workaround disables the write-allocate mode for the L2 cache via the
1212           ACTLR register. Note that setting specific bits in the ACTLR register
1213           may not be available in non-secure mode.
1214
1215 config ARM_ERRATA_742230
1216         bool "ARM errata: DMB operation may be faulty"
1217         depends on CPU_V7 && SMP
1218         help
1219           This option enables the workaround for the 742230 Cortex-A9
1220           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1221           between two write operations may not ensure the correct visibility
1222           ordering of the two writes. This workaround sets a specific bit in
1223           the diagnostic register of the Cortex-A9 which causes the DMB
1224           instruction to behave as a DSB, ensuring the correct behaviour of
1225           the two writes.
1226
1227 config ARM_ERRATA_742231
1228         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1229         depends on CPU_V7 && SMP
1230         help
1231           This option enables the workaround for the 742231 Cortex-A9
1232           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1233           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1234           accessing some data located in the same cache line, may get corrupted
1235           data due to bad handling of the address hazard when the line gets
1236           replaced from one of the CPUs at the same time as another CPU is
1237           accessing it. This workaround sets specific bits in the diagnostic
1238           register of the Cortex-A9 which reduces the linefill issuing
1239           capabilities of the processor.
1240
1241 config PL310_ERRATA_588369
1242         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1243         depends on CACHE_L2X0
1244         help
1245            The PL310 L2 cache controller implements three types of Clean &
1246            Invalidate maintenance operations: by Physical Address
1247            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1248            They are architecturally defined to behave as the execution of a
1249            clean operation followed immediately by an invalidate operation,
1250            both performing to the same memory location. This functionality
1251            is not correctly implemented in PL310 as clean lines are not
1252            invalidated as a result of these operations.
1253
1254 config ARM_ERRATA_720789
1255         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1256         depends on CPU_V7
1257         help
1258           This option enables the workaround for the 720789 Cortex-A9 (prior to
1259           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1260           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1261           As a consequence of this erratum, some TLB entries which should be
1262           invalidated are not, resulting in an incoherency in the system page
1263           tables. The workaround changes the TLB flushing routines to invalidate
1264           entries regardless of the ASID.
1265
1266 config PL310_ERRATA_727915
1267         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1268         depends on CACHE_L2X0
1269         help
1270           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1271           operation (offset 0x7FC). This operation runs in background so that
1272           PL310 can handle normal accesses while it is in progress. Under very
1273           rare circumstances, due to this erratum, write data can be lost when
1274           PL310 treats a cacheable write transaction during a Clean &
1275           Invalidate by Way operation.
1276
1277 config ARM_ERRATA_743622
1278         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1279         depends on CPU_V7
1280         help
1281           This option enables the workaround for the 743622 Cortex-A9
1282           (r2p*) erratum. Under very rare conditions, a faulty
1283           optimisation in the Cortex-A9 Store Buffer may lead to data
1284           corruption. This workaround sets a specific bit in the diagnostic
1285           register of the Cortex-A9 which disables the Store Buffer
1286           optimisation, preventing the defect from occurring. This has no
1287           visible impact on the overall performance or power consumption of the
1288           processor.
1289
1290 config ARM_ERRATA_751472
1291         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1292         depends on CPU_V7
1293         help
1294           This option enables the workaround for the 751472 Cortex-A9 (prior
1295           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1296           completion of a following broadcasted operation if the second
1297           operation is received by a CPU before the ICIALLUIS has completed,
1298           potentially leading to corrupted entries in the cache or TLB.
1299
1300 config PL310_ERRATA_753970
1301         bool "PL310 errata: cache sync operation may be faulty"
1302         depends on CACHE_PL310
1303         help
1304           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1305
1306           Under some condition the effect of cache sync operation on
1307           the store buffer still remains when the operation completes.
1308           This means that the store buffer is always asked to drain and
1309           this prevents it from merging any further writes. The workaround
1310           is to replace the normal offset of cache sync operation (0x730)
1311           by another offset targeting an unmapped PL310 register 0x740.
1312           This has the same effect as the cache sync operation: store buffer
1313           drain and waiting for all buffers empty.
1314
1315 config ARM_ERRATA_754322
1316         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1317         depends on CPU_V7
1318         help
1319           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1320           r3p*) erratum. A speculative memory access may cause a page table walk
1321           which starts prior to an ASID switch but completes afterwards. This
1322           can populate the micro-TLB with a stale entry which may be hit with
1323           the new ASID. This workaround places two dsb instructions in the mm
1324           switching code so that no page table walks can cross the ASID switch.
1325
1326 config ARM_ERRATA_754327
1327         bool "ARM errata: no automatic Store Buffer drain"
1328         depends on CPU_V7 && SMP
1329         help
1330           This option enables the workaround for the 754327 Cortex-A9 (prior to
1331           r2p0) erratum. The Store Buffer does not have any automatic draining
1332           mechanism and therefore a livelock may occur if an external agent
1333           continuously polls a memory location waiting to observe an update.
1334           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1335           written polling loops from denying visibility of updates to memory.
1336
1337 config ARM_ERRATA_364296
1338         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1339         depends on CPU_V6 && !SMP
1340         help
1341           This options enables the workaround for the 364296 ARM1136
1342           r0p2 erratum (possible cache data corruption with
1343           hit-under-miss enabled). It sets the undocumented bit 31 in
1344           the auxiliary control register and the FI bit in the control
1345           register, thus disabling hit-under-miss without putting the
1346           processor into full low interrupt latency mode. ARM11MPCore
1347           is not affected.
1348
1349 config ARM_ERRATA_764369
1350         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1351         depends on CPU_V7 && SMP
1352         help
1353           This option enables the workaround for erratum 764369
1354           affecting Cortex-A9 MPCore with two or more processors (all
1355           current revisions). Under certain timing circumstances, a data
1356           cache line maintenance operation by MVA targeting an Inner
1357           Shareable memory region may fail to proceed up to either the
1358           Point of Coherency or to the Point of Unification of the
1359           system. This workaround adds a DSB instruction before the
1360           relevant cache maintenance functions and sets a specific bit
1361           in the diagnostic control register of the SCU.
1362
1363 config PL310_ERRATA_769419
1364         bool "PL310 errata: no automatic Store Buffer drain"
1365         depends on CACHE_L2X0
1366         help
1367           On revisions of the PL310 prior to r3p2, the Store Buffer does
1368           not automatically drain. This can cause normal, non-cacheable
1369           writes to be retained when the memory system is idle, leading
1370           to suboptimal I/O performance for drivers using coherent DMA.
1371           This option adds a write barrier to the cpu_idle loop so that,
1372           on systems with an outer cache, the store buffer is drained
1373           explicitly.
1374
1375 endmenu
1376
1377 source "arch/arm/common/Kconfig"
1378
1379 menu "Bus support"
1380
1381 config ARM_AMBA
1382         bool
1383
1384 config ISA
1385         bool
1386         help
1387           Find out whether you have ISA slots on your motherboard.  ISA is the
1388           name of a bus system, i.e. the way the CPU talks to the other stuff
1389           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1390           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1391           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1392
1393 # Select ISA DMA controller support
1394 config ISA_DMA
1395         bool
1396         select ISA_DMA_API
1397
1398 # Select ISA DMA interface
1399 config ISA_DMA_API
1400         bool
1401
1402 config PCI
1403         bool "PCI support" if MIGHT_HAVE_PCI
1404         help
1405           Find out whether you have a PCI motherboard. PCI is the name of a
1406           bus system, i.e. the way the CPU talks to the other stuff inside
1407           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1408           VESA. If you have PCI, say Y, otherwise N.
1409
1410 config PCI_DOMAINS
1411         bool
1412         depends on PCI
1413
1414 config PCI_NANOENGINE
1415         bool "BSE nanoEngine PCI support"
1416         depends on SA1100_NANOENGINE
1417         help
1418           Enable PCI on the BSE nanoEngine board.
1419
1420 config PCI_SYSCALL
1421         def_bool PCI
1422
1423 # Select the host bridge type
1424 config PCI_HOST_VIA82C505
1425         bool
1426         depends on PCI && ARCH_SHARK
1427         default y
1428
1429 config PCI_HOST_ITE8152
1430         bool
1431         depends on PCI && MACH_ARMCORE
1432         default y
1433         select DMABOUNCE
1434
1435 source "drivers/pci/Kconfig"
1436
1437 source "drivers/pcmcia/Kconfig"
1438
1439 endmenu
1440
1441 menu "Kernel Features"
1442
1443 source "kernel/time/Kconfig"
1444
1445 config HAVE_SMP
1446         bool
1447         help
1448           This option should be selected by machines which have an SMP-
1449           capable CPU.
1450
1451           The only effect of this option is to make the SMP-related
1452           options available to the user for configuration.
1453
1454 config SMP
1455         bool "Symmetric Multi-Processing"
1456         depends on CPU_V6K || CPU_V7
1457         depends on GENERIC_CLOCKEVENTS
1458         depends on HAVE_SMP
1459         depends on MMU
1460         select USE_GENERIC_SMP_HELPERS
1461         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1462         help
1463           This enables support for systems with more than one CPU. If you have
1464           a system with only one CPU, like most personal computers, say N. If
1465           you have a system with more than one CPU, say Y.
1466
1467           If you say N here, the kernel will run on single and multiprocessor
1468           machines, but will use only one CPU of a multiprocessor machine. If
1469           you say Y here, the kernel will run on many, but not all, single
1470           processor machines. On a single processor machine, the kernel will
1471           run faster if you say N here.
1472
1473           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1474           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1475           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1476
1477           If you don't know what to do here, say N.
1478
1479 config SMP_ON_UP
1480         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1481         depends on EXPERIMENTAL
1482         depends on SMP && !XIP_KERNEL
1483         default y
1484         help
1485           SMP kernels contain instructions which fail on non-SMP processors.
1486           Enabling this option allows the kernel to modify itself to make
1487           these instructions safe.  Disabling it allows about 1K of space
1488           savings.
1489
1490           If you don't know what to do here, say Y.
1491
1492 config ARM_CPU_TOPOLOGY
1493         bool "Support cpu topology definition"
1494         depends on SMP && CPU_V7
1495         default y
1496         help
1497           Support ARM cpu topology definition. The MPIDR register defines
1498           affinity between processors which is then used to describe the cpu
1499           topology of an ARM System.
1500
1501 config SCHED_MC
1502         bool "Multi-core scheduler support"
1503         depends on ARM_CPU_TOPOLOGY
1504         help
1505           Multi-core scheduler support improves the CPU scheduler's decision
1506           making when dealing with multi-core CPU chips at a cost of slightly
1507           increased overhead in some places. If unsure say N here.
1508
1509 config SCHED_SMT
1510         bool "SMT scheduler support"
1511         depends on ARM_CPU_TOPOLOGY
1512         help
1513           Improves the CPU scheduler's decision making when dealing with
1514           MultiThreading at a cost of slightly increased overhead in some
1515           places. If unsure say N here.
1516
1517 config HAVE_ARM_SCU
1518         bool
1519         help
1520           This option enables support for the ARM system coherency unit
1521
1522 config ARM_ARCH_TIMER
1523         bool "Architected timer support"
1524         depends on CPU_V7
1525         help
1526           This option enables support for the ARM architected timer
1527
1528 config HAVE_ARM_TWD
1529         bool
1530         depends on SMP
1531         help
1532           This options enables support for the ARM timer and watchdog unit
1533
1534 choice
1535         prompt "Memory split"
1536         default VMSPLIT_3G
1537         help
1538           Select the desired split between kernel and user memory.
1539
1540           If you are not absolutely sure what you are doing, leave this
1541           option alone!
1542
1543         config VMSPLIT_3G
1544                 bool "3G/1G user/kernel split"
1545         config VMSPLIT_2G
1546                 bool "2G/2G user/kernel split"
1547         config VMSPLIT_1G
1548                 bool "1G/3G user/kernel split"
1549 endchoice
1550
1551 config PAGE_OFFSET
1552         hex
1553         default 0x40000000 if VMSPLIT_1G
1554         default 0x80000000 if VMSPLIT_2G
1555         default 0xC0000000
1556
1557 config NR_CPUS
1558         int "Maximum number of CPUs (2-32)"
1559         range 2 32
1560         depends on SMP
1561         default "4"
1562
1563 config HOTPLUG_CPU
1564         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1565         depends on SMP && HOTPLUG && EXPERIMENTAL
1566         help
1567           Say Y here to experiment with turning CPUs off and on.  CPUs
1568           can be controlled through /sys/devices/system/cpu.
1569
1570 config LOCAL_TIMERS
1571         bool "Use local timer interrupts"
1572         depends on SMP
1573         default y
1574         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1575         help
1576           Enable support for local timers on SMP platforms, rather then the
1577           legacy IPI broadcast method.  Local timers allows the system
1578           accounting to be spread across the timer interval, preventing a
1579           "thundering herd" at every timer tick.
1580
1581 config ARCH_NR_GPIO
1582         int
1583         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1584         default 355 if ARCH_U8500
1585         default 264 if MACH_H4700
1586         default 0
1587         help
1588           Maximum number of GPIOs in the system.
1589
1590           If unsure, leave the default value.
1591
1592 source kernel/Kconfig.preempt
1593
1594 config HZ
1595         int
1596         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1597                 ARCH_S5PV210 || ARCH_EXYNOS4
1598         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1599         default AT91_TIMER_HZ if ARCH_AT91
1600         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1601         default 100
1602
1603 config THUMB2_KERNEL
1604         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1605         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1606         select AEABI
1607         select ARM_ASM_UNIFIED
1608         select ARM_UNWIND
1609         help
1610           By enabling this option, the kernel will be compiled in
1611           Thumb-2 mode. A compiler/assembler that understand the unified
1612           ARM-Thumb syntax is needed.
1613
1614           If unsure, say N.
1615
1616 config THUMB2_AVOID_R_ARM_THM_JUMP11
1617         bool "Work around buggy Thumb-2 short branch relocations in gas"
1618         depends on THUMB2_KERNEL && MODULES
1619         default y
1620         help
1621           Various binutils versions can resolve Thumb-2 branches to
1622           locally-defined, preemptible global symbols as short-range "b.n"
1623           branch instructions.
1624
1625           This is a problem, because there's no guarantee the final
1626           destination of the symbol, or any candidate locations for a
1627           trampoline, are within range of the branch.  For this reason, the
1628           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1629           relocation in modules at all, and it makes little sense to add
1630           support.
1631
1632           The symptom is that the kernel fails with an "unsupported
1633           relocation" error when loading some modules.
1634
1635           Until fixed tools are available, passing
1636           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1637           code which hits this problem, at the cost of a bit of extra runtime
1638           stack usage in some cases.
1639
1640           The problem is described in more detail at:
1641               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1642
1643           Only Thumb-2 kernels are affected.
1644
1645           Unless you are sure your tools don't have this problem, say Y.
1646
1647 config ARM_ASM_UNIFIED
1648         bool
1649
1650 config AEABI
1651         bool "Use the ARM EABI to compile the kernel"
1652         help
1653           This option allows for the kernel to be compiled using the latest
1654           ARM ABI (aka EABI).  This is only useful if you are using a user
1655           space environment that is also compiled with EABI.
1656
1657           Since there are major incompatibilities between the legacy ABI and
1658           EABI, especially with regard to structure member alignment, this
1659           option also changes the kernel syscall calling convention to
1660           disambiguate both ABIs and allow for backward compatibility support
1661           (selected with CONFIG_OABI_COMPAT).
1662
1663           To use this you need GCC version 4.0.0 or later.
1664
1665 config OABI_COMPAT
1666         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1667         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1668         default y
1669         help
1670           This option preserves the old syscall interface along with the
1671           new (ARM EABI) one. It also provides a compatibility layer to
1672           intercept syscalls that have structure arguments which layout
1673           in memory differs between the legacy ABI and the new ARM EABI
1674           (only for non "thumb" binaries). This option adds a tiny
1675           overhead to all syscalls and produces a slightly larger kernel.
1676           If you know you'll be using only pure EABI user space then you
1677           can say N here. If this option is not selected and you attempt
1678           to execute a legacy ABI binary then the result will be
1679           UNPREDICTABLE (in fact it can be predicted that it won't work
1680           at all). If in doubt say Y.
1681
1682 config ARCH_HAS_HOLES_MEMORYMODEL
1683         bool
1684
1685 config ARCH_SPARSEMEM_ENABLE
1686         bool
1687
1688 config ARCH_SPARSEMEM_DEFAULT
1689         def_bool ARCH_SPARSEMEM_ENABLE
1690
1691 config ARCH_SELECT_MEMORY_MODEL
1692         def_bool ARCH_SPARSEMEM_ENABLE
1693
1694 config HAVE_ARCH_PFN_VALID
1695         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1696
1697 config HIGHMEM
1698         bool "High Memory Support"
1699         depends on MMU
1700         help
1701           The address space of ARM processors is only 4 Gigabytes large
1702           and it has to accommodate user address space, kernel address
1703           space as well as some memory mapped IO. That means that, if you
1704           have a large amount of physical memory and/or IO, not all of the
1705           memory can be "permanently mapped" by the kernel. The physical
1706           memory that is not permanently mapped is called "high memory".
1707
1708           Depending on the selected kernel/user memory split, minimum
1709           vmalloc space and actual amount of RAM, you may not need this
1710           option which should result in a slightly faster kernel.
1711
1712           If unsure, say n.
1713
1714 config HIGHPTE
1715         bool "Allocate 2nd-level pagetables from highmem"
1716         depends on HIGHMEM
1717
1718 config HW_PERF_EVENTS
1719         bool "Enable hardware performance counter support for perf events"
1720         depends on PERF_EVENTS && CPU_HAS_PMU
1721         default y
1722         help
1723           Enable hardware performance counter support for perf events. If
1724           disabled, perf events will use software events only.
1725
1726 source "mm/Kconfig"
1727
1728 config FORCE_MAX_ZONEORDER
1729         int "Maximum zone order" if ARCH_SHMOBILE
1730         range 11 64 if ARCH_SHMOBILE
1731         default "9" if SA1111
1732         default "11"
1733         help
1734           The kernel memory allocator divides physically contiguous memory
1735           blocks into "zones", where each zone is a power of two number of
1736           pages.  This option selects the largest power of two that the kernel
1737           keeps in the memory allocator.  If you need to allocate very large
1738           blocks of physically contiguous memory, then you may need to
1739           increase this value.
1740
1741           This config option is actually maximum order plus one. For example,
1742           a value of 11 means that the largest free memory block is 2^10 pages.
1743
1744 config LEDS
1745         bool "Timer and CPU usage LEDs"
1746         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1747                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1748                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1749                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1750                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1751                    ARCH_AT91 || ARCH_DAVINCI || \
1752                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1753         help
1754           If you say Y here, the LEDs on your machine will be used
1755           to provide useful information about your current system status.
1756
1757           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1758           be able to select which LEDs are active using the options below. If
1759           you are compiling a kernel for the EBSA-110 or the LART however, the
1760           red LED will simply flash regularly to indicate that the system is
1761           still functional. It is safe to say Y here if you have a CATS
1762           system, but the driver will do nothing.
1763
1764 config LEDS_TIMER
1765         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1766                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1767                             || MACH_OMAP_PERSEUS2
1768         depends on LEDS
1769         depends on !GENERIC_CLOCKEVENTS
1770         default y if ARCH_EBSA110
1771         help
1772           If you say Y here, one of the system LEDs (the green one on the
1773           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1774           will flash regularly to indicate that the system is still
1775           operational. This is mainly useful to kernel hackers who are
1776           debugging unstable kernels.
1777
1778           The LART uses the same LED for both Timer LED and CPU usage LED
1779           functions. You may choose to use both, but the Timer LED function
1780           will overrule the CPU usage LED.
1781
1782 config LEDS_CPU
1783         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1784                         !ARCH_OMAP) \
1785                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1786                         || MACH_OMAP_PERSEUS2
1787         depends on LEDS
1788         help
1789           If you say Y here, the red LED will be used to give a good real
1790           time indication of CPU usage, by lighting whenever the idle task
1791           is not currently executing.
1792
1793           The LART uses the same LED for both Timer LED and CPU usage LED
1794           functions. You may choose to use both, but the Timer LED function
1795           will overrule the CPU usage LED.
1796
1797 config ALIGNMENT_TRAP
1798         bool
1799         depends on CPU_CP15_MMU
1800         default y if !ARCH_EBSA110
1801         select HAVE_PROC_CPU if PROC_FS
1802         help
1803           ARM processors cannot fetch/store information which is not
1804           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1805           address divisible by 4. On 32-bit ARM processors, these non-aligned
1806           fetch/store instructions will be emulated in software if you say
1807           here, which has a severe performance impact. This is necessary for
1808           correct operation of some network protocols. With an IP-only
1809           configuration it is safe to say N, otherwise say Y.
1810
1811 config UACCESS_WITH_MEMCPY
1812         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1813         depends on MMU && EXPERIMENTAL
1814         default y if CPU_FEROCEON
1815         help
1816           Implement faster copy_to_user and clear_user methods for CPU
1817           cores where a 8-word STM instruction give significantly higher
1818           memory write throughput than a sequence of individual 32bit stores.
1819
1820           A possible side effect is a slight increase in scheduling latency
1821           between threads sharing the same address space if they invoke
1822           such copy operations with large buffers.
1823
1824           However, if the CPU data cache is using a write-allocate mode,
1825           this option is unlikely to provide any performance gain.
1826
1827 config SECCOMP
1828         bool
1829         prompt "Enable seccomp to safely compute untrusted bytecode"
1830         ---help---
1831           This kernel feature is useful for number crunching applications
1832           that may need to compute untrusted bytecode during their
1833           execution. By using pipes or other transports made available to
1834           the process as file descriptors supporting the read/write
1835           syscalls, it's possible to isolate those applications in
1836           their own address space using seccomp. Once seccomp is
1837           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1838           and the task is only allowed to execute a few safe syscalls
1839           defined by each seccomp mode.
1840
1841 config CC_STACKPROTECTOR
1842         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1843         depends on EXPERIMENTAL
1844         help
1845           This option turns on the -fstack-protector GCC feature. This
1846           feature puts, at the beginning of functions, a canary value on
1847           the stack just before the return address, and validates
1848           the value just before actually returning.  Stack based buffer
1849           overflows (that need to overwrite this return address) now also
1850           overwrite the canary, which gets detected and the attack is then
1851           neutralized via a kernel panic.
1852           This feature requires gcc version 4.2 or above.
1853
1854 config DEPRECATED_PARAM_STRUCT
1855         bool "Provide old way to pass kernel parameters"
1856         help
1857           This was deprecated in 2001 and announced to live on for 5 years.
1858           Some old boot loaders still use this way.
1859
1860 endmenu
1861
1862 menu "Boot options"
1863
1864 config USE_OF
1865         bool "Flattened Device Tree support"
1866         select OF
1867         select OF_EARLY_FLATTREE
1868         select IRQ_DOMAIN
1869         help
1870           Include support for flattened device tree machine descriptions.
1871
1872 # Compressed boot loader in ROM.  Yes, we really want to ask about
1873 # TEXT and BSS so we preserve their values in the config files.
1874 config ZBOOT_ROM_TEXT
1875         hex "Compressed ROM boot loader base address"
1876         default "0"
1877         help
1878           The physical address at which the ROM-able zImage is to be
1879           placed in the target.  Platforms which normally make use of
1880           ROM-able zImage formats normally set this to a suitable
1881           value in their defconfig file.
1882
1883           If ZBOOT_ROM is not enabled, this has no effect.
1884
1885 config ZBOOT_ROM_BSS
1886         hex "Compressed ROM boot loader BSS address"
1887         default "0"
1888         help
1889           The base address of an area of read/write memory in the target
1890           for the ROM-able zImage which must be available while the
1891           decompressor is running. It must be large enough to hold the
1892           entire decompressed kernel plus an additional 128 KiB.
1893           Platforms which normally make use of ROM-able zImage formats
1894           normally set this to a suitable value in their defconfig file.
1895
1896           If ZBOOT_ROM is not enabled, this has no effect.
1897
1898 config ZBOOT_ROM
1899         bool "Compressed boot loader in ROM/flash"
1900         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1901         help
1902           Say Y here if you intend to execute your compressed kernel image
1903           (zImage) directly from ROM or flash.  If unsure, say N.
1904
1905 choice
1906         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1907         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1908         default ZBOOT_ROM_NONE
1909         help
1910           Include experimental SD/MMC loading code in the ROM-able zImage.
1911           With this enabled it is possible to write the the ROM-able zImage
1912           kernel image to an MMC or SD card and boot the kernel straight
1913           from the reset vector. At reset the processor Mask ROM will load
1914           the first part of the the ROM-able zImage which in turn loads the
1915           rest the kernel image to RAM.
1916
1917 config ZBOOT_ROM_NONE
1918         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1919         help
1920           Do not load image from SD or MMC
1921
1922 config ZBOOT_ROM_MMCIF
1923         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1924         help
1925           Load image from MMCIF hardware block.
1926
1927 config ZBOOT_ROM_SH_MOBILE_SDHI
1928         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1929         help
1930           Load image from SDHI hardware block
1931
1932 endchoice
1933
1934 config ARM_APPENDED_DTB
1935         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1936         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1937         help
1938           With this option, the boot code will look for a device tree binary
1939           (DTB) appended to zImage
1940           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1941
1942           This is meant as a backward compatibility convenience for those
1943           systems with a bootloader that can't be upgraded to accommodate
1944           the documented boot protocol using a device tree.
1945
1946           Beware that there is very little in terms of protection against
1947           this option being confused by leftover garbage in memory that might
1948           look like a DTB header after a reboot if no actual DTB is appended
1949           to zImage.  Do not leave this option active in a production kernel
1950           if you don't intend to always append a DTB.  Proper passing of the
1951           location into r2 of a bootloader provided DTB is always preferable
1952           to this option.
1953
1954 config ARM_ATAG_DTB_COMPAT
1955         bool "Supplement the appended DTB with traditional ATAG information"
1956         depends on ARM_APPENDED_DTB
1957         help
1958           Some old bootloaders can't be updated to a DTB capable one, yet
1959           they provide ATAGs with memory configuration, the ramdisk address,
1960           the kernel cmdline string, etc.  Such information is dynamically
1961           provided by the bootloader and can't always be stored in a static
1962           DTB.  To allow a device tree enabled kernel to be used with such
1963           bootloaders, this option allows zImage to extract the information
1964           from the ATAG list and store it at run time into the appended DTB.
1965
1966 config CMDLINE
1967         string "Default kernel command string"
1968         default ""
1969         help
1970           On some architectures (EBSA110 and CATS), there is currently no way
1971           for the boot loader to pass arguments to the kernel. For these
1972           architectures, you should supply some command-line options at build
1973           time by entering them here. As a minimum, you should specify the
1974           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1975
1976 choice
1977         prompt "Kernel command line type" if CMDLINE != ""
1978         default CMDLINE_FROM_BOOTLOADER
1979
1980 config CMDLINE_FROM_BOOTLOADER
1981         bool "Use bootloader kernel arguments if available"
1982         help
1983           Uses the command-line options passed by the boot loader. If
1984           the boot loader doesn't provide any, the default kernel command
1985           string provided in CMDLINE will be used.
1986
1987 config CMDLINE_EXTEND
1988         bool "Extend bootloader kernel arguments"
1989         help
1990           The command-line arguments provided by the boot loader will be
1991           appended to the default kernel command string.
1992
1993 config CMDLINE_FORCE
1994         bool "Always use the default kernel command string"
1995         help
1996           Always use the default kernel command string, even if the boot
1997           loader passes other arguments to the kernel.
1998           This is useful if you cannot or don't want to change the
1999           command-line options your boot loader passes to the kernel.
2000 endchoice
2001
2002 config XIP_KERNEL
2003         bool "Kernel Execute-In-Place from ROM"
2004         depends on !ZBOOT_ROM && !ARM_LPAE
2005         help
2006           Execute-In-Place allows the kernel to run from non-volatile storage
2007           directly addressable by the CPU, such as NOR flash. This saves RAM
2008           space since the text section of the kernel is not loaded from flash
2009           to RAM.  Read-write sections, such as the data section and stack,
2010           are still copied to RAM.  The XIP kernel is not compressed since
2011           it has to run directly from flash, so it will take more space to
2012           store it.  The flash address used to link the kernel object files,
2013           and for storing it, is configuration dependent. Therefore, if you
2014           say Y here, you must know the proper physical address where to
2015           store the kernel image depending on your own flash memory usage.
2016
2017           Also note that the make target becomes "make xipImage" rather than
2018           "make zImage" or "make Image".  The final kernel binary to put in
2019           ROM memory will be arch/arm/boot/xipImage.
2020
2021           If unsure, say N.
2022
2023 config XIP_PHYS_ADDR
2024         hex "XIP Kernel Physical Location"
2025         depends on XIP_KERNEL
2026         default "0x00080000"
2027         help
2028           This is the physical address in your flash memory the kernel will
2029           be linked for and stored to.  This address is dependent on your
2030           own flash usage.
2031
2032 config KEXEC
2033         bool "Kexec system call (EXPERIMENTAL)"
2034         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2035         help
2036           kexec is a system call that implements the ability to shutdown your
2037           current kernel, and to start another kernel.  It is like a reboot
2038           but it is independent of the system firmware.   And like a reboot
2039           you can start any kernel with it, not just Linux.
2040
2041           It is an ongoing process to be certain the hardware in a machine
2042           is properly shutdown, so do not be surprised if this code does not
2043           initially work for you.  It may help to enable device hotplugging
2044           support.
2045
2046 config ATAGS_PROC
2047         bool "Export atags in procfs"
2048         depends on KEXEC
2049         default y
2050         help
2051           Should the atags used to boot the kernel be exported in an "atags"
2052           file in procfs. Useful with kexec.
2053
2054 config CRASH_DUMP
2055         bool "Build kdump crash kernel (EXPERIMENTAL)"
2056         depends on EXPERIMENTAL
2057         help
2058           Generate crash dump after being started by kexec. This should
2059           be normally only set in special crash dump kernels which are
2060           loaded in the main kernel with kexec-tools into a specially
2061           reserved region and then later executed after a crash by
2062           kdump/kexec. The crash dump kernel must be compiled to a
2063           memory address not used by the main kernel
2064
2065           For more details see Documentation/kdump/kdump.txt
2066
2067 config AUTO_ZRELADDR
2068         bool "Auto calculation of the decompressed kernel image address"
2069         depends on !ZBOOT_ROM && !ARCH_U300
2070         help
2071           ZRELADDR is the physical address where the decompressed kernel
2072           image will be placed. If AUTO_ZRELADDR is selected, the address
2073           will be determined at run-time by masking the current IP with
2074           0xf8000000. This assumes the zImage being placed in the first 128MB
2075           from start of memory.
2076
2077 endmenu
2078
2079 menu "CPU Power Management"
2080
2081 if ARCH_HAS_CPUFREQ
2082
2083 source "drivers/cpufreq/Kconfig"
2084
2085 config CPU_FREQ_IMX
2086         tristate "CPUfreq driver for i.MX CPUs"
2087         depends on ARCH_MXC && CPU_FREQ
2088         help
2089           This enables the CPUfreq driver for i.MX CPUs.
2090
2091 config CPU_FREQ_SA1100
2092         bool
2093
2094 config CPU_FREQ_SA1110
2095         bool
2096
2097 config CPU_FREQ_INTEGRATOR
2098         tristate "CPUfreq driver for ARM Integrator CPUs"
2099         depends on ARCH_INTEGRATOR && CPU_FREQ
2100         default y
2101         help
2102           This enables the CPUfreq driver for ARM Integrator CPUs.
2103
2104           For details, take a look at <file:Documentation/cpu-freq>.
2105
2106           If in doubt, say Y.
2107
2108 config CPU_FREQ_PXA
2109         bool
2110         depends on CPU_FREQ && ARCH_PXA && PXA25x
2111         default y
2112         select CPU_FREQ_TABLE
2113         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2114
2115 config CPU_FREQ_S3C
2116         bool
2117         help
2118           Internal configuration node for common cpufreq on Samsung SoC
2119
2120 config CPU_FREQ_S3C24XX
2121         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2122         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2123         select CPU_FREQ_S3C
2124         help
2125           This enables the CPUfreq driver for the Samsung S3C24XX family
2126           of CPUs.
2127
2128           For details, take a look at <file:Documentation/cpu-freq>.
2129
2130           If in doubt, say N.
2131
2132 config CPU_FREQ_S3C24XX_PLL
2133         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2134         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2135         help
2136           Compile in support for changing the PLL frequency from the
2137           S3C24XX series CPUfreq driver. The PLL takes time to settle
2138           after a frequency change, so by default it is not enabled.
2139
2140           This also means that the PLL tables for the selected CPU(s) will
2141           be built which may increase the size of the kernel image.
2142
2143 config CPU_FREQ_S3C24XX_DEBUG
2144         bool "Debug CPUfreq Samsung driver core"
2145         depends on CPU_FREQ_S3C24XX
2146         help
2147           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2148
2149 config CPU_FREQ_S3C24XX_IODEBUG
2150         bool "Debug CPUfreq Samsung driver IO timing"
2151         depends on CPU_FREQ_S3C24XX
2152         help
2153           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2154
2155 config CPU_FREQ_S3C24XX_DEBUGFS
2156         bool "Export debugfs for CPUFreq"
2157         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2158         help
2159           Export status information via debugfs.
2160
2161 endif
2162
2163 source "drivers/cpuidle/Kconfig"
2164
2165 endmenu
2166
2167 menu "Floating point emulation"
2168
2169 comment "At least one emulation must be selected"
2170
2171 config FPE_NWFPE
2172         bool "NWFPE math emulation"
2173         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2174         ---help---
2175           Say Y to include the NWFPE floating point emulator in the kernel.
2176           This is necessary to run most binaries. Linux does not currently
2177           support floating point hardware so you need to say Y here even if
2178           your machine has an FPA or floating point co-processor podule.
2179
2180           You may say N here if you are going to load the Acorn FPEmulator
2181           early in the bootup.
2182
2183 config FPE_NWFPE_XP
2184         bool "Support extended precision"
2185         depends on FPE_NWFPE
2186         help
2187           Say Y to include 80-bit support in the kernel floating-point
2188           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2189           Note that gcc does not generate 80-bit operations by default,
2190           so in most cases this option only enlarges the size of the
2191           floating point emulator without any good reason.
2192
2193           You almost surely want to say N here.
2194
2195 config FPE_FASTFPE
2196         bool "FastFPE math emulation (EXPERIMENTAL)"
2197         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2198         ---help---
2199           Say Y here to include the FAST floating point emulator in the kernel.
2200           This is an experimental much faster emulator which now also has full
2201           precision for the mantissa.  It does not support any exceptions.
2202           It is very simple, and approximately 3-6 times faster than NWFPE.
2203
2204           It should be sufficient for most programs.  It may be not suitable
2205           for scientific calculations, but you have to check this for yourself.
2206           If you do not feel you need a faster FP emulation you should better
2207           choose NWFPE.
2208
2209 config VFP
2210         bool "VFP-format floating point maths"
2211         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2212         help
2213           Say Y to include VFP support code in the kernel. This is needed
2214           if your hardware includes a VFP unit.
2215
2216           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2217           release notes and additional status information.
2218
2219           Say N if your target does not have VFP hardware.
2220
2221 config VFPv3
2222         bool
2223         depends on VFP
2224         default y if CPU_V7
2225
2226 config NEON
2227         bool "Advanced SIMD (NEON) Extension support"
2228         depends on VFPv3 && CPU_V7
2229         help
2230           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2231           Extension.
2232
2233 endmenu
2234
2235 menu "Userspace binary formats"
2236
2237 source "fs/Kconfig.binfmt"
2238
2239 config ARTHUR
2240         tristate "RISC OS personality"
2241         depends on !AEABI
2242         help
2243           Say Y here to include the kernel code necessary if you want to run
2244           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2245           experimental; if this sounds frightening, say N and sleep in peace.
2246           You can also say M here to compile this support as a module (which
2247           will be called arthur).
2248
2249 endmenu
2250
2251 menu "Power management options"
2252
2253 source "kernel/power/Kconfig"
2254
2255 config ARCH_SUSPEND_POSSIBLE
2256         depends on !ARCH_S5PC100
2257         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2258                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2259         def_bool y
2260
2261 config ARM_CPU_SUSPEND
2262         def_bool PM_SLEEP
2263
2264 endmenu
2265
2266 source "net/Kconfig"
2267
2268 source "drivers/Kconfig"
2269
2270 source "fs/Kconfig"
2271
2272 source "arch/arm/Kconfig.debug"
2273
2274 source "security/Kconfig"
2275
2276 source "crypto/Kconfig"
2277
2278 source "lib/Kconfig"