arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE if PCI || ISA || PCMCIA
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  13         select HAVE_ARCH_KGDB
  14         select HAVE_ARCH_TRACEHOOK
  15         select HAVE_KPROBES if !XIP_KERNEL
  16         select HAVE_KRETPROBES if (HAVE_KPROBES)
  17         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  18         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  19         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  20         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  21         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  22         select HAVE_GENERIC_DMA_COHERENT
  23         select HAVE_KERNEL_GZIP
  24         select HAVE_KERNEL_LZO
  25         select HAVE_KERNEL_LZMA
  26         select HAVE_KERNEL_XZ
  27         select HAVE_IRQ_WORK
  28         select HAVE_PERF_EVENTS
  29         select PERF_USE_VMALLOC
  30         select HAVE_REGS_AND_STACK_ACCESS_API
  31         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  32         select HAVE_C_RECORDMCOUNT
  33         select HAVE_GENERIC_HARDIRQS
  34         select HARDIRQS_SW_RESEND
  35         select GENERIC_IRQ_PROBE
  36         select GENERIC_IRQ_SHOW
  37         select GENERIC_IRQ_PROBE
  38         select HARDIRQS_SW_RESEND
  39         select CPU_PM if (SUSPEND || CPU_IDLE)
  40         select GENERIC_PCI_IOMAP
  41         select HAVE_BPF_JIT
  42         select GENERIC_SMP_IDLE_THREAD
  43         help
  44           The ARM series is a line of low-power-consumption RISC chip designs
  45           licensed by ARM Ltd and targeted at embedded applications and
  46           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  47           manufactured, but legacy ARM-based PC hardware remains popular in
  48           Europe.  There is an ARM Linux project with a web page at
  49           <http://www.arm.linux.org.uk/>.
  50
  51 config ARM_HAS_SG_CHAIN
  52         bool
  53
  54 config HAVE_PWM
  55         bool
  56
  57 config MIGHT_HAVE_PCI
  58         bool
  59
  60 config SYS_SUPPORTS_APM_EMULATION
  61         bool
  62
  63 config GENERIC_GPIO
  64         bool
  65
  66 config ARCH_USES_GETTIMEOFFSET
  67         bool
  68         default n
  69
  70 config GENERIC_CLOCKEVENTS
  71         bool
  72
  73 config GENERIC_CLOCKEVENTS_BROADCAST
  74         bool
  75         depends on GENERIC_CLOCKEVENTS
  76         default y if SMP
  77
  78 config KTIME_SCALAR
  79         bool
  80         default y
  81
  82 config HAVE_TCM
  83         bool
  84         select GENERIC_ALLOCATOR
  85
  86 config HAVE_PROC_CPU
  87         bool
  88
  89 config NO_IOPORT
  90         bool
  91
  92 config EISA
  93         bool
  94         ---help---
  95           The Extended Industry Standard Architecture (EISA) bus was
  96           developed as an open alternative to the IBM MicroChannel bus.
  97
  98           The EISA bus provided some of the features of the IBM MicroChannel
  99           bus while maintaining backward compatibility with cards made for
 100           the older ISA bus.  The EISA bus saw limited use between 1988 and
 101           1995 when it was made obsolete by the PCI bus.
 102
 103           Say Y here if you are building a kernel for an EISA-based machine.
 104
 105           Otherwise, say N.
 106
 107 config SBUS
 108         bool
 109
 110 config MCA
 111         bool
 112         help
 113           MicroChannel Architecture is found in some IBM PS/2 machines and
 114           laptops.  It is a bus system similar to PCI or ISA. See
 115           <file:Documentation/mca.txt> (and especially the web page given
 116           there) before attempting to build an MCA bus kernel.
 117
 118 config STACKTRACE_SUPPORT
 119         bool
 120         default y
 121
 122 config HAVE_LATENCYTOP_SUPPORT
 123         bool
 124         depends on !SMP
 125         default y
 126
 127 config LOCKDEP_SUPPORT
 128         bool
 129         default y
 130
 131 config TRACE_IRQFLAGS_SUPPORT
 132         bool
 133         default y
 134
 135 config GENERIC_LOCKBREAK
 136         bool
 137         default y
 138         depends on SMP && PREEMPT
 139
 140 config RWSEM_GENERIC_SPINLOCK
 141         bool
 142         default y
 143
 144 config RWSEM_XCHGADD_ALGORITHM
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U32
 148         bool
 149
 150 config ARCH_HAS_ILOG2_U64
 151         bool
 152
 153 config ARCH_HAS_CPUFREQ
 154         bool
 155         help
 156           Internal node to signify that the ARCH has CPUFREQ support
 157           and that the relevant menu configurations are displayed for
 158           it.
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config ARCH_HAS_DMA_SET_COHERENT_MASK
 178         bool
 179
 180 config GENERIC_ISA_DMA
 181         bool
 182
 183 config FIQ
 184         bool
 185
 186 config NEED_RET_TO_USER
 187         bool
 188
 189 config ARCH_MTD_XIP
 190         bool
 191
 192 config VECTORS_BASE
 193         hex
 194         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 195         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 196         default 0x00000000
 197         help
 198           The base address of exception vectors.
 199
 200 config ARM_PATCH_PHYS_VIRT
 201         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 202         default y
 203         depends on !XIP_KERNEL && MMU
 204         depends on !ARCH_REALVIEW || !SPARSEMEM
 205         help
 206           Patch phys-to-virt and virt-to-phys translation functions at
 207           boot and module load time according to the position of the
 208           kernel in system memory.
 209
 210           This can only be used with non-XIP MMU kernels where the base
 211           of physical memory is at a 16MB boundary.
 212
 213           Only disable this option if you know that you do not require
 214           this feature (eg, building a kernel for a single machine) and
 215           you need to shrink the kernel to the minimal size.
 216
 217 config NEED_MACH_IO_H
 218         bool
 219         help
 220           Select this when mach/io.h is required to provide special
 221           definitions for this platform.  The need for mach/io.h should
 222           be avoided when possible.
 223
 224 config NEED_MACH_MEMORY_H
 225         bool
 226         help
 227           Select this when mach/memory.h is required to provide special
 228           definitions for this platform.  The need for mach/memory.h should
 229           be avoided when possible.
 230
 231 config PHYS_OFFSET
 232         hex "Physical address of main memory" if MMU
 233         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 234         default DRAM_BASE if !MMU
 235         help
 236           Please provide the physical address corresponding to the
 237           location of main memory in your system.
 238
 239 config GENERIC_BUG
 240         def_bool y
 241         depends on BUG
 242
 243 source "init/Kconfig"
 244
 245 source "kernel/Kconfig.freezer"
 246
 247 menu "System Type"
 248
 249 config MMU
 250         bool "MMU-based Paged Memory Management Support"
 251         default y
 252         help
 253           Select if you want MMU-based virtualised addressing space
 254           support by paged memory management. If unsure, say 'Y'.
 255
 256 #
 257 # The "ARM system type" choice list is ordered alphabetically by option
 258 # text.  Please add new entries in the option alphabetic order.
 259 #
 260 choice
 261         prompt "ARM system type"
 262         default ARCH_VERSATILE
 263
 264 config ARCH_INTEGRATOR
 265         bool "ARM Ltd. Integrator family"
 266         select ARM_AMBA
 267         select ARCH_HAS_CPUFREQ
 268         select CLKDEV_LOOKUP
 269         select HAVE_MACH_CLKDEV
 270         select HAVE_TCM
 271         select ICST
 272         select GENERIC_CLOCKEVENTS
 273         select PLAT_VERSATILE
 274         select PLAT_VERSATILE_FPGA_IRQ
 275         select NEED_MACH_IO_H
 276         select NEED_MACH_MEMORY_H
 277         select SPARSE_IRQ
 278         select MULTI_IRQ_HANDLER
 279         help
 280           Support for ARM's Integrator platform.
 281
 282 config ARCH_REALVIEW
 283         bool "ARM Ltd. RealView family"
 284         select ARM_AMBA
 285         select CLKDEV_LOOKUP
 286         select HAVE_MACH_CLKDEV
 287         select ICST
 288         select GENERIC_CLOCKEVENTS
 289         select ARCH_WANT_OPTIONAL_GPIOLIB
 290         select PLAT_VERSATILE
 291         select PLAT_VERSATILE_CLCD
 292         select ARM_TIMER_SP804
 293         select GPIO_PL061 if GPIOLIB
 294         select NEED_MACH_MEMORY_H
 295         help
 296           This enables support for ARM Ltd RealView boards.
 297
 298 config ARCH_VERSATILE
 299         bool "ARM Ltd. Versatile family"
 300         select ARM_AMBA
 301         select ARM_VIC
 302         select CLKDEV_LOOKUP
 303         select HAVE_MACH_CLKDEV
 304         select ICST
 305         select GENERIC_CLOCKEVENTS
 306         select ARCH_WANT_OPTIONAL_GPIOLIB
 307         select PLAT_VERSATILE
 308         select PLAT_VERSATILE_CLCD
 309         select PLAT_VERSATILE_FPGA_IRQ
 310         select ARM_TIMER_SP804
 311         help
 312           This enables support for ARM Ltd Versatile board.
 313
 314 config ARCH_VEXPRESS
 315         bool "ARM Ltd. Versatile Express family"
 316         select ARCH_WANT_OPTIONAL_GPIOLIB
 317         select ARM_AMBA
 318         select ARM_TIMER_SP804
 319         select CLKDEV_LOOKUP
 320         select HAVE_MACH_CLKDEV
 321         select GENERIC_CLOCKEVENTS
 322         select HAVE_CLK
 323         select HAVE_PATA_PLATFORM
 324         select ICST
 325         select NO_IOPORT
 326         select PLAT_VERSATILE
 327         select PLAT_VERSATILE_CLCD
 328         help
 329           This enables support for the ARM Ltd Versatile Express boards.
 330
 331 config ARCH_AT91
 332         bool "Atmel AT91"
 333         select ARCH_REQUIRE_GPIOLIB
 334         select HAVE_CLK
 335         select CLKDEV_LOOKUP
 336         select IRQ_DOMAIN
 337         select NEED_MACH_IO_H if PCCARD
 338         help
 339           This enables support for systems based on Atmel
 340           AT91RM9200 and AT91SAM9* processors.
 341
 342 config ARCH_BCMRING
 343         bool "Broadcom BCMRING"
 344         depends on MMU
 345         select CPU_V6
 346         select ARM_AMBA
 347         select ARM_TIMER_SP804
 348         select CLKDEV_LOOKUP
 349         select GENERIC_CLOCKEVENTS
 350         select ARCH_WANT_OPTIONAL_GPIOLIB
 351         help
 352           Support for Broadcom's BCMRing platform.
 353
 354 config ARCH_HIGHBANK
 355         bool "Calxeda Highbank-based"
 356         select ARCH_WANT_OPTIONAL_GPIOLIB
 357         select ARM_AMBA
 358         select ARM_GIC
 359         select ARM_TIMER_SP804
 360         select CACHE_L2X0
 361         select CLKDEV_LOOKUP
 362         select CPU_V7
 363         select GENERIC_CLOCKEVENTS
 364         select HAVE_ARM_SCU
 365         select HAVE_SMP
 366         select SPARSE_IRQ
 367         select USE_OF
 368         help
 369           Support for the Calxeda Highbank SoC based boards.
 370
 371 config ARCH_CLPS711X
 372         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 373         select CPU_ARM720T
 374         select ARCH_USES_GETTIMEOFFSET
 375         select NEED_MACH_MEMORY_H
 376         help
 377           Support for Cirrus Logic 711x/721x/731x based boards.
 378
 379 config ARCH_CNS3XXX
 380         bool "Cavium Networks CNS3XXX family"
 381         select CPU_V6K
 382         select GENERIC_CLOCKEVENTS
 383         select ARM_GIC
 384         select MIGHT_HAVE_CACHE_L2X0
 385         select MIGHT_HAVE_PCI
 386         select PCI_DOMAINS if PCI
 387         help
 388           Support for Cavium Networks CNS3XXX platform.
 389
 390 config ARCH_GEMINI
 391         bool "Cortina Systems Gemini"
 392         select CPU_FA526
 393         select ARCH_REQUIRE_GPIOLIB
 394         select ARCH_USES_GETTIMEOFFSET
 395         help
 396           Support for the Cortina Systems Gemini family SoCs
 397
 398 config ARCH_PRIMA2
 399         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 400         select CPU_V7
 401         select NO_IOPORT
 402         select GENERIC_CLOCKEVENTS
 403         select CLKDEV_LOOKUP
 404         select GENERIC_IRQ_CHIP
 405         select MIGHT_HAVE_CACHE_L2X0
 406         select USE_OF
 407         select ZONE_DMA
 408         help
 409           Support for CSR SiRFSoC ARM Cortex A9 Platform
 410
 411 config ARCH_EBSA110
 412         bool "EBSA-110"
 413         select CPU_SA110
 414         select ISA
 415         select NO_IOPORT
 416         select ARCH_USES_GETTIMEOFFSET
 417         select NEED_MACH_IO_H
 418         select NEED_MACH_MEMORY_H
 419         help
 420           This is an evaluation board for the StrongARM processor available
 421           from Digital. It has limited hardware on-board, including an
 422           Ethernet interface, two PCMCIA sockets, two serial ports and a
 423           parallel port.
 424
 425 config ARCH_EP93XX
 426         bool "EP93xx-based"
 427         select CPU_ARM920T
 428         select ARM_AMBA
 429         select ARM_VIC
 430         select CLKDEV_LOOKUP
 431         select ARCH_REQUIRE_GPIOLIB
 432         select ARCH_HAS_HOLES_MEMORYMODEL
 433         select ARCH_USES_GETTIMEOFFSET
 434         select NEED_MACH_MEMORY_H
 435         help
 436           This enables support for the Cirrus EP93xx series of CPUs.
 437
 438 config ARCH_FOOTBRIDGE
 439         bool "FootBridge"
 440         select CPU_SA110
 441         select FOOTBRIDGE
 442         select GENERIC_CLOCKEVENTS
 443         select HAVE_IDE
 444         select NEED_MACH_IO_H
 445         select NEED_MACH_MEMORY_H
 446         help
 447           Support for systems based on the DC21285 companion chip
 448           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 449
 450 config ARCH_MXC
 451         bool "Freescale MXC/iMX-based"
 452         select GENERIC_CLOCKEVENTS
 453         select ARCH_REQUIRE_GPIOLIB
 454         select CLKDEV_LOOKUP
 455         select CLKSRC_MMIO
 456         select GENERIC_IRQ_CHIP
 457         select MULTI_IRQ_HANDLER
 458         help
 459           Support for Freescale MXC/iMX-based family of processors
 460
 461 config ARCH_MXS
 462         bool "Freescale MXS-based"
 463         select GENERIC_CLOCKEVENTS
 464         select ARCH_REQUIRE_GPIOLIB
 465         select CLKDEV_LOOKUP
 466         select CLKSRC_MMIO
 467         select HAVE_CLK_PREPARE
 468         help
 469           Support for Freescale MXS-based family of processors
 470
 471 config ARCH_NETX
 472         bool "Hilscher NetX based"
 473         select CLKSRC_MMIO
 474         select CPU_ARM926T
 475         select ARM_VIC
 476         select GENERIC_CLOCKEVENTS
 477         help
 478           This enables support for systems based on the Hilscher NetX Soc
 479
 480 config ARCH_H720X
 481         bool "Hynix HMS720x-based"
 482         select CPU_ARM720T
 483         select ISA_DMA_API
 484         select ARCH_USES_GETTIMEOFFSET
 485         help
 486           This enables support for systems based on the Hynix HMS720x
 487
 488 config ARCH_IOP13XX
 489         bool "IOP13xx-based"
 490         depends on MMU
 491         select CPU_XSC3
 492         select PLAT_IOP
 493         select PCI
 494         select ARCH_SUPPORTS_MSI
 495         select VMSPLIT_1G
 496         select NEED_MACH_IO_H
 497         select NEED_MACH_MEMORY_H
 498         select NEED_RET_TO_USER
 499         help
 500           Support for Intel's IOP13XX (XScale) family of processors.
 501
 502 config ARCH_IOP32X
 503         bool "IOP32x-based"
 504         depends on MMU
 505         select CPU_XSCALE
 506         select NEED_MACH_IO_H
 507         select NEED_RET_TO_USER
 508         select PLAT_IOP
 509         select PCI
 510         select ARCH_REQUIRE_GPIOLIB
 511         help
 512           Support for Intel's 80219 and IOP32X (XScale) family of
 513           processors.
 514
 515 config ARCH_IOP33X
 516         bool "IOP33x-based"
 517         depends on MMU
 518         select CPU_XSCALE
 519         select NEED_MACH_IO_H
 520         select NEED_RET_TO_USER
 521         select PLAT_IOP
 522         select PCI
 523         select ARCH_REQUIRE_GPIOLIB
 524         help
 525           Support for Intel's IOP33X (XScale) family of processors.
 526
 527 config ARCH_IXP4XX
 528         bool "IXP4xx-based"
 529         depends on MMU
 530         select ARCH_HAS_DMA_SET_COHERENT_MASK
 531         select CLKSRC_MMIO
 532         select CPU_XSCALE
 533         select GENERIC_GPIO
 534         select GENERIC_CLOCKEVENTS
 535         select MIGHT_HAVE_PCI
 536         select NEED_MACH_IO_H
 537         select DMABOUNCE if PCI
 538         help
 539           Support for Intel's IXP4XX (XScale) family of processors.
 540
 541 config ARCH_DOVE
 542         bool "Marvell Dove"
 543         select CPU_V7
 544         select PCI
 545         select ARCH_REQUIRE_GPIOLIB
 546         select GENERIC_CLOCKEVENTS
 547         select NEED_MACH_IO_H
 548         select PLAT_ORION
 549         help
 550           Support for the Marvell Dove SoC 88AP510
 551
 552 config ARCH_KIRKWOOD
 553         bool "Marvell Kirkwood"
 554         select CPU_FEROCEON
 555         select PCI
 556         select ARCH_REQUIRE_GPIOLIB
 557         select GENERIC_CLOCKEVENTS
 558         select NEED_MACH_IO_H
 559         select PLAT_ORION
 560         help
 561           Support for the following Marvell Kirkwood series SoCs:
 562           88F6180, 88F6192 and 88F6281.
 563
 564 config ARCH_LPC32XX
 565         bool "NXP LPC32XX"
 566         select CLKSRC_MMIO
 567         select CPU_ARM926T
 568         select ARCH_REQUIRE_GPIOLIB
 569         select HAVE_IDE
 570         select ARM_AMBA
 571         select USB_ARCH_HAS_OHCI
 572         select CLKDEV_LOOKUP
 573         select GENERIC_CLOCKEVENTS
 574         select USE_OF
 575         help
 576           Support for the NXP LPC32XX family of processors
 577
 578 config ARCH_MV78XX0
 579         bool "Marvell MV78xx0"
 580         select CPU_FEROCEON
 581         select PCI
 582         select ARCH_REQUIRE_GPIOLIB
 583         select GENERIC_CLOCKEVENTS
 584         select NEED_MACH_IO_H
 585         select PLAT_ORION
 586         help
 587           Support for the following Marvell MV78xx0 series SoCs:
 588           MV781x0, MV782x0.
 589
 590 config ARCH_ORION5X
 591         bool "Marvell Orion"
 592         depends on MMU
 593         select CPU_FEROCEON
 594         select PCI
 595         select ARCH_REQUIRE_GPIOLIB
 596         select GENERIC_CLOCKEVENTS
 597         select PLAT_ORION
 598         help
 599           Support for the following Marvell Orion 5x series SoCs:
 600           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 601           Orion-2 (5281), Orion-1-90 (6183).
 602
 603 config ARCH_MMP
 604         bool "Marvell PXA168/910/MMP2"
 605         depends on MMU
 606         select ARCH_REQUIRE_GPIOLIB
 607         select CLKDEV_LOOKUP
 608         select GENERIC_CLOCKEVENTS
 609         select GPIO_PXA
 610         select IRQ_DOMAIN
 611         select PLAT_PXA
 612         select SPARSE_IRQ
 613         select GENERIC_ALLOCATOR
 614         help
 615           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 616
 617 config ARCH_KS8695
 618         bool "Micrel/Kendin KS8695"
 619         select CPU_ARM922T
 620         select ARCH_REQUIRE_GPIOLIB
 621         select ARCH_USES_GETTIMEOFFSET
 622         select NEED_MACH_MEMORY_H
 623         help
 624           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 625           System-on-Chip devices.
 626
 627 config ARCH_W90X900
 628         bool "Nuvoton W90X900 CPU"
 629         select CPU_ARM926T
 630         select ARCH_REQUIRE_GPIOLIB
 631         select CLKDEV_LOOKUP
 632         select CLKSRC_MMIO
 633         select GENERIC_CLOCKEVENTS
 634         help
 635           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 636           At present, the w90x900 has been renamed nuc900, regarding
 637           the ARM series product line, you can login the following
 638           link address to know more.
 639
 640           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 641                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 642
 643 config ARCH_TEGRA
 644         bool "NVIDIA Tegra"
 645         select CLKDEV_LOOKUP
 646         select CLKSRC_MMIO
 647         select GENERIC_CLOCKEVENTS
 648         select GENERIC_GPIO
 649         select HAVE_CLK
 650         select HAVE_SMP
 651         select MIGHT_HAVE_CACHE_L2X0
 652         select NEED_MACH_IO_H if PCI
 653         select ARCH_HAS_CPUFREQ
 654         help
 655           This enables support for NVIDIA Tegra based systems (Tegra APX,
 656           Tegra 6xx and Tegra 2 series).
 657
 658 config ARCH_PICOXCELL
 659         bool "Picochip picoXcell"
 660         select ARCH_REQUIRE_GPIOLIB
 661         select ARM_PATCH_PHYS_VIRT
 662         select ARM_VIC
 663         select CPU_V6K
 664         select DW_APB_TIMER
 665         select GENERIC_CLOCKEVENTS
 666         select GENERIC_GPIO
 667         select HAVE_TCM
 668         select NO_IOPORT
 669         select SPARSE_IRQ
 670         select USE_OF
 671         help
 672           This enables support for systems based on the Picochip picoXcell
 673           family of Femtocell devices.  The picoxcell support requires device tree
 674           for all boards.
 675
 676 config ARCH_PNX4008
 677         bool "Philips Nexperia PNX4008 Mobile"
 678         select CPU_ARM926T
 679         select CLKDEV_LOOKUP
 680         select ARCH_USES_GETTIMEOFFSET
 681         help
 682           This enables support for Philips PNX4008 mobile platform.
 683
 684 config ARCH_PXA
 685         bool "PXA2xx/PXA3xx-based"
 686         depends on MMU
 687         select ARCH_MTD_XIP
 688         select ARCH_HAS_CPUFREQ
 689         select CLKDEV_LOOKUP
 690         select CLKSRC_MMIO
 691         select ARCH_REQUIRE_GPIOLIB
 692         select GENERIC_CLOCKEVENTS
 693         select GPIO_PXA
 694         select PLAT_PXA
 695         select SPARSE_IRQ
 696         select AUTO_ZRELADDR
 697         select MULTI_IRQ_HANDLER
 698         select ARM_CPU_SUSPEND if PM
 699         select HAVE_IDE
 700         help
 701           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 702
 703 config ARCH_MSM
 704         bool "Qualcomm MSM"
 705         select HAVE_CLK
 706         select GENERIC_CLOCKEVENTS
 707         select ARCH_REQUIRE_GPIOLIB
 708         select CLKDEV_LOOKUP
 709         help
 710           Support for Qualcomm MSM/QSD based systems.  This runs on the
 711           apps processor of the MSM/QSD and depends on a shared memory
 712           interface to the modem processor which runs the baseband
 713           stack and controls some vital subsystems
 714           (clock and power control, etc).
 715
 716 config ARCH_SHMOBILE
 717         bool "Renesas SH-Mobile / R-Mobile"
 718         select HAVE_CLK
 719         select CLKDEV_LOOKUP
 720         select HAVE_MACH_CLKDEV
 721         select HAVE_SMP
 722         select GENERIC_CLOCKEVENTS
 723         select MIGHT_HAVE_CACHE_L2X0
 724         select NO_IOPORT
 725         select SPARSE_IRQ
 726         select MULTI_IRQ_HANDLER
 727         select PM_GENERIC_DOMAINS if PM
 728         select NEED_MACH_MEMORY_H
 729         help
 730           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 731
 732 config ARCH_RPC
 733         bool "RiscPC"
 734         select ARCH_ACORN
 735         select FIQ
 736         select ARCH_MAY_HAVE_PC_FDC
 737         select HAVE_PATA_PLATFORM
 738         select ISA_DMA_API
 739         select NO_IOPORT
 740         select ARCH_SPARSEMEM_ENABLE
 741         select ARCH_USES_GETTIMEOFFSET
 742         select HAVE_IDE
 743         select NEED_MACH_IO_H
 744         select NEED_MACH_MEMORY_H
 745         help
 746           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 747           CD-ROM interface, serial and parallel port, and the floppy drive.
 748
 749 config ARCH_SA1100
 750         bool "SA1100-based"
 751         select CLKSRC_MMIO
 752         select CPU_SA1100
 753         select ISA
 754         select ARCH_SPARSEMEM_ENABLE
 755         select ARCH_MTD_XIP
 756         select ARCH_HAS_CPUFREQ
 757         select CPU_FREQ
 758         select GENERIC_CLOCKEVENTS
 759         select CLKDEV_LOOKUP
 760         select ARCH_REQUIRE_GPIOLIB
 761         select HAVE_IDE
 762         select NEED_MACH_MEMORY_H
 763         select SPARSE_IRQ
 764         help
 765           Support for StrongARM 11x0 based boards.
 766
 767 config ARCH_S3C24XX
 768         bool "Samsung S3C24XX SoCs"
 769         select GENERIC_GPIO
 770         select ARCH_HAS_CPUFREQ
 771         select HAVE_CLK
 772         select CLKDEV_LOOKUP
 773         select ARCH_USES_GETTIMEOFFSET
 774         select HAVE_S3C2410_I2C if I2C
 775         select HAVE_S3C_RTC if RTC_CLASS
 776         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 777         select NEED_MACH_IO_H
 778         help
 779           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 780           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 781           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 782           Samsung SMDK2410 development board (and derivatives).
 783
 784 config ARCH_S3C64XX
 785         bool "Samsung S3C64XX"
 786         select PLAT_SAMSUNG
 787         select CPU_V6
 788         select ARM_VIC
 789         select HAVE_CLK
 790         select HAVE_TCM
 791         select CLKDEV_LOOKUP
 792         select NO_IOPORT
 793         select ARCH_USES_GETTIMEOFFSET
 794         select ARCH_HAS_CPUFREQ
 795         select ARCH_REQUIRE_GPIOLIB
 796         select SAMSUNG_CLKSRC
 797         select SAMSUNG_IRQ_VIC_TIMER
 798         select S3C_GPIO_TRACK
 799         select S3C_DEV_NAND
 800         select USB_ARCH_HAS_OHCI
 801         select SAMSUNG_GPIOLIB_4BIT
 802         select HAVE_S3C2410_I2C if I2C
 803         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 804         help
 805           Samsung S3C64XX series based systems
 806
 807 config ARCH_S5P64X0
 808         bool "Samsung S5P6440 S5P6450"
 809         select CPU_V6
 810         select GENERIC_GPIO
 811         select HAVE_CLK
 812         select CLKDEV_LOOKUP
 813         select CLKSRC_MMIO
 814         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 815         select GENERIC_CLOCKEVENTS
 816         select HAVE_S3C2410_I2C if I2C
 817         select HAVE_S3C_RTC if RTC_CLASS
 818         help
 819           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 820           SMDK6450.
 821
 822 config ARCH_S5PC100
 823         bool "Samsung S5PC100"
 824         select GENERIC_GPIO
 825         select HAVE_CLK
 826         select CLKDEV_LOOKUP
 827         select CPU_V7
 828         select ARCH_USES_GETTIMEOFFSET
 829         select HAVE_S3C2410_I2C if I2C
 830         select HAVE_S3C_RTC if RTC_CLASS
 831         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 832         help
 833           Samsung S5PC100 series based systems
 834
 835 config ARCH_S5PV210
 836         bool "Samsung S5PV210/S5PC110"
 837         select CPU_V7
 838         select ARCH_SPARSEMEM_ENABLE
 839         select ARCH_HAS_HOLES_MEMORYMODEL
 840         select GENERIC_GPIO
 841         select HAVE_CLK
 842         select CLKDEV_LOOKUP
 843         select CLKSRC_MMIO
 844         select ARCH_HAS_CPUFREQ
 845         select GENERIC_CLOCKEVENTS
 846         select HAVE_S3C2410_I2C if I2C
 847         select HAVE_S3C_RTC if RTC_CLASS
 848         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 849         select NEED_MACH_MEMORY_H
 850         help
 851           Samsung S5PV210/S5PC110 series based systems
 852
 853 config ARCH_EXYNOS
 854         bool "SAMSUNG EXYNOS"
 855         select CPU_V7
 856         select ARCH_SPARSEMEM_ENABLE
 857         select ARCH_HAS_HOLES_MEMORYMODEL
 858         select GENERIC_GPIO
 859         select HAVE_CLK
 860         select CLKDEV_LOOKUP
 861         select ARCH_HAS_CPUFREQ
 862         select GENERIC_CLOCKEVENTS
 863         select HAVE_S3C_RTC if RTC_CLASS
 864         select HAVE_S3C2410_I2C if I2C
 865         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 866         select NEED_MACH_MEMORY_H
 867         help
 868           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 869
 870 config ARCH_SHARK
 871         bool "Shark"
 872         select CPU_SA110
 873         select ISA
 874         select ISA_DMA
 875         select ZONE_DMA
 876         select PCI
 877         select ARCH_USES_GETTIMEOFFSET
 878         select NEED_MACH_MEMORY_H
 879         select NEED_MACH_IO_H
 880         help
 881           Support for the StrongARM based Digital DNARD machine, also known
 882           as "Shark" (<http://www.shark-linux.de/shark.html>).
 883
 884 config ARCH_U300
 885         bool "ST-Ericsson U300 Series"
 886         depends on MMU
 887         select CLKSRC_MMIO
 888         select CPU_ARM926T
 889         select HAVE_TCM
 890         select ARM_AMBA
 891         select ARM_PATCH_PHYS_VIRT
 892         select ARM_VIC
 893         select GENERIC_CLOCKEVENTS
 894         select CLKDEV_LOOKUP
 895         select HAVE_MACH_CLKDEV
 896         select GENERIC_GPIO
 897         select ARCH_REQUIRE_GPIOLIB
 898         help
 899           Support for ST-Ericsson U300 series mobile platforms.
 900
 901 config ARCH_U8500
 902         bool "ST-Ericsson U8500 Series"
 903         depends on MMU
 904         select CPU_V7
 905         select ARM_AMBA
 906         select GENERIC_CLOCKEVENTS
 907         select CLKDEV_LOOKUP
 908         select ARCH_REQUIRE_GPIOLIB
 909         select ARCH_HAS_CPUFREQ
 910         select HAVE_SMP
 911         select MIGHT_HAVE_CACHE_L2X0
 912         help
 913           Support for ST-Ericsson's Ux500 architecture
 914
 915 config ARCH_NOMADIK
 916         bool "STMicroelectronics Nomadik"
 917         select ARM_AMBA
 918         select ARM_VIC
 919         select CPU_ARM926T
 920         select CLKDEV_LOOKUP
 921         select GENERIC_CLOCKEVENTS
 922         select MIGHT_HAVE_CACHE_L2X0
 923         select ARCH_REQUIRE_GPIOLIB
 924         help
 925           Support for the Nomadik platform by ST-Ericsson
 926
 927 config ARCH_DAVINCI
 928         bool "TI DaVinci"
 929         select GENERIC_CLOCKEVENTS
 930         select ARCH_REQUIRE_GPIOLIB
 931         select ZONE_DMA
 932         select HAVE_IDE
 933         select CLKDEV_LOOKUP
 934         select GENERIC_ALLOCATOR
 935         select GENERIC_IRQ_CHIP
 936         select ARCH_HAS_HOLES_MEMORYMODEL
 937         help
 938           Support for TI's DaVinci platform.
 939
 940 config ARCH_OMAP
 941         bool "TI OMAP"
 942         select HAVE_CLK
 943         select ARCH_REQUIRE_GPIOLIB
 944         select ARCH_HAS_CPUFREQ
 945         select CLKSRC_MMIO
 946         select GENERIC_CLOCKEVENTS
 947         select ARCH_HAS_HOLES_MEMORYMODEL
 948         help
 949           Support for TI's OMAP platform (OMAP1/2/3/4).
 950
 951 config PLAT_SPEAR
 952         bool "ST SPEAr"
 953         select ARM_AMBA
 954         select ARCH_REQUIRE_GPIOLIB
 955         select CLKDEV_LOOKUP
 956         select CLKSRC_MMIO
 957         select GENERIC_CLOCKEVENTS
 958         select HAVE_CLK
 959         help
 960           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 961
 962 config ARCH_VT8500
 963         bool "VIA/WonderMedia 85xx"
 964         select CPU_ARM926T
 965         select GENERIC_GPIO
 966         select ARCH_HAS_CPUFREQ
 967         select GENERIC_CLOCKEVENTS
 968         select ARCH_REQUIRE_GPIOLIB
 969         select HAVE_PWM
 970         help
 971           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 972
 973 config ARCH_ZYNQ
 974         bool "Xilinx Zynq ARM Cortex A9 Platform"
 975         select CPU_V7
 976         select GENERIC_CLOCKEVENTS
 977         select CLKDEV_LOOKUP
 978         select ARM_GIC
 979         select ARM_AMBA
 980         select ICST
 981         select MIGHT_HAVE_CACHE_L2X0
 982         select USE_OF
 983         help
 984           Support for Xilinx Zynq ARM Cortex A9 Platform
 985 endchoice
 986
 987 #
 988 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 989 # Kconfigs may be included either alphabetically (according to the
 990 # plat- suffix) or along side the corresponding mach-* source.
 991 #
 992 source "arch/arm/mach-at91/Kconfig"
 993
 994 source "arch/arm/mach-bcmring/Kconfig"
 995
 996 source "arch/arm/mach-clps711x/Kconfig"
 997
 998 source "arch/arm/mach-cns3xxx/Kconfig"
 999
1000 source "arch/arm/mach-davinci/Kconfig"
1001
1002 source "arch/arm/mach-dove/Kconfig"
1003
1004 source "arch/arm/mach-ep93xx/Kconfig"
1005
1006 source "arch/arm/mach-footbridge/Kconfig"
1007
1008 source "arch/arm/mach-gemini/Kconfig"
1009
1010 source "arch/arm/mach-h720x/Kconfig"
1011
1012 source "arch/arm/mach-integrator/Kconfig"
1013
1014 source "arch/arm/mach-iop32x/Kconfig"
1015
1016 source "arch/arm/mach-iop33x/Kconfig"
1017
1018 source "arch/arm/mach-iop13xx/Kconfig"
1019
1020 source "arch/arm/mach-ixp4xx/Kconfig"
1021
1022 source "arch/arm/mach-kirkwood/Kconfig"
1023
1024 source "arch/arm/mach-ks8695/Kconfig"
1025
1026 source "arch/arm/mach-lpc32xx/Kconfig"
1027
1028 source "arch/arm/mach-msm/Kconfig"
1029
1030 source "arch/arm/mach-mv78xx0/Kconfig"
1031
1032 source "arch/arm/plat-mxc/Kconfig"
1033
1034 source "arch/arm/mach-mxs/Kconfig"
1035
1036 source "arch/arm/mach-netx/Kconfig"
1037
1038 source "arch/arm/mach-nomadik/Kconfig"
1039 source "arch/arm/plat-nomadik/Kconfig"
1040
1041 source "arch/arm/plat-omap/Kconfig"
1042
1043 source "arch/arm/mach-omap1/Kconfig"
1044
1045 source "arch/arm/mach-omap2/Kconfig"
1046
1047 source "arch/arm/mach-orion5x/Kconfig"
1048
1049 source "arch/arm/mach-pxa/Kconfig"
1050 source "arch/arm/plat-pxa/Kconfig"
1051
1052 source "arch/arm/mach-mmp/Kconfig"
1053
1054 source "arch/arm/mach-realview/Kconfig"
1055
1056 source "arch/arm/mach-sa1100/Kconfig"
1057
1058 source "arch/arm/plat-samsung/Kconfig"
1059 source "arch/arm/plat-s3c24xx/Kconfig"
1060 source "arch/arm/plat-s5p/Kconfig"
1061
1062 source "arch/arm/plat-spear/Kconfig"
1063
1064 source "arch/arm/mach-s3c24xx/Kconfig"
1065 if ARCH_S3C24XX
1066 source "arch/arm/mach-s3c2412/Kconfig"
1067 source "arch/arm/mach-s3c2440/Kconfig"
1068 endif
1069
1070 if ARCH_S3C64XX
1071 source "arch/arm/mach-s3c64xx/Kconfig"
1072 endif
1073
1074 source "arch/arm/mach-s5p64x0/Kconfig"
1075
1076 source "arch/arm/mach-s5pc100/Kconfig"
1077
1078 source "arch/arm/mach-s5pv210/Kconfig"
1079
1080 source "arch/arm/mach-exynos/Kconfig"
1081
1082 source "arch/arm/mach-shmobile/Kconfig"
1083
1084 source "arch/arm/mach-tegra/Kconfig"
1085
1086 source "arch/arm/mach-u300/Kconfig"
1087
1088 source "arch/arm/mach-ux500/Kconfig"
1089
1090 source "arch/arm/mach-versatile/Kconfig"
1091
1092 source "arch/arm/mach-vexpress/Kconfig"
1093 source "arch/arm/plat-versatile/Kconfig"
1094
1095 source "arch/arm/mach-vt8500/Kconfig"
1096
1097 source "arch/arm/mach-w90x900/Kconfig"
1098
1099 # Definitions to make life easier
1100 config ARCH_ACORN
1101         bool
1102
1103 config PLAT_IOP
1104         bool
1105         select GENERIC_CLOCKEVENTS
1106
1107 config PLAT_ORION
1108         bool
1109         select CLKSRC_MMIO
1110         select GENERIC_IRQ_CHIP
1111
1112 config PLAT_PXA
1113         bool
1114
1115 config PLAT_VERSATILE
1116         bool
1117
1118 config ARM_TIMER_SP804
1119         bool
1120         select CLKSRC_MMIO
1121         select HAVE_SCHED_CLOCK
1122
1123 source arch/arm/mm/Kconfig
1124
1125 config ARM_NR_BANKS
1126         int
1127         default 16 if ARCH_EP93XX
1128         default 8
1129
1130 config IWMMXT
1131         bool "Enable iWMMXt support"
1132         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1133         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1134         help
1135           Enable support for iWMMXt context switching at run time if
1136           running on a CPU that supports it.
1137
1138 config XSCALE_PMU
1139         bool
1140         depends on CPU_XSCALE
1141         default y
1142
1143 config CPU_HAS_PMU
1144         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1145                    (!ARCH_OMAP3 || OMAP3_EMU)
1146         default y
1147         bool
1148
1149 config MULTI_IRQ_HANDLER
1150         bool
1151         help
1152           Allow each machine to specify it's own IRQ handler at run time.
1153
1154 if !MMU
1155 source "arch/arm/Kconfig-nommu"
1156 endif
1157
1158 config ARM_ERRATA_326103
1159         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1160         depends on CPU_V6
1161         help
1162           Executing a SWP instruction to read-only memory does not set bit 11
1163           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1164           treat the access as a read, preventing a COW from occurring and
1165           causing the faulting task to livelock.
1166
1167 config ARM_ERRATA_411920
1168         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1169         depends on CPU_V6 || CPU_V6K
1170         help
1171           Invalidation of the Instruction Cache operation can
1172           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1173           It does not affect the MPCore. This option enables the ARM Ltd.
1174           recommended workaround.
1175
1176 config ARM_ERRATA_430973
1177         bool "ARM errata: Stale prediction on replaced interworking branch"
1178         depends on CPU_V7
1179         help
1180           This option enables the workaround for the 430973 Cortex-A8
1181           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1182           interworking branch is replaced with another code sequence at the
1183           same virtual address, whether due to self-modifying code or virtual
1184           to physical address re-mapping, Cortex-A8 does not recover from the
1185           stale interworking branch prediction. This results in Cortex-A8
1186           executing the new code sequence in the incorrect ARM or Thumb state.
1187           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1188           and also flushes the branch target cache at every context switch.
1189           Note that setting specific bits in the ACTLR register may not be
1190           available in non-secure mode.
1191
1192 config ARM_ERRATA_458693
1193         bool "ARM errata: Processor deadlock when a false hazard is created"
1194         depends on CPU_V7
1195         help
1196           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1197           erratum. For very specific sequences of memory operations, it is
1198           possible for a hazard condition intended for a cache line to instead
1199           be incorrectly associated with a different cache line. This false
1200           hazard might then cause a processor deadlock. The workaround enables
1201           the L1 caching of the NEON accesses and disables the PLD instruction
1202           in the ACTLR register. Note that setting specific bits in the ACTLR
1203           register may not be available in non-secure mode.
1204
1205 config ARM_ERRATA_460075
1206         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1207         depends on CPU_V7
1208         help
1209           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1210           erratum. Any asynchronous access to the L2 cache may encounter a
1211           situation in which recent store transactions to the L2 cache are lost
1212           and overwritten with stale memory contents from external memory. The
1213           workaround disables the write-allocate mode for the L2 cache via the
1214           ACTLR register. Note that setting specific bits in the ACTLR register
1215           may not be available in non-secure mode.
1216
1217 config ARM_ERRATA_742230
1218         bool "ARM errata: DMB operation may be faulty"
1219         depends on CPU_V7 && SMP
1220         help
1221           This option enables the workaround for the 742230 Cortex-A9
1222           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1223           between two write operations may not ensure the correct visibility
1224           ordering of the two writes. This workaround sets a specific bit in
1225           the diagnostic register of the Cortex-A9 which causes the DMB
1226           instruction to behave as a DSB, ensuring the correct behaviour of
1227           the two writes.
1228
1229 config ARM_ERRATA_742231
1230         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1231         depends on CPU_V7 && SMP
1232         help
1233           This option enables the workaround for the 742231 Cortex-A9
1234           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1235           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1236           accessing some data located in the same cache line, may get corrupted
1237           data due to bad handling of the address hazard when the line gets
1238           replaced from one of the CPUs at the same time as another CPU is
1239           accessing it. This workaround sets specific bits in the diagnostic
1240           register of the Cortex-A9 which reduces the linefill issuing
1241           capabilities of the processor.
1242
1243 config PL310_ERRATA_588369
1244         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1245         depends on CACHE_L2X0
1246         help
1247            The PL310 L2 cache controller implements three types of Clean &
1248            Invalidate maintenance operations: by Physical Address
1249            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1250            They are architecturally defined to behave as the execution of a
1251            clean operation followed immediately by an invalidate operation,
1252            both performing to the same memory location. This functionality
1253            is not correctly implemented in PL310 as clean lines are not
1254            invalidated as a result of these operations.
1255
1256 config ARM_ERRATA_720789
1257         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1258         depends on CPU_V7
1259         help
1260           This option enables the workaround for the 720789 Cortex-A9 (prior to
1261           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1262           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1263           As a consequence of this erratum, some TLB entries which should be
1264           invalidated are not, resulting in an incoherency in the system page
1265           tables. The workaround changes the TLB flushing routines to invalidate
1266           entries regardless of the ASID.
1267
1268 config PL310_ERRATA_727915
1269         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1270         depends on CACHE_L2X0
1271         help
1272           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1273           operation (offset 0x7FC). This operation runs in background so that
1274           PL310 can handle normal accesses while it is in progress. Under very
1275           rare circumstances, due to this erratum, write data can be lost when
1276           PL310 treats a cacheable write transaction during a Clean &
1277           Invalidate by Way operation.
1278
1279 config ARM_ERRATA_743622
1280         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1281         depends on CPU_V7
1282         help
1283           This option enables the workaround for the 743622 Cortex-A9
1284           (r2p*) erratum. Under very rare conditions, a faulty
1285           optimisation in the Cortex-A9 Store Buffer may lead to data
1286           corruption. This workaround sets a specific bit in the diagnostic
1287           register of the Cortex-A9 which disables the Store Buffer
1288           optimisation, preventing the defect from occurring. This has no
1289           visible impact on the overall performance or power consumption of the
1290           processor.
1291
1292 config ARM_ERRATA_751472
1293         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1294         depends on CPU_V7
1295         help
1296           This option enables the workaround for the 751472 Cortex-A9 (prior
1297           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1298           completion of a following broadcasted operation if the second
1299           operation is received by a CPU before the ICIALLUIS has completed,
1300           potentially leading to corrupted entries in the cache or TLB.
1301
1302 config PL310_ERRATA_753970
1303         bool "PL310 errata: cache sync operation may be faulty"
1304         depends on CACHE_PL310
1305         help
1306           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1307
1308           Under some condition the effect of cache sync operation on
1309           the store buffer still remains when the operation completes.
1310           This means that the store buffer is always asked to drain and
1311           this prevents it from merging any further writes. The workaround
1312           is to replace the normal offset of cache sync operation (0x730)
1313           by another offset targeting an unmapped PL310 register 0x740.
1314           This has the same effect as the cache sync operation: store buffer
1315           drain and waiting for all buffers empty.
1316
1317 config ARM_ERRATA_754322
1318         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1319         depends on CPU_V7
1320         help
1321           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1322           r3p*) erratum. A speculative memory access may cause a page table walk
1323           which starts prior to an ASID switch but completes afterwards. This
1324           can populate the micro-TLB with a stale entry which may be hit with
1325           the new ASID. This workaround places two dsb instructions in the mm
1326           switching code so that no page table walks can cross the ASID switch.
1327
1328 config ARM_ERRATA_754327
1329         bool "ARM errata: no automatic Store Buffer drain"
1330         depends on CPU_V7 && SMP
1331         help
1332           This option enables the workaround for the 754327 Cortex-A9 (prior to
1333           r2p0) erratum. The Store Buffer does not have any automatic draining
1334           mechanism and therefore a livelock may occur if an external agent
1335           continuously polls a memory location waiting to observe an update.
1336           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1337           written polling loops from denying visibility of updates to memory.
1338
1339 config ARM_ERRATA_364296
1340         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1341         depends on CPU_V6 && !SMP
1342         help
1343           This options enables the workaround for the 364296 ARM1136
1344           r0p2 erratum (possible cache data corruption with
1345           hit-under-miss enabled). It sets the undocumented bit 31 in
1346           the auxiliary control register and the FI bit in the control
1347           register, thus disabling hit-under-miss without putting the
1348           processor into full low interrupt latency mode. ARM11MPCore
1349           is not affected.
1350
1351 config ARM_ERRATA_764369
1352         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1353         depends on CPU_V7 && SMP
1354         help
1355           This option enables the workaround for erratum 764369
1356           affecting Cortex-A9 MPCore with two or more processors (all
1357           current revisions). Under certain timing circumstances, a data
1358           cache line maintenance operation by MVA targeting an Inner
1359           Shareable memory region may fail to proceed up to either the
1360           Point of Coherency or to the Point of Unification of the
1361           system. This workaround adds a DSB instruction before the
1362           relevant cache maintenance functions and sets a specific bit
1363           in the diagnostic control register of the SCU.
1364
1365 config PL310_ERRATA_769419
1366         bool "PL310 errata: no automatic Store Buffer drain"
1367         depends on CACHE_L2X0
1368         help
1369           On revisions of the PL310 prior to r3p2, the Store Buffer does
1370           not automatically drain. This can cause normal, non-cacheable
1371           writes to be retained when the memory system is idle, leading
1372           to suboptimal I/O performance for drivers using coherent DMA.
1373           This option adds a write barrier to the cpu_idle loop so that,
1374           on systems with an outer cache, the store buffer is drained
1375           explicitly.
1376
1377 endmenu
1378
1379 source "arch/arm/common/Kconfig"
1380
1381 menu "Bus support"
1382
1383 config ARM_AMBA
1384         bool
1385
1386 config ISA
1387         bool
1388         help
1389           Find out whether you have ISA slots on your motherboard.  ISA is the
1390           name of a bus system, i.e. the way the CPU talks to the other stuff
1391           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1392           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1393           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1394
1395 # Select ISA DMA controller support
1396 config ISA_DMA
1397         bool
1398         select ISA_DMA_API
1399
1400 # Select ISA DMA interface
1401 config ISA_DMA_API
1402         bool
1403
1404 config PCI
1405         bool "PCI support" if MIGHT_HAVE_PCI
1406         help
1407           Find out whether you have a PCI motherboard. PCI is the name of a
1408           bus system, i.e. the way the CPU talks to the other stuff inside
1409           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1410           VESA. If you have PCI, say Y, otherwise N.
1411
1412 config PCI_DOMAINS
1413         bool
1414         depends on PCI
1415
1416 config PCI_NANOENGINE
1417         bool "BSE nanoEngine PCI support"
1418         depends on SA1100_NANOENGINE
1419         help
1420           Enable PCI on the BSE nanoEngine board.
1421
1422 config PCI_SYSCALL
1423         def_bool PCI
1424
1425 # Select the host bridge type
1426 config PCI_HOST_VIA82C505
1427         bool
1428         depends on PCI && ARCH_SHARK
1429         default y
1430
1431 config PCI_HOST_ITE8152
1432         bool
1433         depends on PCI && MACH_ARMCORE
1434         default y
1435         select DMABOUNCE
1436
1437 source "drivers/pci/Kconfig"
1438
1439 source "drivers/pcmcia/Kconfig"
1440
1441 endmenu
1442
1443 menu "Kernel Features"
1444
1445 source "kernel/time/Kconfig"
1446
1447 config HAVE_SMP
1448         bool
1449         help
1450           This option should be selected by machines which have an SMP-
1451           capable CPU.
1452
1453           The only effect of this option is to make the SMP-related
1454           options available to the user for configuration.
1455
1456 config SMP
1457         bool "Symmetric Multi-Processing"
1458         depends on CPU_V6K || CPU_V7
1459         depends on GENERIC_CLOCKEVENTS
1460         depends on HAVE_SMP
1461         depends on MMU
1462         select USE_GENERIC_SMP_HELPERS
1463         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1464         help
1465           This enables support for systems with more than one CPU. If you have
1466           a system with only one CPU, like most personal computers, say N. If
1467           you have a system with more than one CPU, say Y.
1468
1469           If you say N here, the kernel will run on single and multiprocessor
1470           machines, but will use only one CPU of a multiprocessor machine. If
1471           you say Y here, the kernel will run on many, but not all, single
1472           processor machines. On a single processor machine, the kernel will
1473           run faster if you say N here.
1474
1475           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1476           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1477           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1478
1479           If you don't know what to do here, say N.
1480
1481 config SMP_ON_UP
1482         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1483         depends on EXPERIMENTAL
1484         depends on SMP && !XIP_KERNEL
1485         default y
1486         help
1487           SMP kernels contain instructions which fail on non-SMP processors.
1488           Enabling this option allows the kernel to modify itself to make
1489           these instructions safe.  Disabling it allows about 1K of space
1490           savings.
1491
1492           If you don't know what to do here, say Y.
1493
1494 config ARM_CPU_TOPOLOGY
1495         bool "Support cpu topology definition"
1496         depends on SMP && CPU_V7
1497         default y
1498         help
1499           Support ARM cpu topology definition. The MPIDR register defines
1500           affinity between processors which is then used to describe the cpu
1501           topology of an ARM System.
1502
1503 config SCHED_MC
1504         bool "Multi-core scheduler support"
1505         depends on ARM_CPU_TOPOLOGY
1506         help
1507           Multi-core scheduler support improves the CPU scheduler's decision
1508           making when dealing with multi-core CPU chips at a cost of slightly
1509           increased overhead in some places. If unsure say N here.
1510
1511 config SCHED_SMT
1512         bool "SMT scheduler support"
1513         depends on ARM_CPU_TOPOLOGY
1514         help
1515           Improves the CPU scheduler's decision making when dealing with
1516           MultiThreading at a cost of slightly increased overhead in some
1517           places. If unsure say N here.
1518
1519 config HAVE_ARM_SCU
1520         bool
1521         help
1522           This option enables support for the ARM system coherency unit
1523
1524 config ARM_ARCH_TIMER
1525         bool "Architected timer support"
1526         depends on CPU_V7
1527         help
1528           This option enables support for the ARM architected timer
1529
1530 config HAVE_ARM_TWD
1531         bool
1532         depends on SMP
1533         help
1534           This options enables support for the ARM timer and watchdog unit
1535
1536 choice
1537         prompt "Memory split"
1538         default VMSPLIT_3G
1539         help
1540           Select the desired split between kernel and user memory.
1541
1542           If you are not absolutely sure what you are doing, leave this
1543           option alone!
1544
1545         config VMSPLIT_3G
1546                 bool "3G/1G user/kernel split"
1547         config VMSPLIT_2G
1548                 bool "2G/2G user/kernel split"
1549         config VMSPLIT_1G
1550                 bool "1G/3G user/kernel split"
1551 endchoice
1552
1553 config PAGE_OFFSET
1554         hex
1555         default 0x40000000 if VMSPLIT_1G
1556         default 0x80000000 if VMSPLIT_2G
1557         default 0xC0000000
1558
1559 config NR_CPUS
1560         int "Maximum number of CPUs (2-32)"
1561         range 2 32
1562         depends on SMP
1563         default "4"
1564
1565 config HOTPLUG_CPU
1566         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1567         depends on SMP && HOTPLUG && EXPERIMENTAL
1568         help
1569           Say Y here to experiment with turning CPUs off and on.  CPUs
1570           can be controlled through /sys/devices/system/cpu.
1571
1572 config LOCAL_TIMERS
1573         bool "Use local timer interrupts"
1574         depends on SMP
1575         default y
1576         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1577         help
1578           Enable support for local timers on SMP platforms, rather then the
1579           legacy IPI broadcast method.  Local timers allows the system
1580           accounting to be spread across the timer interval, preventing a
1581           "thundering herd" at every timer tick.
1582
1583 config ARCH_NR_GPIO
1584         int
1585         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1586         default 355 if ARCH_U8500
1587         default 264 if MACH_H4700
1588         default 0
1589         help
1590           Maximum number of GPIOs in the system.
1591
1592           If unsure, leave the default value.
1593
1594 source kernel/Kconfig.preempt
1595
1596 config HZ
1597         int
1598         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1599                 ARCH_S5PV210 || ARCH_EXYNOS4
1600         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1601         default AT91_TIMER_HZ if ARCH_AT91
1602         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1603         default 100
1604
1605 config THUMB2_KERNEL
1606         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1607         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1608         select AEABI
1609         select ARM_ASM_UNIFIED
1610         select ARM_UNWIND
1611         help
1612           By enabling this option, the kernel will be compiled in
1613           Thumb-2 mode. A compiler/assembler that understand the unified
1614           ARM-Thumb syntax is needed.
1615
1616           If unsure, say N.
1617
1618 config THUMB2_AVOID_R_ARM_THM_JUMP11
1619         bool "Work around buggy Thumb-2 short branch relocations in gas"
1620         depends on THUMB2_KERNEL && MODULES
1621         default y
1622         help
1623           Various binutils versions can resolve Thumb-2 branches to
1624           locally-defined, preemptible global symbols as short-range "b.n"
1625           branch instructions.
1626
1627           This is a problem, because there's no guarantee the final
1628           destination of the symbol, or any candidate locations for a
1629           trampoline, are within range of the branch.  For this reason, the
1630           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1631           relocation in modules at all, and it makes little sense to add
1632           support.
1633
1634           The symptom is that the kernel fails with an "unsupported
1635           relocation" error when loading some modules.
1636
1637           Until fixed tools are available, passing
1638           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1639           code which hits this problem, at the cost of a bit of extra runtime
1640           stack usage in some cases.
1641
1642           The problem is described in more detail at:
1643               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1644
1645           Only Thumb-2 kernels are affected.
1646
1647           Unless you are sure your tools don't have this problem, say Y.
1648
1649 config ARM_ASM_UNIFIED
1650         bool
1651
1652 config AEABI
1653         bool "Use the ARM EABI to compile the kernel"
1654         help
1655           This option allows for the kernel to be compiled using the latest
1656           ARM ABI (aka EABI).  This is only useful if you are using a user
1657           space environment that is also compiled with EABI.
1658
1659           Since there are major incompatibilities between the legacy ABI and
1660           EABI, especially with regard to structure member alignment, this
1661           option also changes the kernel syscall calling convention to
1662           disambiguate both ABIs and allow for backward compatibility support
1663           (selected with CONFIG_OABI_COMPAT).
1664
1665           To use this you need GCC version 4.0.0 or later.
1666
1667 config OABI_COMPAT
1668         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1669         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1670         default y
1671         help
1672           This option preserves the old syscall interface along with the
1673           new (ARM EABI) one. It also provides a compatibility layer to
1674           intercept syscalls that have structure arguments which layout
1675           in memory differs between the legacy ABI and the new ARM EABI
1676           (only for non "thumb" binaries). This option adds a tiny
1677           overhead to all syscalls and produces a slightly larger kernel.
1678           If you know you'll be using only pure EABI user space then you
1679           can say N here. If this option is not selected and you attempt
1680           to execute a legacy ABI binary then the result will be
1681           UNPREDICTABLE (in fact it can be predicted that it won't work
1682           at all). If in doubt say Y.
1683
1684 config ARCH_HAS_HOLES_MEMORYMODEL
1685         bool
1686
1687 config ARCH_SPARSEMEM_ENABLE
1688         bool
1689
1690 config ARCH_SPARSEMEM_DEFAULT
1691         def_bool ARCH_SPARSEMEM_ENABLE
1692
1693 config ARCH_SELECT_MEMORY_MODEL
1694         def_bool ARCH_SPARSEMEM_ENABLE
1695
1696 config HAVE_ARCH_PFN_VALID
1697         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1698
1699 config HIGHMEM
1700         bool "High Memory Support"
1701         depends on MMU
1702         help
1703           The address space of ARM processors is only 4 Gigabytes large
1704           and it has to accommodate user address space, kernel address
1705           space as well as some memory mapped IO. That means that, if you
1706           have a large amount of physical memory and/or IO, not all of the
1707           memory can be "permanently mapped" by the kernel. The physical
1708           memory that is not permanently mapped is called "high memory".
1709
1710           Depending on the selected kernel/user memory split, minimum
1711           vmalloc space and actual amount of RAM, you may not need this
1712           option which should result in a slightly faster kernel.
1713
1714           If unsure, say n.
1715
1716 config HIGHPTE
1717         bool "Allocate 2nd-level pagetables from highmem"
1718         depends on HIGHMEM
1719
1720 config HW_PERF_EVENTS
1721         bool "Enable hardware performance counter support for perf events"
1722         depends on PERF_EVENTS && CPU_HAS_PMU
1723         default y
1724         help
1725           Enable hardware performance counter support for perf events. If
1726           disabled, perf events will use software events only.
1727
1728 source "mm/Kconfig"
1729
1730 config FORCE_MAX_ZONEORDER
1731         int "Maximum zone order" if ARCH_SHMOBILE
1732         range 11 64 if ARCH_SHMOBILE
1733         default "9" if SA1111
1734         default "11"
1735         help
1736           The kernel memory allocator divides physically contiguous memory
1737           blocks into "zones", where each zone is a power of two number of
1738           pages.  This option selects the largest power of two that the kernel
1739           keeps in the memory allocator.  If you need to allocate very large
1740           blocks of physically contiguous memory, then you may need to
1741           increase this value.
1742
1743           This config option is actually maximum order plus one. For example,
1744           a value of 11 means that the largest free memory block is 2^10 pages.
1745
1746 config LEDS
1747         bool "Timer and CPU usage LEDs"
1748         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1749                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1750                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1751                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1752                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1753                    ARCH_AT91 || ARCH_DAVINCI || \
1754                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1755         help
1756           If you say Y here, the LEDs on your machine will be used
1757           to provide useful information about your current system status.
1758
1759           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1760           be able to select which LEDs are active using the options below. If
1761           you are compiling a kernel for the EBSA-110 or the LART however, the
1762           red LED will simply flash regularly to indicate that the system is
1763           still functional. It is safe to say Y here if you have a CATS
1764           system, but the driver will do nothing.
1765
1766 config LEDS_TIMER
1767         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1768                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1769                             || MACH_OMAP_PERSEUS2
1770         depends on LEDS
1771         depends on !GENERIC_CLOCKEVENTS
1772         default y if ARCH_EBSA110
1773         help
1774           If you say Y here, one of the system LEDs (the green one on the
1775           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1776           will flash regularly to indicate that the system is still
1777           operational. This is mainly useful to kernel hackers who are
1778           debugging unstable kernels.
1779
1780           The LART uses the same LED for both Timer LED and CPU usage LED
1781           functions. You may choose to use both, but the Timer LED function
1782           will overrule the CPU usage LED.
1783
1784 config LEDS_CPU
1785         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1786                         !ARCH_OMAP) \
1787                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1788                         || MACH_OMAP_PERSEUS2
1789         depends on LEDS
1790         help
1791           If you say Y here, the red LED will be used to give a good real
1792           time indication of CPU usage, by lighting whenever the idle task
1793           is not currently executing.
1794
1795           The LART uses the same LED for both Timer LED and CPU usage LED
1796           functions. You may choose to use both, but the Timer LED function
1797           will overrule the CPU usage LED.
1798
1799 config ALIGNMENT_TRAP
1800         bool
1801         depends on CPU_CP15_MMU
1802         default y if !ARCH_EBSA110
1803         select HAVE_PROC_CPU if PROC_FS
1804         help
1805           ARM processors cannot fetch/store information which is not
1806           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1807           address divisible by 4. On 32-bit ARM processors, these non-aligned
1808           fetch/store instructions will be emulated in software if you say
1809           here, which has a severe performance impact. This is necessary for
1810           correct operation of some network protocols. With an IP-only
1811           configuration it is safe to say N, otherwise say Y.
1812
1813 config UACCESS_WITH_MEMCPY
1814         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1815         depends on MMU && EXPERIMENTAL
1816         default y if CPU_FEROCEON
1817         help
1818           Implement faster copy_to_user and clear_user methods for CPU
1819           cores where a 8-word STM instruction give significantly higher
1820           memory write throughput than a sequence of individual 32bit stores.
1821
1822           A possible side effect is a slight increase in scheduling latency
1823           between threads sharing the same address space if they invoke
1824           such copy operations with large buffers.
1825
1826           However, if the CPU data cache is using a write-allocate mode,
1827           this option is unlikely to provide any performance gain.
1828
1829 config SECCOMP
1830         bool
1831         prompt "Enable seccomp to safely compute untrusted bytecode"
1832         ---help---
1833           This kernel feature is useful for number crunching applications
1834           that may need to compute untrusted bytecode during their
1835           execution. By using pipes or other transports made available to
1836           the process as file descriptors supporting the read/write
1837           syscalls, it's possible to isolate those applications in
1838           their own address space using seccomp. Once seccomp is
1839           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1840           and the task is only allowed to execute a few safe syscalls
1841           defined by each seccomp mode.
1842
1843 config CC_STACKPROTECTOR
1844         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1845         depends on EXPERIMENTAL
1846         help
1847           This option turns on the -fstack-protector GCC feature. This
1848           feature puts, at the beginning of functions, a canary value on
1849           the stack just before the return address, and validates
1850           the value just before actually returning.  Stack based buffer
1851           overflows (that need to overwrite this return address) now also
1852           overwrite the canary, which gets detected and the attack is then
1853           neutralized via a kernel panic.
1854           This feature requires gcc version 4.2 or above.
1855
1856 config DEPRECATED_PARAM_STRUCT
1857         bool "Provide old way to pass kernel parameters"
1858         help
1859           This was deprecated in 2001 and announced to live on for 5 years.
1860           Some old boot loaders still use this way.
1861
1862 endmenu
1863
1864 menu "Boot options"
1865
1866 config USE_OF
1867         bool "Flattened Device Tree support"
1868         select OF
1869         select OF_EARLY_FLATTREE
1870         select IRQ_DOMAIN
1871         help
1872           Include support for flattened device tree machine descriptions.
1873
1874 # Compressed boot loader in ROM.  Yes, we really want to ask about
1875 # TEXT and BSS so we preserve their values in the config files.
1876 config ZBOOT_ROM_TEXT
1877         hex "Compressed ROM boot loader base address"
1878         default "0"
1879         help
1880           The physical address at which the ROM-able zImage is to be
1881           placed in the target.  Platforms which normally make use of
1882           ROM-able zImage formats normally set this to a suitable
1883           value in their defconfig file.
1884
1885           If ZBOOT_ROM is not enabled, this has no effect.
1886
1887 config ZBOOT_ROM_BSS
1888         hex "Compressed ROM boot loader BSS address"
1889         default "0"
1890         help
1891           The base address of an area of read/write memory in the target
1892           for the ROM-able zImage which must be available while the
1893           decompressor is running. It must be large enough to hold the
1894           entire decompressed kernel plus an additional 128 KiB.
1895           Platforms which normally make use of ROM-able zImage formats
1896           normally set this to a suitable value in their defconfig file.
1897
1898           If ZBOOT_ROM is not enabled, this has no effect.
1899
1900 config ZBOOT_ROM
1901         bool "Compressed boot loader in ROM/flash"
1902         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1903         help
1904           Say Y here if you intend to execute your compressed kernel image
1905           (zImage) directly from ROM or flash.  If unsure, say N.
1906
1907 choice
1908         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1909         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1910         default ZBOOT_ROM_NONE
1911         help
1912           Include experimental SD/MMC loading code in the ROM-able zImage.
1913           With this enabled it is possible to write the the ROM-able zImage
1914           kernel image to an MMC or SD card and boot the kernel straight
1915           from the reset vector. At reset the processor Mask ROM will load
1916           the first part of the the ROM-able zImage which in turn loads the
1917           rest the kernel image to RAM.
1918
1919 config ZBOOT_ROM_NONE
1920         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1921         help
1922           Do not load image from SD or MMC
1923
1924 config ZBOOT_ROM_MMCIF
1925         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1926         help
1927           Load image from MMCIF hardware block.
1928
1929 config ZBOOT_ROM_SH_MOBILE_SDHI
1930         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1931         help
1932           Load image from SDHI hardware block
1933
1934 endchoice
1935
1936 config ARM_APPENDED_DTB
1937         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1938         depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1939         help
1940           With this option, the boot code will look for a device tree binary
1941           (DTB) appended to zImage
1942           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1943
1944           This is meant as a backward compatibility convenience for those
1945           systems with a bootloader that can't be upgraded to accommodate
1946           the documented boot protocol using a device tree.
1947
1948           Beware that there is very little in terms of protection against
1949           this option being confused by leftover garbage in memory that might
1950           look like a DTB header after a reboot if no actual DTB is appended
1951           to zImage.  Do not leave this option active in a production kernel
1952           if you don't intend to always append a DTB.  Proper passing of the
1953           location into r2 of a bootloader provided DTB is always preferable
1954           to this option.
1955
1956 config ARM_ATAG_DTB_COMPAT
1957         bool "Supplement the appended DTB with traditional ATAG information"
1958         depends on ARM_APPENDED_DTB
1959         help
1960           Some old bootloaders can't be updated to a DTB capable one, yet
1961           they provide ATAGs with memory configuration, the ramdisk address,
1962           the kernel cmdline string, etc.  Such information is dynamically
1963           provided by the bootloader and can't always be stored in a static
1964           DTB.  To allow a device tree enabled kernel to be used with such
1965           bootloaders, this option allows zImage to extract the information
1966           from the ATAG list and store it at run time into the appended DTB.
1967
1968 config CMDLINE
1969         string "Default kernel command string"
1970         default ""
1971         help
1972           On some architectures (EBSA110 and CATS), there is currently no way
1973           for the boot loader to pass arguments to the kernel. For these
1974           architectures, you should supply some command-line options at build
1975           time by entering them here. As a minimum, you should specify the
1976           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1977
1978 choice
1979         prompt "Kernel command line type" if CMDLINE != ""
1980         default CMDLINE_FROM_BOOTLOADER
1981
1982 config CMDLINE_FROM_BOOTLOADER
1983         bool "Use bootloader kernel arguments if available"
1984         help
1985           Uses the command-line options passed by the boot loader. If
1986           the boot loader doesn't provide any, the default kernel command
1987           string provided in CMDLINE will be used.
1988
1989 config CMDLINE_EXTEND
1990         bool "Extend bootloader kernel arguments"
1991         help
1992           The command-line arguments provided by the boot loader will be
1993           appended to the default kernel command string.
1994
1995 config CMDLINE_FORCE
1996         bool "Always use the default kernel command string"
1997         help
1998           Always use the default kernel command string, even if the boot
1999           loader passes other arguments to the kernel.
2000           This is useful if you cannot or don't want to change the
2001           command-line options your boot loader passes to the kernel.
2002 endchoice
2003
2004 config XIP_KERNEL
2005         bool "Kernel Execute-In-Place from ROM"
2006         depends on !ZBOOT_ROM && !ARM_LPAE
2007         help
2008           Execute-In-Place allows the kernel to run from non-volatile storage
2009           directly addressable by the CPU, such as NOR flash. This saves RAM
2010           space since the text section of the kernel is not loaded from flash
2011           to RAM.  Read-write sections, such as the data section and stack,
2012           are still copied to RAM.  The XIP kernel is not compressed since
2013           it has to run directly from flash, so it will take more space to
2014           store it.  The flash address used to link the kernel object files,
2015           and for storing it, is configuration dependent. Therefore, if you
2016           say Y here, you must know the proper physical address where to
2017           store the kernel image depending on your own flash memory usage.
2018
2019           Also note that the make target becomes "make xipImage" rather than
2020           "make zImage" or "make Image".  The final kernel binary to put in
2021           ROM memory will be arch/arm/boot/xipImage.
2022
2023           If unsure, say N.
2024
2025 config XIP_PHYS_ADDR
2026         hex "XIP Kernel Physical Location"
2027         depends on XIP_KERNEL
2028         default "0x00080000"
2029         help
2030           This is the physical address in your flash memory the kernel will
2031           be linked for and stored to.  This address is dependent on your
2032           own flash usage.
2033
2034 config KEXEC
2035         bool "Kexec system call (EXPERIMENTAL)"
2036         depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2037         help
2038           kexec is a system call that implements the ability to shutdown your
2039           current kernel, and to start another kernel.  It is like a reboot
2040           but it is independent of the system firmware.   And like a reboot
2041           you can start any kernel with it, not just Linux.
2042
2043           It is an ongoing process to be certain the hardware in a machine
2044           is properly shutdown, so do not be surprised if this code does not
2045           initially work for you.  It may help to enable device hotplugging
2046           support.
2047
2048 config ATAGS_PROC
2049         bool "Export atags in procfs"
2050         depends on KEXEC
2051         default y
2052         help
2053           Should the atags used to boot the kernel be exported in an "atags"
2054           file in procfs. Useful with kexec.
2055
2056 config CRASH_DUMP
2057         bool "Build kdump crash kernel (EXPERIMENTAL)"
2058         depends on EXPERIMENTAL
2059         help
2060           Generate crash dump after being started by kexec. This should
2061           be normally only set in special crash dump kernels which are
2062           loaded in the main kernel with kexec-tools into a specially
2063           reserved region and then later executed after a crash by
2064           kdump/kexec. The crash dump kernel must be compiled to a
2065           memory address not used by the main kernel
2066
2067           For more details see Documentation/kdump/kdump.txt
2068
2069 config AUTO_ZRELADDR
2070         bool "Auto calculation of the decompressed kernel image address"
2071         depends on !ZBOOT_ROM && !ARCH_U300
2072         help
2073           ZRELADDR is the physical address where the decompressed kernel
2074           image will be placed. If AUTO_ZRELADDR is selected, the address
2075           will be determined at run-time by masking the current IP with
2076           0xf8000000. This assumes the zImage being placed in the first 128MB
2077           from start of memory.
2078
2079 endmenu
2080
2081 menu "CPU Power Management"
2082
2083 if ARCH_HAS_CPUFREQ
2084
2085 source "drivers/cpufreq/Kconfig"
2086
2087 config CPU_FREQ_IMX
2088         tristate "CPUfreq driver for i.MX CPUs"
2089         depends on ARCH_MXC && CPU_FREQ
2090         help
2091           This enables the CPUfreq driver for i.MX CPUs.
2092
2093 config CPU_FREQ_SA1100
2094         bool
2095
2096 config CPU_FREQ_SA1110
2097         bool
2098
2099 config CPU_FREQ_INTEGRATOR
2100         tristate "CPUfreq driver for ARM Integrator CPUs"
2101         depends on ARCH_INTEGRATOR && CPU_FREQ
2102         default y
2103         help
2104           This enables the CPUfreq driver for ARM Integrator CPUs.
2105
2106           For details, take a look at <file:Documentation/cpu-freq>.
2107
2108           If in doubt, say Y.
2109
2110 config CPU_FREQ_PXA
2111         bool
2112         depends on CPU_FREQ && ARCH_PXA && PXA25x
2113         default y
2114         select CPU_FREQ_TABLE
2115         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2116
2117 config CPU_FREQ_S3C
2118         bool
2119         help
2120           Internal configuration node for common cpufreq on Samsung SoC
2121
2122 config CPU_FREQ_S3C24XX
2123         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2124         depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2125         select CPU_FREQ_S3C
2126         help
2127           This enables the CPUfreq driver for the Samsung S3C24XX family
2128           of CPUs.
2129
2130           For details, take a look at <file:Documentation/cpu-freq>.
2131
2132           If in doubt, say N.
2133
2134 config CPU_FREQ_S3C24XX_PLL
2135         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2136         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2137         help
2138           Compile in support for changing the PLL frequency from the
2139           S3C24XX series CPUfreq driver. The PLL takes time to settle
2140           after a frequency change, so by default it is not enabled.
2141
2142           This also means that the PLL tables for the selected CPU(s) will
2143           be built which may increase the size of the kernel image.
2144
2145 config CPU_FREQ_S3C24XX_DEBUG
2146         bool "Debug CPUfreq Samsung driver core"
2147         depends on CPU_FREQ_S3C24XX
2148         help
2149           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2150
2151 config CPU_FREQ_S3C24XX_IODEBUG
2152         bool "Debug CPUfreq Samsung driver IO timing"
2153         depends on CPU_FREQ_S3C24XX
2154         help
2155           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2156
2157 config CPU_FREQ_S3C24XX_DEBUGFS
2158         bool "Export debugfs for CPUFreq"
2159         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2160         help
2161           Export status information via debugfs.
2162
2163 endif
2164
2165 source "drivers/cpuidle/Kconfig"
2166
2167 endmenu
2168
2169 menu "Floating point emulation"
2170
2171 comment "At least one emulation must be selected"
2172
2173 config FPE_NWFPE
2174         bool "NWFPE math emulation"
2175         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2176         ---help---
2177           Say Y to include the NWFPE floating point emulator in the kernel.
2178           This is necessary to run most binaries. Linux does not currently
2179           support floating point hardware so you need to say Y here even if
2180           your machine has an FPA or floating point co-processor podule.
2181
2182           You may say N here if you are going to load the Acorn FPEmulator
2183           early in the bootup.
2184
2185 config FPE_NWFPE_XP
2186         bool "Support extended precision"
2187         depends on FPE_NWFPE
2188         help
2189           Say Y to include 80-bit support in the kernel floating-point
2190           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2191           Note that gcc does not generate 80-bit operations by default,
2192           so in most cases this option only enlarges the size of the
2193           floating point emulator without any good reason.
2194
2195           You almost surely want to say N here.
2196
2197 config FPE_FASTFPE
2198         bool "FastFPE math emulation (EXPERIMENTAL)"
2199         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2200         ---help---
2201           Say Y here to include the FAST floating point emulator in the kernel.
2202           This is an experimental much faster emulator which now also has full
2203           precision for the mantissa.  It does not support any exceptions.
2204           It is very simple, and approximately 3-6 times faster than NWFPE.
2205
2206           It should be sufficient for most programs.  It may be not suitable
2207           for scientific calculations, but you have to check this for yourself.
2208           If you do not feel you need a faster FP emulation you should better
2209           choose NWFPE.
2210
2211 config VFP
2212         bool "VFP-format floating point maths"
2213         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2214         help
2215           Say Y to include VFP support code in the kernel. This is needed
2216           if your hardware includes a VFP unit.
2217
2218           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2219           release notes and additional status information.
2220
2221           Say N if your target does not have VFP hardware.
2222
2223 config VFPv3
2224         bool
2225         depends on VFP
2226         default y if CPU_V7
2227
2228 config NEON
2229         bool "Advanced SIMD (NEON) Extension support"
2230         depends on VFPv3 && CPU_V7
2231         help
2232           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2233           Extension.
2234
2235 endmenu
2236
2237 menu "Userspace binary formats"
2238
2239 source "fs/Kconfig.binfmt"
2240
2241 config ARTHUR
2242         tristate "RISC OS personality"
2243         depends on !AEABI
2244         help
2245           Say Y here to include the kernel code necessary if you want to run
2246           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2247           experimental; if this sounds frightening, say N and sleep in peace.
2248           You can also say M here to compile this support as a module (which
2249           will be called arthur).
2250
2251 endmenu
2252
2253 menu "Power management options"
2254
2255 source "kernel/power/Kconfig"
2256
2257 config ARCH_SUSPEND_POSSIBLE
2258         depends on !ARCH_S5PC100 && !ARCH_TEGRA
2259         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2260                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2261         def_bool y
2262
2263 config ARM_CPU_SUSPEND
2264         def_bool PM_SLEEP
2265
2266 endmenu
2267
2268 source "net/Kconfig"
2269
2270 source "drivers/Kconfig"
2271
2272 source "fs/Kconfig"
2273
2274 source "arch/arm/Kconfig.debug"
2275
2276 source "security/Kconfig"
2277
2278 source "crypto/Kconfig"
2279
2280 source "lib/Kconfig"