arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         help
  32           The ARM series is a line of low-power-consumption RISC chip designs
  33           licensed by ARM Ltd and targeted at embedded applications and
  34           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  35           manufactured, but legacy ARM-based PC hardware remains popular in
  36           Europe.  There is an ARM Linux project with a web page at
  37           <http://www.arm.linux.org.uk/>.
  38
  39 config HAVE_PWM
  40         bool
  41
  42 config MIGHT_HAVE_PCI
  43         bool
  44
  45 config SYS_SUPPORTS_APM_EMULATION
  46         bool
  47
  48 config HAVE_SCHED_CLOCK
  49         bool
  50
  51 config GENERIC_GPIO
  52         bool
  53
  54 config ARCH_USES_GETTIMEOFFSET
  55         bool
  56         default n
  57
  58 config GENERIC_CLOCKEVENTS
  59         bool
  60
  61 config GENERIC_CLOCKEVENTS_BROADCAST
  62         bool
  63         depends on GENERIC_CLOCKEVENTS
  64         default y if SMP
  65
  66 config KTIME_SCALAR
  67         bool
  68         default y
  69
  70 config HAVE_TCM
  71         bool
  72         select GENERIC_ALLOCATOR
  73
  74 config HAVE_PROC_CPU
  75         bool
  76
  77 config NO_IOPORT
  78         bool
  79
  80 config EISA
  81         bool
  82         ---help---
  83           The Extended Industry Standard Architecture (EISA) bus was
  84           developed as an open alternative to the IBM MicroChannel bus.
  85
  86           The EISA bus provided some of the features of the IBM MicroChannel
  87           bus while maintaining backward compatibility with cards made for
  88           the older ISA bus.  The EISA bus saw limited use between 1988 and
  89           1995 when it was made obsolete by the PCI bus.
  90
  91           Say Y here if you are building a kernel for an EISA-based machine.
  92
  93           Otherwise, say N.
  94
  95 config SBUS
  96         bool
  97
  98 config MCA
  99         bool
 100         help
 101           MicroChannel Architecture is found in some IBM PS/2 machines and
 102           laptops.  It is a bus system similar to PCI or ISA. See
 103           <file:Documentation/mca.txt> (and especially the web page given
 104           there) before attempting to build an MCA bus kernel.
 105
 106 config STACKTRACE_SUPPORT
 107         bool
 108         default y
 109
 110 config HAVE_LATENCYTOP_SUPPORT
 111         bool
 112         depends on !SMP
 113         default y
 114
 115 config LOCKDEP_SUPPORT
 116         bool
 117         default y
 118
 119 config TRACE_IRQFLAGS_SUPPORT
 120         bool
 121         default y
 122
 123 config HARDIRQS_SW_RESEND
 124         bool
 125         default y
 126
 127 config GENERIC_IRQ_PROBE
 128         bool
 129         default y
 130
 131 config GENERIC_LOCKBREAK
 132         bool
 133         default y
 134         depends on SMP && PREEMPT
 135
 136 config RWSEM_GENERIC_SPINLOCK
 137         bool
 138         default y
 139
 140 config RWSEM_XCHGADD_ALGORITHM
 141         bool
 142
 143 config ARCH_HAS_ILOG2_U32
 144         bool
 145
 146 config ARCH_HAS_ILOG2_U64
 147         bool
 148
 149 config ARCH_HAS_CPUFREQ
 150         bool
 151         help
 152           Internal node to signify that the ARCH has CPUFREQ support
 153           and that the relevant menu configurations are displayed for
 154           it.
 155
 156 config ARCH_HAS_CPU_IDLE_WAIT
 157        def_bool y
 158
 159 config GENERIC_HWEIGHT
 160         bool
 161         default y
 162
 163 config GENERIC_CALIBRATE_DELAY
 164         bool
 165         default y
 166
 167 config ARCH_MAY_HAVE_PC_FDC
 168         bool
 169
 170 config ZONE_DMA
 171         bool
 172
 173 config NEED_DMA_MAP_STATE
 174        def_bool y
 175
 176 config GENERIC_ISA_DMA
 177         bool
 178
 179 config FIQ
 180         bool
 181
 182 config ARCH_MTD_XIP
 183         bool
 184
 185 config VECTORS_BASE
 186         hex
 187         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 188         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 189         default 0x00000000
 190         help
 191           The base address of exception vectors.
 192
 193 config ARM_PATCH_PHYS_VIRT
 194         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 195         depends on EXPERIMENTAL
 196         depends on !XIP_KERNEL && MMU
 197         depends on !ARCH_REALVIEW || !SPARSEMEM
 198         help
 199           Patch phys-to-virt translation functions at runtime according to
 200           the position of the kernel in system memory.
 201
 202           This can only be used with non-XIP with MMU kernels where
 203           the base of physical memory is at a 16MB boundary.
 204
 205 config ARM_PATCH_PHYS_VIRT_16BIT
 206         def_bool y
 207         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 208
 209 source "init/Kconfig"
 210
 211 source "kernel/Kconfig.freezer"
 212
 213 menu "System Type"
 214
 215 config MMU
 216         bool "MMU-based Paged Memory Management Support"
 217         default y
 218         help
 219           Select if you want MMU-based virtualised addressing space
 220           support by paged memory management. If unsure, say 'Y'.
 221
 222 #
 223 # The "ARM system type" choice list is ordered alphabetically by option
 224 # text.  Please add new entries in the option alphabetic order.
 225 #
 226 choice
 227         prompt "ARM system type"
 228         default ARCH_VERSATILE
 229
 230 config ARCH_INTEGRATOR
 231         bool "ARM Ltd. Integrator family"
 232         select ARM_AMBA
 233         select ARCH_HAS_CPUFREQ
 234         select CLKDEV_LOOKUP
 235         select ICST
 236         select GENERIC_CLOCKEVENTS
 237         select PLAT_VERSATILE
 238         help
 239           Support for ARM's Integrator platform.
 240
 241 config ARCH_REALVIEW
 242         bool "ARM Ltd. RealView family"
 243         select ARM_AMBA
 244         select CLKDEV_LOOKUP
 245         select HAVE_SCHED_CLOCK
 246         select ICST
 247         select GENERIC_CLOCKEVENTS
 248         select ARCH_WANT_OPTIONAL_GPIOLIB
 249         select PLAT_VERSATILE
 250         select ARM_TIMER_SP804
 251         select GPIO_PL061 if GPIOLIB
 252         help
 253           This enables support for ARM Ltd RealView boards.
 254
 255 config ARCH_VERSATILE
 256         bool "ARM Ltd. Versatile family"
 257         select ARM_AMBA
 258         select ARM_VIC
 259         select CLKDEV_LOOKUP
 260         select HAVE_SCHED_CLOCK
 261         select ICST
 262         select GENERIC_CLOCKEVENTS
 263         select ARCH_WANT_OPTIONAL_GPIOLIB
 264         select PLAT_VERSATILE
 265         select ARM_TIMER_SP804
 266         help
 267           This enables support for ARM Ltd Versatile board.
 268
 269 config ARCH_VEXPRESS
 270         bool "ARM Ltd. Versatile Express family"
 271         select ARCH_WANT_OPTIONAL_GPIOLIB
 272         select ARM_AMBA
 273         select ARM_TIMER_SP804
 274         select CLKDEV_LOOKUP
 275         select GENERIC_CLOCKEVENTS
 276         select HAVE_CLK
 277         select HAVE_SCHED_CLOCK
 278         select ICST
 279         select PLAT_VERSATILE
 280         help
 281           This enables support for the ARM Ltd Versatile Express boards.
 282
 283 config ARCH_AT91
 284         bool "Atmel AT91"
 285         select ARCH_REQUIRE_GPIOLIB
 286         select HAVE_CLK
 287         help
 288           This enables support for systems based on the Atmel AT91RM9200,
 289           AT91SAM9 and AT91CAP9 processors.
 290
 291 config ARCH_BCMRING
 292         bool "Broadcom BCMRING"
 293         depends on MMU
 294         select CPU_V6
 295         select ARM_AMBA
 296         select CLKDEV_LOOKUP
 297         select GENERIC_CLOCKEVENTS
 298         select ARCH_WANT_OPTIONAL_GPIOLIB
 299         help
 300           Support for Broadcom's BCMRing platform.
 301
 302 config ARCH_CLPS711X
 303         bool "Cirrus Logic CLPS711x/EP721x-based"
 304         select CPU_ARM720T
 305         select ARCH_USES_GETTIMEOFFSET
 306         help
 307           Support for Cirrus Logic 711x/721x based boards.
 308
 309 config ARCH_CNS3XXX
 310         bool "Cavium Networks CNS3XXX family"
 311         select CPU_V6
 312         select GENERIC_CLOCKEVENTS
 313         select ARM_GIC
 314         select MIGHT_HAVE_PCI
 315         select PCI_DOMAINS if PCI
 316         help
 317           Support for Cavium Networks CNS3XXX platform.
 318
 319 config ARCH_GEMINI
 320         bool "Cortina Systems Gemini"
 321         select CPU_FA526
 322         select ARCH_REQUIRE_GPIOLIB
 323         select ARCH_USES_GETTIMEOFFSET
 324         help
 325           Support for the Cortina Systems Gemini family SoCs
 326
 327 config ARCH_EBSA110
 328         bool "EBSA-110"
 329         select CPU_SA110
 330         select ISA
 331         select NO_IOPORT
 332         select ARCH_USES_GETTIMEOFFSET
 333         help
 334           This is an evaluation board for the StrongARM processor available
 335           from Digital. It has limited hardware on-board, including an
 336           Ethernet interface, two PCMCIA sockets, two serial ports and a
 337           parallel port.
 338
 339 config ARCH_EP93XX
 340         bool "EP93xx-based"
 341         select CPU_ARM920T
 342         select ARM_AMBA
 343         select ARM_VIC
 344         select CLKDEV_LOOKUP
 345         select ARCH_REQUIRE_GPIOLIB
 346         select ARCH_HAS_HOLES_MEMORYMODEL
 347         select ARCH_USES_GETTIMEOFFSET
 348         help
 349           This enables support for the Cirrus EP93xx series of CPUs.
 350
 351 config ARCH_FOOTBRIDGE
 352         bool "FootBridge"
 353         select CPU_SA110
 354         select FOOTBRIDGE
 355         select GENERIC_CLOCKEVENTS
 356         help
 357           Support for systems based on the DC21285 companion chip
 358           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 359
 360 config ARCH_MXC
 361         bool "Freescale MXC/iMX-based"
 362         select GENERIC_CLOCKEVENTS
 363         select ARCH_REQUIRE_GPIOLIB
 364         select CLKDEV_LOOKUP
 365         select HAVE_SCHED_CLOCK
 366         help
 367           Support for Freescale MXC/iMX-based family of processors
 368
 369 config ARCH_MXS
 370         bool "Freescale MXS-based"
 371         select GENERIC_CLOCKEVENTS
 372         select ARCH_REQUIRE_GPIOLIB
 373         select CLKDEV_LOOKUP
 374         help
 375           Support for Freescale MXS-based family of processors
 376
 377 config ARCH_STMP3XXX
 378         bool "Freescale STMP3xxx"
 379         select CPU_ARM926T
 380         select CLKDEV_LOOKUP
 381         select ARCH_REQUIRE_GPIOLIB
 382         select GENERIC_CLOCKEVENTS
 383         select USB_ARCH_HAS_EHCI
 384         help
 385           Support for systems based on the Freescale 3xxx CPUs.
 386
 387 config ARCH_NETX
 388         bool "Hilscher NetX based"
 389         select CPU_ARM926T
 390         select ARM_VIC
 391         select GENERIC_CLOCKEVENTS
 392         help
 393           This enables support for systems based on the Hilscher NetX Soc
 394
 395 config ARCH_H720X
 396         bool "Hynix HMS720x-based"
 397         select CPU_ARM720T
 398         select ISA_DMA_API
 399         select ARCH_USES_GETTIMEOFFSET
 400         help
 401           This enables support for systems based on the Hynix HMS720x
 402
 403 config ARCH_IOP13XX
 404         bool "IOP13xx-based"
 405         depends on MMU
 406         select CPU_XSC3
 407         select PLAT_IOP
 408         select PCI
 409         select ARCH_SUPPORTS_MSI
 410         select VMSPLIT_1G
 411         help
 412           Support for Intel's IOP13XX (XScale) family of processors.
 413
 414 config ARCH_IOP32X
 415         bool "IOP32x-based"
 416         depends on MMU
 417         select CPU_XSCALE
 418         select PLAT_IOP
 419         select PCI
 420         select ARCH_REQUIRE_GPIOLIB
 421         help
 422           Support for Intel's 80219 and IOP32X (XScale) family of
 423           processors.
 424
 425 config ARCH_IOP33X
 426         bool "IOP33x-based"
 427         depends on MMU
 428         select CPU_XSCALE
 429         select PLAT_IOP
 430         select PCI
 431         select ARCH_REQUIRE_GPIOLIB
 432         help
 433           Support for Intel's IOP33X (XScale) family of processors.
 434
 435 config ARCH_IXP23XX
 436         bool "IXP23XX-based"
 437         depends on MMU
 438         select CPU_XSC3
 439         select PCI
 440         select ARCH_USES_GETTIMEOFFSET
 441         help
 442           Support for Intel's IXP23xx (XScale) family of processors.
 443
 444 config ARCH_IXP2000
 445         bool "IXP2400/2800-based"
 446         depends on MMU
 447         select CPU_XSCALE
 448         select PCI
 449         select ARCH_USES_GETTIMEOFFSET
 450         help
 451           Support for Intel's IXP2400/2800 (XScale) family of processors.
 452
 453 config ARCH_IXP4XX
 454         bool "IXP4xx-based"
 455         depends on MMU
 456         select CPU_XSCALE
 457         select GENERIC_GPIO
 458         select GENERIC_CLOCKEVENTS
 459         select HAVE_SCHED_CLOCK
 460         select MIGHT_HAVE_PCI
 461         select DMABOUNCE if PCI
 462         help
 463           Support for Intel's IXP4XX (XScale) family of processors.
 464
 465 config ARCH_DOVE
 466         bool "Marvell Dove"
 467         select CPU_V6K
 468         select PCI
 469         select ARCH_REQUIRE_GPIOLIB
 470         select GENERIC_CLOCKEVENTS
 471         select PLAT_ORION
 472         help
 473           Support for the Marvell Dove SoC 88AP510
 474
 475 config ARCH_KIRKWOOD
 476         bool "Marvell Kirkwood"
 477         select CPU_FEROCEON
 478         select PCI
 479         select ARCH_REQUIRE_GPIOLIB
 480         select GENERIC_CLOCKEVENTS
 481         select PLAT_ORION
 482         help
 483           Support for the following Marvell Kirkwood series SoCs:
 484           88F6180, 88F6192 and 88F6281.
 485
 486 config ARCH_LOKI
 487         bool "Marvell Loki (88RC8480)"
 488         select CPU_FEROCEON
 489         select GENERIC_CLOCKEVENTS
 490         select PLAT_ORION
 491         help
 492           Support for the Marvell Loki (88RC8480) SoC.
 493
 494 config ARCH_LPC32XX
 495         bool "NXP LPC32XX"
 496         select CPU_ARM926T
 497         select ARCH_REQUIRE_GPIOLIB
 498         select HAVE_IDE
 499         select ARM_AMBA
 500         select USB_ARCH_HAS_OHCI
 501         select CLKDEV_LOOKUP
 502         select GENERIC_TIME
 503         select GENERIC_CLOCKEVENTS
 504         help
 505           Support for the NXP LPC32XX family of processors
 506
 507 config ARCH_MV78XX0
 508         bool "Marvell MV78xx0"
 509         select CPU_FEROCEON
 510         select PCI
 511         select ARCH_REQUIRE_GPIOLIB
 512         select GENERIC_CLOCKEVENTS
 513         select PLAT_ORION
 514         help
 515           Support for the following Marvell MV78xx0 series SoCs:
 516           MV781x0, MV782x0.
 517
 518 config ARCH_ORION5X
 519         bool "Marvell Orion"
 520         depends on MMU
 521         select CPU_FEROCEON
 522         select PCI
 523         select ARCH_REQUIRE_GPIOLIB
 524         select GENERIC_CLOCKEVENTS
 525         select PLAT_ORION
 526         help
 527           Support for the following Marvell Orion 5x series SoCs:
 528           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 529           Orion-2 (5281), Orion-1-90 (6183).
 530
 531 config ARCH_MMP
 532         bool "Marvell PXA168/910/MMP2"
 533         depends on MMU
 534         select ARCH_REQUIRE_GPIOLIB
 535         select CLKDEV_LOOKUP
 536         select GENERIC_CLOCKEVENTS
 537         select HAVE_SCHED_CLOCK
 538         select TICK_ONESHOT
 539         select PLAT_PXA
 540         select SPARSE_IRQ
 541         help
 542           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 543
 544 config ARCH_KS8695
 545         bool "Micrel/Kendin KS8695"
 546         select CPU_ARM922T
 547         select ARCH_REQUIRE_GPIOLIB
 548         select ARCH_USES_GETTIMEOFFSET
 549         help
 550           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 551           System-on-Chip devices.
 552
 553 config ARCH_NS9XXX
 554         bool "NetSilicon NS9xxx"
 555         select CPU_ARM926T
 556         select GENERIC_GPIO
 557         select GENERIC_CLOCKEVENTS
 558         select HAVE_CLK
 559         help
 560           Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
 561           System.
 562
 563           <http://www.digi.com/products/microprocessors/index.jsp>
 564
 565 config ARCH_W90X900
 566         bool "Nuvoton W90X900 CPU"
 567         select CPU_ARM926T
 568         select ARCH_REQUIRE_GPIOLIB
 569         select CLKDEV_LOOKUP
 570         select GENERIC_CLOCKEVENTS
 571         help
 572           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 573           At present, the w90x900 has been renamed nuc900, regarding
 574           the ARM series product line, you can login the following
 575           link address to know more.
 576
 577           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 578                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 579
 580 config ARCH_NUC93X
 581         bool "Nuvoton NUC93X CPU"
 582         select CPU_ARM926T
 583         select CLKDEV_LOOKUP
 584         help
 585           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 586           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 587
 588 config ARCH_TEGRA
 589         bool "NVIDIA Tegra"
 590         select CLKDEV_LOOKUP
 591         select GENERIC_TIME
 592         select GENERIC_CLOCKEVENTS
 593         select GENERIC_GPIO
 594         select HAVE_CLK
 595         select HAVE_SCHED_CLOCK
 596         select ARCH_HAS_BARRIERS if CACHE_L2X0
 597         select ARCH_HAS_CPUFREQ
 598         help
 599           This enables support for NVIDIA Tegra based systems (Tegra APX,
 600           Tegra 6xx and Tegra 2 series).
 601
 602 config ARCH_PNX4008
 603         bool "Philips Nexperia PNX4008 Mobile"
 604         select CPU_ARM926T
 605         select CLKDEV_LOOKUP
 606         select ARCH_USES_GETTIMEOFFSET
 607         help
 608           This enables support for Philips PNX4008 mobile platform.
 609
 610 config ARCH_PXA
 611         bool "PXA2xx/PXA3xx-based"
 612         depends on MMU
 613         select ARCH_MTD_XIP
 614         select ARCH_HAS_CPUFREQ
 615         select CLKDEV_LOOKUP
 616         select ARCH_REQUIRE_GPIOLIB
 617         select GENERIC_CLOCKEVENTS
 618         select HAVE_SCHED_CLOCK
 619         select TICK_ONESHOT
 620         select PLAT_PXA
 621         select SPARSE_IRQ
 622         help
 623           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 624
 625 config ARCH_MSM
 626         bool "Qualcomm MSM"
 627         select HAVE_CLK
 628         select GENERIC_CLOCKEVENTS
 629         select ARCH_REQUIRE_GPIOLIB
 630         select CLKDEV_LOOKUP
 631         help
 632           Support for Qualcomm MSM/QSD based systems.  This runs on the
 633           apps processor of the MSM/QSD and depends on a shared memory
 634           interface to the modem processor which runs the baseband
 635           stack and controls some vital subsystems
 636           (clock and power control, etc).
 637
 638 config ARCH_SHMOBILE
 639         bool "Renesas SH-Mobile / R-Mobile"
 640         select HAVE_CLK
 641         select CLKDEV_LOOKUP
 642         select GENERIC_CLOCKEVENTS
 643         select NO_IOPORT
 644         select SPARSE_IRQ
 645         select MULTI_IRQ_HANDLER
 646         help
 647           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 648
 649 config ARCH_RPC
 650         bool "RiscPC"
 651         select ARCH_ACORN
 652         select FIQ
 653         select TIMER_ACORN
 654         select ARCH_MAY_HAVE_PC_FDC
 655         select HAVE_PATA_PLATFORM
 656         select ISA_DMA_API
 657         select NO_IOPORT
 658         select ARCH_SPARSEMEM_ENABLE
 659         select ARCH_USES_GETTIMEOFFSET
 660         help
 661           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 662           CD-ROM interface, serial and parallel port, and the floppy drive.
 663
 664 config ARCH_SA1100
 665         bool "SA1100-based"
 666         select CPU_SA1100
 667         select ISA
 668         select ARCH_SPARSEMEM_ENABLE
 669         select ARCH_MTD_XIP
 670         select ARCH_HAS_CPUFREQ
 671         select CPU_FREQ
 672         select GENERIC_CLOCKEVENTS
 673         select HAVE_CLK
 674         select HAVE_SCHED_CLOCK
 675         select TICK_ONESHOT
 676         select ARCH_REQUIRE_GPIOLIB
 677         help
 678           Support for StrongARM 11x0 based boards.
 679
 680 config ARCH_S3C2410
 681         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 682         select GENERIC_GPIO
 683         select ARCH_HAS_CPUFREQ
 684         select HAVE_CLK
 685         select ARCH_USES_GETTIMEOFFSET
 686         select HAVE_S3C2410_I2C if I2C
 687         help
 688           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 689           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 690           the Samsung SMDK2410 development board (and derivatives).
 691
 692           Note, the S3C2416 and the S3C2450 are so close that they even share
 693           the same SoC ID code. This means that there is no seperate machine
 694           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 695
 696 config ARCH_S3C64XX
 697         bool "Samsung S3C64XX"
 698         select PLAT_SAMSUNG
 699         select CPU_V6
 700         select ARM_VIC
 701         select HAVE_CLK
 702         select NO_IOPORT
 703         select ARCH_USES_GETTIMEOFFSET
 704         select ARCH_HAS_CPUFREQ
 705         select ARCH_REQUIRE_GPIOLIB
 706         select SAMSUNG_CLKSRC
 707         select SAMSUNG_IRQ_VIC_TIMER
 708         select SAMSUNG_IRQ_UART
 709         select S3C_GPIO_TRACK
 710         select S3C_GPIO_PULL_UPDOWN
 711         select S3C_GPIO_CFG_S3C24XX
 712         select S3C_GPIO_CFG_S3C64XX
 713         select S3C_DEV_NAND
 714         select USB_ARCH_HAS_OHCI
 715         select SAMSUNG_GPIOLIB_4BIT
 716         select HAVE_S3C2410_I2C if I2C
 717         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 718         help
 719           Samsung S3C64XX series based systems
 720
 721 config ARCH_S5P64X0
 722         bool "Samsung S5P6440 S5P6450"
 723         select CPU_V6
 724         select GENERIC_GPIO
 725         select HAVE_CLK
 726         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 727         select GENERIC_CLOCKEVENTS
 728         select HAVE_SCHED_CLOCK
 729         select HAVE_S3C2410_I2C if I2C
 730         select HAVE_S3C_RTC if RTC_CLASS
 731         help
 732           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 733           SMDK6450.
 734
 735 config ARCH_S5P6442
 736         bool "Samsung S5P6442"
 737         select CPU_V6
 738         select GENERIC_GPIO
 739         select HAVE_CLK
 740         select ARCH_USES_GETTIMEOFFSET
 741         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 742         help
 743           Samsung S5P6442 CPU based systems
 744
 745 config ARCH_S5PC100
 746         bool "Samsung S5PC100"
 747         select GENERIC_GPIO
 748         select HAVE_CLK
 749         select CPU_V7
 750         select ARM_L1_CACHE_SHIFT_6
 751         select ARCH_USES_GETTIMEOFFSET
 752         select HAVE_S3C2410_I2C if I2C
 753         select HAVE_S3C_RTC if RTC_CLASS
 754         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 755         help
 756           Samsung S5PC100 series based systems
 757
 758 config ARCH_S5PV210
 759         bool "Samsung S5PV210/S5PC110"
 760         select CPU_V7
 761         select ARCH_SPARSEMEM_ENABLE
 762         select GENERIC_GPIO
 763         select HAVE_CLK
 764         select ARM_L1_CACHE_SHIFT_6
 765         select ARCH_HAS_CPUFREQ
 766         select GENERIC_CLOCKEVENTS
 767         select HAVE_SCHED_CLOCK
 768         select HAVE_S3C2410_I2C if I2C
 769         select HAVE_S3C_RTC if RTC_CLASS
 770         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 771         help
 772           Samsung S5PV210/S5PC110 series based systems
 773
 774 config ARCH_EXYNOS4
 775         bool "Samsung EXYNOS4"
 776         select CPU_V7
 777         select ARCH_SPARSEMEM_ENABLE
 778         select GENERIC_GPIO
 779         select HAVE_CLK
 780         select ARCH_HAS_CPUFREQ
 781         select GENERIC_CLOCKEVENTS
 782         select HAVE_S3C_RTC if RTC_CLASS
 783         select HAVE_S3C2410_I2C if I2C
 784         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 785         help
 786           Samsung EXYNOS4 series based systems
 787
 788 config ARCH_SHARK
 789         bool "Shark"
 790         select CPU_SA110
 791         select ISA
 792         select ISA_DMA
 793         select ZONE_DMA
 794         select PCI
 795         select ARCH_USES_GETTIMEOFFSET
 796         help
 797           Support for the StrongARM based Digital DNARD machine, also known
 798           as "Shark" (<http://www.shark-linux.de/shark.html>).
 799
 800 config ARCH_TCC_926
 801         bool "Telechips TCC ARM926-based systems"
 802         select CPU_ARM926T
 803         select HAVE_CLK
 804         select CLKDEV_LOOKUP
 805         select GENERIC_CLOCKEVENTS
 806         help
 807           Support for Telechips TCC ARM926-based systems.
 808
 809 config ARCH_U300
 810         bool "ST-Ericsson U300 Series"
 811         depends on MMU
 812         select CPU_ARM926T
 813         select HAVE_SCHED_CLOCK
 814         select HAVE_TCM
 815         select ARM_AMBA
 816         select ARM_VIC
 817         select GENERIC_CLOCKEVENTS
 818         select CLKDEV_LOOKUP
 819         select GENERIC_GPIO
 820         help
 821           Support for ST-Ericsson U300 series mobile platforms.
 822
 823 config ARCH_U8500
 824         bool "ST-Ericsson U8500 Series"
 825         select CPU_V7
 826         select ARM_AMBA
 827         select GENERIC_CLOCKEVENTS
 828         select CLKDEV_LOOKUP
 829         select ARCH_REQUIRE_GPIOLIB
 830         select ARCH_HAS_CPUFREQ
 831         help
 832           Support for ST-Ericsson's Ux500 architecture
 833
 834 config ARCH_NOMADIK
 835         bool "STMicroelectronics Nomadik"
 836         select ARM_AMBA
 837         select ARM_VIC
 838         select CPU_ARM926T
 839         select CLKDEV_LOOKUP
 840         select GENERIC_CLOCKEVENTS
 841         select ARCH_REQUIRE_GPIOLIB
 842         help
 843           Support for the Nomadik platform by ST-Ericsson
 844
 845 config ARCH_DAVINCI
 846         bool "TI DaVinci"
 847         select GENERIC_CLOCKEVENTS
 848         select ARCH_REQUIRE_GPIOLIB
 849         select ZONE_DMA
 850         select HAVE_IDE
 851         select CLKDEV_LOOKUP
 852         select GENERIC_ALLOCATOR
 853         select ARCH_HAS_HOLES_MEMORYMODEL
 854         help
 855           Support for TI's DaVinci platform.
 856
 857 config ARCH_OMAP
 858         bool "TI OMAP"
 859         select HAVE_CLK
 860         select ARCH_REQUIRE_GPIOLIB
 861         select ARCH_HAS_CPUFREQ
 862         select GENERIC_CLOCKEVENTS
 863         select HAVE_SCHED_CLOCK
 864         select ARCH_HAS_HOLES_MEMORYMODEL
 865         help
 866           Support for TI's OMAP platform (OMAP1/2/3/4).
 867
 868 config PLAT_SPEAR
 869         bool "ST SPEAr"
 870         select ARM_AMBA
 871         select ARCH_REQUIRE_GPIOLIB
 872         select CLKDEV_LOOKUP
 873         select GENERIC_CLOCKEVENTS
 874         select HAVE_CLK
 875         help
 876           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 877
 878 config ARCH_VT8500
 879         bool "VIA/WonderMedia 85xx"
 880         select CPU_ARM926T
 881         select GENERIC_GPIO
 882         select ARCH_HAS_CPUFREQ
 883         select GENERIC_CLOCKEVENTS
 884         select ARCH_REQUIRE_GPIOLIB
 885         select HAVE_PWM
 886         help
 887           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 888 endchoice
 889
 890 #
 891 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 892 # Kconfigs may be included either alphabetically (according to the
 893 # plat- suffix) or along side the corresponding mach-* source.
 894 #
 895 source "arch/arm/mach-at91/Kconfig"
 896
 897 source "arch/arm/mach-bcmring/Kconfig"
 898
 899 source "arch/arm/mach-clps711x/Kconfig"
 900
 901 source "arch/arm/mach-cns3xxx/Kconfig"
 902
 903 source "arch/arm/mach-davinci/Kconfig"
 904
 905 source "arch/arm/mach-dove/Kconfig"
 906
 907 source "arch/arm/mach-ep93xx/Kconfig"
 908
 909 source "arch/arm/mach-footbridge/Kconfig"
 910
 911 source "arch/arm/mach-gemini/Kconfig"
 912
 913 source "arch/arm/mach-h720x/Kconfig"
 914
 915 source "arch/arm/mach-integrator/Kconfig"
 916
 917 source "arch/arm/mach-iop32x/Kconfig"
 918
 919 source "arch/arm/mach-iop33x/Kconfig"
 920
 921 source "arch/arm/mach-iop13xx/Kconfig"
 922
 923 source "arch/arm/mach-ixp4xx/Kconfig"
 924
 925 source "arch/arm/mach-ixp2000/Kconfig"
 926
 927 source "arch/arm/mach-ixp23xx/Kconfig"
 928
 929 source "arch/arm/mach-kirkwood/Kconfig"
 930
 931 source "arch/arm/mach-ks8695/Kconfig"
 932
 933 source "arch/arm/mach-loki/Kconfig"
 934
 935 source "arch/arm/mach-lpc32xx/Kconfig"
 936
 937 source "arch/arm/mach-msm/Kconfig"
 938
 939 source "arch/arm/mach-mv78xx0/Kconfig"
 940
 941 source "arch/arm/plat-mxc/Kconfig"
 942
 943 source "arch/arm/mach-mxs/Kconfig"
 944
 945 source "arch/arm/mach-netx/Kconfig"
 946
 947 source "arch/arm/mach-nomadik/Kconfig"
 948 source "arch/arm/plat-nomadik/Kconfig"
 949
 950 source "arch/arm/mach-ns9xxx/Kconfig"
 951
 952 source "arch/arm/mach-nuc93x/Kconfig"
 953
 954 source "arch/arm/plat-omap/Kconfig"
 955
 956 source "arch/arm/mach-omap1/Kconfig"
 957
 958 source "arch/arm/mach-omap2/Kconfig"
 959
 960 source "arch/arm/mach-orion5x/Kconfig"
 961
 962 source "arch/arm/mach-pxa/Kconfig"
 963 source "arch/arm/plat-pxa/Kconfig"
 964
 965 source "arch/arm/mach-mmp/Kconfig"
 966
 967 source "arch/arm/mach-realview/Kconfig"
 968
 969 source "arch/arm/mach-sa1100/Kconfig"
 970
 971 source "arch/arm/plat-samsung/Kconfig"
 972 source "arch/arm/plat-s3c24xx/Kconfig"
 973 source "arch/arm/plat-s5p/Kconfig"
 974
 975 source "arch/arm/plat-spear/Kconfig"
 976
 977 source "arch/arm/plat-tcc/Kconfig"
 978
 979 if ARCH_S3C2410
 980 source "arch/arm/mach-s3c2400/Kconfig"
 981 source "arch/arm/mach-s3c2410/Kconfig"
 982 source "arch/arm/mach-s3c2412/Kconfig"
 983 source "arch/arm/mach-s3c2416/Kconfig"
 984 source "arch/arm/mach-s3c2440/Kconfig"
 985 source "arch/arm/mach-s3c2443/Kconfig"
 986 endif
 987
 988 if ARCH_S3C64XX
 989 source "arch/arm/mach-s3c64xx/Kconfig"
 990 endif
 991
 992 source "arch/arm/mach-s5p64x0/Kconfig"
 993
 994 source "arch/arm/mach-s5p6442/Kconfig"
 995
 996 source "arch/arm/mach-s5pc100/Kconfig"
 997
 998 source "arch/arm/mach-s5pv210/Kconfig"
 999
1000 source "arch/arm/mach-exynos4/Kconfig"
1001
1002 source "arch/arm/mach-shmobile/Kconfig"
1003
1004 source "arch/arm/plat-stmp3xxx/Kconfig"
1005
1006 source "arch/arm/mach-tegra/Kconfig"
1007
1008 source "arch/arm/mach-u300/Kconfig"
1009
1010 source "arch/arm/mach-ux500/Kconfig"
1011
1012 source "arch/arm/mach-versatile/Kconfig"
1013
1014 source "arch/arm/mach-vexpress/Kconfig"
1015
1016 source "arch/arm/mach-vt8500/Kconfig"
1017
1018 source "arch/arm/mach-w90x900/Kconfig"
1019
1020 # Definitions to make life easier
1021 config ARCH_ACORN
1022         bool
1023
1024 config PLAT_IOP
1025         bool
1026         select GENERIC_CLOCKEVENTS
1027         select HAVE_SCHED_CLOCK
1028
1029 config PLAT_ORION
1030         bool
1031         select HAVE_SCHED_CLOCK
1032
1033 config PLAT_PXA
1034         bool
1035
1036 config PLAT_VERSATILE
1037         bool
1038
1039 config ARM_TIMER_SP804
1040         bool
1041
1042 source arch/arm/mm/Kconfig
1043
1044 config IWMMXT
1045         bool "Enable iWMMXt support"
1046         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1047         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1048         help
1049           Enable support for iWMMXt context switching at run time if
1050           running on a CPU that supports it.
1051
1052 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1053 config XSCALE_PMU
1054         bool
1055         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1056         default y
1057
1058 config CPU_HAS_PMU
1059         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1060                    (!ARCH_OMAP3 || OMAP3_EMU)
1061         default y
1062         bool
1063
1064 config MULTI_IRQ_HANDLER
1065         bool
1066         help
1067           Allow each machine to specify it's own IRQ handler at run time.
1068
1069 if !MMU
1070 source "arch/arm/Kconfig-nommu"
1071 endif
1072
1073 config ARM_ERRATA_411920
1074         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1075         depends on CPU_V6 || CPU_V6K
1076         help
1077           Invalidation of the Instruction Cache operation can
1078           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1079           It does not affect the MPCore. This option enables the ARM Ltd.
1080           recommended workaround.
1081
1082 config ARM_ERRATA_430973
1083         bool "ARM errata: Stale prediction on replaced interworking branch"
1084         depends on CPU_V7
1085         help
1086           This option enables the workaround for the 430973 Cortex-A8
1087           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1088           interworking branch is replaced with another code sequence at the
1089           same virtual address, whether due to self-modifying code or virtual
1090           to physical address re-mapping, Cortex-A8 does not recover from the
1091           stale interworking branch prediction. This results in Cortex-A8
1092           executing the new code sequence in the incorrect ARM or Thumb state.
1093           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1094           and also flushes the branch target cache at every context switch.
1095           Note that setting specific bits in the ACTLR register may not be
1096           available in non-secure mode.
1097
1098 config ARM_ERRATA_458693
1099         bool "ARM errata: Processor deadlock when a false hazard is created"
1100         depends on CPU_V7
1101         help
1102           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1103           erratum. For very specific sequences of memory operations, it is
1104           possible for a hazard condition intended for a cache line to instead
1105           be incorrectly associated with a different cache line. This false
1106           hazard might then cause a processor deadlock. The workaround enables
1107           the L1 caching of the NEON accesses and disables the PLD instruction
1108           in the ACTLR register. Note that setting specific bits in the ACTLR
1109           register may not be available in non-secure mode.
1110
1111 config ARM_ERRATA_460075
1112         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1113         depends on CPU_V7
1114         help
1115           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1116           erratum. Any asynchronous access to the L2 cache may encounter a
1117           situation in which recent store transactions to the L2 cache are lost
1118           and overwritten with stale memory contents from external memory. The
1119           workaround disables the write-allocate mode for the L2 cache via the
1120           ACTLR register. Note that setting specific bits in the ACTLR register
1121           may not be available in non-secure mode.
1122
1123 config ARM_ERRATA_742230
1124         bool "ARM errata: DMB operation may be faulty"
1125         depends on CPU_V7 && SMP
1126         help
1127           This option enables the workaround for the 742230 Cortex-A9
1128           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1129           between two write operations may not ensure the correct visibility
1130           ordering of the two writes. This workaround sets a specific bit in
1131           the diagnostic register of the Cortex-A9 which causes the DMB
1132           instruction to behave as a DSB, ensuring the correct behaviour of
1133           the two writes.
1134
1135 config ARM_ERRATA_742231
1136         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1137         depends on CPU_V7 && SMP
1138         help
1139           This option enables the workaround for the 742231 Cortex-A9
1140           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1141           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1142           accessing some data located in the same cache line, may get corrupted
1143           data due to bad handling of the address hazard when the line gets
1144           replaced from one of the CPUs at the same time as another CPU is
1145           accessing it. This workaround sets specific bits in the diagnostic
1146           register of the Cortex-A9 which reduces the linefill issuing
1147           capabilities of the processor.
1148
1149 config PL310_ERRATA_588369
1150         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1151         depends on CACHE_L2X0
1152         help
1153            The PL310 L2 cache controller implements three types of Clean &
1154            Invalidate maintenance operations: by Physical Address
1155            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1156            They are architecturally defined to behave as the execution of a
1157            clean operation followed immediately by an invalidate operation,
1158            both performing to the same memory location. This functionality
1159            is not correctly implemented in PL310 as clean lines are not
1160            invalidated as a result of these operations.
1161
1162 config ARM_ERRATA_720789
1163         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1164         depends on CPU_V7 && SMP
1165         help
1166           This option enables the workaround for the 720789 Cortex-A9 (prior to
1167           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1168           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1169           As a consequence of this erratum, some TLB entries which should be
1170           invalidated are not, resulting in an incoherency in the system page
1171           tables. The workaround changes the TLB flushing routines to invalidate
1172           entries regardless of the ASID.
1173
1174 config PL310_ERRATA_727915
1175         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1176         depends on CACHE_L2X0
1177         help
1178           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1179           operation (offset 0x7FC). This operation runs in background so that
1180           PL310 can handle normal accesses while it is in progress. Under very
1181           rare circumstances, due to this erratum, write data can be lost when
1182           PL310 treats a cacheable write transaction during a Clean &
1183           Invalidate by Way operation.
1184
1185 config ARM_ERRATA_743622
1186         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1187         depends on CPU_V7
1188         help
1189           This option enables the workaround for the 743622 Cortex-A9
1190           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1191           optimisation in the Cortex-A9 Store Buffer may lead to data
1192           corruption. This workaround sets a specific bit in the diagnostic
1193           register of the Cortex-A9 which disables the Store Buffer
1194           optimisation, preventing the defect from occurring. This has no
1195           visible impact on the overall performance or power consumption of the
1196           processor.
1197
1198 config ARM_ERRATA_751472
1199         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1200         depends on CPU_V7 && SMP
1201         help
1202           This option enables the workaround for the 751472 Cortex-A9 (prior
1203           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1204           completion of a following broadcasted operation if the second
1205           operation is received by a CPU before the ICIALLUIS has completed,
1206           potentially leading to corrupted entries in the cache or TLB.
1207
1208 config ARM_ERRATA_753970
1209         bool "ARM errata: cache sync operation may be faulty"
1210         depends on CACHE_PL310
1211         help
1212           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1213
1214           Under some condition the effect of cache sync operation on
1215           the store buffer still remains when the operation completes.
1216           This means that the store buffer is always asked to drain and
1217           this prevents it from merging any further writes. The workaround
1218           is to replace the normal offset of cache sync operation (0x730)
1219           by another offset targeting an unmapped PL310 register 0x740.
1220           This has the same effect as the cache sync operation: store buffer
1221           drain and waiting for all buffers empty.
1222
1223 config ARM_ERRATA_754322
1224         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1225         depends on CPU_V7
1226         help
1227           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1228           r3p*) erratum. A speculative memory access may cause a page table walk
1229           which starts prior to an ASID switch but completes afterwards. This
1230           can populate the micro-TLB with a stale entry which may be hit with
1231           the new ASID. This workaround places two dsb instructions in the mm
1232           switching code so that no page table walks can cross the ASID switch.
1233
1234 config ARM_ERRATA_754327
1235         bool "ARM errata: no automatic Store Buffer drain"
1236         depends on CPU_V7 && SMP
1237         help
1238           This option enables the workaround for the 754327 Cortex-A9 (prior to
1239           r2p0) erratum. The Store Buffer does not have any automatic draining
1240           mechanism and therefore a livelock may occur if an external agent
1241           continuously polls a memory location waiting to observe an update.
1242           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1243           written polling loops from denying visibility of updates to memory.
1244
1245 endmenu
1246
1247 source "arch/arm/common/Kconfig"
1248
1249 menu "Bus support"
1250
1251 config ARM_AMBA
1252         bool
1253
1254 config ISA
1255         bool
1256         help
1257           Find out whether you have ISA slots on your motherboard.  ISA is the
1258           name of a bus system, i.e. the way the CPU talks to the other stuff
1259           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1260           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1261           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1262
1263 # Select ISA DMA controller support
1264 config ISA_DMA
1265         bool
1266         select ISA_DMA_API
1267
1268 # Select ISA DMA interface
1269 config ISA_DMA_API
1270         bool
1271
1272 config PCI
1273         bool "PCI support" if MIGHT_HAVE_PCI
1274         help
1275           Find out whether you have a PCI motherboard. PCI is the name of a
1276           bus system, i.e. the way the CPU talks to the other stuff inside
1277           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1278           VESA. If you have PCI, say Y, otherwise N.
1279
1280 config PCI_DOMAINS
1281         bool
1282         depends on PCI
1283
1284 config PCI_NANOENGINE
1285         bool "BSE nanoEngine PCI support"
1286         depends on SA1100_NANOENGINE
1287         help
1288           Enable PCI on the BSE nanoEngine board.
1289
1290 config PCI_SYSCALL
1291         def_bool PCI
1292
1293 # Select the host bridge type
1294 config PCI_HOST_VIA82C505
1295         bool
1296         depends on PCI && ARCH_SHARK
1297         default y
1298
1299 config PCI_HOST_ITE8152
1300         bool
1301         depends on PCI && MACH_ARMCORE
1302         default y
1303         select DMABOUNCE
1304
1305 source "drivers/pci/Kconfig"
1306
1307 source "drivers/pcmcia/Kconfig"
1308
1309 endmenu
1310
1311 menu "Kernel Features"
1312
1313 source "kernel/time/Kconfig"
1314
1315 config SMP
1316         bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1317         depends on EXPERIMENTAL
1318         depends on CPU_V6K || CPU_V7
1319         depends on GENERIC_CLOCKEVENTS
1320         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1321                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1322                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1323                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1324         select USE_GENERIC_SMP_HELPERS
1325         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1326         help
1327           This enables support for systems with more than one CPU. If you have
1328           a system with only one CPU, like most personal computers, say N. If
1329           you have a system with more than one CPU, say Y.
1330
1331           If you say N here, the kernel will run on single and multiprocessor
1332           machines, but will use only one CPU of a multiprocessor machine. If
1333           you say Y here, the kernel will run on many, but not all, single
1334           processor machines. On a single processor machine, the kernel will
1335           run faster if you say N here.
1336
1337           See also <file:Documentation/i386/IO-APIC.txt>,
1338           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1339           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1340
1341           If you don't know what to do here, say N.
1342
1343 config SMP_ON_UP
1344         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1345         depends on EXPERIMENTAL
1346         depends on SMP && !XIP_KERNEL
1347         default y
1348         help
1349           SMP kernels contain instructions which fail on non-SMP processors.
1350           Enabling this option allows the kernel to modify itself to make
1351           these instructions safe.  Disabling it allows about 1K of space
1352           savings.
1353
1354           If you don't know what to do here, say Y.
1355
1356 config HAVE_ARM_SCU
1357         bool
1358         depends on SMP
1359         help
1360           This option enables support for the ARM system coherency unit
1361
1362 config HAVE_ARM_TWD
1363         bool
1364         depends on SMP
1365         select TICK_ONESHOT
1366         help
1367           This options enables support for the ARM timer and watchdog unit
1368
1369 choice
1370         prompt "Memory split"
1371         default VMSPLIT_3G
1372         help
1373           Select the desired split between kernel and user memory.
1374
1375           If you are not absolutely sure what you are doing, leave this
1376           option alone!
1377
1378         config VMSPLIT_3G
1379                 bool "3G/1G user/kernel split"
1380         config VMSPLIT_2G
1381                 bool "2G/2G user/kernel split"
1382         config VMSPLIT_1G
1383                 bool "1G/3G user/kernel split"
1384 endchoice
1385
1386 config PAGE_OFFSET
1387         hex
1388         default 0x40000000 if VMSPLIT_1G
1389         default 0x80000000 if VMSPLIT_2G
1390         default 0xC0000000
1391
1392 config NR_CPUS
1393         int "Maximum number of CPUs (2-32)"
1394         range 2 32
1395         depends on SMP
1396         default "4"
1397
1398 config HOTPLUG_CPU
1399         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1400         depends on SMP && HOTPLUG && EXPERIMENTAL
1401         depends on !ARCH_MSM
1402         help
1403           Say Y here to experiment with turning CPUs off and on.  CPUs
1404           can be controlled through /sys/devices/system/cpu.
1405
1406 config LOCAL_TIMERS
1407         bool "Use local timer interrupts"
1408         depends on SMP
1409         default y
1410         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1411         help
1412           Enable support for local timers on SMP platforms, rather then the
1413           legacy IPI broadcast method.  Local timers allows the system
1414           accounting to be spread across the timer interval, preventing a
1415           "thundering herd" at every timer tick.
1416
1417 source kernel/Kconfig.preempt
1418
1419 config HZ
1420         int
1421         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1422                 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
1423         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1424         default AT91_TIMER_HZ if ARCH_AT91
1425         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1426         default 100
1427
1428 config THUMB2_KERNEL
1429         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1430         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1431         select AEABI
1432         select ARM_ASM_UNIFIED
1433         help
1434           By enabling this option, the kernel will be compiled in
1435           Thumb-2 mode. A compiler/assembler that understand the unified
1436           ARM-Thumb syntax is needed.
1437
1438           If unsure, say N.
1439
1440 config THUMB2_AVOID_R_ARM_THM_JUMP11
1441         bool "Work around buggy Thumb-2 short branch relocations in gas"
1442         depends on THUMB2_KERNEL && MODULES
1443         default y
1444         help
1445           Various binutils versions can resolve Thumb-2 branches to
1446           locally-defined, preemptible global symbols as short-range "b.n"
1447           branch instructions.
1448
1449           This is a problem, because there's no guarantee the final
1450           destination of the symbol, or any candidate locations for a
1451           trampoline, are within range of the branch.  For this reason, the
1452           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1453           relocation in modules at all, and it makes little sense to add
1454           support.
1455
1456           The symptom is that the kernel fails with an "unsupported
1457           relocation" error when loading some modules.
1458
1459           Until fixed tools are available, passing
1460           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1461           code which hits this problem, at the cost of a bit of extra runtime
1462           stack usage in some cases.
1463
1464           The problem is described in more detail at:
1465               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1466
1467           Only Thumb-2 kernels are affected.
1468
1469           Unless you are sure your tools don't have this problem, say Y.
1470
1471 config ARM_ASM_UNIFIED
1472         bool
1473
1474 config AEABI
1475         bool "Use the ARM EABI to compile the kernel"
1476         help
1477           This option allows for the kernel to be compiled using the latest
1478           ARM ABI (aka EABI).  This is only useful if you are using a user
1479           space environment that is also compiled with EABI.
1480
1481           Since there are major incompatibilities between the legacy ABI and
1482           EABI, especially with regard to structure member alignment, this
1483           option also changes the kernel syscall calling convention to
1484           disambiguate both ABIs and allow for backward compatibility support
1485           (selected with CONFIG_OABI_COMPAT).
1486
1487           To use this you need GCC version 4.0.0 or later.
1488
1489 config OABI_COMPAT
1490         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1491         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1492         default y
1493         help
1494           This option preserves the old syscall interface along with the
1495           new (ARM EABI) one. It also provides a compatibility layer to
1496           intercept syscalls that have structure arguments which layout
1497           in memory differs between the legacy ABI and the new ARM EABI
1498           (only for non "thumb" binaries). This option adds a tiny
1499           overhead to all syscalls and produces a slightly larger kernel.
1500           If you know you'll be using only pure EABI user space then you
1501           can say N here. If this option is not selected and you attempt
1502           to execute a legacy ABI binary then the result will be
1503           UNPREDICTABLE (in fact it can be predicted that it won't work
1504           at all). If in doubt say Y.
1505
1506 config ARCH_HAS_HOLES_MEMORYMODEL
1507         bool
1508
1509 config ARCH_SPARSEMEM_ENABLE
1510         bool
1511
1512 config ARCH_SPARSEMEM_DEFAULT
1513         def_bool ARCH_SPARSEMEM_ENABLE
1514
1515 config ARCH_SELECT_MEMORY_MODEL
1516         def_bool ARCH_SPARSEMEM_ENABLE
1517
1518 config HIGHMEM
1519         bool "High Memory Support (EXPERIMENTAL)"
1520         depends on MMU && EXPERIMENTAL
1521         help
1522           The address space of ARM processors is only 4 Gigabytes large
1523           and it has to accommodate user address space, kernel address
1524           space as well as some memory mapped IO. That means that, if you
1525           have a large amount of physical memory and/or IO, not all of the
1526           memory can be "permanently mapped" by the kernel. The physical
1527           memory that is not permanently mapped is called "high memory".
1528
1529           Depending on the selected kernel/user memory split, minimum
1530           vmalloc space and actual amount of RAM, you may not need this
1531           option which should result in a slightly faster kernel.
1532
1533           If unsure, say n.
1534
1535 config HIGHPTE
1536         bool "Allocate 2nd-level pagetables from highmem"
1537         depends on HIGHMEM
1538         depends on !OUTER_CACHE
1539
1540 config HW_PERF_EVENTS
1541         bool "Enable hardware performance counter support for perf events"
1542         depends on PERF_EVENTS && CPU_HAS_PMU
1543         default y
1544         help
1545           Enable hardware performance counter support for perf events. If
1546           disabled, perf events will use software events only.
1547
1548 source "mm/Kconfig"
1549
1550 config FORCE_MAX_ZONEORDER
1551         int "Maximum zone order" if ARCH_SHMOBILE
1552         range 11 64 if ARCH_SHMOBILE
1553         default "9" if SA1111
1554         default "11"
1555         help
1556           The kernel memory allocator divides physically contiguous memory
1557           blocks into "zones", where each zone is a power of two number of
1558           pages.  This option selects the largest power of two that the kernel
1559           keeps in the memory allocator.  If you need to allocate very large
1560           blocks of physically contiguous memory, then you may need to
1561           increase this value.
1562
1563           This config option is actually maximum order plus one. For example,
1564           a value of 11 means that the largest free memory block is 2^10 pages.
1565
1566 config LEDS
1567         bool "Timer and CPU usage LEDs"
1568         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1569                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1570                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1571                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1572                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1573                    ARCH_AT91 || ARCH_DAVINCI || \
1574                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1575         help
1576           If you say Y here, the LEDs on your machine will be used
1577           to provide useful information about your current system status.
1578
1579           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1580           be able to select which LEDs are active using the options below. If
1581           you are compiling a kernel for the EBSA-110 or the LART however, the
1582           red LED will simply flash regularly to indicate that the system is
1583           still functional. It is safe to say Y here if you have a CATS
1584           system, but the driver will do nothing.
1585
1586 config LEDS_TIMER
1587         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1588                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1589                             || MACH_OMAP_PERSEUS2
1590         depends on LEDS
1591         depends on !GENERIC_CLOCKEVENTS
1592         default y if ARCH_EBSA110
1593         help
1594           If you say Y here, one of the system LEDs (the green one on the
1595           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1596           will flash regularly to indicate that the system is still
1597           operational. This is mainly useful to kernel hackers who are
1598           debugging unstable kernels.
1599
1600           The LART uses the same LED for both Timer LED and CPU usage LED
1601           functions. You may choose to use both, but the Timer LED function
1602           will overrule the CPU usage LED.
1603
1604 config LEDS_CPU
1605         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1606                         !ARCH_OMAP) \
1607                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1608                         || MACH_OMAP_PERSEUS2
1609         depends on LEDS
1610         help
1611           If you say Y here, the red LED will be used to give a good real
1612           time indication of CPU usage, by lighting whenever the idle task
1613           is not currently executing.
1614
1615           The LART uses the same LED for both Timer LED and CPU usage LED
1616           functions. You may choose to use both, but the Timer LED function
1617           will overrule the CPU usage LED.
1618
1619 config ALIGNMENT_TRAP
1620         bool
1621         depends on CPU_CP15_MMU
1622         default y if !ARCH_EBSA110
1623         select HAVE_PROC_CPU if PROC_FS
1624         help
1625           ARM processors cannot fetch/store information which is not
1626           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1627           address divisible by 4. On 32-bit ARM processors, these non-aligned
1628           fetch/store instructions will be emulated in software if you say
1629           here, which has a severe performance impact. This is necessary for
1630           correct operation of some network protocols. With an IP-only
1631           configuration it is safe to say N, otherwise say Y.
1632
1633 config UACCESS_WITH_MEMCPY
1634         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1635         depends on MMU && EXPERIMENTAL
1636         default y if CPU_FEROCEON
1637         help
1638           Implement faster copy_to_user and clear_user methods for CPU
1639           cores where a 8-word STM instruction give significantly higher
1640           memory write throughput than a sequence of individual 32bit stores.
1641
1642           A possible side effect is a slight increase in scheduling latency
1643           between threads sharing the same address space if they invoke
1644           such copy operations with large buffers.
1645
1646           However, if the CPU data cache is using a write-allocate mode,
1647           this option is unlikely to provide any performance gain.
1648
1649 config SECCOMP
1650         bool
1651         prompt "Enable seccomp to safely compute untrusted bytecode"
1652         ---help---
1653           This kernel feature is useful for number crunching applications
1654           that may need to compute untrusted bytecode during their
1655           execution. By using pipes or other transports made available to
1656           the process as file descriptors supporting the read/write
1657           syscalls, it's possible to isolate those applications in
1658           their own address space using seccomp. Once seccomp is
1659           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1660           and the task is only allowed to execute a few safe syscalls
1661           defined by each seccomp mode.
1662
1663 config CC_STACKPROTECTOR
1664         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1665         depends on EXPERIMENTAL
1666         help
1667           This option turns on the -fstack-protector GCC feature. This
1668           feature puts, at the beginning of functions, a canary value on
1669           the stack just before the return address, and validates
1670           the value just before actually returning.  Stack based buffer
1671           overflows (that need to overwrite this return address) now also
1672           overwrite the canary, which gets detected and the attack is then
1673           neutralized via a kernel panic.
1674           This feature requires gcc version 4.2 or above.
1675
1676 config DEPRECATED_PARAM_STRUCT
1677         bool "Provide old way to pass kernel parameters"
1678         help
1679           This was deprecated in 2001 and announced to live on for 5 years.
1680           Some old boot loaders still use this way.
1681
1682 endmenu
1683
1684 menu "Boot options"
1685
1686 # Compressed boot loader in ROM.  Yes, we really want to ask about
1687 # TEXT and BSS so we preserve their values in the config files.
1688 config ZBOOT_ROM_TEXT
1689         hex "Compressed ROM boot loader base address"
1690         default "0"
1691         help
1692           The physical address at which the ROM-able zImage is to be
1693           placed in the target.  Platforms which normally make use of
1694           ROM-able zImage formats normally set this to a suitable
1695           value in their defconfig file.
1696
1697           If ZBOOT_ROM is not enabled, this has no effect.
1698
1699 config ZBOOT_ROM_BSS
1700         hex "Compressed ROM boot loader BSS address"
1701         default "0"
1702         help
1703           The base address of an area of read/write memory in the target
1704           for the ROM-able zImage which must be available while the
1705           decompressor is running. It must be large enough to hold the
1706           entire decompressed kernel plus an additional 128 KiB.
1707           Platforms which normally make use of ROM-able zImage formats
1708           normally set this to a suitable value in their defconfig file.
1709
1710           If ZBOOT_ROM is not enabled, this has no effect.
1711
1712 config ZBOOT_ROM
1713         bool "Compressed boot loader in ROM/flash"
1714         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1715         help
1716           Say Y here if you intend to execute your compressed kernel image
1717           (zImage) directly from ROM or flash.  If unsure, say N.
1718
1719 config ZBOOT_ROM_MMCIF
1720         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1721         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1722         help
1723           Say Y here to include experimental MMCIF loading code in the
1724           ROM-able zImage. With this enabled it is possible to write the
1725           the ROM-able zImage kernel image to an MMC card and boot the
1726           kernel straight from the reset vector. At reset the processor
1727           Mask ROM will load the first part of the the ROM-able zImage
1728           which in turn loads the rest the kernel image to RAM using the
1729           MMCIF hardware block.
1730
1731 config CMDLINE
1732         string "Default kernel command string"
1733         default ""
1734         help
1735           On some architectures (EBSA110 and CATS), there is currently no way
1736           for the boot loader to pass arguments to the kernel. For these
1737           architectures, you should supply some command-line options at build
1738           time by entering them here. As a minimum, you should specify the
1739           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1740
1741 config CMDLINE_FORCE
1742         bool "Always use the default kernel command string"
1743         depends on CMDLINE != ""
1744         help
1745           Always use the default kernel command string, even if the boot
1746           loader passes other arguments to the kernel.
1747           This is useful if you cannot or don't want to change the
1748           command-line options your boot loader passes to the kernel.
1749
1750           If unsure, say N.
1751
1752 config XIP_KERNEL
1753         bool "Kernel Execute-In-Place from ROM"
1754         depends on !ZBOOT_ROM
1755         help
1756           Execute-In-Place allows the kernel to run from non-volatile storage
1757           directly addressable by the CPU, such as NOR flash. This saves RAM
1758           space since the text section of the kernel is not loaded from flash
1759           to RAM.  Read-write sections, such as the data section and stack,
1760           are still copied to RAM.  The XIP kernel is not compressed since
1761           it has to run directly from flash, so it will take more space to
1762           store it.  The flash address used to link the kernel object files,
1763           and for storing it, is configuration dependent. Therefore, if you
1764           say Y here, you must know the proper physical address where to
1765           store the kernel image depending on your own flash memory usage.
1766
1767           Also note that the make target becomes "make xipImage" rather than
1768           "make zImage" or "make Image".  The final kernel binary to put in
1769           ROM memory will be arch/arm/boot/xipImage.
1770
1771           If unsure, say N.
1772
1773 config XIP_PHYS_ADDR
1774         hex "XIP Kernel Physical Location"
1775         depends on XIP_KERNEL
1776         default "0x00080000"
1777         help
1778           This is the physical address in your flash memory the kernel will
1779           be linked for and stored to.  This address is dependent on your
1780           own flash usage.
1781
1782 config KEXEC
1783         bool "Kexec system call (EXPERIMENTAL)"
1784         depends on EXPERIMENTAL
1785         help
1786           kexec is a system call that implements the ability to shutdown your
1787           current kernel, and to start another kernel.  It is like a reboot
1788           but it is independent of the system firmware.   And like a reboot
1789           you can start any kernel with it, not just Linux.
1790
1791           It is an ongoing process to be certain the hardware in a machine
1792           is properly shutdown, so do not be surprised if this code does not
1793           initially work for you.  It may help to enable device hotplugging
1794           support.
1795
1796 config ATAGS_PROC
1797         bool "Export atags in procfs"
1798         depends on KEXEC
1799         default y
1800         help
1801           Should the atags used to boot the kernel be exported in an "atags"
1802           file in procfs. Useful with kexec.
1803
1804 config CRASH_DUMP
1805         bool "Build kdump crash kernel (EXPERIMENTAL)"
1806         depends on EXPERIMENTAL
1807         help
1808           Generate crash dump after being started by kexec. This should
1809           be normally only set in special crash dump kernels which are
1810           loaded in the main kernel with kexec-tools into a specially
1811           reserved region and then later executed after a crash by
1812           kdump/kexec. The crash dump kernel must be compiled to a
1813           memory address not used by the main kernel
1814
1815           For more details see Documentation/kdump/kdump.txt
1816
1817 config AUTO_ZRELADDR
1818         bool "Auto calculation of the decompressed kernel image address"
1819         depends on !ZBOOT_ROM && !ARCH_U300
1820         help
1821           ZRELADDR is the physical address where the decompressed kernel
1822           image will be placed. If AUTO_ZRELADDR is selected, the address
1823           will be determined at run-time by masking the current IP with
1824           0xf8000000. This assumes the zImage being placed in the first 128MB
1825           from start of memory.
1826
1827 endmenu
1828
1829 menu "CPU Power Management"
1830
1831 if ARCH_HAS_CPUFREQ
1832
1833 source "drivers/cpufreq/Kconfig"
1834
1835 config CPU_FREQ_IMX
1836         tristate "CPUfreq driver for i.MX CPUs"
1837         depends on ARCH_MXC && CPU_FREQ
1838         help
1839           This enables the CPUfreq driver for i.MX CPUs.
1840
1841 config CPU_FREQ_SA1100
1842         bool
1843
1844 config CPU_FREQ_SA1110
1845         bool
1846
1847 config CPU_FREQ_INTEGRATOR
1848         tristate "CPUfreq driver for ARM Integrator CPUs"
1849         depends on ARCH_INTEGRATOR && CPU_FREQ
1850         default y
1851         help
1852           This enables the CPUfreq driver for ARM Integrator CPUs.
1853
1854           For details, take a look at <file:Documentation/cpu-freq>.
1855
1856           If in doubt, say Y.
1857
1858 config CPU_FREQ_PXA
1859         bool
1860         depends on CPU_FREQ && ARCH_PXA && PXA25x
1861         default y
1862         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1863
1864 config CPU_FREQ_S3C64XX
1865         bool "CPUfreq support for Samsung S3C64XX CPUs"
1866         depends on CPU_FREQ && CPU_S3C6410
1867
1868 config CPU_FREQ_S3C
1869         bool
1870         help
1871           Internal configuration node for common cpufreq on Samsung SoC
1872
1873 config CPU_FREQ_S3C24XX
1874         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1875         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1876         select CPU_FREQ_S3C
1877         help
1878           This enables the CPUfreq driver for the Samsung S3C24XX family
1879           of CPUs.
1880
1881           For details, take a look at <file:Documentation/cpu-freq>.
1882
1883           If in doubt, say N.
1884
1885 config CPU_FREQ_S3C24XX_PLL
1886         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1887         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1888         help
1889           Compile in support for changing the PLL frequency from the
1890           S3C24XX series CPUfreq driver. The PLL takes time to settle
1891           after a frequency change, so by default it is not enabled.
1892
1893           This also means that the PLL tables for the selected CPU(s) will
1894           be built which may increase the size of the kernel image.
1895
1896 config CPU_FREQ_S3C24XX_DEBUG
1897         bool "Debug CPUfreq Samsung driver core"
1898         depends on CPU_FREQ_S3C24XX
1899         help
1900           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1901
1902 config CPU_FREQ_S3C24XX_IODEBUG
1903         bool "Debug CPUfreq Samsung driver IO timing"
1904         depends on CPU_FREQ_S3C24XX
1905         help
1906           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1907
1908 config CPU_FREQ_S3C24XX_DEBUGFS
1909         bool "Export debugfs for CPUFreq"
1910         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1911         help
1912           Export status information via debugfs.
1913
1914 endif
1915
1916 source "drivers/cpuidle/Kconfig"
1917
1918 endmenu
1919
1920 menu "Floating point emulation"
1921
1922 comment "At least one emulation must be selected"
1923
1924 config FPE_NWFPE
1925         bool "NWFPE math emulation"
1926         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1927         ---help---
1928           Say Y to include the NWFPE floating point emulator in the kernel.
1929           This is necessary to run most binaries. Linux does not currently
1930           support floating point hardware so you need to say Y here even if
1931           your machine has an FPA or floating point co-processor podule.
1932
1933           You may say N here if you are going to load the Acorn FPEmulator
1934           early in the bootup.
1935
1936 config FPE_NWFPE_XP
1937         bool "Support extended precision"
1938         depends on FPE_NWFPE
1939         help
1940           Say Y to include 80-bit support in the kernel floating-point
1941           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1942           Note that gcc does not generate 80-bit operations by default,
1943           so in most cases this option only enlarges the size of the
1944           floating point emulator without any good reason.
1945
1946           You almost surely want to say N here.
1947
1948 config FPE_FASTFPE
1949         bool "FastFPE math emulation (EXPERIMENTAL)"
1950         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1951         ---help---
1952           Say Y here to include the FAST floating point emulator in the kernel.
1953           This is an experimental much faster emulator which now also has full
1954           precision for the mantissa.  It does not support any exceptions.
1955           It is very simple, and approximately 3-6 times faster than NWFPE.
1956
1957           It should be sufficient for most programs.  It may be not suitable
1958           for scientific calculations, but you have to check this for yourself.
1959           If you do not feel you need a faster FP emulation you should better
1960           choose NWFPE.
1961
1962 config VFP
1963         bool "VFP-format floating point maths"
1964         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1965         help
1966           Say Y to include VFP support code in the kernel. This is needed
1967           if your hardware includes a VFP unit.
1968
1969           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1970           release notes and additional status information.
1971
1972           Say N if your target does not have VFP hardware.
1973
1974 config VFPv3
1975         bool
1976         depends on VFP
1977         default y if CPU_V7
1978
1979 config NEON
1980         bool "Advanced SIMD (NEON) Extension support"
1981         depends on VFPv3 && CPU_V7
1982         help
1983           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1984           Extension.
1985
1986 endmenu
1987
1988 menu "Userspace binary formats"
1989
1990 source "fs/Kconfig.binfmt"
1991
1992 config ARTHUR
1993         tristate "RISC OS personality"
1994         depends on !AEABI
1995         help
1996           Say Y here to include the kernel code necessary if you want to run
1997           Acorn RISC OS/Arthur binaries under Linux. This code is still very
1998           experimental; if this sounds frightening, say N and sleep in peace.
1999           You can also say M here to compile this support as a module (which
2000           will be called arthur).
2001
2002 endmenu
2003
2004 menu "Power management options"
2005
2006 source "kernel/power/Kconfig"
2007
2008 config ARCH_SUSPEND_POSSIBLE
2009         def_bool y
2010
2011 endmenu
2012
2013 source "net/Kconfig"
2014
2015 source "drivers/Kconfig"
2016
2017 source "fs/Kconfig"
2018
2019 source "arch/arm/Kconfig.debug"
2020
2021 source "security/Kconfig"
2022
2023 source "crypto/Kconfig"
2024
2025 source "lib/Kconfig"