arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_STRNCPY_FROM_USER
  20         select GENERIC_STRNLEN_USER
  21         select HARDIRQS_SW_RESEND
  22         select HAVE_AOUT
  23         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_SECCOMP_FILTER
  26         select HAVE_ARCH_TRACEHOOK
  27         select HAVE_BPF_JIT
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_DEBUG_KMEMLEAK
  30         select HAVE_DMA_API_DEBUG
  31         select HAVE_DMA_ATTRS
  32         select HAVE_DMA_CONTIGUOUS if MMU
  33         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  34         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  35         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  36         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  37         select HAVE_GENERIC_DMA_COHERENT
  38         select HAVE_GENERIC_HARDIRQS
  39         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  40         select HAVE_IDE if PCI || ISA || PCMCIA
  41         select HAVE_KERNEL_GZIP
  42         select HAVE_KERNEL_LZMA
  43         select HAVE_KERNEL_LZO
  44         select HAVE_KERNEL_XZ
  45         select HAVE_KPROBES if !XIP_KERNEL
  46         select HAVE_KRETPROBES if (HAVE_KPROBES)
  47         select HAVE_MEMBLOCK
  48         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  49         select HAVE_PERF_EVENTS
  50         select HAVE_REGS_AND_STACK_ACCESS_API
  51         select HAVE_SYSCALL_TRACEPOINTS
  52         select HAVE_UID16
  53         select KTIME_SCALAR
  54         select PERF_USE_VMALLOC
  55         select RTC_LIB
  56         select SYS_SUPPORTS_APM_EMULATION
  57         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  58         select MODULES_USE_ELF_REL
  59         select CLONE_BACKWARDS
  60         select OLD_SIGSUSPEND3
  61         select OLD_SIGACTION
  62         help
  63           The ARM series is a line of low-power-consumption RISC chip designs
  64           licensed by ARM Ltd and targeted at embedded applications and
  65           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  66           manufactured, but legacy ARM-based PC hardware remains popular in
  67           Europe.  There is an ARM Linux project with a web page at
  68           <http://www.arm.linux.org.uk/>.
  69
  70 config ARM_HAS_SG_CHAIN
  71         bool
  72
  73 config NEED_SG_DMA_LENGTH
  74         bool
  75
  76 config ARM_DMA_USE_IOMMU
  77         bool
  78         select ARM_HAS_SG_CHAIN
  79         select NEED_SG_DMA_LENGTH
  80
  81 if ARM_DMA_USE_IOMMU
  82
  83 config ARM_DMA_IOMMU_ALIGNMENT
  84         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  85         range 4 9
  86         default 8
  87         help
  88           DMA mapping framework by default aligns all buffers to the smallest
  89           PAGE_SIZE order which is greater than or equal to the requested buffer
  90           size. This works well for buffers up to a few hundreds kilobytes, but
  91           for larger buffers it just a waste of address space. Drivers which has
  92           relatively small addressing window (like 64Mib) might run out of
  93           virtual space with just a few allocations.
  94
  95           With this parameter you can specify the maximum PAGE_SIZE order for
  96           DMA IOMMU buffers. Larger buffers will be aligned only to this
  97           specified order. The order is expressed as a power of two multiplied
  98           by the PAGE_SIZE.
  99
 100 endif
 101
 102 config HAVE_PWM
 103         bool
 104
 105 config MIGHT_HAVE_PCI
 106         bool
 107
 108 config SYS_SUPPORTS_APM_EMULATION
 109         bool
 110
 111 config GENERIC_GPIO
 112         bool
 113
 114 config HAVE_TCM
 115         bool
 116         select GENERIC_ALLOCATOR
 117
 118 config HAVE_PROC_CPU
 119         bool
 120
 121 config NO_IOPORT
 122         bool
 123
 124 config EISA
 125         bool
 126         ---help---
 127           The Extended Industry Standard Architecture (EISA) bus was
 128           developed as an open alternative to the IBM MicroChannel bus.
 129
 130           The EISA bus provided some of the features of the IBM MicroChannel
 131           bus while maintaining backward compatibility with cards made for
 132           the older ISA bus.  The EISA bus saw limited use between 1988 and
 133           1995 when it was made obsolete by the PCI bus.
 134
 135           Say Y here if you are building a kernel for an EISA-based machine.
 136
 137           Otherwise, say N.
 138
 139 config SBUS
 140         bool
 141
 142 config STACKTRACE_SUPPORT
 143         bool
 144         default y
 145
 146 config HAVE_LATENCYTOP_SUPPORT
 147         bool
 148         depends on !SMP
 149         default y
 150
 151 config LOCKDEP_SUPPORT
 152         bool
 153         default y
 154
 155 config TRACE_IRQFLAGS_SUPPORT
 156         bool
 157         default y
 158
 159 config RWSEM_GENERIC_SPINLOCK
 160         bool
 161         default y
 162
 163 config RWSEM_XCHGADD_ALGORITHM
 164         bool
 165
 166 config ARCH_HAS_ILOG2_U32
 167         bool
 168
 169 config ARCH_HAS_ILOG2_U64
 170         bool
 171
 172 config ARCH_HAS_CPUFREQ
 173         bool
 174         help
 175           Internal node to signify that the ARCH has CPUFREQ support
 176           and that the relevant menu configurations are displayed for
 177           it.
 178
 179 config GENERIC_HWEIGHT
 180         bool
 181         default y
 182
 183 config GENERIC_CALIBRATE_DELAY
 184         bool
 185         default y
 186
 187 config ARCH_MAY_HAVE_PC_FDC
 188         bool
 189
 190 config ZONE_DMA
 191         bool
 192
 193 config NEED_DMA_MAP_STATE
 194        def_bool y
 195
 196 config ARCH_HAS_DMA_SET_COHERENT_MASK
 197         bool
 198
 199 config GENERIC_ISA_DMA
 200         bool
 201
 202 config FIQ
 203         bool
 204
 205 config NEED_RET_TO_USER
 206         bool
 207
 208 config ARCH_MTD_XIP
 209         bool
 210
 211 config VECTORS_BASE
 212         hex
 213         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 214         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 215         default 0x00000000
 216         help
 217           The base address of exception vectors.
 218
 219 config ARM_PATCH_PHYS_VIRT
 220         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 221         default y
 222         depends on !XIP_KERNEL && MMU
 223         depends on !ARCH_REALVIEW || !SPARSEMEM
 224         help
 225           Patch phys-to-virt and virt-to-phys translation functions at
 226           boot and module load time according to the position of the
 227           kernel in system memory.
 228
 229           This can only be used with non-XIP MMU kernels where the base
 230           of physical memory is at a 16MB boundary.
 231
 232           Only disable this option if you know that you do not require
 233           this feature (eg, building a kernel for a single machine) and
 234           you need to shrink the kernel to the minimal size.
 235
 236 config NEED_MACH_GPIO_H
 237         bool
 238         help
 239           Select this when mach/gpio.h is required to provide special
 240           definitions for this platform. The need for mach/gpio.h should
 241           be avoided when possible.
 242
 243 config NEED_MACH_IO_H
 244         bool
 245         help
 246           Select this when mach/io.h is required to provide special
 247           definitions for this platform.  The need for mach/io.h should
 248           be avoided when possible.
 249
 250 config NEED_MACH_MEMORY_H
 251         bool
 252         help
 253           Select this when mach/memory.h is required to provide special
 254           definitions for this platform.  The need for mach/memory.h should
 255           be avoided when possible.
 256
 257 config PHYS_OFFSET
 258         hex "Physical address of main memory" if MMU
 259         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 260         default DRAM_BASE if !MMU
 261         help
 262           Please provide the physical address corresponding to the
 263           location of main memory in your system.
 264
 265 config GENERIC_BUG
 266         def_bool y
 267         depends on BUG
 268
 269 source "init/Kconfig"
 270
 271 source "kernel/Kconfig.freezer"
 272
 273 menu "System Type"
 274
 275 config MMU
 276         bool "MMU-based Paged Memory Management Support"
 277         default y
 278         help
 279           Select if you want MMU-based virtualised addressing space
 280           support by paged memory management. If unsure, say 'Y'.
 281
 282 #
 283 # The "ARM system type" choice list is ordered alphabetically by option
 284 # text.  Please add new entries in the option alphabetic order.
 285 #
 286 choice
 287         prompt "ARM system type"
 288         default ARCH_VERSATILE if !MMU
 289         default ARCH_MULTIPLATFORM if MMU
 290
 291 config ARCH_MULTIPLATFORM
 292         bool "Allow multiple platforms to be selected"
 293         depends on MMU
 294         select ARM_PATCH_PHYS_VIRT
 295         select AUTO_ZRELADDR
 296         select COMMON_CLK
 297         select MULTI_IRQ_HANDLER
 298         select SPARSE_IRQ
 299         select USE_OF
 300
 301 config ARCH_INTEGRATOR
 302         bool "ARM Ltd. Integrator family"
 303         select ARCH_HAS_CPUFREQ
 304         select ARM_AMBA
 305         select COMMON_CLK
 306         select COMMON_CLK_VERSATILE
 307         select GENERIC_CLOCKEVENTS
 308         select HAVE_TCM
 309         select ICST
 310         select MULTI_IRQ_HANDLER
 311         select NEED_MACH_MEMORY_H
 312         select PLAT_VERSATILE
 313         select SPARSE_IRQ
 314         select VERSATILE_FPGA_IRQ
 315         help
 316           Support for ARM's Integrator platform.
 317
 318 config ARCH_REALVIEW
 319         bool "ARM Ltd. RealView family"
 320         select ARCH_WANT_OPTIONAL_GPIOLIB
 321         select ARM_AMBA
 322         select ARM_TIMER_SP804
 323         select COMMON_CLK
 324         select COMMON_CLK_VERSATILE
 325         select GENERIC_CLOCKEVENTS
 326         select GPIO_PL061 if GPIOLIB
 327         select ICST
 328         select NEED_MACH_MEMORY_H
 329         select PLAT_VERSATILE
 330         select PLAT_VERSATILE_CLCD
 331         help
 332           This enables support for ARM Ltd RealView boards.
 333
 334 config ARCH_VERSATILE
 335         bool "ARM Ltd. Versatile family"
 336         select ARCH_WANT_OPTIONAL_GPIOLIB
 337         select ARM_AMBA
 338         select ARM_TIMER_SP804
 339         select ARM_VIC
 340         select CLKDEV_LOOKUP
 341         select GENERIC_CLOCKEVENTS
 342         select HAVE_MACH_CLKDEV
 343         select ICST
 344         select PLAT_VERSATILE
 345         select PLAT_VERSATILE_CLCD
 346         select PLAT_VERSATILE_CLOCK
 347         select VERSATILE_FPGA_IRQ
 348         help
 349           This enables support for ARM Ltd Versatile board.
 350
 351 config ARCH_AT91
 352         bool "Atmel AT91"
 353         select ARCH_REQUIRE_GPIOLIB
 354         select CLKDEV_LOOKUP
 355         select HAVE_CLK
 356         select IRQ_DOMAIN
 357         select NEED_MACH_GPIO_H
 358         select NEED_MACH_IO_H if PCCARD
 359         select PINCTRL
 360         select PINCTRL_AT91 if USE_OF
 361         help
 362           This enables support for systems based on Atmel
 363           AT91RM9200 and AT91SAM9* processors.
 364
 365 config ARCH_CLPS711X
 366         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 367         select ARCH_REQUIRE_GPIOLIB
 368         select AUTO_ZRELADDR
 369         select CLKDEV_LOOKUP
 370         select COMMON_CLK
 371         select CPU_ARM720T
 372         select GENERIC_CLOCKEVENTS
 373         select MULTI_IRQ_HANDLER
 374         select NEED_MACH_MEMORY_H
 375         select SPARSE_IRQ
 376         help
 377           Support for Cirrus Logic 711x/721x/731x based boards.
 378
 379 config ARCH_GEMINI
 380         bool "Cortina Systems Gemini"
 381         select ARCH_REQUIRE_GPIOLIB
 382         select ARCH_USES_GETTIMEOFFSET
 383         select NEED_MACH_GPIO_H
 384         select CPU_FA526
 385         help
 386           Support for the Cortina Systems Gemini family SoCs
 387
 388 config ARCH_EBSA110
 389         bool "EBSA-110"
 390         select ARCH_USES_GETTIMEOFFSET
 391         select CPU_SA110
 392         select ISA
 393         select NEED_MACH_IO_H
 394         select NEED_MACH_MEMORY_H
 395         select NO_IOPORT
 396         help
 397           This is an evaluation board for the StrongARM processor available
 398           from Digital. It has limited hardware on-board, including an
 399           Ethernet interface, two PCMCIA sockets, two serial ports and a
 400           parallel port.
 401
 402 config ARCH_EP93XX
 403         bool "EP93xx-based"
 404         select ARCH_HAS_HOLES_MEMORYMODEL
 405         select ARCH_REQUIRE_GPIOLIB
 406         select ARCH_USES_GETTIMEOFFSET
 407         select ARM_AMBA
 408         select ARM_VIC
 409         select CLKDEV_LOOKUP
 410         select CPU_ARM920T
 411         select NEED_MACH_MEMORY_H
 412         help
 413           This enables support for the Cirrus EP93xx series of CPUs.
 414
 415 config ARCH_FOOTBRIDGE
 416         bool "FootBridge"
 417         select CPU_SA110
 418         select FOOTBRIDGE
 419         select GENERIC_CLOCKEVENTS
 420         select HAVE_IDE
 421         select NEED_MACH_IO_H if !MMU
 422         select NEED_MACH_MEMORY_H
 423         help
 424           Support for systems based on the DC21285 companion chip
 425           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 426
 427 config ARCH_NETX
 428         bool "Hilscher NetX based"
 429         select ARM_VIC
 430         select CLKSRC_MMIO
 431         select CPU_ARM926T
 432         select GENERIC_CLOCKEVENTS
 433         help
 434           This enables support for systems based on the Hilscher NetX Soc
 435
 436 config ARCH_IOP13XX
 437         bool "IOP13xx-based"
 438         depends on MMU
 439         select ARCH_SUPPORTS_MSI
 440         select CPU_XSC3
 441         select NEED_MACH_MEMORY_H
 442         select NEED_RET_TO_USER
 443         select PCI
 444         select PLAT_IOP
 445         select VMSPLIT_1G
 446         help
 447           Support for Intel's IOP13XX (XScale) family of processors.
 448
 449 config ARCH_IOP32X
 450         bool "IOP32x-based"
 451         depends on MMU
 452         select ARCH_REQUIRE_GPIOLIB
 453         select CPU_XSCALE
 454         select NEED_MACH_GPIO_H
 455         select NEED_RET_TO_USER
 456         select PCI
 457         select PLAT_IOP
 458         help
 459           Support for Intel's 80219 and IOP32X (XScale) family of
 460           processors.
 461
 462 config ARCH_IOP33X
 463         bool "IOP33x-based"
 464         depends on MMU
 465         select ARCH_REQUIRE_GPIOLIB
 466         select CPU_XSCALE
 467         select NEED_MACH_GPIO_H
 468         select NEED_RET_TO_USER
 469         select PCI
 470         select PLAT_IOP
 471         help
 472           Support for Intel's IOP33X (XScale) family of processors.
 473
 474 config ARCH_IXP4XX
 475         bool "IXP4xx-based"
 476         depends on MMU
 477         select ARCH_HAS_DMA_SET_COHERENT_MASK
 478         select ARCH_REQUIRE_GPIOLIB
 479         select CLKSRC_MMIO
 480         select CPU_XSCALE
 481         select DMABOUNCE if PCI
 482         select GENERIC_CLOCKEVENTS
 483         select MIGHT_HAVE_PCI
 484         select NEED_MACH_IO_H
 485         select USB_EHCI_BIG_ENDIAN_MMIO
 486         select USB_EHCI_BIG_ENDIAN_DESC
 487         help
 488           Support for Intel's IXP4XX (XScale) family of processors.
 489
 490 config ARCH_DOVE
 491         bool "Marvell Dove"
 492         select ARCH_REQUIRE_GPIOLIB
 493         select CPU_V7
 494         select GENERIC_CLOCKEVENTS
 495         select MIGHT_HAVE_PCI
 496         select PINCTRL
 497         select PINCTRL_DOVE
 498         select PLAT_ORION_LEGACY
 499         select USB_ARCH_HAS_EHCI
 500         help
 501           Support for the Marvell Dove SoC 88AP510
 502
 503 config ARCH_KIRKWOOD
 504         bool "Marvell Kirkwood"
 505         select ARCH_REQUIRE_GPIOLIB
 506         select CPU_FEROCEON
 507         select GENERIC_CLOCKEVENTS
 508         select PCI
 509         select PCI_QUIRKS
 510         select PINCTRL
 511         select PINCTRL_KIRKWOOD
 512         select PLAT_ORION_LEGACY
 513         help
 514           Support for the following Marvell Kirkwood series SoCs:
 515           88F6180, 88F6192 and 88F6281.
 516
 517 config ARCH_MV78XX0
 518         bool "Marvell MV78xx0"
 519         select ARCH_REQUIRE_GPIOLIB
 520         select CPU_FEROCEON
 521         select GENERIC_CLOCKEVENTS
 522         select PCI
 523         select PLAT_ORION_LEGACY
 524         help
 525           Support for the following Marvell MV78xx0 series SoCs:
 526           MV781x0, MV782x0.
 527
 528 config ARCH_ORION5X
 529         bool "Marvell Orion"
 530         depends on MMU
 531         select ARCH_REQUIRE_GPIOLIB
 532         select CPU_FEROCEON
 533         select GENERIC_CLOCKEVENTS
 534         select PCI
 535         select PLAT_ORION_LEGACY
 536         help
 537           Support for the following Marvell Orion 5x series SoCs:
 538           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 539           Orion-2 (5281), Orion-1-90 (6183).
 540
 541 config ARCH_MMP
 542         bool "Marvell PXA168/910/MMP2"
 543         depends on MMU
 544         select ARCH_REQUIRE_GPIOLIB
 545         select CLKDEV_LOOKUP
 546         select GENERIC_ALLOCATOR
 547         select GENERIC_CLOCKEVENTS
 548         select GPIO_PXA
 549         select IRQ_DOMAIN
 550         select NEED_MACH_GPIO_H
 551         select PINCTRL
 552         select PLAT_PXA
 553         select SPARSE_IRQ
 554         help
 555           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 556
 557 config ARCH_KS8695
 558         bool "Micrel/Kendin KS8695"
 559         select ARCH_REQUIRE_GPIOLIB
 560         select CLKSRC_MMIO
 561         select CPU_ARM922T
 562         select GENERIC_CLOCKEVENTS
 563         select NEED_MACH_MEMORY_H
 564         help
 565           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 566           System-on-Chip devices.
 567
 568 config ARCH_W90X900
 569         bool "Nuvoton W90X900 CPU"
 570         select ARCH_REQUIRE_GPIOLIB
 571         select CLKDEV_LOOKUP
 572         select CLKSRC_MMIO
 573         select CPU_ARM926T
 574         select GENERIC_CLOCKEVENTS
 575         help
 576           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 577           At present, the w90x900 has been renamed nuc900, regarding
 578           the ARM series product line, you can login the following
 579           link address to know more.
 580
 581           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 582                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 583
 584 config ARCH_LPC32XX
 585         bool "NXP LPC32XX"
 586         select ARCH_REQUIRE_GPIOLIB
 587         select ARM_AMBA
 588         select CLKDEV_LOOKUP
 589         select CLKSRC_MMIO
 590         select CPU_ARM926T
 591         select GENERIC_CLOCKEVENTS
 592         select HAVE_IDE
 593         select HAVE_PWM
 594         select USB_ARCH_HAS_OHCI
 595         select USE_OF
 596         help
 597           Support for the NXP LPC32XX family of processors
 598
 599 config ARCH_PXA
 600         bool "PXA2xx/PXA3xx-based"
 601         depends on MMU
 602         select ARCH_HAS_CPUFREQ
 603         select ARCH_MTD_XIP
 604         select ARCH_REQUIRE_GPIOLIB
 605         select ARM_CPU_SUSPEND if PM
 606         select AUTO_ZRELADDR
 607         select CLKDEV_LOOKUP
 608         select CLKSRC_MMIO
 609         select GENERIC_CLOCKEVENTS
 610         select GPIO_PXA
 611         select HAVE_IDE
 612         select MULTI_IRQ_HANDLER
 613         select NEED_MACH_GPIO_H
 614         select PLAT_PXA
 615         select SPARSE_IRQ
 616         help
 617           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 618
 619 config ARCH_MSM
 620         bool "Qualcomm MSM"
 621         select ARCH_REQUIRE_GPIOLIB
 622         select CLKDEV_LOOKUP
 623         select GENERIC_CLOCKEVENTS
 624         select HAVE_CLK
 625         help
 626           Support for Qualcomm MSM/QSD based systems.  This runs on the
 627           apps processor of the MSM/QSD and depends on a shared memory
 628           interface to the modem processor which runs the baseband
 629           stack and controls some vital subsystems
 630           (clock and power control, etc).
 631
 632 config ARCH_SHMOBILE
 633         bool "Renesas SH-Mobile / R-Mobile"
 634         select CLKDEV_LOOKUP
 635         select GENERIC_CLOCKEVENTS
 636         select HAVE_ARM_SCU if SMP
 637         select HAVE_ARM_TWD if LOCAL_TIMERS
 638         select HAVE_CLK
 639         select HAVE_MACH_CLKDEV
 640         select HAVE_SMP
 641         select MIGHT_HAVE_CACHE_L2X0
 642         select MULTI_IRQ_HANDLER
 643         select NEED_MACH_MEMORY_H
 644         select NO_IOPORT
 645         select PINCTRL
 646         select PM_GENERIC_DOMAINS if PM
 647         select SPARSE_IRQ
 648         help
 649           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 650
 651 config ARCH_RPC
 652         bool "RiscPC"
 653         select ARCH_ACORN
 654         select ARCH_MAY_HAVE_PC_FDC
 655         select ARCH_SPARSEMEM_ENABLE
 656         select ARCH_USES_GETTIMEOFFSET
 657         select FIQ
 658         select HAVE_IDE
 659         select HAVE_PATA_PLATFORM
 660         select ISA_DMA_API
 661         select NEED_MACH_IO_H
 662         select NEED_MACH_MEMORY_H
 663         select NO_IOPORT
 664         select VIRT_TO_BUS
 665         help
 666           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 667           CD-ROM interface, serial and parallel port, and the floppy drive.
 668
 669 config ARCH_SA1100
 670         bool "SA1100-based"
 671         select ARCH_HAS_CPUFREQ
 672         select ARCH_MTD_XIP
 673         select ARCH_REQUIRE_GPIOLIB
 674         select ARCH_SPARSEMEM_ENABLE
 675         select CLKDEV_LOOKUP
 676         select CLKSRC_MMIO
 677         select CPU_FREQ
 678         select CPU_SA1100
 679         select GENERIC_CLOCKEVENTS
 680         select HAVE_IDE
 681         select ISA
 682         select NEED_MACH_GPIO_H
 683         select NEED_MACH_MEMORY_H
 684         select SPARSE_IRQ
 685         help
 686           Support for StrongARM 11x0 based boards.
 687
 688 config ARCH_S3C24XX
 689         bool "Samsung S3C24XX SoCs"
 690         select ARCH_HAS_CPUFREQ
 691         select ARCH_USES_GETTIMEOFFSET
 692         select CLKDEV_LOOKUP
 693         select HAVE_CLK
 694         select HAVE_S3C2410_I2C if I2C
 695         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 696         select HAVE_S3C_RTC if RTC_CLASS
 697         select NEED_MACH_GPIO_H
 698         select NEED_MACH_IO_H
 699         help
 700           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 701           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 702           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 703           Samsung SMDK2410 development board (and derivatives).
 704
 705 config ARCH_S3C64XX
 706         bool "Samsung S3C64XX"
 707         select ARCH_HAS_CPUFREQ
 708         select ARCH_REQUIRE_GPIOLIB
 709         select ARCH_USES_GETTIMEOFFSET
 710         select ARM_VIC
 711         select CLKDEV_LOOKUP
 712         select CPU_V6
 713         select HAVE_CLK
 714         select HAVE_S3C2410_I2C if I2C
 715         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 716         select HAVE_TCM
 717         select NEED_MACH_GPIO_H
 718         select NO_IOPORT
 719         select PLAT_SAMSUNG
 720         select S3C_DEV_NAND
 721         select S3C_GPIO_TRACK
 722         select SAMSUNG_CLKSRC
 723         select SAMSUNG_GPIOLIB_4BIT
 724         select SAMSUNG_IRQ_VIC_TIMER
 725         select USB_ARCH_HAS_OHCI
 726         help
 727           Samsung S3C64XX series based systems
 728
 729 config ARCH_S5P64X0
 730         bool "Samsung S5P6440 S5P6450"
 731         select CLKDEV_LOOKUP
 732         select CLKSRC_MMIO
 733         select CPU_V6
 734         select GENERIC_CLOCKEVENTS
 735         select HAVE_CLK
 736         select HAVE_S3C2410_I2C if I2C
 737         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 738         select HAVE_S3C_RTC if RTC_CLASS
 739         select NEED_MACH_GPIO_H
 740         help
 741           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 742           SMDK6450.
 743
 744 config ARCH_S5PC100
 745         bool "Samsung S5PC100"
 746         select ARCH_USES_GETTIMEOFFSET
 747         select CLKDEV_LOOKUP
 748         select CPU_V7
 749         select HAVE_CLK
 750         select HAVE_S3C2410_I2C if I2C
 751         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 752         select HAVE_S3C_RTC if RTC_CLASS
 753         select NEED_MACH_GPIO_H
 754         help
 755           Samsung S5PC100 series based systems
 756
 757 config ARCH_S5PV210
 758         bool "Samsung S5PV210/S5PC110"
 759         select ARCH_HAS_CPUFREQ
 760         select ARCH_HAS_HOLES_MEMORYMODEL
 761         select ARCH_SPARSEMEM_ENABLE
 762         select CLKDEV_LOOKUP
 763         select CLKSRC_MMIO
 764         select CPU_V7
 765         select GENERIC_CLOCKEVENTS
 766         select HAVE_CLK
 767         select HAVE_S3C2410_I2C if I2C
 768         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 769         select HAVE_S3C_RTC if RTC_CLASS
 770         select NEED_MACH_GPIO_H
 771         select NEED_MACH_MEMORY_H
 772         help
 773           Samsung S5PV210/S5PC110 series based systems
 774
 775 config ARCH_EXYNOS
 776         bool "Samsung EXYNOS"
 777         select ARCH_HAS_CPUFREQ
 778         select ARCH_HAS_HOLES_MEMORYMODEL
 779         select ARCH_SPARSEMEM_ENABLE
 780         select CLKDEV_LOOKUP
 781         select CPU_V7
 782         select GENERIC_CLOCKEVENTS
 783         select HAVE_CLK
 784         select HAVE_S3C2410_I2C if I2C
 785         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 786         select HAVE_S3C_RTC if RTC_CLASS
 787         select NEED_MACH_GPIO_H
 788         select NEED_MACH_MEMORY_H
 789         help
 790           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 791
 792 config ARCH_SHARK
 793         bool "Shark"
 794         select ARCH_USES_GETTIMEOFFSET
 795         select CPU_SA110
 796         select ISA
 797         select ISA_DMA
 798         select NEED_MACH_MEMORY_H
 799         select PCI
 800         select VIRT_TO_BUS
 801         select ZONE_DMA
 802         help
 803           Support for the StrongARM based Digital DNARD machine, also known
 804           as "Shark" (<http://www.shark-linux.de/shark.html>).
 805
 806 config ARCH_U300
 807         bool "ST-Ericsson U300 Series"
 808         depends on MMU
 809         select ARCH_REQUIRE_GPIOLIB
 810         select ARM_AMBA
 811         select ARM_PATCH_PHYS_VIRT
 812         select ARM_VIC
 813         select CLKDEV_LOOKUP
 814         select CLKSRC_MMIO
 815         select COMMON_CLK
 816         select CPU_ARM926T
 817         select GENERIC_CLOCKEVENTS
 818         select HAVE_TCM
 819         select SPARSE_IRQ
 820         help
 821           Support for ST-Ericsson U300 series mobile platforms.
 822
 823 config ARCH_DAVINCI
 824         bool "TI DaVinci"
 825         select ARCH_HAS_HOLES_MEMORYMODEL
 826         select ARCH_REQUIRE_GPIOLIB
 827         select CLKDEV_LOOKUP
 828         select GENERIC_ALLOCATOR
 829         select GENERIC_CLOCKEVENTS
 830         select GENERIC_IRQ_CHIP
 831         select HAVE_IDE
 832         select NEED_MACH_GPIO_H
 833         select USE_OF
 834         select ZONE_DMA
 835         help
 836           Support for TI's DaVinci platform.
 837
 838 config ARCH_OMAP1
 839         bool "TI OMAP1"
 840         depends on MMU
 841         select ARCH_HAS_CPUFREQ
 842         select ARCH_HAS_HOLES_MEMORYMODEL
 843         select ARCH_OMAP
 844         select ARCH_REQUIRE_GPIOLIB
 845         select CLKDEV_LOOKUP
 846         select CLKSRC_MMIO
 847         select GENERIC_CLOCKEVENTS
 848         select GENERIC_IRQ_CHIP
 849         select HAVE_CLK
 850         select HAVE_IDE
 851         select IRQ_DOMAIN
 852         select NEED_MACH_IO_H if PCCARD
 853         select NEED_MACH_MEMORY_H
 854         help
 855           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 856
 857 endchoice
 858
 859 menu "Multiple platform selection"
 860         depends on ARCH_MULTIPLATFORM
 861
 862 comment "CPU Core family selection"
 863
 864 config ARCH_MULTI_V4
 865         bool "ARMv4 based platforms (FA526, StrongARM)"
 866         depends on !ARCH_MULTI_V6_V7
 867         select ARCH_MULTI_V4_V5
 868
 869 config ARCH_MULTI_V4T
 870         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 871         depends on !ARCH_MULTI_V6_V7
 872         select ARCH_MULTI_V4_V5
 873
 874 config ARCH_MULTI_V5
 875         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 876         depends on !ARCH_MULTI_V6_V7
 877         select ARCH_MULTI_V4_V5
 878
 879 config ARCH_MULTI_V4_V5
 880         bool
 881
 882 config ARCH_MULTI_V6
 883         bool "ARMv6 based platforms (ARM11)"
 884         select ARCH_MULTI_V6_V7
 885         select CPU_V6
 886
 887 config ARCH_MULTI_V7
 888         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 889         default y
 890         select ARCH_MULTI_V6_V7
 891         select ARCH_VEXPRESS
 892         select CPU_V7
 893
 894 config ARCH_MULTI_V6_V7
 895         bool
 896
 897 config ARCH_MULTI_CPU_AUTO
 898         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 899         select ARCH_MULTI_V5
 900
 901 endmenu
 902
 903 #
 904 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 905 # Kconfigs may be included either alphabetically (according to the
 906 # plat- suffix) or along side the corresponding mach-* source.
 907 #
 908 source "arch/arm/mach-mvebu/Kconfig"
 909
 910 source "arch/arm/mach-at91/Kconfig"
 911
 912 source "arch/arm/mach-bcm/Kconfig"
 913
 914 source "arch/arm/mach-bcm2835/Kconfig"
 915
 916 source "arch/arm/mach-clps711x/Kconfig"
 917
 918 source "arch/arm/mach-cns3xxx/Kconfig"
 919
 920 source "arch/arm/mach-davinci/Kconfig"
 921
 922 source "arch/arm/mach-dove/Kconfig"
 923
 924 source "arch/arm/mach-ep93xx/Kconfig"
 925
 926 source "arch/arm/mach-footbridge/Kconfig"
 927
 928 source "arch/arm/mach-gemini/Kconfig"
 929
 930 source "arch/arm/mach-highbank/Kconfig"
 931
 932 source "arch/arm/mach-integrator/Kconfig"
 933
 934 source "arch/arm/mach-iop32x/Kconfig"
 935
 936 source "arch/arm/mach-iop33x/Kconfig"
 937
 938 source "arch/arm/mach-iop13xx/Kconfig"
 939
 940 source "arch/arm/mach-ixp4xx/Kconfig"
 941
 942 source "arch/arm/mach-kirkwood/Kconfig"
 943
 944 source "arch/arm/mach-ks8695/Kconfig"
 945
 946 source "arch/arm/mach-msm/Kconfig"
 947
 948 source "arch/arm/mach-mv78xx0/Kconfig"
 949
 950 source "arch/arm/mach-imx/Kconfig"
 951
 952 source "arch/arm/mach-mxs/Kconfig"
 953
 954 source "arch/arm/mach-netx/Kconfig"
 955
 956 source "arch/arm/mach-nomadik/Kconfig"
 957
 958 source "arch/arm/plat-omap/Kconfig"
 959
 960 source "arch/arm/mach-omap1/Kconfig"
 961
 962 source "arch/arm/mach-omap2/Kconfig"
 963
 964 source "arch/arm/mach-orion5x/Kconfig"
 965
 966 source "arch/arm/mach-picoxcell/Kconfig"
 967
 968 source "arch/arm/mach-pxa/Kconfig"
 969 source "arch/arm/plat-pxa/Kconfig"
 970
 971 source "arch/arm/mach-mmp/Kconfig"
 972
 973 source "arch/arm/mach-realview/Kconfig"
 974
 975 source "arch/arm/mach-sa1100/Kconfig"
 976
 977 source "arch/arm/plat-samsung/Kconfig"
 978
 979 source "arch/arm/mach-socfpga/Kconfig"
 980
 981 source "arch/arm/mach-spear/Kconfig"
 982
 983 source "arch/arm/mach-s3c24xx/Kconfig"
 984
 985 if ARCH_S3C64XX
 986 source "arch/arm/mach-s3c64xx/Kconfig"
 987 endif
 988
 989 source "arch/arm/mach-s5p64x0/Kconfig"
 990
 991 source "arch/arm/mach-s5pc100/Kconfig"
 992
 993 source "arch/arm/mach-s5pv210/Kconfig"
 994
 995 source "arch/arm/mach-exynos/Kconfig"
 996
 997 source "arch/arm/mach-shmobile/Kconfig"
 998
 999 source "arch/arm/mach-sunxi/Kconfig"
1000
1001 source "arch/arm/mach-prima2/Kconfig"
1002
1003 source "arch/arm/mach-tegra/Kconfig"
1004
1005 source "arch/arm/mach-u300/Kconfig"
1006
1007 source "arch/arm/mach-ux500/Kconfig"
1008
1009 source "arch/arm/mach-versatile/Kconfig"
1010
1011 source "arch/arm/mach-vexpress/Kconfig"
1012 source "arch/arm/plat-versatile/Kconfig"
1013
1014 source "arch/arm/mach-virt/Kconfig"
1015
1016 source "arch/arm/mach-vt8500/Kconfig"
1017
1018 source "arch/arm/mach-w90x900/Kconfig"
1019
1020 source "arch/arm/mach-zynq/Kconfig"
1021
1022 # Definitions to make life easier
1023 config ARCH_ACORN
1024         bool
1025
1026 config PLAT_IOP
1027         bool
1028         select GENERIC_CLOCKEVENTS
1029
1030 config PLAT_ORION
1031         bool
1032         select CLKSRC_MMIO
1033         select COMMON_CLK
1034         select GENERIC_IRQ_CHIP
1035         select IRQ_DOMAIN
1036
1037 config PLAT_ORION_LEGACY
1038         bool
1039         select PLAT_ORION
1040
1041 config PLAT_PXA
1042         bool
1043
1044 config PLAT_VERSATILE
1045         bool
1046
1047 config ARM_TIMER_SP804
1048         bool
1049         select CLKSRC_MMIO
1050
1051 source arch/arm/mm/Kconfig
1052
1053 config ARM_NR_BANKS
1054         int
1055         default 16 if ARCH_EP93XX
1056         default 8
1057
1058 config IWMMXT
1059         bool "Enable iWMMXt support" if !CPU_PJ4
1060         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1061         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1062         help
1063           Enable support for iWMMXt context switching at run time if
1064           running on a CPU that supports it.
1065
1066 config XSCALE_PMU
1067         bool
1068         depends on CPU_XSCALE
1069         default y
1070
1071 config MULTI_IRQ_HANDLER
1072         bool
1073         help
1074           Allow each machine to specify it's own IRQ handler at run time.
1075
1076 if !MMU
1077 source "arch/arm/Kconfig-nommu"
1078 endif
1079
1080 config ARM_ERRATA_326103
1081         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1082         depends on CPU_V6
1083         help
1084           Executing a SWP instruction to read-only memory does not set bit 11
1085           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1086           treat the access as a read, preventing a COW from occurring and
1087           causing the faulting task to livelock.
1088
1089 config ARM_ERRATA_411920
1090         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1091         depends on CPU_V6 || CPU_V6K
1092         help
1093           Invalidation of the Instruction Cache operation can
1094           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1095           It does not affect the MPCore. This option enables the ARM Ltd.
1096           recommended workaround.
1097
1098 config ARM_ERRATA_430973
1099         bool "ARM errata: Stale prediction on replaced interworking branch"
1100         depends on CPU_V7
1101         help
1102           This option enables the workaround for the 430973 Cortex-A8
1103           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1104           interworking branch is replaced with another code sequence at the
1105           same virtual address, whether due to self-modifying code or virtual
1106           to physical address re-mapping, Cortex-A8 does not recover from the
1107           stale interworking branch prediction. This results in Cortex-A8
1108           executing the new code sequence in the incorrect ARM or Thumb state.
1109           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1110           and also flushes the branch target cache at every context switch.
1111           Note that setting specific bits in the ACTLR register may not be
1112           available in non-secure mode.
1113
1114 config ARM_ERRATA_458693
1115         bool "ARM errata: Processor deadlock when a false hazard is created"
1116         depends on CPU_V7
1117         depends on !ARCH_MULTIPLATFORM
1118         help
1119           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1120           erratum. For very specific sequences of memory operations, it is
1121           possible for a hazard condition intended for a cache line to instead
1122           be incorrectly associated with a different cache line. This false
1123           hazard might then cause a processor deadlock. The workaround enables
1124           the L1 caching of the NEON accesses and disables the PLD instruction
1125           in the ACTLR register. Note that setting specific bits in the ACTLR
1126           register may not be available in non-secure mode.
1127
1128 config ARM_ERRATA_460075
1129         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1130         depends on CPU_V7
1131         depends on !ARCH_MULTIPLATFORM
1132         help
1133           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1134           erratum. Any asynchronous access to the L2 cache may encounter a
1135           situation in which recent store transactions to the L2 cache are lost
1136           and overwritten with stale memory contents from external memory. The
1137           workaround disables the write-allocate mode for the L2 cache via the
1138           ACTLR register. Note that setting specific bits in the ACTLR register
1139           may not be available in non-secure mode.
1140
1141 config ARM_ERRATA_742230
1142         bool "ARM errata: DMB operation may be faulty"
1143         depends on CPU_V7 && SMP
1144         depends on !ARCH_MULTIPLATFORM
1145         help
1146           This option enables the workaround for the 742230 Cortex-A9
1147           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1148           between two write operations may not ensure the correct visibility
1149           ordering of the two writes. This workaround sets a specific bit in
1150           the diagnostic register of the Cortex-A9 which causes the DMB
1151           instruction to behave as a DSB, ensuring the correct behaviour of
1152           the two writes.
1153
1154 config ARM_ERRATA_742231
1155         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1156         depends on CPU_V7 && SMP
1157         depends on !ARCH_MULTIPLATFORM
1158         help
1159           This option enables the workaround for the 742231 Cortex-A9
1160           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1161           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1162           accessing some data located in the same cache line, may get corrupted
1163           data due to bad handling of the address hazard when the line gets
1164           replaced from one of the CPUs at the same time as another CPU is
1165           accessing it. This workaround sets specific bits in the diagnostic
1166           register of the Cortex-A9 which reduces the linefill issuing
1167           capabilities of the processor.
1168
1169 config PL310_ERRATA_588369
1170         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1171         depends on CACHE_L2X0
1172         help
1173            The PL310 L2 cache controller implements three types of Clean &
1174            Invalidate maintenance operations: by Physical Address
1175            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1176            They are architecturally defined to behave as the execution of a
1177            clean operation followed immediately by an invalidate operation,
1178            both performing to the same memory location. This functionality
1179            is not correctly implemented in PL310 as clean lines are not
1180            invalidated as a result of these operations.
1181
1182 config ARM_ERRATA_720789
1183         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1184         depends on CPU_V7
1185         help
1186           This option enables the workaround for the 720789 Cortex-A9 (prior to
1187           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1188           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1189           As a consequence of this erratum, some TLB entries which should be
1190           invalidated are not, resulting in an incoherency in the system page
1191           tables. The workaround changes the TLB flushing routines to invalidate
1192           entries regardless of the ASID.
1193
1194 config PL310_ERRATA_727915
1195         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1196         depends on CACHE_L2X0
1197         help
1198           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1199           operation (offset 0x7FC). This operation runs in background so that
1200           PL310 can handle normal accesses while it is in progress. Under very
1201           rare circumstances, due to this erratum, write data can be lost when
1202           PL310 treats a cacheable write transaction during a Clean &
1203           Invalidate by Way operation.
1204
1205 config ARM_ERRATA_743622
1206         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1207         depends on CPU_V7
1208         depends on !ARCH_MULTIPLATFORM
1209         help
1210           This option enables the workaround for the 743622 Cortex-A9
1211           (r2p*) erratum. Under very rare conditions, a faulty
1212           optimisation in the Cortex-A9 Store Buffer may lead to data
1213           corruption. This workaround sets a specific bit in the diagnostic
1214           register of the Cortex-A9 which disables the Store Buffer
1215           optimisation, preventing the defect from occurring. This has no
1216           visible impact on the overall performance or power consumption of the
1217           processor.
1218
1219 config ARM_ERRATA_751472
1220         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1221         depends on CPU_V7
1222         depends on !ARCH_MULTIPLATFORM
1223         help
1224           This option enables the workaround for the 751472 Cortex-A9 (prior
1225           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1226           completion of a following broadcasted operation if the second
1227           operation is received by a CPU before the ICIALLUIS has completed,
1228           potentially leading to corrupted entries in the cache or TLB.
1229
1230 config PL310_ERRATA_753970
1231         bool "PL310 errata: cache sync operation may be faulty"
1232         depends on CACHE_PL310
1233         help
1234           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1235
1236           Under some condition the effect of cache sync operation on
1237           the store buffer still remains when the operation completes.
1238           This means that the store buffer is always asked to drain and
1239           this prevents it from merging any further writes. The workaround
1240           is to replace the normal offset of cache sync operation (0x730)
1241           by another offset targeting an unmapped PL310 register 0x740.
1242           This has the same effect as the cache sync operation: store buffer
1243           drain and waiting for all buffers empty.
1244
1245 config ARM_ERRATA_754322
1246         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1247         depends on CPU_V7
1248         help
1249           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1250           r3p*) erratum. A speculative memory access may cause a page table walk
1251           which starts prior to an ASID switch but completes afterwards. This
1252           can populate the micro-TLB with a stale entry which may be hit with
1253           the new ASID. This workaround places two dsb instructions in the mm
1254           switching code so that no page table walks can cross the ASID switch.
1255
1256 config ARM_ERRATA_754327
1257         bool "ARM errata: no automatic Store Buffer drain"
1258         depends on CPU_V7 && SMP
1259         help
1260           This option enables the workaround for the 754327 Cortex-A9 (prior to
1261           r2p0) erratum. The Store Buffer does not have any automatic draining
1262           mechanism and therefore a livelock may occur if an external agent
1263           continuously polls a memory location waiting to observe an update.
1264           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1265           written polling loops from denying visibility of updates to memory.
1266
1267 config ARM_ERRATA_364296
1268         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1269         depends on CPU_V6 && !SMP
1270         help
1271           This options enables the workaround for the 364296 ARM1136
1272           r0p2 erratum (possible cache data corruption with
1273           hit-under-miss enabled). It sets the undocumented bit 31 in
1274           the auxiliary control register and the FI bit in the control
1275           register, thus disabling hit-under-miss without putting the
1276           processor into full low interrupt latency mode. ARM11MPCore
1277           is not affected.
1278
1279 config ARM_ERRATA_764369
1280         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1281         depends on CPU_V7 && SMP
1282         help
1283           This option enables the workaround for erratum 764369
1284           affecting Cortex-A9 MPCore with two or more processors (all
1285           current revisions). Under certain timing circumstances, a data
1286           cache line maintenance operation by MVA targeting an Inner
1287           Shareable memory region may fail to proceed up to either the
1288           Point of Coherency or to the Point of Unification of the
1289           system. This workaround adds a DSB instruction before the
1290           relevant cache maintenance functions and sets a specific bit
1291           in the diagnostic control register of the SCU.
1292
1293 config PL310_ERRATA_769419
1294         bool "PL310 errata: no automatic Store Buffer drain"
1295         depends on CACHE_L2X0
1296         help
1297           On revisions of the PL310 prior to r3p2, the Store Buffer does
1298           not automatically drain. This can cause normal, non-cacheable
1299           writes to be retained when the memory system is idle, leading
1300           to suboptimal I/O performance for drivers using coherent DMA.
1301           This option adds a write barrier to the cpu_idle loop so that,
1302           on systems with an outer cache, the store buffer is drained
1303           explicitly.
1304
1305 config ARM_ERRATA_775420
1306        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1307        depends on CPU_V7
1308        help
1309          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1310          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1311          operation aborts with MMU exception, it might cause the processor
1312          to deadlock. This workaround puts DSB before executing ISB if
1313          an abort may occur on cache maintenance.
1314
1315 config ARM_ERRATA_798181
1316         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1317         depends on CPU_V7 && SMP
1318         help
1319           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1320           adequately shooting down all use of the old entries. This
1321           option enables the Linux kernel workaround for this erratum
1322           which sends an IPI to the CPUs that are running the same ASID
1323           as the one being invalidated.
1324
1325 endmenu
1326
1327 source "arch/arm/common/Kconfig"
1328
1329 menu "Bus support"
1330
1331 config ARM_AMBA
1332         bool
1333
1334 config ISA
1335         bool
1336         help
1337           Find out whether you have ISA slots on your motherboard.  ISA is the
1338           name of a bus system, i.e. the way the CPU talks to the other stuff
1339           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1340           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1341           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1342
1343 # Select ISA DMA controller support
1344 config ISA_DMA
1345         bool
1346         select ISA_DMA_API
1347
1348 # Select ISA DMA interface
1349 config ISA_DMA_API
1350         bool
1351
1352 config PCI
1353         bool "PCI support" if MIGHT_HAVE_PCI
1354         help
1355           Find out whether you have a PCI motherboard. PCI is the name of a
1356           bus system, i.e. the way the CPU talks to the other stuff inside
1357           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1358           VESA. If you have PCI, say Y, otherwise N.
1359
1360 config PCI_DOMAINS
1361         bool
1362         depends on PCI
1363
1364 config PCI_NANOENGINE
1365         bool "BSE nanoEngine PCI support"
1366         depends on SA1100_NANOENGINE
1367         help
1368           Enable PCI on the BSE nanoEngine board.
1369
1370 config PCI_SYSCALL
1371         def_bool PCI
1372
1373 # Select the host bridge type
1374 config PCI_HOST_VIA82C505
1375         bool
1376         depends on PCI && ARCH_SHARK
1377         default y
1378
1379 config PCI_HOST_ITE8152
1380         bool
1381         depends on PCI && MACH_ARMCORE
1382         default y
1383         select DMABOUNCE
1384
1385 source "drivers/pci/Kconfig"
1386
1387 source "drivers/pcmcia/Kconfig"
1388
1389 endmenu
1390
1391 menu "Kernel Features"
1392
1393 config HAVE_SMP
1394         bool
1395         help
1396           This option should be selected by machines which have an SMP-
1397           capable CPU.
1398
1399           The only effect of this option is to make the SMP-related
1400           options available to the user for configuration.
1401
1402 config SMP
1403         bool "Symmetric Multi-Processing"
1404         depends on CPU_V6K || CPU_V7
1405         depends on GENERIC_CLOCKEVENTS
1406         depends on HAVE_SMP
1407         depends on MMU
1408         select USE_GENERIC_SMP_HELPERS
1409         help
1410           This enables support for systems with more than one CPU. If you have
1411           a system with only one CPU, like most personal computers, say N. If
1412           you have a system with more than one CPU, say Y.
1413
1414           If you say N here, the kernel will run on single and multiprocessor
1415           machines, but will use only one CPU of a multiprocessor machine. If
1416           you say Y here, the kernel will run on many, but not all, single
1417           processor machines. On a single processor machine, the kernel will
1418           run faster if you say N here.
1419
1420           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1421           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1422           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1423
1424           If you don't know what to do here, say N.
1425
1426 config SMP_ON_UP
1427         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1428         depends on SMP && !XIP_KERNEL
1429         default y
1430         help
1431           SMP kernels contain instructions which fail on non-SMP processors.
1432           Enabling this option allows the kernel to modify itself to make
1433           these instructions safe.  Disabling it allows about 1K of space
1434           savings.
1435
1436           If you don't know what to do here, say Y.
1437
1438 config ARM_CPU_TOPOLOGY
1439         bool "Support cpu topology definition"
1440         depends on SMP && CPU_V7
1441         default y
1442         help
1443           Support ARM cpu topology definition. The MPIDR register defines
1444           affinity between processors which is then used to describe the cpu
1445           topology of an ARM System.
1446
1447 config SCHED_MC
1448         bool "Multi-core scheduler support"
1449         depends on ARM_CPU_TOPOLOGY
1450         help
1451           Multi-core scheduler support improves the CPU scheduler's decision
1452           making when dealing with multi-core CPU chips at a cost of slightly
1453           increased overhead in some places. If unsure say N here.
1454
1455 config SCHED_SMT
1456         bool "SMT scheduler support"
1457         depends on ARM_CPU_TOPOLOGY
1458         help
1459           Improves the CPU scheduler's decision making when dealing with
1460           MultiThreading at a cost of slightly increased overhead in some
1461           places. If unsure say N here.
1462
1463 config HAVE_ARM_SCU
1464         bool
1465         help
1466           This option enables support for the ARM system coherency unit
1467
1468 config HAVE_ARM_ARCH_TIMER
1469         bool "Architected timer support"
1470         depends on CPU_V7
1471         select ARM_ARCH_TIMER
1472         help
1473           This option enables support for the ARM architected timer
1474
1475 config HAVE_ARM_TWD
1476         bool
1477         depends on SMP
1478         select CLKSRC_OF if OF
1479         help
1480           This options enables support for the ARM timer and watchdog unit
1481
1482 choice
1483         prompt "Memory split"
1484         default VMSPLIT_3G
1485         help
1486           Select the desired split between kernel and user memory.
1487
1488           If you are not absolutely sure what you are doing, leave this
1489           option alone!
1490
1491         config VMSPLIT_3G
1492                 bool "3G/1G user/kernel split"
1493         config VMSPLIT_2G
1494                 bool "2G/2G user/kernel split"
1495         config VMSPLIT_1G
1496                 bool "1G/3G user/kernel split"
1497 endchoice
1498
1499 config PAGE_OFFSET
1500         hex
1501         default 0x40000000 if VMSPLIT_1G
1502         default 0x80000000 if VMSPLIT_2G
1503         default 0xC0000000
1504
1505 config NR_CPUS
1506         int "Maximum number of CPUs (2-32)"
1507         range 2 32
1508         depends on SMP
1509         default "4"
1510
1511 config HOTPLUG_CPU
1512         bool "Support for hot-pluggable CPUs"
1513         depends on SMP && HOTPLUG
1514         help
1515           Say Y here to experiment with turning CPUs off and on.  CPUs
1516           can be controlled through /sys/devices/system/cpu.
1517
1518 config ARM_PSCI
1519         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1520         depends on CPU_V7
1521         help
1522           Say Y here if you want Linux to communicate with system firmware
1523           implementing the PSCI specification for CPU-centric power
1524           management operations described in ARM document number ARM DEN
1525           0022A ("Power State Coordination Interface System Software on
1526           ARM processors").
1527
1528 config LOCAL_TIMERS
1529         bool "Use local timer interrupts"
1530         depends on SMP
1531         default y
1532         help
1533           Enable support for local timers on SMP platforms, rather then the
1534           legacy IPI broadcast method.  Local timers allows the system
1535           accounting to be spread across the timer interval, preventing a
1536           "thundering herd" at every timer tick.
1537
1538 # The GPIO number here must be sorted by descending number. In case of
1539 # a multiplatform kernel, we just want the highest value required by the
1540 # selected platforms.
1541 config ARCH_NR_GPIO
1542         int
1543         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1544         default 512 if SOC_OMAP5
1545         default 392 if ARCH_U8500
1546         default 288 if ARCH_VT8500 || ARCH_SUNXI
1547         default 264 if MACH_H4700
1548         default 0
1549         help
1550           Maximum number of GPIOs in the system.
1551
1552           If unsure, leave the default value.
1553
1554 source kernel/Kconfig.preempt
1555
1556 config HZ
1557         int
1558         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1559                 ARCH_S5PV210 || ARCH_EXYNOS4
1560         default AT91_TIMER_HZ if ARCH_AT91
1561         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1562         default 100
1563
1564 config SCHED_HRTICK
1565         def_bool HIGH_RES_TIMERS
1566
1567 config THUMB2_KERNEL
1568         bool "Compile the kernel in Thumb-2 mode"
1569         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1570         select AEABI
1571         select ARM_ASM_UNIFIED
1572         select ARM_UNWIND
1573         help
1574           By enabling this option, the kernel will be compiled in
1575           Thumb-2 mode. A compiler/assembler that understand the unified
1576           ARM-Thumb syntax is needed.
1577
1578           If unsure, say N.
1579
1580 config THUMB2_AVOID_R_ARM_THM_JUMP11
1581         bool "Work around buggy Thumb-2 short branch relocations in gas"
1582         depends on THUMB2_KERNEL && MODULES
1583         default y
1584         help
1585           Various binutils versions can resolve Thumb-2 branches to
1586           locally-defined, preemptible global symbols as short-range "b.n"
1587           branch instructions.
1588
1589           This is a problem, because there's no guarantee the final
1590           destination of the symbol, or any candidate locations for a
1591           trampoline, are within range of the branch.  For this reason, the
1592           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1593           relocation in modules at all, and it makes little sense to add
1594           support.
1595
1596           The symptom is that the kernel fails with an "unsupported
1597           relocation" error when loading some modules.
1598
1599           Until fixed tools are available, passing
1600           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1601           code which hits this problem, at the cost of a bit of extra runtime
1602           stack usage in some cases.
1603
1604           The problem is described in more detail at:
1605               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1606
1607           Only Thumb-2 kernels are affected.
1608
1609           Unless you are sure your tools don't have this problem, say Y.
1610
1611 config ARM_ASM_UNIFIED
1612         bool
1613
1614 config AEABI
1615         bool "Use the ARM EABI to compile the kernel"
1616         help
1617           This option allows for the kernel to be compiled using the latest
1618           ARM ABI (aka EABI).  This is only useful if you are using a user
1619           space environment that is also compiled with EABI.
1620
1621           Since there are major incompatibilities between the legacy ABI and
1622           EABI, especially with regard to structure member alignment, this
1623           option also changes the kernel syscall calling convention to
1624           disambiguate both ABIs and allow for backward compatibility support
1625           (selected with CONFIG_OABI_COMPAT).
1626
1627           To use this you need GCC version 4.0.0 or later.
1628
1629 config OABI_COMPAT
1630         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1631         depends on AEABI && !THUMB2_KERNEL
1632         default y
1633         help
1634           This option preserves the old syscall interface along with the
1635           new (ARM EABI) one. It also provides a compatibility layer to
1636           intercept syscalls that have structure arguments which layout
1637           in memory differs between the legacy ABI and the new ARM EABI
1638           (only for non "thumb" binaries). This option adds a tiny
1639           overhead to all syscalls and produces a slightly larger kernel.
1640           If you know you'll be using only pure EABI user space then you
1641           can say N here. If this option is not selected and you attempt
1642           to execute a legacy ABI binary then the result will be
1643           UNPREDICTABLE (in fact it can be predicted that it won't work
1644           at all). If in doubt say Y.
1645
1646 config ARCH_HAS_HOLES_MEMORYMODEL
1647         bool
1648
1649 config ARCH_SPARSEMEM_ENABLE
1650         bool
1651
1652 config ARCH_SPARSEMEM_DEFAULT
1653         def_bool ARCH_SPARSEMEM_ENABLE
1654
1655 config ARCH_SELECT_MEMORY_MODEL
1656         def_bool ARCH_SPARSEMEM_ENABLE
1657
1658 config HAVE_ARCH_PFN_VALID
1659         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1660
1661 config HIGHMEM
1662         bool "High Memory Support"
1663         depends on MMU
1664         help
1665           The address space of ARM processors is only 4 Gigabytes large
1666           and it has to accommodate user address space, kernel address
1667           space as well as some memory mapped IO. That means that, if you
1668           have a large amount of physical memory and/or IO, not all of the
1669           memory can be "permanently mapped" by the kernel. The physical
1670           memory that is not permanently mapped is called "high memory".
1671
1672           Depending on the selected kernel/user memory split, minimum
1673           vmalloc space and actual amount of RAM, you may not need this
1674           option which should result in a slightly faster kernel.
1675
1676           If unsure, say n.
1677
1678 config HIGHPTE
1679         bool "Allocate 2nd-level pagetables from highmem"
1680         depends on HIGHMEM
1681
1682 config HW_PERF_EVENTS
1683         bool "Enable hardware performance counter support for perf events"
1684         depends on PERF_EVENTS
1685         default y
1686         help
1687           Enable hardware performance counter support for perf events. If
1688           disabled, perf events will use software events only.
1689
1690 source "mm/Kconfig"
1691
1692 config FORCE_MAX_ZONEORDER
1693         int "Maximum zone order" if ARCH_SHMOBILE
1694         range 11 64 if ARCH_SHMOBILE
1695         default "12" if SOC_AM33XX
1696         default "9" if SA1111
1697         default "11"
1698         help
1699           The kernel memory allocator divides physically contiguous memory
1700           blocks into "zones", where each zone is a power of two number of
1701           pages.  This option selects the largest power of two that the kernel
1702           keeps in the memory allocator.  If you need to allocate very large
1703           blocks of physically contiguous memory, then you may need to
1704           increase this value.
1705
1706           This config option is actually maximum order plus one. For example,
1707           a value of 11 means that the largest free memory block is 2^10 pages.
1708
1709 config ALIGNMENT_TRAP
1710         bool
1711         depends on CPU_CP15_MMU
1712         default y if !ARCH_EBSA110
1713         select HAVE_PROC_CPU if PROC_FS
1714         help
1715           ARM processors cannot fetch/store information which is not
1716           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1717           address divisible by 4. On 32-bit ARM processors, these non-aligned
1718           fetch/store instructions will be emulated in software if you say
1719           here, which has a severe performance impact. This is necessary for
1720           correct operation of some network protocols. With an IP-only
1721           configuration it is safe to say N, otherwise say Y.
1722
1723 config UACCESS_WITH_MEMCPY
1724         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1725         depends on MMU
1726         default y if CPU_FEROCEON
1727         help
1728           Implement faster copy_to_user and clear_user methods for CPU
1729           cores where a 8-word STM instruction give significantly higher
1730           memory write throughput than a sequence of individual 32bit stores.
1731
1732           A possible side effect is a slight increase in scheduling latency
1733           between threads sharing the same address space if they invoke
1734           such copy operations with large buffers.
1735
1736           However, if the CPU data cache is using a write-allocate mode,
1737           this option is unlikely to provide any performance gain.
1738
1739 config SECCOMP
1740         bool
1741         prompt "Enable seccomp to safely compute untrusted bytecode"
1742         ---help---
1743           This kernel feature is useful for number crunching applications
1744           that may need to compute untrusted bytecode during their
1745           execution. By using pipes or other transports made available to
1746           the process as file descriptors supporting the read/write
1747           syscalls, it's possible to isolate those applications in
1748           their own address space using seccomp. Once seccomp is
1749           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1750           and the task is only allowed to execute a few safe syscalls
1751           defined by each seccomp mode.
1752
1753 config CC_STACKPROTECTOR
1754         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1755         help
1756           This option turns on the -fstack-protector GCC feature. This
1757           feature puts, at the beginning of functions, a canary value on
1758           the stack just before the return address, and validates
1759           the value just before actually returning.  Stack based buffer
1760           overflows (that need to overwrite this return address) now also
1761           overwrite the canary, which gets detected and the attack is then
1762           neutralized via a kernel panic.
1763           This feature requires gcc version 4.2 or above.
1764
1765 config XEN_DOM0
1766         def_bool y
1767         depends on XEN
1768
1769 config XEN
1770         bool "Xen guest support on ARM (EXPERIMENTAL)"
1771         depends on ARM && AEABI && OF
1772         depends on CPU_V7 && !CPU_V6
1773         depends on !GENERIC_ATOMIC64
1774         help
1775           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1776
1777 endmenu
1778
1779 menu "Boot options"
1780
1781 config USE_OF
1782         bool "Flattened Device Tree support"
1783         select IRQ_DOMAIN
1784         select OF
1785         select OF_EARLY_FLATTREE
1786         help
1787           Include support for flattened device tree machine descriptions.
1788
1789 config ATAGS
1790         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1791         default y
1792         help
1793           This is the traditional way of passing data to the kernel at boot
1794           time. If you are solely relying on the flattened device tree (or
1795           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1796           to remove ATAGS support from your kernel binary.  If unsure,
1797           leave this to y.
1798
1799 config DEPRECATED_PARAM_STRUCT
1800         bool "Provide old way to pass kernel parameters"
1801         depends on ATAGS
1802         help
1803           This was deprecated in 2001 and announced to live on for 5 years.
1804           Some old boot loaders still use this way.
1805
1806 # Compressed boot loader in ROM.  Yes, we really want to ask about
1807 # TEXT and BSS so we preserve their values in the config files.
1808 config ZBOOT_ROM_TEXT
1809         hex "Compressed ROM boot loader base address"
1810         default "0"
1811         help
1812           The physical address at which the ROM-able zImage is to be
1813           placed in the target.  Platforms which normally make use of
1814           ROM-able zImage formats normally set this to a suitable
1815           value in their defconfig file.
1816
1817           If ZBOOT_ROM is not enabled, this has no effect.
1818
1819 config ZBOOT_ROM_BSS
1820         hex "Compressed ROM boot loader BSS address"
1821         default "0"
1822         help
1823           The base address of an area of read/write memory in the target
1824           for the ROM-able zImage which must be available while the
1825           decompressor is running. It must be large enough to hold the
1826           entire decompressed kernel plus an additional 128 KiB.
1827           Platforms which normally make use of ROM-able zImage formats
1828           normally set this to a suitable value in their defconfig file.
1829
1830           If ZBOOT_ROM is not enabled, this has no effect.
1831
1832 config ZBOOT_ROM
1833         bool "Compressed boot loader in ROM/flash"
1834         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1835         help
1836           Say Y here if you intend to execute your compressed kernel image
1837           (zImage) directly from ROM or flash.  If unsure, say N.
1838
1839 choice
1840         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1841         depends on ZBOOT_ROM && ARCH_SH7372
1842         default ZBOOT_ROM_NONE
1843         help
1844           Include experimental SD/MMC loading code in the ROM-able zImage.
1845           With this enabled it is possible to write the ROM-able zImage
1846           kernel image to an MMC or SD card and boot the kernel straight
1847           from the reset vector. At reset the processor Mask ROM will load
1848           the first part of the ROM-able zImage which in turn loads the
1849           rest the kernel image to RAM.
1850
1851 config ZBOOT_ROM_NONE
1852         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1853         help
1854           Do not load image from SD or MMC
1855
1856 config ZBOOT_ROM_MMCIF
1857         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1858         help
1859           Load image from MMCIF hardware block.
1860
1861 config ZBOOT_ROM_SH_MOBILE_SDHI
1862         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1863         help
1864           Load image from SDHI hardware block
1865
1866 endchoice
1867
1868 config ARM_APPENDED_DTB
1869         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1870         depends on OF && !ZBOOT_ROM
1871         help
1872           With this option, the boot code will look for a device tree binary
1873           (DTB) appended to zImage
1874           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1875
1876           This is meant as a backward compatibility convenience for those
1877           systems with a bootloader that can't be upgraded to accommodate
1878           the documented boot protocol using a device tree.
1879
1880           Beware that there is very little in terms of protection against
1881           this option being confused by leftover garbage in memory that might
1882           look like a DTB header after a reboot if no actual DTB is appended
1883           to zImage.  Do not leave this option active in a production kernel
1884           if you don't intend to always append a DTB.  Proper passing of the
1885           location into r2 of a bootloader provided DTB is always preferable
1886           to this option.
1887
1888 config ARM_ATAG_DTB_COMPAT
1889         bool "Supplement the appended DTB with traditional ATAG information"
1890         depends on ARM_APPENDED_DTB
1891         help
1892           Some old bootloaders can't be updated to a DTB capable one, yet
1893           they provide ATAGs with memory configuration, the ramdisk address,
1894           the kernel cmdline string, etc.  Such information is dynamically
1895           provided by the bootloader and can't always be stored in a static
1896           DTB.  To allow a device tree enabled kernel to be used with such
1897           bootloaders, this option allows zImage to extract the information
1898           from the ATAG list and store it at run time into the appended DTB.
1899
1900 choice
1901         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1902         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1903
1904 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1905         bool "Use bootloader kernel arguments if available"
1906         help
1907           Uses the command-line options passed by the boot loader instead of
1908           the device tree bootargs property. If the boot loader doesn't provide
1909           any, the device tree bootargs property will be used.
1910
1911 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1912         bool "Extend with bootloader kernel arguments"
1913         help
1914           The command-line arguments provided by the boot loader will be
1915           appended to the the device tree bootargs property.
1916
1917 endchoice
1918
1919 config CMDLINE
1920         string "Default kernel command string"
1921         default ""
1922         help
1923           On some architectures (EBSA110 and CATS), there is currently no way
1924           for the boot loader to pass arguments to the kernel. For these
1925           architectures, you should supply some command-line options at build
1926           time by entering them here. As a minimum, you should specify the
1927           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1928
1929 choice
1930         prompt "Kernel command line type" if CMDLINE != ""
1931         default CMDLINE_FROM_BOOTLOADER
1932         depends on ATAGS
1933
1934 config CMDLINE_FROM_BOOTLOADER
1935         bool "Use bootloader kernel arguments if available"
1936         help
1937           Uses the command-line options passed by the boot loader. If
1938           the boot loader doesn't provide any, the default kernel command
1939           string provided in CMDLINE will be used.
1940
1941 config CMDLINE_EXTEND
1942         bool "Extend bootloader kernel arguments"
1943         help
1944           The command-line arguments provided by the boot loader will be
1945           appended to the default kernel command string.
1946
1947 config CMDLINE_FORCE
1948         bool "Always use the default kernel command string"
1949         help
1950           Always use the default kernel command string, even if the boot
1951           loader passes other arguments to the kernel.
1952           This is useful if you cannot or don't want to change the
1953           command-line options your boot loader passes to the kernel.
1954 endchoice
1955
1956 config XIP_KERNEL
1957         bool "Kernel Execute-In-Place from ROM"
1958         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1959         help
1960           Execute-In-Place allows the kernel to run from non-volatile storage
1961           directly addressable by the CPU, such as NOR flash. This saves RAM
1962           space since the text section of the kernel is not loaded from flash
1963           to RAM.  Read-write sections, such as the data section and stack,
1964           are still copied to RAM.  The XIP kernel is not compressed since
1965           it has to run directly from flash, so it will take more space to
1966           store it.  The flash address used to link the kernel object files,
1967           and for storing it, is configuration dependent. Therefore, if you
1968           say Y here, you must know the proper physical address where to
1969           store the kernel image depending on your own flash memory usage.
1970
1971           Also note that the make target becomes "make xipImage" rather than
1972           "make zImage" or "make Image".  The final kernel binary to put in
1973           ROM memory will be arch/arm/boot/xipImage.
1974
1975           If unsure, say N.
1976
1977 config XIP_PHYS_ADDR
1978         hex "XIP Kernel Physical Location"
1979         depends on XIP_KERNEL
1980         default "0x00080000"
1981         help
1982           This is the physical address in your flash memory the kernel will
1983           be linked for and stored to.  This address is dependent on your
1984           own flash usage.
1985
1986 config KEXEC
1987         bool "Kexec system call (EXPERIMENTAL)"
1988         depends on (!SMP || HOTPLUG_CPU)
1989         help
1990           kexec is a system call that implements the ability to shutdown your
1991           current kernel, and to start another kernel.  It is like a reboot
1992           but it is independent of the system firmware.   And like a reboot
1993           you can start any kernel with it, not just Linux.
1994
1995           It is an ongoing process to be certain the hardware in a machine
1996           is properly shutdown, so do not be surprised if this code does not
1997           initially work for you.  It may help to enable device hotplugging
1998           support.
1999
2000 config ATAGS_PROC
2001         bool "Export atags in procfs"
2002         depends on ATAGS && KEXEC
2003         default y
2004         help
2005           Should the atags used to boot the kernel be exported in an "atags"
2006           file in procfs. Useful with kexec.
2007
2008 config CRASH_DUMP
2009         bool "Build kdump crash kernel (EXPERIMENTAL)"
2010         help
2011           Generate crash dump after being started by kexec. This should
2012           be normally only set in special crash dump kernels which are
2013           loaded in the main kernel with kexec-tools into a specially
2014           reserved region and then later executed after a crash by
2015           kdump/kexec. The crash dump kernel must be compiled to a
2016           memory address not used by the main kernel
2017
2018           For more details see Documentation/kdump/kdump.txt
2019
2020 config AUTO_ZRELADDR
2021         bool "Auto calculation of the decompressed kernel image address"
2022         depends on !ZBOOT_ROM && !ARCH_U300
2023         help
2024           ZRELADDR is the physical address where the decompressed kernel
2025           image will be placed. If AUTO_ZRELADDR is selected, the address
2026           will be determined at run-time by masking the current IP with
2027           0xf8000000. This assumes the zImage being placed in the first 128MB
2028           from start of memory.
2029
2030 endmenu
2031
2032 menu "CPU Power Management"
2033
2034 if ARCH_HAS_CPUFREQ
2035 source "drivers/cpufreq/Kconfig"
2036
2037 config CPU_FREQ_S3C
2038         bool
2039         help
2040           Internal configuration node for common cpufreq on Samsung SoC
2041
2042 config CPU_FREQ_S3C24XX
2043         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2044         depends on ARCH_S3C24XX && CPU_FREQ
2045         select CPU_FREQ_S3C
2046         help
2047           This enables the CPUfreq driver for the Samsung S3C24XX family
2048           of CPUs.
2049
2050           For details, take a look at <file:Documentation/cpu-freq>.
2051
2052           If in doubt, say N.
2053
2054 config CPU_FREQ_S3C24XX_PLL
2055         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2056         depends on CPU_FREQ_S3C24XX
2057         help
2058           Compile in support for changing the PLL frequency from the
2059           S3C24XX series CPUfreq driver. The PLL takes time to settle
2060           after a frequency change, so by default it is not enabled.
2061
2062           This also means that the PLL tables for the selected CPU(s) will
2063           be built which may increase the size of the kernel image.
2064
2065 config CPU_FREQ_S3C24XX_DEBUG
2066         bool "Debug CPUfreq Samsung driver core"
2067         depends on CPU_FREQ_S3C24XX
2068         help
2069           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2070
2071 config CPU_FREQ_S3C24XX_IODEBUG
2072         bool "Debug CPUfreq Samsung driver IO timing"
2073         depends on CPU_FREQ_S3C24XX
2074         help
2075           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2076
2077 config CPU_FREQ_S3C24XX_DEBUGFS
2078         bool "Export debugfs for CPUFreq"
2079         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2080         help
2081           Export status information via debugfs.
2082
2083 endif
2084
2085 source "drivers/cpuidle/Kconfig"
2086
2087 endmenu
2088
2089 menu "Floating point emulation"
2090
2091 comment "At least one emulation must be selected"
2092
2093 config FPE_NWFPE
2094         bool "NWFPE math emulation"
2095         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2096         ---help---
2097           Say Y to include the NWFPE floating point emulator in the kernel.
2098           This is necessary to run most binaries. Linux does not currently
2099           support floating point hardware so you need to say Y here even if
2100           your machine has an FPA or floating point co-processor podule.
2101
2102           You may say N here if you are going to load the Acorn FPEmulator
2103           early in the bootup.
2104
2105 config FPE_NWFPE_XP
2106         bool "Support extended precision"
2107         depends on FPE_NWFPE
2108         help
2109           Say Y to include 80-bit support in the kernel floating-point
2110           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2111           Note that gcc does not generate 80-bit operations by default,
2112           so in most cases this option only enlarges the size of the
2113           floating point emulator without any good reason.
2114
2115           You almost surely want to say N here.
2116
2117 config FPE_FASTFPE
2118         bool "FastFPE math emulation (EXPERIMENTAL)"
2119         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2120         ---help---
2121           Say Y here to include the FAST floating point emulator in the kernel.
2122           This is an experimental much faster emulator which now also has full
2123           precision for the mantissa.  It does not support any exceptions.
2124           It is very simple, and approximately 3-6 times faster than NWFPE.
2125
2126           It should be sufficient for most programs.  It may be not suitable
2127           for scientific calculations, but you have to check this for yourself.
2128           If you do not feel you need a faster FP emulation you should better
2129           choose NWFPE.
2130
2131 config VFP
2132         bool "VFP-format floating point maths"
2133         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2134         help
2135           Say Y to include VFP support code in the kernel. This is needed
2136           if your hardware includes a VFP unit.
2137
2138           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2139           release notes and additional status information.
2140
2141           Say N if your target does not have VFP hardware.
2142
2143 config VFPv3
2144         bool
2145         depends on VFP
2146         default y if CPU_V7
2147
2148 config NEON
2149         bool "Advanced SIMD (NEON) Extension support"
2150         depends on VFPv3 && CPU_V7
2151         help
2152           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2153           Extension.
2154
2155 endmenu
2156
2157 menu "Userspace binary formats"
2158
2159 source "fs/Kconfig.binfmt"
2160
2161 config ARTHUR
2162         tristate "RISC OS personality"
2163         depends on !AEABI
2164         help
2165           Say Y here to include the kernel code necessary if you want to run
2166           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2167           experimental; if this sounds frightening, say N and sleep in peace.
2168           You can also say M here to compile this support as a module (which
2169           will be called arthur).
2170
2171 endmenu
2172
2173 menu "Power management options"
2174
2175 source "kernel/power/Kconfig"
2176
2177 config ARCH_SUSPEND_POSSIBLE
2178         depends on !ARCH_S5PC100
2179         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2180                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2181         def_bool y
2182
2183 config ARM_CPU_SUSPEND
2184         def_bool PM_SLEEP
2185
2186 endmenu
2187
2188 source "net/Kconfig"
2189
2190 source "drivers/Kconfig"
2191
2192 source "fs/Kconfig"
2193
2194 source "arch/arm/Kconfig.debug"
2195
2196 source "security/Kconfig"
2197
2198 source "crypto/Kconfig"
2199
2200 source "lib/Kconfig"
2201
2202 source "arch/arm/kvm/Kconfig"