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1 /*
2 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
3 *
4 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 /dts-v1/;
12
13 #include "am33xx.dtsi"
14 #include <dt-bindings/interrupt-controller/irq.h>
15
16 / {
17 cpus {
18 cpu@0 {
19 cpu0-supply = <&vdd1_reg>;
20 };
21 };
22
23 memory@80000000 {
24 device_type = "memory";
25 reg = <0x80000000 0x10000000>; /* 256 MB */
26 };
27
28 leds {
29 pinctrl-names = "default";
30 pinctrl-0 = <&leds_pins>;
31
32 compatible = "gpio-leds";
33
34 led0 {
35 label = "com:green:user";
36 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
37 default-state = "on";
38 };
39 };
40
41 vbat: fixedregulator0 {
42 compatible = "regulator-fixed";
43 regulator-name = "vbat";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 regulator-boot-on;
47 };
48
49 vmmc: fixedregulator1 {
50 compatible = "regulator-fixed";
51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 };
55 };
56
57 &am33xx_pinmux {
58 i2c0_pins: pinmux_i2c0_pins {
59 pinctrl-single,pins = <
60 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
61 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
62 >;
63 };
64
65 nandflash_pins: pinmux_nandflash_pins {
66 pinctrl-single,pins = <
67 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
68 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
69 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
70 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
71 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
72 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
73 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
74 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
75 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
76 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
77 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
78 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
79 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
80 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
81 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
82 >;
83 };
84
85 uart0_pins: pinmux_uart0_pins {
86 pinctrl-single,pins = <
87 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
88 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
89 >;
90 };
91
92 leds_pins: pinmux_leds_pins {
93 pinctrl-single,pins = <
94 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
95 >;
96 };
97 };
98
99 &mac {
100 status = "okay";
101 };
102
103 &davinci_mdio {
104 status = "okay";
105
106 ethphy0: ethernet-phy@0 {
107 reg = <0>;
108 };
109
110 ethphy1: ethernet-phy@1 {
111 reg = <1>;
112 };
113 };
114
115 &cpsw_emac0 {
116 phy-handle = <&ethphy0>;
117 phy-mode = "rmii";
118
119 };
120
121 &cpsw_emac1 {
122 phy-handle = <&ethphy1>;
123 phy-mode = "rmii";
124 };
125
126 &phy_sel {
127 rmii-clock-ext;
128 };
129
130 &elm {
131 status = "okay";
132 };
133
134 &gpmc {
135 status = "okay";
136 pinctrl-names = "default";
137 pinctrl-0 = <&nandflash_pins>;
138
139 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
140
141 nand@0,0 {
142 compatible = "ti,omap2-nand";
143 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
144 interrupt-parent = <&gpmc>;
145 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
146 <1 IRQ_TYPE_NONE>; /* termcount */
147 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
148 nand-bus-width = <8>;
149 ti,nand-ecc-opt = "bch8";
150 gpmc,device-width = <1>;
151 gpmc,sync-clk-ps = <0>;
152 gpmc,cs-on-ns = <0>;
153 gpmc,cs-rd-off-ns = <44>;
154 gpmc,cs-wr-off-ns = <44>;
155 gpmc,adv-on-ns = <6>;
156 gpmc,adv-rd-off-ns = <34>;
157 gpmc,adv-wr-off-ns = <44>;
158 gpmc,we-on-ns = <0>;
159 gpmc,we-off-ns = <40>;
160 gpmc,oe-on-ns = <0>;
161 gpmc,oe-off-ns = <54>;
162 gpmc,access-ns = <64>;
163 gpmc,rd-cycle-ns = <82>;
164 gpmc,wr-cycle-ns = <82>;
165 gpmc,bus-turnaround-ns = <0>;
166 gpmc,cycle2cycle-delay-ns = <0>;
167 gpmc,clk-activation-ns = <0>;
168 gpmc,wr-access-ns = <40>;
169 gpmc,wr-data-mux-bus-ns = <0>;
170
171 #address-cells = <1>;
172 #size-cells = <1>;
173 ti,elm-id = <&elm>;
174
175 /* MTD partition table */
176 partition@0 {
177 label = "SPL";
178 reg = <0x00000000 0x000080000>;
179 };
180
181 partition@1 {
182 label = "U-boot";
183 reg = <0x00080000 0x001e0000>;
184 };
185
186 partition@2 {
187 label = "U-Boot Env";
188 reg = <0x00260000 0x00020000>;
189 };
190
191 partition@3 {
192 label = "Kernel";
193 reg = <0x00280000 0x00500000>;
194 };
195
196 partition@4 {
197 label = "File System";
198 reg = <0x00780000 0x007880000>;
199 };
200 };
201 };
202
203 &i2c0 {
204 status = "okay";
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c0_pins>;
207
208 clock-frequency = <400000>;
209
210 tps: tps@2d {
211 reg = <0x2d>;
212 };
213 };
214
215 &mmc1 {
216 status = "okay";
217 vmmc-supply = <&vmmc>;
218 bus-width = <4>;
219 };
220
221 &uart0 {
222 status = "okay";
223 pinctrl-names = "default";
224 pinctrl-0 = <&uart0_pins>;
225 };
226
227 &usb {
228 status = "okay";
229 };
230
231 &usb_ctrl_mod {
232 status = "okay";
233 };
234
235 &usb0_phy {
236 status = "okay";
237 };
238
239 &usb1_phy {
240 status = "okay";
241 };
242
243 &usb0 {
244 status = "okay";
245 };
246
247 &usb1 {
248 status = "okay";
249 dr_mode = "host";
250 };
251
252 &cppi41dma {
253 status = "okay";
254 };
255
256 #include "tps65910.dtsi"
257
258 &tps {
259 vcc1-supply = <&vbat>;
260 vcc2-supply = <&vbat>;
261 vcc3-supply = <&vbat>;
262 vcc4-supply = <&vbat>;
263 vcc5-supply = <&vbat>;
264 vcc6-supply = <&vbat>;
265 vcc7-supply = <&vbat>;
266 vccio-supply = <&vbat>;
267
268 regulators {
269 vrtc_reg: regulator@0 {
270 regulator-always-on;
271 };
272
273 vio_reg: regulator@1 {
274 regulator-always-on;
275 };
276
277 vdd1_reg: regulator@2 {
278 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
279 regulator-name = "vdd_mpu";
280 regulator-min-microvolt = <912500>;
281 regulator-max-microvolt = <1312500>;
282 regulator-boot-on;
283 regulator-always-on;
284 };
285
286 vdd2_reg: regulator@3 {
287 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
288 regulator-name = "vdd_core";
289 regulator-min-microvolt = <912500>;
290 regulator-max-microvolt = <1150000>;
291 regulator-boot-on;
292 regulator-always-on;
293 };
294
295 vdd3_reg: regulator@4 {
296 regulator-always-on;
297 };
298
299 vdig1_reg: regulator@5 {
300 regulator-always-on;
301 };
302
303 vdig2_reg: regulator@6 {
304 regulator-always-on;
305 };
306
307 vpll_reg: regulator@7 {
308 regulator-always-on;
309 };
310
311 vdac_reg: regulator@8 {
312 regulator-always-on;
313 };
314
315 vaux1_reg: regulator@9 {
316 regulator-always-on;
317 };
318
319 vaux2_reg: regulator@10 {
320 regulator-always-on;
321 };
322
323 vaux33_reg: regulator@11 {
324 regulator-always-on;
325 };
326
327 vmmc_reg: regulator@12 {
328 regulator-always-on;
329 };
330 };
331 };
332