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Merge branch 'spectre' of git://git.armlinux.org.uk/~rmk/linux-arm
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / am335x-sl50.dts
1 /*
2 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8 /dts-v1/;
9
10 #include "am33xx.dtsi"
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13
14 / {
15 model = "Toby Churchill SL50 Series";
16 compatible = "tcl,am335x-sl50", "ti,am33xx";
17
18 cpus {
19 cpu@0 {
20 cpu0-supply = <&dcdc2_reg>;
21 };
22 };
23
24 memory@80000000 {
25 device_type = "memory";
26 reg = <0x80000000 0x20000000>; /* 512 MB */
27 };
28
29 chosen {
30 stdout-path = &uart0;
31 };
32
33 leds {
34 compatible = "gpio-leds";
35 pinctrl-names = "default";
36 pinctrl-0 = <&led_pins>;
37
38 led0 {
39 label = "sl50:red:usr0";
40 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
41 default-state = "off";
42 };
43
44 led1 {
45 label = "sl50:green:usr1";
46 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
47 default-state = "off";
48 };
49
50 led2 {
51 label = "sl50:red:usr2";
52 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
53 default-state = "off";
54 };
55
56 led3 {
57 label = "sl50:green:usr3";
58 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
59 default-state = "off";
60 };
61 };
62
63 backlight0: disp0 {
64 compatible = "pwm-backlight";
65 pinctrl-names = "default";
66 pinctrl-0 = <&backlight0_pins>;
67 pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>;
68 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
69 10 11 12 13 14 15 16 17 18 19
70 20 21 22 23 24 25 26 27 28 29
71 30 31 32 33 34 35 36 37 38 39
72 40 41 42 43 44 45 46 47 48 49
73 50 51 52 53 54 55 56 57 58 59
74 60 61 62 63 64 65 66 67 68 69
75 70 71 72 73 74 75 76 77 78 79
76 80 81 82 83 84 85 86 87 88 89
77 90 91 92 93 94 95 96 97 98 99
78 100>;
79 default-brightness-level = <50>;
80 enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
81 power-supply = <&vdd_sys_reg>;
82 };
83
84 backlight1: disp1 {
85 compatible = "pwm-backlight";
86 pinctrl-names = "default";
87 pinctrl-0 = <&backlight1_pins>;
88 pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>;
89 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
90 10 11 12 13 14 15 16 17 18 19
91 20 21 22 23 24 25 26 27 28 29
92 30 31 32 33 34 35 36 37 38 39
93 40 41 42 43 44 45 46 47 48 49
94 50 51 52 53 54 55 56 57 58 59
95 60 61 62 63 64 65 66 67 68 69
96 70 71 72 73 74 75 76 77 78 79
97 80 81 82 83 84 85 86 87 88 89
98 90 91 92 93 94 95 96 97 98 99
99 100>;
100 default-brightness-level = <50>;
101 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
102 power-supply = <&vdd_sys_reg>;
103 };
104
105 clocks {
106 compatible = "simple-bus";
107 #address-cells = <1>;
108 #size-cells = <0>;
109
110 /* audio external oscillator */
111 audio_mclk_fixed: oscillator@0 {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <24576000>; /* 24.576MHz */
115 };
116
117 audio_mclk: audio_mclk_gate@0 {
118 compatible = "gpio-gate-clock";
119 #clock-cells = <0>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&audio_mclk_pins>;
122 clocks = <&audio_mclk_fixed>;
123 enable-gpios = <&gpio1 27 0>;
124 };
125 };
126
127 panel: lcd_panel {
128 compatible = "ti,tilcdc,panel";
129 pinctrl-names = "default";
130 pinctrl-0 = <&lcd_pins>;
131
132 panel-info {
133 ac-bias = <255>;
134 ac-bias-intrpt = <0>;
135 dma-burst-sz = <16>;
136 bpp = <16>;
137 fdd = <0x80>;
138 tft-alt-mode = <0>;
139 mono-8bit-mode = <0>;
140 sync-edge = <0>;
141 sync-ctrl = <1>;
142 raster-order = <0>;
143 fifo-th = <0>;
144 };
145
146 display-timings {
147 native-mode = <&timing0>;
148 timing0: 960x128 {
149 clock-frequency = <18000000>;
150 hactive = <960>;
151 vactive = <272>;
152
153 hback-porch = <40>;
154 hfront-porch = <16>;
155 hsync-len = <24>;
156 hsync-active = <0>;
157
158 vback-porch = <3>;
159 vfront-porch = <8>;
160 vsync-len = <4>;
161 vsync-active = <0>;
162 };
163 };
164 };
165
166 sound {
167 compatible = "audio-graph-card";
168 label = "sound-card";
169 pinctrl-names = "default";
170 pinctrl-0 = <&audio_pa_pins>;
171
172 widgets = "Headphone", "Headphone Jack",
173 "Speaker", "Speaker External",
174 "Line", "Line In",
175 "Microphone", "Microphone Jack";
176
177 routing = "Headphone Jack", "HPLOUT",
178 "Headphone Jack", "HPROUT",
179 "Amplifier", "MONO_LOUT",
180 "Speaker External", "Amplifier",
181 "LINE1R", "Line In",
182 "LINE1L", "Line In",
183 "MIC3L", "Microphone Jack",
184 "MIC3R", "Microphone Jack",
185 "Microphone Jack", "Mic Bias";
186
187 dais = <&cpu_port>;
188
189 pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
190 };
191
192 emmc_pwrseq: pwrseq@0 {
193 compatible = "mmc-pwrseq-emmc";
194 pinctrl-names = "default";
195 pinctrl-0 = <&emmc_pwrseq_pins>;
196 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
197 };
198
199 vdd_sys_reg: regulator@0 {
200 compatible = "regulator-fixed";
201 regulator-name = "vdd_sys_reg";
202 regulator-min-microvolt = <5000000>;
203 regulator-max-microvolt = <5000000>;
204 regulator-always-on;
205 };
206
207 vmmcsd_fixed: fixedregulator0 {
208 compatible = "regulator-fixed";
209 regulator-name = "vmmcsd_fixed";
210 regulator-min-microvolt = <3300000>;
211 regulator-max-microvolt = <3300000>;
212 };
213 };
214
215 &am33xx_pinmux {
216 pinctrl-names = "default";
217 pinctrl-0 = <&lwb_pins>;
218
219 audio_pins: pinmux_audio_pins {
220 pinctrl-single,pins = <
221 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
222 AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
223 AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
224 AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
225 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
226 >;
227 };
228
229 audio_pa_pins: pinmux_audio_pa_pins {
230 pinctrl-single,pins = <
231 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */
232 >;
233 };
234
235 audio_mclk_pins: pinmux_audio_mclk_pins {
236 pinctrl-single,pins = <
237 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
238 >;
239 };
240
241 backlight0_pins: pinmux_backlight0_pins {
242 pinctrl-single,pins = <
243 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7) /* gpmc_wen.gpio2_4 */
244 >;
245 };
246
247 backlight1_pins: pinmux_backlight1_pins {
248 pinctrl-single,pins = <
249 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* gpmc_ad10.gpio0_26 */
250 >;
251 };
252
253 lcd_pins: pinmux_lcd_pins {
254 pinctrl-single,pins = <
255 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
256 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
257 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
258 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
259 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
260 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
261 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
262 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
263 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
264 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
265 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
266 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
267 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
268 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
269 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
270 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
271 AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
272 AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
273 AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
274 AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
275 >;
276 };
277
278 led_pins: pinmux_led_pins {
279 pinctrl-single,pins = <
280 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
281 AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
282 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
283 AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
284 >;
285 };
286
287 uart0_pins: pinmux_uart0_pins {
288 pinctrl-single,pins = <
289 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
290 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
291 >;
292 };
293
294 uart1_pins: pinmux_uart1_pins {
295 pinctrl-single,pins = <
296 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
297 AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
298 >;
299 };
300
301 uart4_pins: pinmux_uart4_pins {
302 pinctrl-single,pins = <
303 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
304 AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
305 >;
306 };
307
308 i2c0_pins: pinmux_i2c0_pins {
309 pinctrl-single,pins = <
310 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
311 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
312 >;
313 };
314
315 i2c2_pins: pinmux_i2c2_pins {
316 pinctrl-single,pins = <
317 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
318 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
319 >;
320 };
321
322 cpsw_default: cpsw_default {
323 pinctrl-single,pins = <
324 /* Slave 1 */
325 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
326 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
327 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
328 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
329 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
330 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
331 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
332 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
333 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
334 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
335 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
336 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
337 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
338 >;
339 };
340
341 cpsw_sleep: cpsw_sleep {
342 pinctrl-single,pins = <
343 /* Slave 1 reset value */
344 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
345 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
346 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
347 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
348 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
349 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
350 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
351 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
352 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
353 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
354 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
355 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
356 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
357 >;
358 };
359
360 davinci_mdio_default: davinci_mdio_default {
361 pinctrl-single,pins = <
362 /* MDIO */
363 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
364 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
365 /* Ethernet */
366 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
367 >;
368 };
369
370 davinci_mdio_sleep: davinci_mdio_sleep {
371 pinctrl-single,pins = <
372 /* MDIO reset value */
373 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
374 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
375 >;
376 };
377
378 mmc1_pins: pinmux_mmc1_pins {
379 pinctrl-single,pins = <
380 AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */
381 >;
382 };
383
384 emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
385 pinctrl-single,pins = <
386 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
387 >;
388 };
389
390 emmc_pins: pinmux_emmc_pins {
391 pinctrl-single,pins = <
392 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
393 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
394 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
395 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
396 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
397 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
398 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
399 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
400 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
401 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
402 >;
403 };
404
405 ehrpwm1_pins: pinmux_ehrpwm1a_pins {
406 pinctrl-single,pins = <
407 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
408 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
409 >;
410 };
411
412 rtc0_irq_pins: pinmux_rtc0_irq_pins {
413 pinctrl-single,pins = <
414 AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad9.gpio0_23 */
415 >;
416 };
417
418 spi0_pins: pinmux_spi0_pins {
419 pinctrl-single,pins = <
420 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MOSI - spi0_d0.spi0_d0 */
421 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MISO - spi0_d1.spi0_d1 */
422 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CLK - spi0_clk.spi0_clk */
423 AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
424 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
425 >;
426 };
427
428 lwb_pins: pinmux_lwb_pins {
429 pinctrl-single,pins = <
430 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
431 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
432 AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
433 /* PDI Bus - Battery system */
434 AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
435 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
436 /* FPGA */
437 AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */
438 AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */
439 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */
440 AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */
441 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */
442 >;
443 };
444 };
445
446 &i2c0 {
447 status = "okay";
448 pinctrl-names = "default";
449 pinctrl-0 = <&i2c0_pins>;
450
451 clock-frequency = <400000>;
452
453 tps: tps@24 {
454 reg = <0x24>;
455 };
456
457 rtc0: rtc@68 {
458 compatible = "dallas,ds1339";
459 pinctrl-names = "default";
460 pinctrl-0 = <&rtc0_irq_pins>;
461 interrupt-parent = <&gpio0>;
462 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */
463 wakeup-source;
464 trickle-resistor-ohms = <2000>;
465 reg = <0x68>;
466 };
467
468 eeprom: eeprom@50 {
469 compatible = "atmel,24c256";
470 reg = <0x50>;
471 };
472
473 gpio_exp: mcp23017@20 {
474 compatible = "microchip,mcp23017";
475 reg = <0x20>;
476 };
477
478 };
479
480 &i2c2 {
481 status = "okay";
482 pinctrl-names = "default";
483 pinctrl-0 = <&i2c2_pins>;
484
485 clock-frequency = <400000>;
486
487 audio_codec: tlv320aic3106@1b {
488 status = "okay";
489 compatible = "ti,tlv320aic3106";
490 #sound-dai-cells = <0>;
491 reg = <0x1b>;
492 ai3x-micbias-vg = <2>; /* 2.5V */
493
494 AVDD-supply = <&ldo4_reg>;
495 IOVDD-supply = <&ldo4_reg>;
496 DRVDD-supply = <&ldo4_reg>;
497 DVDD-supply = <&ldo3_reg>;
498
499 codec_port: port {
500 codec_endpoint: endpoint {
501 remote-endpoint = <&cpu_endpoint>;
502 clocks = <&audio_mclk>;
503 };
504 };
505 };
506
507 /* Ambient Light Sensor */
508 als: isl29023@44 {
509 compatible = "isil,isl29023";
510 reg = <0x44>;
511 };
512 };
513
514 &rtc {
515 status = "disabled";
516 };
517
518 &usb {
519 status = "okay";
520 };
521
522 &usb_ctrl_mod {
523 status = "okay";
524 };
525
526 &usb0_phy {
527 status = "okay";
528 };
529
530 &usb1_phy {
531 status = "okay";
532 };
533
534 &usb0 {
535 status = "okay";
536 dr_mode = "otg";
537 };
538
539 &usb1 {
540 status = "okay";
541 dr_mode = "host";
542 };
543
544 &cppi41dma {
545 status = "okay";
546 };
547
548 &mmc1 {
549 status = "okay";
550 pinctrl-names = "default";
551 pinctrl-0 = <&mmc1_pins>;
552 bus-width = <4>;
553 cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
554 vmmc-supply = <&vmmcsd_fixed>;
555 };
556
557 &mmc2 {
558 status = "okay";
559 pinctrl-names = "default";
560 pinctrl-0 = <&emmc_pins>;
561 bus-width = <8>;
562 vmmc-supply = <&vmmcsd_fixed>;
563 mmc-pwrseq = <&emmc_pwrseq>;
564 };
565
566 &mcasp0 {
567 status = "okay";
568 pinctrl-names = "default";
569 pinctrl-0 = <&audio_pins>;
570 #sound-dai-cells = <0>;
571 op-mode = <0>; /* MCASP_ISS_MODE */
572 tdm-slots = <2>;
573 /* 4 serializers */
574 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
575 0 0 1 2
576 >;
577 tx-num-evt = <32>;
578 rx-num-evt = <32>;
579
580 cpu_port: port {
581 cpu_endpoint: endpoint {
582 remote-endpoint = <&codec_endpoint>;
583
584 dai-format = "dsp_b";
585 bitclock-master = <&codec_port>;
586 frame-master = <&codec_port>;
587 bitclock-inversion;
588 clocks = <&audio_mclk>;
589 };
590 };
591 };
592
593 &uart0 {
594 status = "okay";
595 pinctrl-names = "default";
596 pinctrl-0 = <&uart0_pins>;
597 };
598
599 &uart1 {
600 status = "okay";
601 pinctrl-names = "default";
602 pinctrl-0 = <&uart1_pins>;
603 };
604
605 &uart4 {
606 status = "okay";
607 pinctrl-names = "default";
608 pinctrl-0 = <&uart4_pins>;
609 };
610
611 &spi0 {
612 status = "okay";
613 pinctrl-names = "default";
614 pinctrl-0 = <&spi0_pins>;
615
616 flash: n25q032@1 {
617 #address-cells = <1>;
618 #size-cells = <1>;
619 compatible = "micron,n25q032";
620 reg = <1>;
621 spi-max-frequency = <5000000>;
622 };
623 };
624
625 #include "tps65217.dtsi"
626
627 &tps {
628 ti,pmic-shutdown-controller;
629
630 interrupt-parent = <&intc>;
631 interrupts = <7>; /* NNMI */
632
633 regulators {
634 dcdc1_reg: regulator@0 {
635 /* VDDS_DDR */
636 regulator-min-microvolt = <1500000>;
637 regulator-max-microvolt = <1500000>;
638 regulator-always-on;
639 };
640
641 dcdc2_reg: regulator@1 {
642 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
643 regulator-name = "vdd_mpu";
644 regulator-min-microvolt = <925000>;
645 regulator-max-microvolt = <1325000>;
646 regulator-boot-on;
647 regulator-always-on;
648 };
649
650 dcdc3_reg: regulator@2 {
651 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
652 regulator-name = "vdd_core";
653 regulator-min-microvolt = <925000>;
654 regulator-max-microvolt = <1150000>;
655 regulator-boot-on;
656 regulator-always-on;
657 };
658
659 ldo1_reg: regulator@3 {
660 /* VRTC / VIO / VDDS*/
661 regulator-always-on;
662 regulator-min-microvolt = <1800000>;
663 regulator-max-microvolt = <1800000>;
664 };
665
666 ldo2_reg: regulator@4 {
667 /* VDD_3V3AUX */
668 regulator-always-on;
669 regulator-min-microvolt = <3300000>;
670 regulator-max-microvolt = <3300000>;
671 };
672
673 ldo3_reg: regulator@5 {
674 /* VDD_1V8 */
675 regulator-min-microvolt = <1800000>;
676 regulator-max-microvolt = <1800000>;
677 regulator-always-on;
678 };
679
680 ldo4_reg: regulator@6 {
681 /* VDD_3V3A */
682 regulator-min-microvolt = <3300000>;
683 regulator-max-microvolt = <3300000>;
684 regulator-always-on;
685 };
686 };
687 };
688
689 &cpsw_emac0 {
690 phy-mode = "mii";
691 phy-handle = <&ethphy0>;
692 };
693
694 &mac {
695 status = "okay";
696 pinctrl-names = "default", "sleep";
697 pinctrl-0 = <&cpsw_default>;
698 pinctrl-1 = <&cpsw_sleep>;
699 };
700
701 &davinci_mdio {
702 status = "okay";
703 pinctrl-names = "default", "sleep";
704 pinctrl-0 = <&davinci_mdio_default>;
705 pinctrl-1 = <&davinci_mdio_sleep>;
706 reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
707 reset-delay-us = <100>; /* PHY datasheet states 100us min */
708
709 ethphy0: ethernet-phy@0 {
710 reg = <0>;
711 };
712 };
713
714 &sham {
715 status = "okay";
716 };
717
718 &aes {
719 status = "okay";
720 };
721
722 &epwmss1 {
723 status = "okay";
724 };
725
726 &ehrpwm1 {
727 status = "okay";
728 pinctrl-names = "default";
729 pinctrl-0 = <&ehrpwm1_pins>;
730 };
731
732 &lcdc {
733 status = "okay";
734 };
735
736 &tscadc {
737 status = "okay";
738 };
739
740 &am335x_adc {
741 ti,adc-channels = <0 1 2 3 4 5 6 7>;
742 };