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Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / am33xx.dtsi
1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13
14 #include "skeleton.dtsi"
15
16 / {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
65 clock-latency = <300000>; /* From omap-cpufreq driver */
66 };
67 };
68
69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
74 /*
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
135 cm: syscon@44e10000 {
136 compatible = "ti,am33xx-controlmodule", "syscon";
137 reg = <0x44e10000 0x800>;
138 };
139
140 intc: interrupt-controller@48200000 {
141 compatible = "ti,am33xx-intc";
142 interrupt-controller;
143 #interrupt-cells = <1>;
144 reg = <0x48200000 0x1000>;
145 };
146
147 edma: edma@49000000 {
148 compatible = "ti,edma3";
149 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
150 reg = <0x49000000 0x10000>,
151 <0x44e10f90 0x40>;
152 interrupts = <12 13 14>;
153 #dma-cells = <1>;
154 };
155
156 gpio0: gpio@44e07000 {
157 compatible = "ti,omap4-gpio";
158 ti,hwmods = "gpio1";
159 gpio-controller;
160 #gpio-cells = <2>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
163 reg = <0x44e07000 0x1000>;
164 interrupts = <96>;
165 };
166
167 gpio1: gpio@4804c000 {
168 compatible = "ti,omap4-gpio";
169 ti,hwmods = "gpio2";
170 gpio-controller;
171 #gpio-cells = <2>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 reg = <0x4804c000 0x1000>;
175 interrupts = <98>;
176 };
177
178 gpio2: gpio@481ac000 {
179 compatible = "ti,omap4-gpio";
180 ti,hwmods = "gpio3";
181 gpio-controller;
182 #gpio-cells = <2>;
183 interrupt-controller;
184 #interrupt-cells = <2>;
185 reg = <0x481ac000 0x1000>;
186 interrupts = <32>;
187 };
188
189 gpio3: gpio@481ae000 {
190 compatible = "ti,omap4-gpio";
191 ti,hwmods = "gpio4";
192 gpio-controller;
193 #gpio-cells = <2>;
194 interrupt-controller;
195 #interrupt-cells = <2>;
196 reg = <0x481ae000 0x1000>;
197 interrupts = <62>;
198 };
199
200 uart0: serial@44e09000 {
201 compatible = "ti,omap3-uart";
202 ti,hwmods = "uart1";
203 clock-frequency = <48000000>;
204 reg = <0x44e09000 0x2000>;
205 interrupts = <72>;
206 status = "disabled";
207 };
208
209 uart1: serial@48022000 {
210 compatible = "ti,omap3-uart";
211 ti,hwmods = "uart2";
212 clock-frequency = <48000000>;
213 reg = <0x48022000 0x2000>;
214 interrupts = <73>;
215 status = "disabled";
216 };
217
218 uart2: serial@48024000 {
219 compatible = "ti,omap3-uart";
220 ti,hwmods = "uart3";
221 clock-frequency = <48000000>;
222 reg = <0x48024000 0x2000>;
223 interrupts = <74>;
224 status = "disabled";
225 };
226
227 uart3: serial@481a6000 {
228 compatible = "ti,omap3-uart";
229 ti,hwmods = "uart4";
230 clock-frequency = <48000000>;
231 reg = <0x481a6000 0x2000>;
232 interrupts = <44>;
233 status = "disabled";
234 };
235
236 uart4: serial@481a8000 {
237 compatible = "ti,omap3-uart";
238 ti,hwmods = "uart5";
239 clock-frequency = <48000000>;
240 reg = <0x481a8000 0x2000>;
241 interrupts = <45>;
242 status = "disabled";
243 };
244
245 uart5: serial@481aa000 {
246 compatible = "ti,omap3-uart";
247 ti,hwmods = "uart6";
248 clock-frequency = <48000000>;
249 reg = <0x481aa000 0x2000>;
250 interrupts = <46>;
251 status = "disabled";
252 };
253
254 i2c0: i2c@44e0b000 {
255 compatible = "ti,omap4-i2c";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 ti,hwmods = "i2c1";
259 reg = <0x44e0b000 0x1000>;
260 interrupts = <70>;
261 status = "disabled";
262 };
263
264 i2c1: i2c@4802a000 {
265 compatible = "ti,omap4-i2c";
266 #address-cells = <1>;
267 #size-cells = <0>;
268 ti,hwmods = "i2c2";
269 reg = <0x4802a000 0x1000>;
270 interrupts = <71>;
271 status = "disabled";
272 };
273
274 i2c2: i2c@4819c000 {
275 compatible = "ti,omap4-i2c";
276 #address-cells = <1>;
277 #size-cells = <0>;
278 ti,hwmods = "i2c3";
279 reg = <0x4819c000 0x1000>;
280 interrupts = <30>;
281 status = "disabled";
282 };
283
284 mmc1: mmc@48060000 {
285 compatible = "ti,omap4-hsmmc";
286 ti,hwmods = "mmc1";
287 ti,dual-volt;
288 ti,needs-special-reset;
289 ti,needs-special-hs-handling;
290 dmas = <&edma 24
291 &edma 25>;
292 dma-names = "tx", "rx";
293 interrupts = <64>;
294 interrupt-parent = <&intc>;
295 reg = <0x48060000 0x1000>;
296 status = "disabled";
297 };
298
299 mmc2: mmc@481d8000 {
300 compatible = "ti,omap4-hsmmc";
301 ti,hwmods = "mmc2";
302 ti,needs-special-reset;
303 dmas = <&edma 2
304 &edma 3>;
305 dma-names = "tx", "rx";
306 interrupts = <28>;
307 interrupt-parent = <&intc>;
308 reg = <0x481d8000 0x1000>;
309 status = "disabled";
310 };
311
312 mmc3: mmc@47810000 {
313 compatible = "ti,omap4-hsmmc";
314 ti,hwmods = "mmc3";
315 ti,needs-special-reset;
316 interrupts = <29>;
317 interrupt-parent = <&intc>;
318 reg = <0x47810000 0x1000>;
319 status = "disabled";
320 };
321
322 hwspinlock: spinlock@480ca000 {
323 compatible = "ti,omap4-hwspinlock";
324 reg = <0x480ca000 0x1000>;
325 ti,hwmods = "spinlock";
326 #hwlock-cells = <1>;
327 };
328
329 wdt2: wdt@44e35000 {
330 compatible = "ti,omap3-wdt";
331 ti,hwmods = "wd_timer2";
332 reg = <0x44e35000 0x1000>;
333 interrupts = <91>;
334 };
335
336 dcan0: d_can@481cc000 {
337 compatible = "bosch,d_can";
338 ti,hwmods = "d_can0";
339 reg = <0x481cc000 0x2000
340 0x44e10644 0x4>;
341 interrupts = <52>;
342 status = "disabled";
343 };
344
345 dcan1: d_can@481d0000 {
346 compatible = "bosch,d_can";
347 ti,hwmods = "d_can1";
348 reg = <0x481d0000 0x2000
349 0x44e10644 0x4>;
350 interrupts = <55>;
351 status = "disabled";
352 };
353
354 mailbox: mailbox@480C8000 {
355 compatible = "ti,omap4-mailbox";
356 reg = <0x480C8000 0x200>;
357 interrupts = <77>;
358 ti,hwmods = "mailbox";
359 ti,mbox-num-users = <4>;
360 ti,mbox-num-fifos = <8>;
361 mbox_wkupm3: wkup_m3 {
362 ti,mbox-tx = <0 0 0>;
363 ti,mbox-rx = <0 0 3>;
364 };
365 };
366
367 timer1: timer@44e31000 {
368 compatible = "ti,am335x-timer-1ms";
369 reg = <0x44e31000 0x400>;
370 interrupts = <67>;
371 ti,hwmods = "timer1";
372 ti,timer-alwon;
373 };
374
375 timer2: timer@48040000 {
376 compatible = "ti,am335x-timer";
377 reg = <0x48040000 0x400>;
378 interrupts = <68>;
379 ti,hwmods = "timer2";
380 };
381
382 timer3: timer@48042000 {
383 compatible = "ti,am335x-timer";
384 reg = <0x48042000 0x400>;
385 interrupts = <69>;
386 ti,hwmods = "timer3";
387 };
388
389 timer4: timer@48044000 {
390 compatible = "ti,am335x-timer";
391 reg = <0x48044000 0x400>;
392 interrupts = <92>;
393 ti,hwmods = "timer4";
394 ti,timer-pwm;
395 };
396
397 timer5: timer@48046000 {
398 compatible = "ti,am335x-timer";
399 reg = <0x48046000 0x400>;
400 interrupts = <93>;
401 ti,hwmods = "timer5";
402 ti,timer-pwm;
403 };
404
405 timer6: timer@48048000 {
406 compatible = "ti,am335x-timer";
407 reg = <0x48048000 0x400>;
408 interrupts = <94>;
409 ti,hwmods = "timer6";
410 ti,timer-pwm;
411 };
412
413 timer7: timer@4804a000 {
414 compatible = "ti,am335x-timer";
415 reg = <0x4804a000 0x400>;
416 interrupts = <95>;
417 ti,hwmods = "timer7";
418 ti,timer-pwm;
419 };
420
421 rtc: rtc@44e3e000 {
422 compatible = "ti,da830-rtc";
423 reg = <0x44e3e000 0x1000>;
424 interrupts = <75
425 76>;
426 ti,hwmods = "rtc";
427 };
428
429 spi0: spi@48030000 {
430 compatible = "ti,omap4-mcspi";
431 #address-cells = <1>;
432 #size-cells = <0>;
433 reg = <0x48030000 0x400>;
434 interrupts = <65>;
435 ti,spi-num-cs = <2>;
436 ti,hwmods = "spi0";
437 dmas = <&edma 16
438 &edma 17
439 &edma 18
440 &edma 19>;
441 dma-names = "tx0", "rx0", "tx1", "rx1";
442 status = "disabled";
443 };
444
445 spi1: spi@481a0000 {
446 compatible = "ti,omap4-mcspi";
447 #address-cells = <1>;
448 #size-cells = <0>;
449 reg = <0x481a0000 0x400>;
450 interrupts = <125>;
451 ti,spi-num-cs = <2>;
452 ti,hwmods = "spi1";
453 dmas = <&edma 42
454 &edma 43
455 &edma 44
456 &edma 45>;
457 dma-names = "tx0", "rx0", "tx1", "rx1";
458 status = "disabled";
459 };
460
461 usb: usb@47400000 {
462 compatible = "ti,am33xx-usb";
463 reg = <0x47400000 0x1000>;
464 ranges;
465 #address-cells = <1>;
466 #size-cells = <1>;
467 ti,hwmods = "usb_otg_hs";
468 status = "disabled";
469
470 usb_ctrl_mod: control@44e10620 {
471 compatible = "ti,am335x-usb-ctrl-module";
472 reg = <0x44e10620 0x10
473 0x44e10648 0x4>;
474 reg-names = "phy_ctrl", "wakeup";
475 status = "disabled";
476 };
477
478 usb0_phy: usb-phy@47401300 {
479 compatible = "ti,am335x-usb-phy";
480 reg = <0x47401300 0x100>;
481 reg-names = "phy";
482 status = "disabled";
483 ti,ctrl_mod = <&usb_ctrl_mod>;
484 };
485
486 usb0: usb@47401000 {
487 compatible = "ti,musb-am33xx";
488 status = "disabled";
489 reg = <0x47401400 0x400
490 0x47401000 0x200>;
491 reg-names = "mc", "control";
492
493 interrupts = <18>;
494 interrupt-names = "mc";
495 dr_mode = "otg";
496 mentor,multipoint = <1>;
497 mentor,num-eps = <16>;
498 mentor,ram-bits = <12>;
499 mentor,power = <500>;
500 phys = <&usb0_phy>;
501
502 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
503 &cppi41dma 2 0 &cppi41dma 3 0
504 &cppi41dma 4 0 &cppi41dma 5 0
505 &cppi41dma 6 0 &cppi41dma 7 0
506 &cppi41dma 8 0 &cppi41dma 9 0
507 &cppi41dma 10 0 &cppi41dma 11 0
508 &cppi41dma 12 0 &cppi41dma 13 0
509 &cppi41dma 14 0 &cppi41dma 0 1
510 &cppi41dma 1 1 &cppi41dma 2 1
511 &cppi41dma 3 1 &cppi41dma 4 1
512 &cppi41dma 5 1 &cppi41dma 6 1
513 &cppi41dma 7 1 &cppi41dma 8 1
514 &cppi41dma 9 1 &cppi41dma 10 1
515 &cppi41dma 11 1 &cppi41dma 12 1
516 &cppi41dma 13 1 &cppi41dma 14 1>;
517 dma-names =
518 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
519 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
520 "rx14", "rx15",
521 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
522 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
523 "tx14", "tx15";
524 };
525
526 usb1_phy: usb-phy@47401b00 {
527 compatible = "ti,am335x-usb-phy";
528 reg = <0x47401b00 0x100>;
529 reg-names = "phy";
530 status = "disabled";
531 ti,ctrl_mod = <&usb_ctrl_mod>;
532 };
533
534 usb1: usb@47401800 {
535 compatible = "ti,musb-am33xx";
536 status = "disabled";
537 reg = <0x47401c00 0x400
538 0x47401800 0x200>;
539 reg-names = "mc", "control";
540 interrupts = <19>;
541 interrupt-names = "mc";
542 dr_mode = "otg";
543 mentor,multipoint = <1>;
544 mentor,num-eps = <16>;
545 mentor,ram-bits = <12>;
546 mentor,power = <500>;
547 phys = <&usb1_phy>;
548
549 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
550 &cppi41dma 17 0 &cppi41dma 18 0
551 &cppi41dma 19 0 &cppi41dma 20 0
552 &cppi41dma 21 0 &cppi41dma 22 0
553 &cppi41dma 23 0 &cppi41dma 24 0
554 &cppi41dma 25 0 &cppi41dma 26 0
555 &cppi41dma 27 0 &cppi41dma 28 0
556 &cppi41dma 29 0 &cppi41dma 15 1
557 &cppi41dma 16 1 &cppi41dma 17 1
558 &cppi41dma 18 1 &cppi41dma 19 1
559 &cppi41dma 20 1 &cppi41dma 21 1
560 &cppi41dma 22 1 &cppi41dma 23 1
561 &cppi41dma 24 1 &cppi41dma 25 1
562 &cppi41dma 26 1 &cppi41dma 27 1
563 &cppi41dma 28 1 &cppi41dma 29 1>;
564 dma-names =
565 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
566 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
567 "rx14", "rx15",
568 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
569 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
570 "tx14", "tx15";
571 };
572
573 cppi41dma: dma-controller@47402000 {
574 compatible = "ti,am3359-cppi41";
575 reg = <0x47400000 0x1000
576 0x47402000 0x1000
577 0x47403000 0x1000
578 0x47404000 0x4000>;
579 reg-names = "glue", "controller", "scheduler", "queuemgr";
580 interrupts = <17>;
581 interrupt-names = "glue";
582 #dma-cells = <2>;
583 #dma-channels = <30>;
584 #dma-requests = <256>;
585 status = "disabled";
586 };
587 };
588
589 epwmss0: epwmss@48300000 {
590 compatible = "ti,am33xx-pwmss";
591 reg = <0x48300000 0x10>;
592 ti,hwmods = "epwmss0";
593 #address-cells = <1>;
594 #size-cells = <1>;
595 status = "disabled";
596 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
597 0x48300180 0x48300180 0x80 /* EQEP */
598 0x48300200 0x48300200 0x80>; /* EHRPWM */
599
600 ecap0: ecap@48300100 {
601 compatible = "ti,am33xx-ecap";
602 #pwm-cells = <3>;
603 reg = <0x48300100 0x80>;
604 interrupts = <31>;
605 interrupt-names = "ecap0";
606 ti,hwmods = "ecap0";
607 status = "disabled";
608 };
609
610 ehrpwm0: ehrpwm@48300200 {
611 compatible = "ti,am33xx-ehrpwm";
612 #pwm-cells = <3>;
613 reg = <0x48300200 0x80>;
614 ti,hwmods = "ehrpwm0";
615 status = "disabled";
616 };
617 };
618
619 epwmss1: epwmss@48302000 {
620 compatible = "ti,am33xx-pwmss";
621 reg = <0x48302000 0x10>;
622 ti,hwmods = "epwmss1";
623 #address-cells = <1>;
624 #size-cells = <1>;
625 status = "disabled";
626 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
627 0x48302180 0x48302180 0x80 /* EQEP */
628 0x48302200 0x48302200 0x80>; /* EHRPWM */
629
630 ecap1: ecap@48302100 {
631 compatible = "ti,am33xx-ecap";
632 #pwm-cells = <3>;
633 reg = <0x48302100 0x80>;
634 interrupts = <47>;
635 interrupt-names = "ecap1";
636 ti,hwmods = "ecap1";
637 status = "disabled";
638 };
639
640 ehrpwm1: ehrpwm@48302200 {
641 compatible = "ti,am33xx-ehrpwm";
642 #pwm-cells = <3>;
643 reg = <0x48302200 0x80>;
644 ti,hwmods = "ehrpwm1";
645 status = "disabled";
646 };
647 };
648
649 epwmss2: epwmss@48304000 {
650 compatible = "ti,am33xx-pwmss";
651 reg = <0x48304000 0x10>;
652 ti,hwmods = "epwmss2";
653 #address-cells = <1>;
654 #size-cells = <1>;
655 status = "disabled";
656 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
657 0x48304180 0x48304180 0x80 /* EQEP */
658 0x48304200 0x48304200 0x80>; /* EHRPWM */
659
660 ecap2: ecap@48304100 {
661 compatible = "ti,am33xx-ecap";
662 #pwm-cells = <3>;
663 reg = <0x48304100 0x80>;
664 interrupts = <61>;
665 interrupt-names = "ecap2";
666 ti,hwmods = "ecap2";
667 status = "disabled";
668 };
669
670 ehrpwm2: ehrpwm@48304200 {
671 compatible = "ti,am33xx-ehrpwm";
672 #pwm-cells = <3>;
673 reg = <0x48304200 0x80>;
674 ti,hwmods = "ehrpwm2";
675 status = "disabled";
676 };
677 };
678
679 mac: ethernet@4a100000 {
680 compatible = "ti,cpsw";
681 ti,hwmods = "cpgmac0";
682 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
683 clock-names = "fck", "cpts";
684 cpdma_channels = <8>;
685 ale_entries = <1024>;
686 bd_ram_size = <0x2000>;
687 no_bd_ram = <0>;
688 rx_descs = <64>;
689 mac_control = <0x20>;
690 slaves = <2>;
691 active_slave = <0>;
692 cpts_clock_mult = <0x80000000>;
693 cpts_clock_shift = <29>;
694 reg = <0x4a100000 0x800
695 0x4a101200 0x100>;
696 #address-cells = <1>;
697 #size-cells = <1>;
698 interrupt-parent = <&intc>;
699 /*
700 * c0_rx_thresh_pend
701 * c0_rx_pend
702 * c0_tx_pend
703 * c0_misc_pend
704 */
705 interrupts = <40 41 42 43>;
706 ranges;
707 syscon = <&cm>;
708 status = "disabled";
709
710 davinci_mdio: mdio@4a101000 {
711 compatible = "ti,davinci_mdio";
712 #address-cells = <1>;
713 #size-cells = <0>;
714 ti,hwmods = "davinci_mdio";
715 bus_freq = <1000000>;
716 reg = <0x4a101000 0x100>;
717 status = "disabled";
718 };
719
720 cpsw_emac0: slave@4a100200 {
721 /* Filled in by U-Boot */
722 mac-address = [ 00 00 00 00 00 00 ];
723 };
724
725 cpsw_emac1: slave@4a100300 {
726 /* Filled in by U-Boot */
727 mac-address = [ 00 00 00 00 00 00 ];
728 };
729
730 phy_sel: cpsw-phy-sel@44e10650 {
731 compatible = "ti,am3352-cpsw-phy-sel";
732 reg= <0x44e10650 0x4>;
733 reg-names = "gmii-sel";
734 };
735 };
736
737 ocmcram: ocmcram@40300000 {
738 compatible = "mmio-sram";
739 reg = <0x40300000 0x10000>; /* 64k */
740 };
741
742 wkup_m3: wkup_m3@44d00000 {
743 compatible = "ti,am3353-wkup-m3";
744 reg = <0x44d00000 0x4000 /* M3 UMEM */
745 0x44d80000 0x2000>; /* M3 DMEM */
746 ti,hwmods = "wkup_m3";
747 ti,no-reset-on-init;
748 };
749
750 elm: elm@48080000 {
751 compatible = "ti,am3352-elm";
752 reg = <0x48080000 0x2000>;
753 interrupts = <4>;
754 ti,hwmods = "elm";
755 status = "disabled";
756 };
757
758 lcdc: lcdc@4830e000 {
759 compatible = "ti,am33xx-tilcdc";
760 reg = <0x4830e000 0x1000>;
761 interrupt-parent = <&intc>;
762 interrupts = <36>;
763 ti,hwmods = "lcdc";
764 status = "disabled";
765 };
766
767 tscadc: tscadc@44e0d000 {
768 compatible = "ti,am3359-tscadc";
769 reg = <0x44e0d000 0x1000>;
770 interrupt-parent = <&intc>;
771 interrupts = <16>;
772 ti,hwmods = "adc_tsc";
773 status = "disabled";
774
775 tsc {
776 compatible = "ti,am3359-tsc";
777 };
778 am335x_adc: adc {
779 #io-channel-cells = <1>;
780 compatible = "ti,am3359-adc";
781 };
782 };
783
784 gpmc: gpmc@50000000 {
785 compatible = "ti,am3352-gpmc";
786 ti,hwmods = "gpmc";
787 ti,no-idle-on-init;
788 reg = <0x50000000 0x2000>;
789 interrupts = <100>;
790 gpmc,num-cs = <7>;
791 gpmc,num-waitpins = <2>;
792 #address-cells = <2>;
793 #size-cells = <1>;
794 status = "disabled";
795 };
796
797 sham: sham@53100000 {
798 compatible = "ti,omap4-sham";
799 ti,hwmods = "sham";
800 reg = <0x53100000 0x200>;
801 interrupts = <109>;
802 dmas = <&edma 36>;
803 dma-names = "rx";
804 };
805
806 aes: aes@53500000 {
807 compatible = "ti,omap4-aes";
808 ti,hwmods = "aes";
809 reg = <0x53500000 0xa0>;
810 interrupts = <103>;
811 dmas = <&edma 6>,
812 <&edma 5>;
813 dma-names = "tx", "rx";
814 };
815
816 mcasp0: mcasp@48038000 {
817 compatible = "ti,am33xx-mcasp-audio";
818 ti,hwmods = "mcasp0";
819 reg = <0x48038000 0x2000>,
820 <0x46000000 0x400000>;
821 reg-names = "mpu", "dat";
822 interrupts = <80>, <81>;
823 interrupt-names = "tx", "rx";
824 status = "disabled";
825 dmas = <&edma 8>,
826 <&edma 9>;
827 dma-names = "tx", "rx";
828 };
829
830 mcasp1: mcasp@4803C000 {
831 compatible = "ti,am33xx-mcasp-audio";
832 ti,hwmods = "mcasp1";
833 reg = <0x4803C000 0x2000>,
834 <0x46400000 0x400000>;
835 reg-names = "mpu", "dat";
836 interrupts = <82>, <83>;
837 interrupt-names = "tx", "rx";
838 status = "disabled";
839 dmas = <&edma 10>,
840 <&edma 11>;
841 dma-names = "tx", "rx";
842 };
843
844 rng: rng@48310000 {
845 compatible = "ti,omap4-rng";
846 ti,hwmods = "rng";
847 reg = <0x48310000 0x2000>;
848 interrupts = <111>;
849 };
850 };
851 };
852
853 /include/ "am33xx-clocks.dtsi"
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