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1 /*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13
14 #include "skeleton.dtsi"
15
16 / {
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
19
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33 cpu@0 {
34 compatible = "arm,cortex-a9";
35 device_type = "cpu";
36 reg = <0>;
37
38 clocks = <&dpll_mpu_ck>;
39 clock-names = "cpu";
40
41 clock-latency = <300000>; /* From omap-cpufreq driver */
42 };
43 };
44
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
47 interrupt-controller;
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
50 <0x48240100 0x0100>;
51 };
52
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
56 cache-unified;
57 cache-level = <2>;
58 };
59
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 pinctrl-single,register-width = <32>;
66 pinctrl-single,function-mask = <0xffffffff>;
67 };
68
69 ocp {
70 compatible = "ti,am4372-l3-noc", "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 ti,hwmods = "l3_main";
75 reg = <0x44000000 0x400000
76 0x44800000 0x400000>;
77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
79
80 prcm: prcm@44df0000 {
81 compatible = "ti,am4-prcm";
82 reg = <0x44df0000 0x11000>;
83
84 prcm_clocks: clocks {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 };
88
89 prcm_clockdomains: clockdomains {
90 };
91 };
92
93 scrm: scrm@44e10000 {
94 compatible = "ti,am4-scrm";
95 reg = <0x44e10000 0x2000>;
96
97 scrm_clocks: clocks {
98 #address-cells = <1>;
99 #size-cells = <0>;
100 };
101
102 scrm_clockdomains: clockdomains {
103 };
104 };
105
106 edma: edma@49000000 {
107 compatible = "ti,edma3";
108 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
109 reg = <0x49000000 0x10000>,
110 <0x44e10f90 0x10>;
111 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
113 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
114 #dma-cells = <1>;
115 };
116
117 uart0: serial@44e09000 {
118 compatible = "ti,am4372-uart","ti,omap2-uart";
119 reg = <0x44e09000 0x2000>;
120 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
121 ti,hwmods = "uart1";
122 };
123
124 uart1: serial@48022000 {
125 compatible = "ti,am4372-uart","ti,omap2-uart";
126 reg = <0x48022000 0x2000>;
127 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
128 ti,hwmods = "uart2";
129 status = "disabled";
130 };
131
132 uart2: serial@48024000 {
133 compatible = "ti,am4372-uart","ti,omap2-uart";
134 reg = <0x48024000 0x2000>;
135 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
136 ti,hwmods = "uart3";
137 status = "disabled";
138 };
139
140 uart3: serial@481a6000 {
141 compatible = "ti,am4372-uart","ti,omap2-uart";
142 reg = <0x481a6000 0x2000>;
143 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
144 ti,hwmods = "uart4";
145 status = "disabled";
146 };
147
148 uart4: serial@481a8000 {
149 compatible = "ti,am4372-uart","ti,omap2-uart";
150 reg = <0x481a8000 0x2000>;
151 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
152 ti,hwmods = "uart5";
153 status = "disabled";
154 };
155
156 uart5: serial@481aa000 {
157 compatible = "ti,am4372-uart","ti,omap2-uart";
158 reg = <0x481aa000 0x2000>;
159 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
160 ti,hwmods = "uart6";
161 status = "disabled";
162 };
163
164 mailbox: mailbox@480C8000 {
165 compatible = "ti,omap4-mailbox";
166 reg = <0x480C8000 0x200>;
167 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
168 ti,hwmods = "mailbox";
169 ti,mbox-num-users = <4>;
170 ti,mbox-num-fifos = <8>;
171 ti,mbox-names = "wkup_m3";
172 ti,mbox-data = <0 0 0 0>;
173 status = "disabled";
174 };
175
176 timer1: timer@44e31000 {
177 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
178 reg = <0x44e31000 0x400>;
179 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
180 ti,timer-alwon;
181 ti,hwmods = "timer1";
182 };
183
184 timer2: timer@48040000 {
185 compatible = "ti,am4372-timer","ti,am335x-timer";
186 reg = <0x48040000 0x400>;
187 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
188 ti,hwmods = "timer2";
189 };
190
191 timer3: timer@48042000 {
192 compatible = "ti,am4372-timer","ti,am335x-timer";
193 reg = <0x48042000 0x400>;
194 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
195 ti,hwmods = "timer3";
196 status = "disabled";
197 };
198
199 timer4: timer@48044000 {
200 compatible = "ti,am4372-timer","ti,am335x-timer";
201 reg = <0x48044000 0x400>;
202 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
203 ti,timer-pwm;
204 ti,hwmods = "timer4";
205 status = "disabled";
206 };
207
208 timer5: timer@48046000 {
209 compatible = "ti,am4372-timer","ti,am335x-timer";
210 reg = <0x48046000 0x400>;
211 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
212 ti,timer-pwm;
213 ti,hwmods = "timer5";
214 status = "disabled";
215 };
216
217 timer6: timer@48048000 {
218 compatible = "ti,am4372-timer","ti,am335x-timer";
219 reg = <0x48048000 0x400>;
220 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
221 ti,timer-pwm;
222 ti,hwmods = "timer6";
223 status = "disabled";
224 };
225
226 timer7: timer@4804a000 {
227 compatible = "ti,am4372-timer","ti,am335x-timer";
228 reg = <0x4804a000 0x400>;
229 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
230 ti,timer-pwm;
231 ti,hwmods = "timer7";
232 status = "disabled";
233 };
234
235 timer8: timer@481c1000 {
236 compatible = "ti,am4372-timer","ti,am335x-timer";
237 reg = <0x481c1000 0x400>;
238 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
239 ti,hwmods = "timer8";
240 status = "disabled";
241 };
242
243 timer9: timer@4833d000 {
244 compatible = "ti,am4372-timer","ti,am335x-timer";
245 reg = <0x4833d000 0x400>;
246 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
247 ti,hwmods = "timer9";
248 status = "disabled";
249 };
250
251 timer10: timer@4833f000 {
252 compatible = "ti,am4372-timer","ti,am335x-timer";
253 reg = <0x4833f000 0x400>;
254 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
255 ti,hwmods = "timer10";
256 status = "disabled";
257 };
258
259 timer11: timer@48341000 {
260 compatible = "ti,am4372-timer","ti,am335x-timer";
261 reg = <0x48341000 0x400>;
262 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
263 ti,hwmods = "timer11";
264 status = "disabled";
265 };
266
267 counter32k: counter@44e86000 {
268 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
269 reg = <0x44e86000 0x40>;
270 ti,hwmods = "counter_32k";
271 };
272
273 rtc@44e3e000 {
274 compatible = "ti,am4372-rtc","ti,da830-rtc";
275 reg = <0x44e3e000 0x1000>;
276 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
277 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
278 ti,hwmods = "rtc";
279 status = "disabled";
280 };
281
282 wdt@44e35000 {
283 compatible = "ti,am4372-wdt","ti,omap3-wdt";
284 reg = <0x44e35000 0x1000>;
285 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
286 ti,hwmods = "wd_timer2";
287 };
288
289 gpio0: gpio@44e07000 {
290 compatible = "ti,am4372-gpio","ti,omap4-gpio";
291 reg = <0x44e07000 0x1000>;
292 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
293 gpio-controller;
294 #gpio-cells = <2>;
295 interrupt-controller;
296 #interrupt-cells = <2>;
297 ti,hwmods = "gpio1";
298 status = "disabled";
299 };
300
301 gpio1: gpio@4804c000 {
302 compatible = "ti,am4372-gpio","ti,omap4-gpio";
303 reg = <0x4804c000 0x1000>;
304 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
305 gpio-controller;
306 #gpio-cells = <2>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
309 ti,hwmods = "gpio2";
310 status = "disabled";
311 };
312
313 gpio2: gpio@481ac000 {
314 compatible = "ti,am4372-gpio","ti,omap4-gpio";
315 reg = <0x481ac000 0x1000>;
316 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
317 gpio-controller;
318 #gpio-cells = <2>;
319 interrupt-controller;
320 #interrupt-cells = <2>;
321 ti,hwmods = "gpio3";
322 status = "disabled";
323 };
324
325 gpio3: gpio@481ae000 {
326 compatible = "ti,am4372-gpio","ti,omap4-gpio";
327 reg = <0x481ae000 0x1000>;
328 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
329 gpio-controller;
330 #gpio-cells = <2>;
331 interrupt-controller;
332 #interrupt-cells = <2>;
333 ti,hwmods = "gpio4";
334 status = "disabled";
335 };
336
337 gpio4: gpio@48320000 {
338 compatible = "ti,am4372-gpio","ti,omap4-gpio";
339 reg = <0x48320000 0x1000>;
340 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
341 gpio-controller;
342 #gpio-cells = <2>;
343 interrupt-controller;
344 #interrupt-cells = <2>;
345 ti,hwmods = "gpio5";
346 status = "disabled";
347 };
348
349 gpio5: gpio@48322000 {
350 compatible = "ti,am4372-gpio","ti,omap4-gpio";
351 reg = <0x48322000 0x1000>;
352 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
353 gpio-controller;
354 #gpio-cells = <2>;
355 interrupt-controller;
356 #interrupt-cells = <2>;
357 ti,hwmods = "gpio6";
358 status = "disabled";
359 };
360
361 hwspinlock: spinlock@480ca000 {
362 compatible = "ti,omap4-hwspinlock";
363 reg = <0x480ca000 0x1000>;
364 ti,hwmods = "spinlock";
365 #hwlock-cells = <1>;
366 };
367
368 i2c0: i2c@44e0b000 {
369 compatible = "ti,am4372-i2c","ti,omap4-i2c";
370 reg = <0x44e0b000 0x1000>;
371 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
372 ti,hwmods = "i2c1";
373 #address-cells = <1>;
374 #size-cells = <0>;
375 status = "disabled";
376 };
377
378 i2c1: i2c@4802a000 {
379 compatible = "ti,am4372-i2c","ti,omap4-i2c";
380 reg = <0x4802a000 0x1000>;
381 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
382 ti,hwmods = "i2c2";
383 #address-cells = <1>;
384 #size-cells = <0>;
385 status = "disabled";
386 };
387
388 i2c2: i2c@4819c000 {
389 compatible = "ti,am4372-i2c","ti,omap4-i2c";
390 reg = <0x4819c000 0x1000>;
391 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
392 ti,hwmods = "i2c3";
393 #address-cells = <1>;
394 #size-cells = <0>;
395 status = "disabled";
396 };
397
398 spi0: spi@48030000 {
399 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
400 reg = <0x48030000 0x400>;
401 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
402 ti,hwmods = "spi0";
403 #address-cells = <1>;
404 #size-cells = <0>;
405 status = "disabled";
406 };
407
408 mmc1: mmc@48060000 {
409 compatible = "ti,omap4-hsmmc";
410 reg = <0x48060000 0x1000>;
411 ti,hwmods = "mmc1";
412 ti,dual-volt;
413 ti,needs-special-reset;
414 dmas = <&edma 24
415 &edma 25>;
416 dma-names = "tx", "rx";
417 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
418 status = "disabled";
419 };
420
421 mmc2: mmc@481d8000 {
422 compatible = "ti,omap4-hsmmc";
423 reg = <0x481d8000 0x1000>;
424 ti,hwmods = "mmc2";
425 ti,needs-special-reset;
426 dmas = <&edma 2
427 &edma 3>;
428 dma-names = "tx", "rx";
429 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
430 status = "disabled";
431 };
432
433 mmc3: mmc@47810000 {
434 compatible = "ti,omap4-hsmmc";
435 reg = <0x47810000 0x1000>;
436 ti,hwmods = "mmc3";
437 ti,needs-special-reset;
438 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
439 status = "disabled";
440 };
441
442 spi1: spi@481a0000 {
443 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
444 reg = <0x481a0000 0x400>;
445 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
446 ti,hwmods = "spi1";
447 #address-cells = <1>;
448 #size-cells = <0>;
449 status = "disabled";
450 };
451
452 spi2: spi@481a2000 {
453 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
454 reg = <0x481a2000 0x400>;
455 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
456 ti,hwmods = "spi2";
457 #address-cells = <1>;
458 #size-cells = <0>;
459 status = "disabled";
460 };
461
462 spi3: spi@481a4000 {
463 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
464 reg = <0x481a4000 0x400>;
465 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
466 ti,hwmods = "spi3";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 status = "disabled";
470 };
471
472 spi4: spi@48345000 {
473 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
474 reg = <0x48345000 0x400>;
475 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
476 ti,hwmods = "spi4";
477 #address-cells = <1>;
478 #size-cells = <0>;
479 status = "disabled";
480 };
481
482 mac: ethernet@4a100000 {
483 compatible = "ti,am4372-cpsw","ti,cpsw";
484 reg = <0x4a100000 0x800
485 0x4a101200 0x100>;
486 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
487 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
488 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
489 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
490 #address-cells = <1>;
491 #size-cells = <1>;
492 ti,hwmods = "cpgmac0";
493 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
494 clock-names = "fck", "cpts";
495 status = "disabled";
496 cpdma_channels = <8>;
497 ale_entries = <1024>;
498 bd_ram_size = <0x2000>;
499 no_bd_ram = <0>;
500 rx_descs = <64>;
501 mac_control = <0x20>;
502 slaves = <2>;
503 active_slave = <0>;
504 cpts_clock_mult = <0x80000000>;
505 cpts_clock_shift = <29>;
506 ranges;
507
508 davinci_mdio: mdio@4a101000 {
509 compatible = "ti,am4372-mdio","ti,davinci_mdio";
510 reg = <0x4a101000 0x100>;
511 #address-cells = <1>;
512 #size-cells = <0>;
513 ti,hwmods = "davinci_mdio";
514 bus_freq = <1000000>;
515 status = "disabled";
516 };
517
518 cpsw_emac0: slave@4a100200 {
519 /* Filled in by U-Boot */
520 mac-address = [ 00 00 00 00 00 00 ];
521 };
522
523 cpsw_emac1: slave@4a100300 {
524 /* Filled in by U-Boot */
525 mac-address = [ 00 00 00 00 00 00 ];
526 };
527
528 phy_sel: cpsw-phy-sel@44e10650 {
529 compatible = "ti,am43xx-cpsw-phy-sel";
530 reg= <0x44e10650 0x4>;
531 reg-names = "gmii-sel";
532 };
533 };
534
535 epwmss0: epwmss@48300000 {
536 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
537 reg = <0x48300000 0x10>;
538 #address-cells = <1>;
539 #size-cells = <1>;
540 ranges;
541 ti,hwmods = "epwmss0";
542 status = "disabled";
543
544 ecap0: ecap@48300100 {
545 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
546 #pwm-cells = <3>;
547 reg = <0x48300100 0x80>;
548 ti,hwmods = "ecap0";
549 status = "disabled";
550 };
551
552 ehrpwm0: ehrpwm@48300200 {
553 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
554 #pwm-cells = <3>;
555 reg = <0x48300200 0x80>;
556 ti,hwmods = "ehrpwm0";
557 status = "disabled";
558 };
559 };
560
561 epwmss1: epwmss@48302000 {
562 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
563 reg = <0x48302000 0x10>;
564 #address-cells = <1>;
565 #size-cells = <1>;
566 ranges;
567 ti,hwmods = "epwmss1";
568 status = "disabled";
569
570 ecap1: ecap@48302100 {
571 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
572 #pwm-cells = <3>;
573 reg = <0x48302100 0x80>;
574 ti,hwmods = "ecap1";
575 status = "disabled";
576 };
577
578 ehrpwm1: ehrpwm@48302200 {
579 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
580 #pwm-cells = <3>;
581 reg = <0x48302200 0x80>;
582 ti,hwmods = "ehrpwm1";
583 status = "disabled";
584 };
585 };
586
587 epwmss2: epwmss@48304000 {
588 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
589 reg = <0x48304000 0x10>;
590 #address-cells = <1>;
591 #size-cells = <1>;
592 ranges;
593 ti,hwmods = "epwmss2";
594 status = "disabled";
595
596 ecap2: ecap@48304100 {
597 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
598 #pwm-cells = <3>;
599 reg = <0x48304100 0x80>;
600 ti,hwmods = "ecap2";
601 status = "disabled";
602 };
603
604 ehrpwm2: ehrpwm@48304200 {
605 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
606 #pwm-cells = <3>;
607 reg = <0x48304200 0x80>;
608 ti,hwmods = "ehrpwm2";
609 status = "disabled";
610 };
611 };
612
613 epwmss3: epwmss@48306000 {
614 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
615 reg = <0x48306000 0x10>;
616 #address-cells = <1>;
617 #size-cells = <1>;
618 ranges;
619 ti,hwmods = "epwmss3";
620 status = "disabled";
621
622 ehrpwm3: ehrpwm@48306200 {
623 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
624 #pwm-cells = <3>;
625 reg = <0x48306200 0x80>;
626 ti,hwmods = "ehrpwm3";
627 status = "disabled";
628 };
629 };
630
631 epwmss4: epwmss@48308000 {
632 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
633 reg = <0x48308000 0x10>;
634 #address-cells = <1>;
635 #size-cells = <1>;
636 ranges;
637 ti,hwmods = "epwmss4";
638 status = "disabled";
639
640 ehrpwm4: ehrpwm@48308200 {
641 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
642 #pwm-cells = <3>;
643 reg = <0x48308200 0x80>;
644 ti,hwmods = "ehrpwm4";
645 status = "disabled";
646 };
647 };
648
649 epwmss5: epwmss@4830a000 {
650 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
651 reg = <0x4830a000 0x10>;
652 #address-cells = <1>;
653 #size-cells = <1>;
654 ranges;
655 ti,hwmods = "epwmss5";
656 status = "disabled";
657
658 ehrpwm5: ehrpwm@4830a200 {
659 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
660 #pwm-cells = <3>;
661 reg = <0x4830a200 0x80>;
662 ti,hwmods = "ehrpwm5";
663 status = "disabled";
664 };
665 };
666
667 sham: sham@53100000 {
668 compatible = "ti,omap5-sham";
669 ti,hwmods = "sham";
670 reg = <0x53100000 0x300>;
671 dmas = <&edma 36>;
672 dma-names = "rx";
673 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
674 };
675
676 aes: aes@53501000 {
677 compatible = "ti,omap4-aes";
678 ti,hwmods = "aes";
679 reg = <0x53501000 0xa0>;
680 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
681 dmas = <&edma 6
682 &edma 5>;
683 dma-names = "tx", "rx";
684 };
685
686 des: des@53701000 {
687 compatible = "ti,omap4-des";
688 ti,hwmods = "des";
689 reg = <0x53701000 0xa0>;
690 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
691 dmas = <&edma 34
692 &edma 33>;
693 dma-names = "tx", "rx";
694 };
695
696 mcasp0: mcasp@48038000 {
697 compatible = "ti,am33xx-mcasp-audio";
698 ti,hwmods = "mcasp0";
699 reg = <0x48038000 0x2000>,
700 <0x46000000 0x400000>;
701 reg-names = "mpu", "dat";
702 interrupts = <80>, <81>;
703 interrupt-names = "tx", "rx";
704 status = "disabled";
705 dmas = <&edma 8>,
706 <&edma 9>;
707 dma-names = "tx", "rx";
708 };
709
710 mcasp1: mcasp@4803C000 {
711 compatible = "ti,am33xx-mcasp-audio";
712 ti,hwmods = "mcasp1";
713 reg = <0x4803C000 0x2000>,
714 <0x46400000 0x400000>;
715 reg-names = "mpu", "dat";
716 interrupts = <82>, <83>;
717 interrupt-names = "tx", "rx";
718 status = "disabled";
719 dmas = <&edma 10>,
720 <&edma 11>;
721 dma-names = "tx", "rx";
722 };
723
724 elm: elm@48080000 {
725 compatible = "ti,am3352-elm";
726 reg = <0x48080000 0x2000>;
727 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
728 ti,hwmods = "elm";
729 clocks = <&l4ls_gclk>;
730 clock-names = "fck";
731 status = "disabled";
732 };
733
734 gpmc: gpmc@50000000 {
735 compatible = "ti,am3352-gpmc";
736 ti,hwmods = "gpmc";
737 clocks = <&l3s_gclk>;
738 clock-names = "fck";
739 reg = <0x50000000 0x2000>;
740 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
741 gpmc,num-cs = <7>;
742 gpmc,num-waitpins = <2>;
743 #address-cells = <2>;
744 #size-cells = <1>;
745 status = "disabled";
746 };
747
748 am43xx_control_usb2phy1: control-phy@44e10620 {
749 compatible = "ti,control-phy-usb2-am437";
750 reg = <0x44e10620 0x4>;
751 reg-names = "power";
752 };
753
754 am43xx_control_usb2phy2: control-phy@0x44e10628 {
755 compatible = "ti,control-phy-usb2-am437";
756 reg = <0x44e10628 0x4>;
757 reg-names = "power";
758 };
759
760 ocp2scp0: ocp2scp@483a8000 {
761 compatible = "ti,omap-ocp2scp";
762 #address-cells = <1>;
763 #size-cells = <1>;
764 ranges;
765 ti,hwmods = "ocp2scp0";
766
767 usb2_phy1: phy@483a8000 {
768 compatible = "ti,am437x-usb2";
769 reg = <0x483a8000 0x8000>;
770 ctrl-module = <&am43xx_control_usb2phy1>;
771 clocks = <&usb_phy0_always_on_clk32k>,
772 <&usb_otg_ss0_refclk960m>;
773 clock-names = "wkupclk", "refclk";
774 #phy-cells = <0>;
775 status = "disabled";
776 };
777 };
778
779 ocp2scp1: ocp2scp@483e8000 {
780 compatible = "ti,omap-ocp2scp";
781 #address-cells = <1>;
782 #size-cells = <1>;
783 ranges;
784 ti,hwmods = "ocp2scp1";
785
786 usb2_phy2: phy@483e8000 {
787 compatible = "ti,am437x-usb2";
788 reg = <0x483e8000 0x8000>;
789 ctrl-module = <&am43xx_control_usb2phy2>;
790 clocks = <&usb_phy1_always_on_clk32k>,
791 <&usb_otg_ss1_refclk960m>;
792 clock-names = "wkupclk", "refclk";
793 #phy-cells = <0>;
794 status = "disabled";
795 };
796 };
797
798 dwc3_1: omap_dwc3@48380000 {
799 compatible = "ti,am437x-dwc3";
800 ti,hwmods = "usb_otg_ss0";
801 reg = <0x48380000 0x10000>;
802 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
803 #address-cells = <1>;
804 #size-cells = <1>;
805 utmi-mode = <1>;
806 ranges;
807
808 usb1: usb@48390000 {
809 compatible = "synopsys,dwc3";
810 reg = <0x48390000 0x17000>;
811 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
812 phys = <&usb2_phy1>;
813 phy-names = "usb2-phy";
814 maximum-speed = "high-speed";
815 dr_mode = "otg";
816 status = "disabled";
817 };
818 };
819
820 dwc3_2: omap_dwc3@483c0000 {
821 compatible = "ti,am437x-dwc3";
822 ti,hwmods = "usb_otg_ss1";
823 reg = <0x483c0000 0x10000>;
824 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
825 #address-cells = <1>;
826 #size-cells = <1>;
827 utmi-mode = <1>;
828 ranges;
829
830 usb2: usb@483d0000 {
831 compatible = "synopsys,dwc3";
832 reg = <0x483d0000 0x17000>;
833 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
834 phys = <&usb2_phy2>;
835 phy-names = "usb2-phy";
836 maximum-speed = "high-speed";
837 dr_mode = "otg";
838 status = "disabled";
839 };
840 };
841
842 qspi: qspi@47900000 {
843 compatible = "ti,am4372-qspi";
844 reg = <0x47900000 0x100>;
845 #address-cells = <1>;
846 #size-cells = <0>;
847 ti,hwmods = "qspi";
848 interrupts = <0 138 0x4>;
849 num-cs = <4>;
850 status = "disabled";
851 };
852
853 hdq: hdq@48347000 {
854 compatible = "ti,am43xx-hdq";
855 reg = <0x48347000 0x1000>;
856 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
857 clocks = <&func_12m_clk>;
858 clock-names = "fck";
859 ti,hwmods = "hdq1w";
860 status = "disabled";
861 };
862
863 dss: dss@4832a000 {
864 compatible = "ti,omap3-dss";
865 reg = <0x4832a000 0x200>;
866 status = "disabled";
867 ti,hwmods = "dss_core";
868 clocks = <&disp_clk>;
869 clock-names = "fck";
870 #address-cells = <1>;
871 #size-cells = <1>;
872 ranges;
873
874 dispc@4832a400 {
875 compatible = "ti,omap3-dispc";
876 reg = <0x4832a400 0x400>;
877 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
878 ti,hwmods = "dss_dispc";
879 clocks = <&disp_clk>;
880 clock-names = "fck";
881 };
882
883 rfbi: rfbi@4832a800 {
884 compatible = "ti,omap3-rfbi";
885 reg = <0x4832a800 0x100>;
886 ti,hwmods = "dss_rfbi";
887 clocks = <&disp_clk>;
888 clock-names = "fck";
889 };
890 };
891 };
892 };
893
894 /include/ "am43xx-clocks.dtsi"