arch/arm/boot/dts/am437x-sk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /* AM437x SK EVM */
  10
  11 /dts-v1/;
  12
  13 #include "am4372.dtsi"
  14 #include <dt-bindings/pinctrl/am43xx.h>
  15 #include <dt-bindings/pwm/pwm.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/input/input.h>
  18 #include <dt-bindings/interrupt-controller/irq.h>
  19
  20 / {
  21         model = "TI AM437x SK EVM";
  22         compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
  23
  24         aliases {
  25                 display0 = &lcd0;
  26         };
  27
  28         chosen {
  29                 stdout-path = &uart0;
  30         };
  31
  32         /* fixed 32k external oscillator clock */
  33         clk_32k_rtc: clk_32k_rtc {
  34                 #clock-cells = <0>;
  35                 compatible = "fixed-clock";
  36                 clock-frequency = <32768>;
  37         };
  38
  39         lcd_bl: backlight {
  40                 compatible = "pwm-backlight";
  41                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  42                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
  43                 default-brightness-level = <8>;
  44         };
  45
  46         sound {
  47                 compatible = "simple-audio-card";
  48                 simple-audio-card,name = "AM437x-SK-EVM";
  49                 simple-audio-card,widgets =
  50                         "Headphone", "Headphone Jack",
  51                         "Line", "Line In";
  52                 simple-audio-card,routing =
  53                         "Headphone Jack",       "HPLOUT",
  54                         "Headphone Jack",       "HPROUT",
  55                         "LINE1L",               "Line In",
  56                         "LINE1R",               "Line In";
  57                 simple-audio-card,format = "dsp_b";
  58                 simple-audio-card,bitclock-master = <&sound_master>;
  59                 simple-audio-card,frame-master = <&sound_master>;
  60                 simple-audio-card,bitclock-inversion;
  61
  62                 simple-audio-card,cpu {
  63                         sound-dai = <&mcasp1>;
  64                 };
  65
  66                 sound_master: simple-audio-card,codec {
  67                         sound-dai = <&tlv320aic3106>;
  68                         system-clock-frequency = <24000000>;
  69                 };
  70         };
  71
  72         matrix_keypad: matrix_keypad0 {
  73                 compatible = "gpio-matrix-keypad";
  74
  75                 pinctrl-names = "default";
  76                 pinctrl-0 = <&matrix_keypad_pins>;
  77
  78                 debounce-delay-ms = <5>;
  79                 col-scan-delay-us = <5>;
  80
  81                 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH          /* Bank5, pin5 */
  82                                 &gpio5 6 GPIO_ACTIVE_HIGH>;     /* Bank5, pin6 */
  83
  84                 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH         /* Bank5, pin13 */
  85                                 &gpio5 4 GPIO_ACTIVE_HIGH>;     /* Bank5, pin4 */
  86
  87                 linux,keymap = <
  88                                 MATRIX_KEY(0, 0, KEY_DOWN)
  89                                 MATRIX_KEY(0, 1, KEY_RIGHT)
  90                                 MATRIX_KEY(1, 0, KEY_LEFT)
  91                                 MATRIX_KEY(1, 1, KEY_UP)
  92                         >;
  93         };
  94
  95         leds {
  96                 compatible = "gpio-leds";
  97
  98                 pinctrl-names = "default";
  99                 pinctrl-0 = <&leds_pins>;
 100
 101                 led0 {
 102                         label = "am437x-sk:red:heartbeat";
 103                         gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 0 */
 104                         linux,default-trigger = "heartbeat";
 105                         default-state = "off";
 106                 };
 107
 108                 led1 {
 109                         label = "am437x-sk:green:mmc1";
 110                         gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 1 */
 111                         linux,default-trigger = "mmc0";
 112                         default-state = "off";
 113                 };
 114
 115                 led2 {
 116                         label = "am437x-sk:blue:cpu0";
 117                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 2 */
 118                         linux,default-trigger = "cpu0";
 119                         default-state = "off";
 120                 };
 121
 122                 led3 {
 123                         label = "am437x-sk:blue:usr3";
 124                         gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 3 */
 125                         default-state = "off";
 126                 };
 127         };
 128
 129         lcd0: display {
 130                 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
 131                 label = "lcd";
 132
 133                 pinctrl-names = "default";
 134                 pinctrl-0 = <&lcd_pins>;
 135
 136                 backlight = <&lcd_bl>;
 137
 138                 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 139
 140                 panel-timing {
 141                         clock-frequency = <9000000>;
 142                         hactive = <480>;
 143                         vactive = <272>;
 144                         hfront-porch = <2>;
 145                         hback-porch = <2>;
 146                         hsync-len = <41>;
 147                         vfront-porch = <2>;
 148                         vback-porch = <2>;
 149                         vsync-len = <10>;
 150                         hsync-active = <0>;
 151                         vsync-active = <0>;
 152                         de-active = <1>;
 153                         pixelclk-active = <1>;
 154                 };
 155
 156                 port {
 157                         lcd_in: endpoint {
 158                                 remote-endpoint = <&dpi_out>;
 159                         };
 160                 };
 161         };
 162
 163         vmmcwl_fixed: fixedregulator-mmcwl {
 164                 /*
 165                  * WL_EN is not SDIO standard compliant. It is an out of band
 166                  * signal and hard to be dealt with in a standard way by the
 167                  * SDIO core driver.
 168                  * So modelling the WL_EN line as a regulator was a natural
 169                  * choice as the MMC core already deals with MMC supplies.
 170                  */
 171                 compatible = "regulator-fixed";
 172                 regulator-name = "vmmcwl_fixed";
 173                 regulator-min-microvolt = <1800000>;
 174                 regulator-max-microvolt = <1800000>;
 175                 gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
 176                 enable-active-high;
 177         };
 178 };
 179
 180 &am43xx_pinmux {
 181         matrix_keypad_pins: matrix_keypad_pins {
 182                 pinctrl-single,pins = <
 183                         AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7)     /* gpio5_13.gpio5_13 */
 184                         AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7)     /* spi4_sclk.gpio5_4 */
 185                         AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7)      /* spi4_d0.gpio5_5 */
 186                         AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7)      /* spi4_d1.gpio5_5 */
 187                 >;
 188         };
 189
 190         leds_pins: leds_pins {
 191                 pinctrl-single,pins = <
 192                         AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7)     /* uart3_rxd.gpio5_2 */
 193                         AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7)     /* uart3_txd.gpio5_3 */
 194                         AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7)     /* uart3_ctsn.gpio5_0 */
 195                         AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7)     /* uart3_rtsn.gpio5_1 */
 196                 >;
 197         };
 198
 199         i2c0_pins: i2c0_pins {
 200                 pinctrl-single,pins = <
 201                         AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
 202                         AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
 203                 >;
 204         };
 205
 206         i2c1_pins: i2c1_pins {
 207                 pinctrl-single,pins = <
 208                         AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
 209                         AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
 210                 >;
 211         };
 212
 213         mmc1_pins: pinmux_mmc1_pins {
 214                 pinctrl-single,pins = <
 215                         AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 216                         AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 217                         AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 218                         AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 219                         AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 220                         AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 221                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 222                 >;
 223         };
 224
 225         ecap0_pins: backlight_pins {
 226                 pinctrl-single,pins = <
 227                         AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
 228                 >;
 229         };
 230
 231         edt_ft5306_ts_pins: edt_ft5306_ts_pins {
 232                 pinctrl-single,pins = <
 233                         AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7)      /* gpmc_wpn.gpio0_31 */
 234                         AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7)     /* gpmc_be1n.gpio1_28 */
 235                 >;
 236         };
 237
 238         vpfe0_pins_default: vpfe0_pins_default {
 239                 pinctrl-single,pins = <
 240                         AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
 241                         AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
 242                         AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
 243                         AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
 244                         AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
 245                         AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
 246                         AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
 247                         AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
 248                         AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
 249                         AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
 250                         AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
 251                         AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
 252                         AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
 253                         AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
 254                         AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
 255                 >;
 256         };
 257
 258         vpfe0_pins_sleep: vpfe0_pins_sleep {
 259                 pinctrl-single,pins = <
 260                         AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 261                         AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 262                         AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 263                         AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 264                         AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 265                         AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 266                         AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 267                         AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 268                         AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 269                         AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 270                         AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 271                         AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 272                         AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 273                         AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 274                         AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 275                 >;
 276         };
 277
 278         cpsw_default: cpsw_default {
 279                 pinctrl-single,pins = <
 280                         /* Slave 1 */
 281                         AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)     /* mii1_txclk.rmii1_tclk */
 282                         AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)     /* mii1_txen.rgmii1_tctl */
 283                         AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd0.rgmii1_td0 */
 284                         AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd1.rgmii1_td1 */
 285                         AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd0.rgmii1_td2 */
 286                         AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)     /* mii1_txd1.rgmii1_td3 */
 287                         AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2)      /* mii1_rxclk.rmii1_rclk */
 288                         AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2)      /* mii1_rxdv.rgmii1_rctl */
 289                         AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2)      /* mii1_rxd0.rgmii1_rd0 */
 290                         AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)      /* mii1_rxd1.rgmii1_rd1 */
 291                         AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2)      /* mii1_rxd0.rgmii1_rd2 */
 292                         AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2)      /* mii1_rxd1.rgmii1_rd3 */
 293
 294                         /* Slave 2 */
 295                         AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a6.rgmii2_tclk */
 296                         AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a0.rgmii2_tctl */
 297                         AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a5.rgmii2_td0 */
 298                         AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a4.rgmii2_td1 */
 299                         AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a3.rgmii2_td2 */
 300                         AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2)     /* gpmc_a2.rgmii2_td3 */
 301                         AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2)      /* gpmc_a7.rgmii2_rclk */
 302                         AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2)      /* gpmc_a1.rgmii2_rtcl */
 303                         AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2)      /* gpmc_a11.rgmii2_rd0 */
 304                         AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2)      /* gpmc_a10.rgmii2_rd1 */
 305                         AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2)      /* gpmc_a9.rgmii2_rd2 */
 306                         AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2)      /* gpmc_a8.rgmii2_rd3 */
 307                 >;
 308         };
 309
 310         cpsw_sleep: cpsw_sleep {
 311                 pinctrl-single,pins = <
 312                         /* Slave 1 reset value */
 313                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 314                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 315                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 316                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 317                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 318                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 319                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 320                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 321                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 322                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 323                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 324                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 325
 326                         /* Slave 2 reset value */
 327                         AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
 328                         AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
 329                         AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
 330                         AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
 331                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 332                         AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
 333                         AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 334                         AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
 335                         AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 336                         AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
 337                         AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
 338                         AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
 339                 >;
 340         };
 341
 342         davinci_mdio_default: davinci_mdio_default {
 343                 pinctrl-single,pins = <
 344                         /* MDIO */
 345                         AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)      /* mdio_data.mdio_data */
 346                         AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0)                     /* mdio_clk.mdio_clk */
 347                 >;
 348         };
 349
 350         davinci_mdio_sleep: davinci_mdio_sleep {
 351                 pinctrl-single,pins = <
 352                         /* MDIO reset value */
 353                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 354                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 355                 >;
 356         };
 357
 358         dss_pins: dss_pins {
 359                 pinctrl-single,pins = <
 360                         AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)     /* gpmc ad 8 -> DSS DATA 23 */
 361                         AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
 362                         AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
 363                         AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
 364                         AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
 365                         AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
 366                         AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
 367                         AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)     /* gpmc ad 15 -> DSS DATA 16 */
 368                         AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)     /* DSS DATA 0 */
 369                         AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
 370                         AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
 371                         AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
 372                         AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
 373                         AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
 374                         AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
 375                         AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
 376                         AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
 377                         AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
 378                         AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
 379                         AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
 380                         AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
 381                         AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
 382                         AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
 383                         AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)     /* DSS DATA 15 */
 384                         AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)     /* DSS VSYNC */
 385                         AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)     /* DSS HSYNC */
 386                         AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)     /* DSS PCLK */
 387                         AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)     /* DSS AC BIAS EN */
 388
 389                 >;
 390         };
 391
 392         qspi_pins: qspi_pins {
 393                 pinctrl-single,pins = <
 394                         AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3)     /* gpmc_csn0.qspi_csn */
 395                         AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)     /* gpmc_csn3.qspi_clk */
 396                         AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3)      /* gpmc_advn_ale.qspi_d0 */
 397                         AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3)      /* gpmc_oen_ren.qspi_d1 */
 398                         AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3)      /* gpmc_wen.qspi_d2 */
 399                         AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3)      /* gpmc_be0n_cle.qspi_d3 */
 400                 >;
 401         };
 402
 403         mcasp1_pins: mcasp1_pins {
 404                 pinctrl-single,pins = <
 405                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
 406                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
 407                         AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
 408                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
 409                 >;
 410         };
 411
 412         mcasp1_pins_sleep: mcasp1_pins_sleep {
 413                 pinctrl-single,pins = <
 414                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 415                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 416                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
 417                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 418                 >;
 419         };
 420
 421         lcd_pins: lcd_pins {
 422                 pinctrl-single,pins = <
 423                         AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
 424                 >;
 425         };
 426
 427         usb1_pins: usb1_pins {
 428                 pinctrl-single,pins = <
 429                         AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
 430                 >;
 431         };
 432
 433         usb2_pins: usb2_pins {
 434                 pinctrl-single,pins = <
 435                         AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
 436                 >;
 437         };
 438
 439         mmc3_pins_default: pinmux_mmc3_pins_default {
 440                 pinctrl-single,pins = <
 441                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
 442                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
 443                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
 444                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
 445                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
 446                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
 447                 >;
 448         };
 449
 450         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
 451                 pinctrl-single,pins = <
 452                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
 453                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
 454                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
 455                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
 456                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
 457                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
 458                 >;
 459         };
 460
 461         wlan_pins_default: pinmux_wlan_pins_default {
 462                 pinctrl-single,pins = <
 463                         AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* cam1_data8.gpio4_8 WL_EN */
 464                         AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* cam1_wen.gpio4_13 WL_IRQ */
 465                 >;
 466         };
 467
 468         wlan_pins_sleep: pinmux_wlan_pins_sleep {
 469                 pinctrl-single,pins = <
 470                         AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* cam1_data8.gpio4_8 WL_EN */
 471                         AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* cam1_wen.gpio4_13 WL_IRQ */
 472                 >;
 473         };
 474
 475         uart1_bt_pins_default: pinmux_uart1_bt_pins_default {
 476                 pinctrl-single,pins = <
 477                         AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0)              /* uart1_rxd.uart1_rxd */
 478                         AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 479                         AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_ctsn.uart1_ctsn */
 480                         AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
 481                         AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* cam1_data9.gpio4_7 BT_EN */
 482                 >;
 483         };
 484
 485         uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep {
 486                 pinctrl-single,pins = <
 487                         AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart1_rxd.uart1_rxd */
 488                         AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart1_txd.uart1_txd */
 489                         AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart1_ctsn.uart1_ctsn */
 490                         AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart1_rtsn.uart1_rtsn */
 491                         AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_data9.gpio4_7 BT_EN */
 492                 >;
 493         };
 494 };
 495
 496 &i2c0 {
 497         status = "okay";
 498         pinctrl-names = "default";
 499         pinctrl-0 = <&i2c0_pins>;
 500         clock-frequency = <100000>;
 501
 502         tps@24 {
 503                 compatible = "ti,tps65218";
 504                 reg = <0x24>;
 505                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 506                 interrupt-controller;
 507                 #interrupt-cells = <2>;
 508
 509                 dcdc1: regulator-dcdc1 {
 510                         /* VDD_CORE limits min of OPP50 and max of OPP100 */
 511                         regulator-name = "vdd_core";
 512                         regulator-min-microvolt = <912000>;
 513                         regulator-max-microvolt = <1144000>;
 514                         regulator-boot-on;
 515                         regulator-always-on;
 516                 };
 517
 518                 dcdc2: regulator-dcdc2 {
 519                         /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
 520                         regulator-name = "vdd_mpu";
 521                         regulator-min-microvolt = <912000>;
 522                         regulator-max-microvolt = <1378000>;
 523                         regulator-boot-on;
 524                         regulator-always-on;
 525                 };
 526
 527                 dcdc3: regulator-dcdc3 {
 528                         regulator-name = "vdds_ddr";
 529                         regulator-boot-on;
 530                         regulator-always-on;
 531                         regulator-state-mem {
 532                                 regulator-on-in-suspend;
 533                         };
 534                         regulator-state-disk {
 535                                 regulator-off-in-suspend;
 536                         };
 537                 };
 538
 539                 dcdc4: regulator-dcdc4 {
 540                         regulator-name = "v3_3d";
 541                         regulator-min-microvolt = <3300000>;
 542                         regulator-max-microvolt = <3300000>;
 543                         regulator-boot-on;
 544                         regulator-always-on;
 545                 };
 546
 547                 dcdc5: regulator-dcdc5 {
 548                         compatible = "ti,tps65218-dcdc5";
 549                         regulator-name = "v1_0bat";
 550                         regulator-min-microvolt = <1000000>;
 551                         regulator-max-microvolt = <1000000>;
 552                         regulator-boot-on;
 553                         regulator-always-on;
 554                         regulator-state-mem {
 555                                 regulator-on-in-suspend;
 556                         };
 557                 };
 558
 559                 dcdc6: regulator-dcdc6 {
 560                         compatible = "ti,tps65218-dcdc6";
 561                         regulator-name = "v1_8bat";
 562                         regulator-min-microvolt = <1800000>;
 563                         regulator-max-microvolt = <1800000>;
 564                         regulator-boot-on;
 565                         regulator-always-on;
 566                         regulator-state-mem {
 567                                 regulator-on-in-suspend;
 568                         };
 569                 };
 570
 571                 ldo1: regulator-ldo1 {
 572                         regulator-name = "v1_8d";
 573                         regulator-min-microvolt = <1800000>;
 574                         regulator-max-microvolt = <1800000>;
 575                         regulator-boot-on;
 576                         regulator-always-on;
 577                 };
 578
 579                 power-button {
 580                         compatible = "ti,tps65218-pwrbutton";
 581                         status = "okay";
 582                         interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
 583                 };
 584         };
 585
 586         at24@50 {
 587                 compatible = "atmel,24c256";
 588                 pagesize = <64>;
 589                 reg = <0x50>;
 590         };
 591 };
 592
 593 &i2c1 {
 594         status = "okay";
 595         pinctrl-names = "default";
 596         pinctrl-0 = <&i2c1_pins>;
 597         clock-frequency = <400000>;
 598
 599         edt-ft5306@38 {
 600                 status = "okay";
 601                 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
 602                 pinctrl-names = "default";
 603                 pinctrl-0 = <&edt_ft5306_ts_pins>;
 604
 605                 reg = <0x38>;
 606                 interrupt-parent = <&gpio0>;
 607                 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
 608
 609                 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
 610
 611                 touchscreen-size-x = <480>;
 612                 touchscreen-size-y = <272>;
 613
 614                 wakeup-source;
 615         };
 616
 617         tlv320aic3106: tlv320aic3106@1b {
 618                 #sound-dai-cells = <0>;
 619                 compatible = "ti,tlv320aic3106";
 620                 reg = <0x1b>;
 621                 status = "okay";
 622
 623                 /* Regulators */
 624                 AVDD-supply = <&dcdc4>;
 625                 IOVDD-supply = <&dcdc4>;
 626                 DRVDD-supply = <&dcdc4>;
 627                 DVDD-supply = <&ldo1>;
 628         };
 629
 630         lis331dlh@18 {
 631                 compatible = "st,lis331dlh";
 632                 reg = <0x18>;
 633                 status = "okay";
 634
 635                 Vdd-supply = <&dcdc4>;
 636                 Vdd_IO-supply = <&dcdc4>;
 637                 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
 638         };
 639 };
 640
 641 &epwmss0 {
 642         status = "okay";
 643 };
 644
 645 &ecap0 {
 646         status = "okay";
 647         pinctrl-names = "default";
 648         pinctrl-0 = <&ecap0_pins>;
 649 };
 650
 651 &gpio0 {
 652         status = "okay";
 653 };
 654
 655 &gpio1 {
 656         status = "okay";
 657 };
 658
 659 &gpio4 {
 660         status = "okay";
 661 };
 662
 663 &gpio5 {
 664         status = "okay";
 665 };
 666
 667 &mmc1 {
 668         status = "okay";
 669         pinctrl-names = "default";
 670         pinctrl-0 = <&mmc1_pins>;
 671
 672         vmmc-supply = <&dcdc4>;
 673         bus-width = <4>;
 674         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 675 };
 676
 677 &uart1 {
 678         status = "okay";
 679         pinctrl-names = "default", "sleep";
 680         pinctrl-0 = <&uart1_bt_pins_default>;
 681         pinctrl-1 = <&uart1_bt_pins_sleep>;
 682 };
 683
 684 &mmc3 {
 685         status = "okay";
 686         /*
 687          * these are on the crossbar and are outlined in the
 688          * xbar-event-map element
 689          */
 690         dmas = <&edma_xbar 30 0 1>,
 691                 <&edma_xbar 31 0 2>;
 692         dma-names = "tx", "rx";
 693         vmmc-supply = <&vmmcwl_fixed>;
 694         bus-width = <4>;
 695         pinctrl-names = "default", "sleep";
 696         pinctrl-0 = <&mmc3_pins_default>;
 697         pinctrl-1 = <&mmc3_pins_sleep>;
 698         cap-power-off-card;
 699         keep-power-in-suspend;
 700         ti,non-removable;
 701
 702         #address-cells = <1>;
 703         #size-cells = <0>;
 704         wlcore: wlcore@2 {
 705                 compatible = "ti,wl1835";
 706                 pinctrl-names = "default", "sleep";
 707                 pinctrl-0 = <&wlan_pins_default>;
 708                 pinctrl-1 = <&wlan_pins_sleep>;
 709                 reg = <2>;
 710                 interrupt-parent = <&gpio4>;
 711                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
 712         };
 713 };
 714
 715 &usb2_phy1 {
 716         status = "okay";
 717 };
 718
 719 &usb1 {
 720         dr_mode = "otg";
 721         status = "okay";
 722         pinctrl-names = "default";
 723         pinctrl-0 = <&usb1_pins>;
 724 };
 725
 726 &usb2_phy2 {
 727         status = "okay";
 728 };
 729
 730 &usb2 {
 731         dr_mode = "host";
 732         status = "okay";
 733         pinctrl-names = "default";
 734         pinctrl-0 = <&usb2_pins>;
 735 };
 736
 737 &qspi {
 738         status = "okay";
 739         pinctrl-names = "default";
 740         pinctrl-0 = <&qspi_pins>;
 741
 742         spi-max-frequency = <48000000>;
 743         m25p80@0 {
 744                 compatible = "mx66l51235l";
 745                 spi-max-frequency = <48000000>;
 746                 reg = <0>;
 747                 spi-cpol;
 748                 spi-cpha;
 749                 spi-tx-bus-width = <1>;
 750                 spi-rx-bus-width = <4>;
 751                 #address-cells = <1>;
 752                 #size-cells = <1>;
 753
 754                 /* MTD partition table.
 755                  * The ROM checks the first 512KiB
 756                  * for a valid file to boot(XIP).
 757                  */
 758                 partition@0 {
 759                         label = "QSPI.U_BOOT";
 760                         reg = <0x00000000 0x000080000>;
 761                 };
 762                 partition@1 {
 763                         label = "QSPI.U_BOOT.backup";
 764                         reg = <0x00080000 0x00080000>;
 765                 };
 766                 partition@2 {
 767                         label = "QSPI.U-BOOT-SPL_OS";
 768                         reg = <0x00100000 0x00010000>;
 769                 };
 770                 partition@3 {
 771                         label = "QSPI.U_BOOT_ENV";
 772                         reg = <0x00110000 0x00010000>;
 773                 };
 774                 partition@4 {
 775                         label = "QSPI.U-BOOT-ENV.backup";
 776                         reg = <0x00120000 0x00010000>;
 777                 };
 778                 partition@5 {
 779                         label = "QSPI.KERNEL";
 780                         reg = <0x00130000 0x0800000>;
 781                 };
 782                 partition@6 {
 783                         label = "QSPI.FILESYSTEM";
 784                         reg = <0x00930000 0x36D0000>;
 785                 };
 786         };
 787 };
 788
 789 &mac {
 790         pinctrl-names = "default", "sleep";
 791         pinctrl-0 = <&cpsw_default>;
 792         pinctrl-1 = <&cpsw_sleep>;
 793         dual_emac = <1>;
 794         status = "okay";
 795 };
 796
 797 &davinci_mdio {
 798         pinctrl-names = "default", "sleep";
 799         pinctrl-0 = <&davinci_mdio_default>;
 800         pinctrl-1 = <&davinci_mdio_sleep>;
 801         status = "okay";
 802
 803         ethphy0: ethernet-phy@4 {
 804                 reg = <4>;
 805         };
 806
 807         ethphy1: ethernet-phy@5 {
 808                 reg = <5>;
 809         };
 810 };
 811
 812 &cpsw_emac0 {
 813         phy-handle = <&ethphy0>;
 814         phy-mode = "rgmii";
 815         dual_emac_res_vlan = <1>;
 816 };
 817
 818 &cpsw_emac1 {
 819         phy-handle = <&ethphy1>;
 820         phy-mode = "rgmii";
 821         dual_emac_res_vlan = <2>;
 822 };
 823
 824 &elm {
 825         status = "okay";
 826 };
 827
 828 &mcasp1 {
 829         #sound-dai-cells = <0>;
 830         pinctrl-names = "default", "sleep";
 831         pinctrl-0 = <&mcasp1_pins>;
 832         pinctrl-1 = <&mcasp1_pins_sleep>;
 833
 834         status = "okay";
 835
 836         op-mode = <0>;
 837         tdm-slots = <2>;
 838         serial-dir = <
 839                 0 0 1 2
 840         >;
 841
 842         tx-num-evt = <1>;
 843         rx-num-evt = <1>;
 844 };
 845
 846 &dss {
 847         status = "okay";
 848
 849         pinctrl-names = "default";
 850         pinctrl-0 = <&dss_pins>;
 851
 852         port {
 853                 dpi_out: endpoint@0 {
 854                         remote-endpoint = <&lcd_in>;
 855                         data-lines = <24>;
 856                 };
 857         };
 858 };
 859
 860 &rtc {
 861         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
 862         clock-names = "ext-clk", "int-clk";
 863         status = "okay";
 864 };
 865
 866 &wdt {
 867         status = "okay";
 868 };
 869
 870 &cpu {
 871         cpu0-supply = <&dcdc2>;
 872 };
 873
 874 &vpfe0 {
 875         status = "okay";
 876         pinctrl-names = "default", "sleep";
 877         pinctrl-0 = <&vpfe0_pins_default>;
 878         pinctrl-1 = <&vpfe0_pins_sleep>;
 879
 880         /* Camera port */
 881         port {
 882                 vpfe0_ep: endpoint {
 883                         /* remote-endpoint = <&sensor>; add once we have it */
 884                         ti,am437x-vpfe-interface = <0>;
 885                         bus-width = <8>;
 886                         hsync-active = <0>;
 887                         vsync-active = <0>;
 888                 };
 889         };
 890 };