2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pwm/pwm.h>
17 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
20 model = "TI AM43x EPOS EVM";
21 compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
31 vmmcsd_fixed: fixedregulator-sd {
32 compatible = "regulator-fixed";
33 regulator-name = "vmmcsd_fixed";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
39 vbat: fixedregulator0 {
40 compatible = "regulator-fixed";
41 regulator-name = "vbat";
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
48 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
51 backlight = <&lcd_bl>;
54 clock-frequency = <33000000>;
66 pixelclk-active = <1>;
71 remote-endpoint = <&dpi_out>;
76 matrix_keypad: matrix_keypad0 {
77 compatible = "gpio-matrix-keypad";
78 debounce-delay-ms = <5>;
79 col-scan-delay-us = <2>;
80 pinctrl-names = "default", "sleep";
81 pinctrl-0 = <&matrix_keypad_default>;
82 pinctrl-1 = <&matrix_keypad_sleep>;
85 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
86 &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
87 &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
88 &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
90 col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
91 &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
92 &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
93 &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */
95 linux,keymap = <0x00000201 /* P1 */
98 0x0300020a /* NUMERIC_STAR */
106 0x0302020b /* NUMERIC_POUND */
108 0x0103006a /* RIGHT */
109 0x0203006c /* DOWN */
110 0x03030069>; /* LEFT */
114 compatible = "pwm-backlight";
115 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
116 brightness-levels = <0 51 53 56 62 75 101 152 255>;
117 default-brightness-level = <8>;
121 compatible = "simple-audio-card";
122 simple-audio-card,name = "AM43-EPOS-EVM";
123 simple-audio-card,widgets =
124 "Microphone", "Microphone Jack",
125 "Headphone", "Headphone Jack",
126 "Speaker", "Speaker";
127 simple-audio-card,routing =
128 "MIC1LP", "Microphone Jack",
129 "MIC1RP", "Microphone Jack",
132 "Headphone Jack", "HPL",
133 "Headphone Jack", "HPR",
136 simple-audio-card,format = "dsp_b";
137 simple-audio-card,bitclock-master = <&sound0_master>;
138 simple-audio-card,frame-master = <&sound0_master>;
139 simple-audio-card,bitclock-inversion;
141 simple-audio-card,cpu {
142 sound-dai = <&mcasp1>;
143 system-clock-frequency = <12000000>;
146 sound0_master: simple-audio-card,codec {
147 sound-dai = <&tlv320aic3111>;
148 system-clock-frequency = <12000000>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&unused_pins>;
157 unused_pins: unused_pins {
158 pinctrl-single,pins = <
159 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
160 AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
161 AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
162 AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
163 AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
164 AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
165 AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
166 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
167 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
168 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
169 AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
170 AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
171 AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
172 AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
173 AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
174 AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
175 AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
176 AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
177 AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
178 AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
179 AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
180 AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
181 AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
182 AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
183 AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
184 AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
185 AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
186 AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
187 AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
191 cpsw_default: cpsw_default {
192 pinctrl-single,pins = <
194 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
195 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
196 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
197 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
198 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
199 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
200 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
201 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
202 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
206 cpsw_sleep: cpsw_sleep {
207 pinctrl-single,pins = <
208 /* Slave 1 reset value */
209 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
210 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
211 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
215 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
217 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
221 davinci_mdio_default: davinci_mdio_default {
222 pinctrl-single,pins = <
224 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
225 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
229 davinci_mdio_sleep: davinci_mdio_sleep {
230 pinctrl-single,pins = <
231 /* MDIO reset value */
232 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
233 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
237 i2c0_pins: pinmux_i2c0_pins {
238 pinctrl-single,pins = <
239 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
240 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
244 nand_flash_x8_default: nand_flash_x8_default {
245 pinctrl-single,pins = <
246 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
247 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
248 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
249 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
250 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
251 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
252 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
253 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
254 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
255 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
256 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
257 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
258 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
259 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
260 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
261 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
265 nand_flash_x8_sleep: nand_flash_x8_sleep {
266 pinctrl-single,pins = <
267 AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
268 AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
269 AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
270 AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
271 AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
272 AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
273 AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
274 AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
275 AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
276 AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
277 AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
278 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
279 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
280 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
281 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
282 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
286 ecap0_pins_default: backlight_pins_default {
287 pinctrl-single,pins = <
288 AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
292 ecap0_pins_sleep: backlight_pins_sleep {
293 pinctrl-single,pins = <
294 AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
298 i2c2_pins: pinmux_i2c2_pins {
299 pinctrl-single,pins = <
300 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
301 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
305 spi0_pins_default: pinmux_spi0_pins_default {
306 pinctrl-single,pins = <
307 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
308 AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
309 AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
310 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
314 spi0_pins_sleep: pinmux_spi0_pins_sleep {
315 pinctrl-single,pins = <
316 AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
317 AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
318 AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
319 AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
323 spi1_pins_default: pinmux_spi1_pins_default {
324 pinctrl-single,pins = <
325 AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
326 AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
327 AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
328 AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
332 spi1_pins_sleep: pinmux_spi1_pins_sleep {
333 pinctrl-single,pins = <
334 AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
335 AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
336 AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
337 AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
341 mmc1_pins_default: pinmux_mmc1_pins_default {
342 pinctrl-single,pins = <
343 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
347 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
348 pinctrl-single,pins = <
349 AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
353 matrix_keypad_default: matrix_keypad_default {
354 pinctrl-single,pins = <
355 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* mii1_tx_clk.gpio3_9 */
356 AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7) /* mii1_rx_clk.gpio3_10 */
357 AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd3.gpio2_18 */
358 AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd2.gpio2_19 */
359 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
360 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
361 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.gpio0_14 */
362 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.gpio0_15 */
366 matrix_keypad_sleep: matrix_keypad_sleep {
367 pinctrl-single,pins = <
368 AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
369 AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
370 AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
371 AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
372 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
373 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
374 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
375 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
379 qspi1_pins_default: qspi1_pins_default {
380 pinctrl-single,pins = <
381 AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
382 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
383 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
384 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
385 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
386 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
390 qspi1_pins_sleep: qspi1_pins_sleep {
391 pinctrl-single,pins = <
392 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
393 AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
394 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
395 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
396 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
397 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
401 pixcir_ts_pins_default: pixcir_ts_pins_default {
402 pinctrl-single,pins = <
403 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
407 pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
408 pinctrl-single,pins = <
409 AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
413 hdq_pins: pinmux_hdq_pins {
414 pinctrl-single,pins = <
415 AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
420 pinctrl-single,pins = <
421 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
422 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
423 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
424 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
425 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
426 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
427 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
428 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
429 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
430 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
431 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
432 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
433 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
434 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
435 AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
436 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
437 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
438 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
439 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
440 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
441 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
442 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
443 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
444 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
445 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
446 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
447 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
448 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
452 display_mux_pins: display_mux_pins {
453 pinctrl-single,pins = <
454 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
455 AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
459 vpfe1_pins_default: vpfe1_pins_default {
460 pinctrl-single,pins = <
461 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
462 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
463 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
464 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
465 AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
466 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
467 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
468 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
469 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
470 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
471 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
472 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
473 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
477 vpfe1_pins_sleep: vpfe1_pins_sleep {
478 pinctrl-single,pins = <
479 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
480 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
481 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
482 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
483 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
484 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
485 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
486 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
487 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
488 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
489 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
490 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
491 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
495 uart0_pins_default: uart0_pins_default {
496 pinctrl-single,pins = <
497 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
498 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
499 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
500 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
504 uart0_pins_sleep: uart0_pins_sleep {
505 pinctrl-single,pins = <
506 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
507 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
508 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
509 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
513 usb2_phy1_default: usb2_phy1_default {
514 pinctrl-single,pins = <
515 AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
519 usb2_phy1_sleep: usb2_phy1_sleep {
520 pinctrl-single,pins = <
521 AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
525 usb2_phy2_default: usb2_phy2_default {
526 pinctrl-single,pins = <
527 AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
531 usb2_phy2_sleep: usb2_phy2_sleep {
532 pinctrl-single,pins = <
533 AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
537 mcasp1_pins: mcasp1_pins {
538 pinctrl-single,pins = <
539 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
540 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
541 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
542 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
546 mcasp1_sleep_pins: mcasp1_sleep_pins {
547 pinctrl-single,pins = <
548 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
549 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
550 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
551 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
558 vmmc-supply = <&vmmcsd_fixed>;
560 pinctrl-names = "default", "sleep";
561 pinctrl-0 = <&mmc1_pins_default>;
562 pinctrl-1 = <&mmc1_pins_sleep>;
563 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
567 pinctrl-names = "default", "sleep";
568 pinctrl-0 = <&cpsw_default>;
569 pinctrl-1 = <&cpsw_sleep>;
575 pinctrl-names = "default", "sleep";
576 pinctrl-0 = <&davinci_mdio_default>;
577 pinctrl-1 = <&davinci_mdio_sleep>;
580 ethphy0: ethernet-phy@16 {
586 phy-handle = <ðphy0>;
588 phys = <&phy_gmii_sel 1 1>;
593 pinctrl-names = "default";
594 pinctrl-0 = <&i2c0_pins>;
595 clock-frequency = <400000>;
597 tps65218: tps65218@24 {
599 compatible = "ti,tps65218";
600 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
601 interrupt-controller;
602 #interrupt-cells = <2>;
604 dcdc1: regulator-dcdc1 {
605 regulator-name = "vdd_core";
606 regulator-min-microvolt = <912000>;
607 regulator-max-microvolt = <1144000>;
612 dcdc2: regulator-dcdc2 {
613 regulator-name = "vdd_mpu";
614 regulator-min-microvolt = <912000>;
615 regulator-max-microvolt = <1378000>;
620 dcdc3: regulator-dcdc3 {
621 regulator-name = "vdcdc3";
624 regulator-state-mem {
625 regulator-on-in-suspend;
627 regulator-state-disk {
628 regulator-off-in-suspend;
632 dcdc4: regulator-dcdc4 {
633 regulator-name = "vdcdc4";
634 regulator-min-microvolt = <3300000>;
635 regulator-max-microvolt = <3300000>;
640 dcdc5: regulator-dcdc5 {
641 regulator-name = "v1_0bat";
642 regulator-min-microvolt = <1000000>;
643 regulator-max-microvolt = <1000000>;
648 dcdc6: regulator-dcdc6 {
649 regulator-name = "v1_8bat";
650 regulator-min-microvolt = <1800000>;
651 regulator-max-microvolt = <1800000>;
656 ldo1: regulator-ldo1 {
657 regulator-min-microvolt = <1800000>;
658 regulator-max-microvolt = <1800000>;
665 compatible = "atmel,24c256";
671 compatible = "pixcir,pixcir_tangoc";
672 pinctrl-names = "default", "sleep";
673 pinctrl-0 = <&pixcir_ts_pins_default>;
674 pinctrl-1 = <&pixcir_ts_pins_sleep>;
677 interrupt-parent = <&gpio1>;
678 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
680 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
682 touchscreen-size-x = <1024>;
683 touchscreen-size-y = <600>;
686 tlv320aic3111: tlv320aic3111@18 {
687 #sound-dai-cells = <0>;
688 compatible = "ti,tlv320aic3111";
692 ai31xx-micbias-vg = <MICBIAS_2_0V>;
695 HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
696 SPRVDD-supply = <&vbat>; /* vbat */
697 SPLVDD-supply = <&vbat>; /* vbat */
698 AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
699 IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
700 DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
705 pinctrl-names = "default";
706 pinctrl-0 = <&i2c2_pins>;
719 pinctrl-names = "default";
720 pinctrl-0 = <&display_mux_pins>;
725 * SelLCDorHDMI selects between display and audio paths:
726 * Low: HDMI display with audio via HDMI
727 * High: LCD display with analog audio via aic3111 codec
730 gpios = <1 GPIO_ACTIVE_HIGH>;
732 line-name = "SelLCDorHDMI";
745 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
746 pinctrl-names = "default", "sleep";
747 pinctrl-0 = <&nand_flash_x8_default>;
748 pinctrl-1 = <&nand_flash_x8_sleep>;
749 ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
751 compatible = "ti,omap2-nand";
752 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
753 interrupt-parent = <&gpmc>;
754 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
755 <1 IRQ_TYPE_NONE>; /* termcount */
756 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
757 ti,nand-xfer-type = "prefetch-dma";
758 ti,nand-ecc-opt = "bch16";
760 nand-bus-width = <8>;
761 gpmc,device-width = <1>;
762 gpmc,sync-clk-ps = <0>;
764 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
765 gpmc,cs-wr-off-ns = <40>;
766 gpmc,adv-on-ns = <0>; /* cs-on-ns */
767 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
768 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
769 gpmc,we-on-ns = <0>; /* cs-on-ns */
770 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
771 gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
772 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
773 gpmc,access-ns = <30>; /* tCEA + 4*/
774 gpmc,rd-cycle-ns = <40>;
775 gpmc,wr-cycle-ns = <40>;
776 gpmc,bus-turnaround-ns = <0>;
777 gpmc,cycle2cycle-delay-ns = <0>;
778 gpmc,clk-activation-ns = <0>;
779 gpmc,wr-access-ns = <40>;
780 gpmc,wr-data-mux-bus-ns = <0>;
781 /* MTD partition table */
782 /* All SPL-* partitions are sized to minimal length
783 * which can be independently programmable. For
784 * NAND flash this is equal to size of erase-block */
785 #address-cells = <1>;
789 reg = <0x00000000 0x00040000>;
792 label = "NAND.SPL.backup1";
793 reg = <0x00040000 0x00040000>;
796 label = "NAND.SPL.backup2";
797 reg = <0x00080000 0x00040000>;
800 label = "NAND.SPL.backup3";
801 reg = <0x000C0000 0x00040000>;
804 label = "NAND.u-boot-spl-os";
805 reg = <0x00100000 0x00080000>;
808 label = "NAND.u-boot";
809 reg = <0x00180000 0x00100000>;
812 label = "NAND.u-boot-env";
813 reg = <0x00280000 0x00040000>;
816 label = "NAND.u-boot-env.backup1";
817 reg = <0x002C0000 0x00040000>;
820 label = "NAND.kernel";
821 reg = <0x00300000 0x00700000>;
824 label = "NAND.file-system";
825 reg = <0x00a00000 0x1f600000>;
838 ti,adc-channels = <0 1 2 3 4 5 6 7>;
844 pinctrl-names = "default", "sleep";
845 pinctrl-0 = <&ecap0_pins_default>;
846 pinctrl-1 = <&ecap0_pins_sleep>;
851 pinctrl-names = "default", "sleep";
852 pinctrl-0 = <&spi0_pins_default>;
853 pinctrl-1 = <&spi0_pins_sleep>;
858 pinctrl-names = "default", "sleep";
859 pinctrl-0 = <&spi1_pins_default>;
860 pinctrl-1 = <&spi1_pins_sleep>;
865 pinctrl-names = "default", "sleep";
866 pinctrl-0 = <&usb2_phy1_default>;
867 pinctrl-1 = <&usb2_phy1_sleep>;
877 pinctrl-names = "default", "sleep";
878 pinctrl-0 = <&usb2_phy2_default>;
879 pinctrl-1 = <&usb2_phy2_sleep>;
888 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
889 pinctrl-names = "default", "sleep";
890 pinctrl-0 = <&qspi1_pins_default>;
891 pinctrl-1 = <&qspi1_pins_sleep>;
893 spi-max-frequency = <48000000>;
895 compatible = "mx66l51235l";
896 spi-max-frequency = <48000000>;
900 spi-tx-bus-width = <1>;
901 spi-rx-bus-width = <4>;
902 #address-cells = <1>;
905 /* MTD partition table.
906 * The ROM checks the first 512KiB
907 * for a valid file to boot(XIP).
910 label = "QSPI.U_BOOT";
911 reg = <0x00000000 0x000080000>;
914 label = "QSPI.U_BOOT.backup";
915 reg = <0x00080000 0x00080000>;
918 label = "QSPI.U-BOOT-SPL_OS";
919 reg = <0x00100000 0x00010000>;
922 label = "QSPI.U_BOOT_ENV";
923 reg = <0x00110000 0x00010000>;
926 label = "QSPI.U-BOOT-ENV.backup";
927 reg = <0x00120000 0x00010000>;
930 label = "QSPI.KERNEL";
931 reg = <0x00130000 0x0800000>;
934 label = "QSPI.FILESYSTEM";
935 reg = <0x00930000 0x36D0000>;
942 pinctrl-names = "default";
943 pinctrl-0 = <&hdq_pins>;
949 pinctrl-names = "default";
950 pinctrl-0 = <&dss_pins>;
954 remote-endpoint = <&lcd_in>;
962 pinctrl-names = "default", "sleep";
963 pinctrl-0 = <&vpfe1_pins_default>;
964 pinctrl-1 = <&vpfe1_pins_sleep>;
968 /* remote-endpoint = <&sensor>; add once we have it */
969 ti,am437x-vpfe-interface = <0>;
979 pinctrl-names = "default", "sleep";
980 pinctrl-0 = <&uart0_pins_default>;
981 pinctrl-1 = <&uart0_pins_sleep>;
985 #sound-dai-cells = <0>;
986 pinctrl-names = "default", "sleep";
987 pinctrl-0 = <&mcasp1_pins>;
988 pinctrl-1 = <&mcasp1_sleep_pins>;
992 op-mode = <0>; /* MCASP_IIS_MODE */
995 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1002 &mux_synctimer32k_ck {
1003 assigned-clocks = <&mux_synctimer32k_ck>;
1004 assigned-clock-parents = <&clkdiv32k_ick>;
1008 cpu0-supply = <&dcdc2>;