arch/arm/boot/dts/am57xx-cl-som-am57x.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Support for CompuLab CL-SOM-AM57x System-on-Module
   4  *
   5  * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
   6  * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include "am5728.dtsi"
  14
  15 / {
  16         model = "CompuLab CL-SOM-AM57x";
  17         compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
  18
  19         memory@0 {
  20                 device_type = "memory";
  21                 reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
  22         };
  23
  24         leds {
  25                 compatible = "gpio-leds";
  26                 pinctrl-names = "default";
  27                 pinctrl-0 = <&leds_pins_default>;
  28
  29                 led0 {
  30                         label = "cl-som-am57x:green";
  31                         gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
  32                         linux,default-trigger = "heartbeat";
  33                         default-state = "off";
  34                 };
  35         };
  36
  37         vdd_3v3: fixedregulator-vdd_3v3 {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "vdd_3v3";
  40                 regulator-min-microvolt = <3300000>;
  41                 regulator-max-microvolt = <3300000>;
  42         };
  43
  44         ads7846reg: fixedregulator-ads7846-reg {
  45                 compatible = "regulator-fixed";
  46                 regulator-name = "ads7846-reg";
  47                 regulator-min-microvolt = <3300000>;
  48                 regulator-max-microvolt = <3300000>;
  49         };
  50
  51         sound0: sound0 {
  52                 compatible = "simple-audio-card";
  53                 simple-audio-card,name = "CL-SOM-AM57x-Sound-Card";
  54                 simple-audio-card,format = "i2s";
  55                 simple-audio-card,bitclock-master = <&dailink0_master>;
  56                 simple-audio-card,frame-master = <&dailink0_master>;
  57                 simple-audio-card,widgets =
  58                                         "Headphone", "Headphone Jack",
  59                                         "Microphone", "Microphone Jack",
  60                                         "Line", "Line Jack";
  61                 simple-audio-card,routing =
  62                                         "Headphone Jack", "RHPOUT",
  63                                         "Headphone Jack", "LHPOUT",
  64                                         "LLINEIN", "Line Jack",
  65                                         "MICIN", "Mic Bias",
  66                                         "Mic Bias", "Microphone Jack";
  67
  68                 dailink0_master: simple-audio-card,cpu {
  69                         sound-dai = <&mcasp3>;
  70                 };
  71
  72                 simple-audio-card,codec {
  73                         sound-dai = <&wm8731>;
  74                         system-clock-frequency = <12000000>;
  75                 };
  76         };
  77 };
  78
  79 &dra7_pmx_core {
  80         leds_pins_default: leds_pins_default {
  81                 pinctrl-single,pins = <
  82                         DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14)      /* gpmc_a15.gpio2_5 */
  83                 >;
  84         };
  85
  86         i2c1_pins_default: i2c1_pins_default {
  87                 pinctrl-single,pins = <
  88                         DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
  89                         DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
  90                 >;
  91         };
  92
  93         i2c3_pins_default: i2c3_pins_default {
  94                 pinctrl-single,pins = <
  95                         DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10)        /* mcasp1_aclkx.i2c3_sda */
  96                         DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10)        /* mcasp1_fsx.i2c3_scl */
  97                 >;
  98         };
  99
 100         i2c4_pins_default: i2c4_pins_default {
 101                 pinctrl-single,pins = <
 102                         DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10)        /* mcasp1_acl.i2c4_sda */
 103                         DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10)        /* mcasp1_fsr.i2c4_scl */
 104                 >;
 105         };
 106
 107         tps659038_pins_default: tps659038_pins_default {
 108                 pinctrl-single,pins = <
 109                         DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
 110                 >;
 111         };
 112
 113         mmc2_pins_default: mmc2_pins_default {
 114                 pinctrl-single,pins = <
 115                         DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
 116                         DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
 117                         DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
 118                         DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
 119                         DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
 120                         DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
 121                         DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
 122                         DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
 123                         DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
 124                         DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
 125                 >;
 126         };
 127
 128         qspi1_pins: pinmux_qspi1_pins {
 129                 pinctrl-single,pins = <
 130                         DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1)        /* gpmc_a13.qspi1_rtclk */
 131                         DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1)        /* gpmc_a16.qspi1_d0 */
 132                         DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1)        /* gpmc_a17.qspi1_d1 */
 133                         DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1)        /* qpmc_a18.qspi1_sclk */
 134                         DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
 135                         DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
 136                 >;
 137         };
 138
 139         cpsw_pins_default: cpsw_pins_default {
 140                 pinctrl-single,pins = <
 141                         /* Slave at addr 0x0 */
 142                         DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_tclk */
 143                         DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_tctl */
 144                         DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td3 */
 145                         DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td2 */
 146                         DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td1 */
 147                         DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td0 */
 148                         DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
 149                         DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
 150                         DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
 151                         DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
 152                         DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
 153                         DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
 154
 155                         /* Slave at addr 0x1 */
 156                         DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d12.rgmii1_tclk */
 157                         DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d13.rgmii1_tctl */
 158                         DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d14.rgmii1_td3 */
 159                         DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d15.rgmii1_td2 */
 160                         DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d16.rgmii1_td1 */
 161                         DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d17.rgmii1_td0 */
 162                         DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
 163                         DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
 164                         DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
 165                         DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
 166                         DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
 167                         DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
 168                 >;
 169         };
 170
 171         cpsw_pins_sleep: cpsw_pins_sleep {
 172                 pinctrl-single,pins = <
 173                         /* Slave 1 */
 174                         DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
 175                         DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
 176                         DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
 177                         DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
 178                         DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
 179                         DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
 180                         DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
 181                         DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
 182                         DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
 183                         DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
 184                         DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
 185                         DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
 186
 187                         /* Slave 2 */
 188                         DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
 189                         DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
 190                         DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
 191                         DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
 192                         DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
 193                         DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
 194                         DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
 195                         DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
 196                         DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
 197                         DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
 198                         DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
 199                         DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
 200                 >;
 201         };
 202
 203         davinci_mdio_pins_default: davinci_mdio_pins_default {
 204                 pinctrl-single,pins = <
 205                         /* MDIO */
 206                         DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
 207                         DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
 208                 >;
 209         };
 210
 211         davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
 212                 pinctrl-single,pins = <
 213                         DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
 214                         DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
 215                 >;
 216         };
 217
 218         ads7846_pins: pinmux_ads7846_pins {
 219                 pinctrl-single,pins = <
 220                         DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
 221                 >;
 222         };
 223
 224         mcasp3_pins_default: mcasp3_pins_default {
 225                 pinctrl-single,pins = <
 226                         DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
 227                         DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
 228                         DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
 229                         DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
 230                 >;
 231         };
 232
 233         mcasp3_pins_sleep: mcasp3_pins_sleep {
 234                 pinctrl-single,pins = <
 235                         DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
 236                         DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
 237                         DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
 238                         DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
 239                 >;
 240         };
 241 };
 242
 243 &i2c1 {
 244         status = "okay";
 245         pinctrl-names = "default";
 246         pinctrl-0 = <&i2c1_pins_default>;
 247         clock-frequency = <400000>;
 248 };
 249
 250 &i2c3 {
 251         status = "okay";
 252         pinctrl-names = "default";
 253         pinctrl-0 = <&i2c3_pins_default>;
 254         clock-frequency = <400000>;
 255 };
 256
 257 &i2c4 {
 258         status = "okay";
 259         pinctrl-names = "default";
 260         pinctrl-0 = <&i2c4_pins_default>;
 261         clock-frequency = <400000>;
 262
 263         tps659038: tps659038@58 {
 264                 compatible = "ti,tps659038";
 265                 reg = <0x58>;
 266                 interrupt-parent = <&gpio1>;
 267                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 268
 269                 pinctrl-names = "default";
 270                 pinctrl-0 = <&tps659038_pins_default>;
 271
 272                 #interrupt-cells = <2>;
 273                 interrupt-controller;
 274
 275                 ti,system-power-controller;
 276
 277                 tps659038_pmic {
 278                         compatible = "ti,tps659038-pmic";
 279
 280                         regulators {
 281                                 smps12_reg: smps12 {
 282                                         /* VDD_MPU */
 283                                         regulator-name = "smps12";
 284                                         regulator-min-microvolt = < 850000>;
 285                                         regulator-max-microvolt = <1250000>;
 286                                         regulator-always-on;
 287                                         regulator-boot-on;
 288                                 };
 289
 290                                 smps3_reg: smps3 {
 291                                         /* VDD_DDR */
 292                                         regulator-name = "smps3";
 293                                         regulator-min-microvolt = <1500000>;
 294                                         regulator-max-microvolt = <1500000>;
 295                                         regulator-always-on;
 296                                         regulator-boot-on;
 297                                 };
 298
 299                                 smps45_reg: smps45 {
 300                                         /* VDD_DSPEVE */
 301                                         regulator-name = "smps45";
 302                                         regulator-min-microvolt = < 850000>;
 303                                         regulator-max-microvolt = <1250000>;
 304                                         regulator-always-on;
 305                                         regulator-boot-on;
 306                                 };
 307
 308                                 smps6_reg: smps6 {
 309                                         /* VDD_GPU */
 310                                         regulator-name = "smps6";
 311                                         regulator-min-microvolt = < 850000>;
 312                                         regulator-max-microvolt = <1250000>;
 313                                         regulator-always-on;
 314                                         regulator-boot-on;
 315                                 };
 316
 317                                 smps7_reg: smps7 {
 318                                         /* VDD_CORE */
 319                                         regulator-name = "smps7";
 320                                         regulator-min-microvolt = < 850000>;
 321                                         regulator-max-microvolt = <1160000>;
 322                                         regulator-always-on;
 323                                         regulator-boot-on;
 324                                 };
 325
 326                                 smps8_reg: smps8 {
 327                                         /* VDD_IVA */
 328                                         regulator-name = "smps8";
 329                                         regulator-min-microvolt = < 850000>;
 330                                         regulator-max-microvolt = <1250000>;
 331                                         regulator-always-on;
 332                                         regulator-boot-on;
 333                                 };
 334
 335                                 smps9_reg: smps9 {
 336                                         /* PMIC_3V3 */
 337                                         regulator-name = "smps9";
 338                                         regulator-min-microvolt = <3300000>;
 339                                         regulator-max-microvolt = <3300000>;
 340                                         regulator-always-on;
 341                                         regulator-boot-on;
 342                                 };
 343
 344
 345                                 ldo1_reg: ldo1 {
 346                                         /* VDD_SD / VDDSHV8  */
 347                                         regulator-name = "ldo1";
 348                                         regulator-min-microvolt = <1800000>;
 349                                         regulator-max-microvolt = <3300000>;
 350                                         regulator-boot-on;
 351                                         regulator-always-on;
 352                                 };
 353
 354                                 ldo2_reg: ldo2 {
 355                                         /* VDD_1V8 */
 356                                         regulator-name = "ldo2";
 357                                         regulator-min-microvolt = <1800000>;
 358                                         regulator-max-microvolt = <1800000>;
 359                                         regulator-always-on;
 360                                         regulator-boot-on;
 361                                 };
 362
 363                                 ldo3_reg: ldo3 {
 364                                         /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
 365                                         regulator-name = "ldo3";
 366                                         regulator-min-microvolt = <1800000>;
 367                                         regulator-max-microvolt = <1800000>;
 368                                         regulator-always-on;
 369                                         regulator-boot-on;
 370                                 };
 371
 372                                 ldo4_reg: ldo4 {
 373                                         /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
 374                                         regulator-name = "ldo4";
 375                                         regulator-min-microvolt = <1800000>;
 376                                         regulator-max-microvolt = <1800000>;
 377                                         regulator-always-on;
 378                                         regulator-boot-on;
 379                                 };
 380
 381                                 ldo9_reg: ldo9 {
 382                                         /* VDD_RTC */
 383                                         regulator-name = "ldo9";
 384                                         regulator-min-microvolt = <1050000>;
 385                                         regulator-max-microvolt = <1050000>;
 386                                         regulator-always-on;
 387                                         regulator-boot-on;
 388                                 };
 389
 390                                 ldoln_reg: ldoln {
 391                                         /* VDDA_1V8_PLL */
 392                                         regulator-name = "ldoln";
 393                                         regulator-min-microvolt = <1800000>;
 394                                         regulator-max-microvolt = <1800000>;
 395                                         regulator-always-on;
 396                                         regulator-boot-on;
 397                                 };
 398
 399                                 ldousb_reg: ldousb {
 400                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 401                                         regulator-name = "ldousb";
 402                                         regulator-min-microvolt = <3300000>;
 403                                         regulator-max-microvolt = <3300000>;
 404                                         regulator-always-on;
 405                                         regulator-boot-on;
 406                                 };
 407
 408                                 /* regen1 not used */
 409                         };
 410                 };
 411
 412                 tps659038_pwr_button: tps659038_pwr_button {
 413                         compatible = "ti,palmas-pwrbutton";
 414                         interrupt-parent = <&tps659038>;
 415                         interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
 416                         wakeup-source;
 417                         ti,palmas-long-press-seconds = <12>;
 418                 };
 419
 420                 tps659038_gpio: tps659038_gpio {
 421                         compatible = "ti,palmas-gpio";
 422                         gpio-controller;
 423                         #gpio-cells = <2>;
 424                 };
 425         };
 426
 427         rtc0: rtc@56 {
 428                 compatible = "emmicro,em3027";
 429                 reg = <0x56>;
 430         };
 431
 432         eeprom_module: atmel@50 {
 433                 compatible = "atmel,24c08";
 434                 reg = <0x50>;
 435                 pagesize = <16>;
 436         };
 437
 438         wm8731: wm8731@1a {
 439                 #sound-dai-cells = <0>;
 440                 compatible = "wlf,wm8731";
 441                 reg = <0x1a>;
 442                 status = "okay";
 443         };
 444 };
 445
 446 &cpu0 {
 447         cpu0-supply = <&smps12_reg>;
 448         voltage-tolerance = <1>;
 449 };
 450
 451 &sata {
 452         status = "okay";
 453 };
 454
 455 &mailbox5 {
 456         status = "okay";
 457         mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
 458                 status = "okay";
 459         };
 460         mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
 461                 status = "okay";
 462         };
 463 };
 464
 465 &mailbox6 {
 466         status = "okay";
 467         mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
 468                 status = "okay";
 469         };
 470         mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
 471                 status = "okay";
 472         };
 473 };
 474
 475 &mmc2 {
 476         status = "okay";
 477
 478         pinctrl-names = "default";
 479         pinctrl-0 = <&mmc2_pins_default>;
 480
 481         vmmc-supply = <&vdd_3v3>;
 482         bus-width = <8>;
 483         ti,non-removable;
 484         cap-mmc-dual-data-rate;
 485 };
 486
 487 &qspi {
 488         status = "okay";
 489         pinctrl-names = "default";
 490         pinctrl-0 = <&qspi1_pins>;
 491
 492         spi-max-frequency = <48000000>;
 493
 494         spi_flash: spi_flash@0 {
 495                 #address-cells = <1>;
 496                 #size-cells = <1>;
 497                 compatible = "spansion,m25p80", "jedec,spi-nor";
 498                 reg = <0>;                              /* CS0 */
 499                 spi-max-frequency = <48000000>;
 500
 501                 partition@0 {
 502                         label = "uboot";
 503                         reg = <0x0 0xc0000>;
 504                 };
 505
 506                 partition@c0000 {
 507                         label = "uboot environment";
 508                         reg = <0xc0000 0x40000>;
 509                 };
 510
 511                 partition@100000 {
 512                         label = "reserved";
 513                         reg = <0x100000 0x0>;
 514                 };
 515         };
 516
 517         /* touch controller */
 518         touchscreen@1 {
 519                 pinctrl-names = "default";
 520                 pinctrl-0 = <&ads7846_pins>;
 521
 522                 compatible = "ti,ads7846";
 523                 vcc-supply = <&ads7846reg>;
 524
 525                 reg = <1>;                              /* CS1 */
 526                 spi-max-frequency = <1500000>;
 527
 528                 interrupt-parent = <&gpio1>;
 529                 interrupts = <31 0>;
 530                 pendown-gpio = <&gpio1 31 0>;
 531
 532
 533                 ti,x-min = /bits/ 16 <0x0>;
 534                 ti,x-max = /bits/ 16 <0x0fff>;
 535                 ti,y-min = /bits/ 16 <0x0>;
 536                 ti,y-max = /bits/ 16 <0x0fff>;
 537
 538                 ti,x-plate-ohms = /bits/ 16 <180>;
 539                 ti,pressure-max = /bits/ 16 <255>;
 540
 541                 ti,debounce-max = /bits/ 16 <30>;
 542                 ti,debounce-tol = /bits/ 16 <10>;
 543                 ti,debounce-rep = /bits/ 16 <1>;
 544
 545                 wakeup-source;
 546         };
 547 };
 548
 549 &mac {
 550         status = "okay";
 551         pinctrl-names = "default", "sleep";
 552         pinctrl-0 = <&cpsw_pins_default>;
 553         pinctrl-1 = <&cpsw_pins_sleep>;
 554         dual_emac;
 555 };
 556
 557 &cpsw_emac0 {
 558         phy-handle = <&ethphy0>;
 559         phy-mode = "rgmii-txid";
 560         dual_emac_res_vlan = <0>;
 561 };
 562
 563 &cpsw_emac1 {
 564         phy-handle = <&ethphy1>;
 565         phy-mode = "rgmii-txid";
 566         dual_emac_res_vlan = <1>;
 567 };
 568
 569 &davinci_mdio {
 570         pinctrl-names = "default", "sleep";
 571         pinctrl-0 = <&davinci_mdio_pins_default>;
 572         pinctrl-1 = <&davinci_mdio_pins_sleep>;
 573
 574         ethphy0: ethernet-phy@0 {
 575                 reg = <0>;
 576         };
 577
 578         ethphy1: ethernet-phy@1 {
 579                 reg = <1>;
 580         };
 581 };
 582
 583 &usb2_phy1 {
 584         phy-supply = <&ldousb_reg>;
 585 };
 586
 587 &usb2_phy2 {
 588         phy-supply = <&ldousb_reg>;
 589 };
 590
 591 &usb1 {
 592         dr_mode = "host";
 593 };
 594
 595 &usb2 {
 596         dr_mode = "host";
 597 };
 598
 599 &mcasp3 {
 600         #sound-dai-cells = <0>;
 601         pinctrl-names = "default", "sleep";
 602         pinctrl-0 = <&mcasp3_pins_default>;
 603         pinctrl-1 = <&mcasp3_pins_sleep>;
 604         status = "okay";
 605
 606         op-mode = <0>;  /* MCASP_IIS_MODE */
 607         tdm-slots = <2>;
 608         /* 4 serializers */
 609         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 610                 1 2 0 0
 611         >;
 612 };
 613
 614 &gpio3 {
 615         status = "okay";
 616         ti,no-reset-on-init;
 617 };
 618
 619 &gpio2 {
 620         status = "okay";
 621         ti,no-reset-on-init;
 622 };