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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6 #include "am57xx-industrial-grade.dtsi"
7
8 / {
9 aliases {
10 rtc0 = &tps659038_rtc;
11 rtc1 = &rtc;
12 display0 = &hdmi0;
13 };
14
15 chosen {
16 stdout-path = &uart3;
17 };
18
19 vmain: fixedregulator-vmain {
20 compatible = "regulator-fixed";
21 regulator-name = "VMAIN";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
24 regulator-always-on;
25 regulator-boot-on;
26 };
27
28 v3_3d: fixedregulator-v3_3d {
29 compatible = "regulator-fixed";
30 regulator-name = "V3_3D";
31 vin-supply = <&smps9_reg>;
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 regulator-always-on;
35 regulator-boot-on;
36 };
37
38 vtt_fixed: fixedregulator-vtt {
39 /* TPS51200 */
40 compatible = "regulator-fixed";
41 regulator-name = "vtt_fixed";
42 vin-supply = <&v3_3d>;
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
46 regulator-boot-on;
47 };
48
49 leds-iio {
50 status = "disabled";
51 compatible = "gpio-leds";
52 led-out0 {
53 label = "out0";
54 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
55 default-state = "off";
56 };
57
58 led-out1 {
59 label = "out1";
60 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
61 default-state = "off";
62 };
63
64 led-out2 {
65 label = "out2";
66 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
67 default-state = "off";
68 };
69
70 led-out3 {
71 label = "out3";
72 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
73 default-state = "off";
74 };
75
76 led-out4 {
77 label = "out4";
78 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
79 default-state = "off";
80 };
81
82 led-out5 {
83 label = "out5";
84 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
86 };
87
88 led-out6 {
89 label = "out6";
90 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
92 };
93
94 led-out7 {
95 label = "out7";
96 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
97 default-state = "off";
98 };
99 };
100
101 hdmi0: connector@0 {
102 compatible = "hdmi-connector";
103 label = "hdmi";
104
105 type = "a";
106
107 port {
108 hdmi_connector_in: endpoint {
109 remote-endpoint = <&tpd12s015_out>;
110 };
111 };
112 };
113
114 tpd12s015: encoder@0 {
115 compatible = "ti,tpd12s016", "ti,tpd12s015";
116
117 gpios = <0>, /* optional CT_CP_HPD */
118 <0>, /* optional LS_OE */
119 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* HPD */
120
121 ports {
122 #address-cells = <1>;
123 #size-cells = <0>;
124
125 port@0 {
126 reg = <0>;
127
128 tpd12s015_in: endpoint@0 {
129 remote-endpoint = <&hdmi_out>;
130 };
131 };
132
133 port@1 {
134 reg = <1>;
135
136 tpd12s015_out: endpoint@0 {
137 remote-endpoint = <&hdmi_connector_in>;
138 };
139 };
140 };
141 };
142 };
143
144 &dra7_pmx_core {
145 dcan1_pins_default: dcan1_pins_default {
146 pinctrl-single,pins = <
147 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
148 DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
149 >;
150 };
151
152 dcan1_pins_sleep: dcan1_pins_sleep {
153 pinctrl-single,pins = <
154 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
155 DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
156 >;
157 };
158 };
159
160 &i2c1 {
161 status = "okay";
162 clock-frequency = <400000>;
163
164 tps659038: tps659038@58 {
165 compatible = "ti,tps659038";
166 reg = <0x58>;
167 interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
168 &dra7_pmx_core 0x418>;
169 #interrupt-cells = <2>;
170 interrupt-controller;
171 ti,system-power-controller;
172 ti,palmas-override-powerhold;
173
174 tps659038_pmic {
175 compatible = "ti,tps659038-pmic";
176
177 smps12-in-supply = <&vmain>;
178 smps3-in-supply = <&vmain>;
179 smps45-in-supply = <&vmain>;
180 smps6-in-supply = <&vmain>;
181 smps7-in-supply = <&vmain>;
182 smps8-in-supply = <&vmain>;
183 smps9-in-supply = <&vmain>;
184 ldo1-in-supply = <&vmain>;
185 ldo2-in-supply = <&vmain>;
186 ldo3-in-supply = <&vmain>;
187 ldo4-in-supply = <&vmain>;
188 ldo9-in-supply = <&vmain>;
189 ldoln-in-supply = <&vmain>;
190 ldousb-in-supply = <&vmain>;
191 ldortc-in-supply = <&vmain>;
192
193 regulators {
194 smps12_reg: smps12 {
195 /* VDD_MPU */
196 regulator-name = "smps12";
197 regulator-min-microvolt = <850000>;
198 regulator-max-microvolt = <1250000>;
199 regulator-always-on;
200 regulator-boot-on;
201 };
202
203 smps3_reg: smps3 {
204 /* VDD_DDR EMIF1 EMIF2 */
205 regulator-name = "smps3";
206 regulator-min-microvolt = <1350000>;
207 regulator-max-microvolt = <1350000>;
208 regulator-always-on;
209 regulator-boot-on;
210 };
211
212 smps45_reg: smps45 {
213 /* VDD_DSPEVE on AM572 */
214 /* VDD_IVA + VDD_DSP on AM571 */
215 regulator-name = "smps45";
216 regulator-min-microvolt = <850000>;
217 regulator-max-microvolt = <1250000>;
218 regulator-always-on;
219 regulator-boot-on;
220 };
221
222 smps6_reg: smps6 {
223 /* VDD_GPU */
224 regulator-name = "smps6";
225 regulator-min-microvolt = <850000>;
226 regulator-max-microvolt = <1250000>;
227 regulator-always-on;
228 regulator-boot-on;
229 };
230
231 smps7_reg: smps7 {
232 /* VDD_CORE */
233 regulator-name = "smps7";
234 regulator-min-microvolt = <850000>;
235 regulator-max-microvolt = <1150000>;
236 regulator-always-on;
237 regulator-boot-on;
238 };
239
240 smps8_reg: smps8 {
241 /* 5728 - VDD_IVAHD */
242 /* 5718 - N.C. test point */
243 regulator-name = "smps8";
244 };
245
246 smps9_reg: smps9 {
247 /* VDD_3_3D */
248 regulator-name = "smps9";
249 regulator-min-microvolt = <3300000>;
250 regulator-max-microvolt = <3300000>;
251 regulator-always-on;
252 regulator-boot-on;
253 };
254
255 ldo1_reg: ldo1 {
256 /* VDDSHV8 - VSDMMC */
257 /* NOTE: on rev 1.3a, data supply */
258 regulator-name = "ldo1";
259 regulator-min-microvolt = <1800000>;
260 regulator-max-microvolt = <3300000>;
261 regulator-boot-on;
262 regulator-always-on;
263 };
264
265 ldo2_reg: ldo2 {
266 /* VDDSH18V */
267 regulator-name = "ldo2";
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
270 regulator-always-on;
271 regulator-boot-on;
272 };
273
274 ldo3_reg: ldo3 {
275 /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
276 regulator-name = "ldo3";
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279 regulator-always-on;
280 regulator-boot-on;
281 };
282
283 ldo4_reg: ldo4 {
284 /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
285 regulator-name = "ldo4";
286 regulator-min-microvolt = <1800000>;
287 regulator-max-microvolt = <1800000>;
288 regulator-always-on;
289 regulator-boot-on;
290 };
291
292 /* LDO5-8 unused */
293
294 ldo9_reg: ldo9 {
295 /* VDD_RTC */
296 regulator-name = "ldo9";
297 regulator-min-microvolt = <840000>;
298 regulator-max-microvolt = <1160000>;
299 regulator-always-on;
300 regulator-boot-on;
301 };
302
303 ldoln_reg: ldoln {
304 /* VDDA_1V8_PLL */
305 regulator-name = "ldoln";
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <1800000>;
308 regulator-always-on;
309 regulator-boot-on;
310 };
311
312 ldousb_reg: ldousb {
313 /* VDDA_3V_USB: VDDA_USBHS33 */
314 regulator-name = "ldousb";
315 regulator-min-microvolt = <3300000>;
316 regulator-max-microvolt = <3300000>;
317 regulator-always-on;
318 regulator-boot-on;
319 };
320
321 ldortc_reg: ldortc {
322 /* VDDA_RTC */
323 regulator-name = "ldortc";
324 regulator-min-microvolt = <1800000>;
325 regulator-max-microvolt = <1800000>;
326 regulator-always-on;
327 regulator-boot-on;
328 };
329
330 regen1: regen1 {
331 /* VDD_3V3_ON */
332 regulator-name = "regen1";
333 regulator-boot-on;
334 regulator-always-on;
335 };
336
337 regen2: regen2 {
338 /* Needed for PMIC internal resource */
339 regulator-name = "regen2";
340 regulator-boot-on;
341 regulator-always-on;
342 };
343 };
344 };
345
346 tps659038_rtc: tps659038_rtc {
347 compatible = "ti,palmas-rtc";
348 interrupt-parent = <&tps659038>;
349 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
350 wakeup-source;
351 };
352
353 tps659038_pwr_button: tps659038_pwr_button {
354 compatible = "ti,palmas-pwrbutton";
355 interrupt-parent = <&tps659038>;
356 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
357 wakeup-source;
358 ti,palmas-long-press-seconds = <12>;
359 };
360
361 tps659038_gpio: tps659038_gpio {
362 compatible = "ti,palmas-gpio";
363 gpio-controller;
364 #gpio-cells = <2>;
365 };
366
367 extcon_usb2: tps659038_usb {
368 compatible = "ti,palmas-usb-vid";
369 ti,enable-vbus-detection;
370 ti,enable-id-detection;
371 /* ID & VBUS GPIOs provided in board dts */
372 };
373 };
374
375 tpic2810: tpic2810@60 {
376 compatible = "ti,tpic2810";
377 reg = <0x60>;
378 gpio-controller;
379 #gpio-cells = <2>;
380 };
381 };
382
383 &mcspi3 {
384 status = "okay";
385 ti,pindir-d0-out-d1-in;
386
387 sn65hvs882: sn65hvs882@0 {
388 compatible = "pisosr-gpio";
389 gpio-controller;
390 #gpio-cells = <2>;
391
392 reg = <0>;
393 spi-max-frequency = <1000000>;
394 spi-cpol;
395 };
396 };
397
398 &uart3 {
399 status = "okay";
400 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
401 &dra7_pmx_core 0x248>;
402 };
403
404 &rtc {
405 status = "okay";
406 ext-clk-src;
407 };
408
409 &cpsw_emac0 {
410 phy-handle = <&ethphy0>;
411 phy-mode = "rgmii";
412 dual_emac_res_vlan = <1>;
413 };
414
415 &cpsw_emac1 {
416 phy-handle = <&ethphy1>;
417 phy-mode = "rgmii";
418 dual_emac_res_vlan = <2>;
419 };
420
421 &davinci_mdio {
422 ethphy0: ethernet-phy@0 {
423 reg = <0>;
424 };
425
426 ethphy1: ethernet-phy@1 {
427 reg = <1>;
428 };
429 };
430
431 &usb2_phy1 {
432 phy-supply = <&ldousb_reg>;
433 };
434
435 &usb2_phy2 {
436 phy-supply = <&ldousb_reg>;
437 };
438
439 &usb1 {
440 dr_mode = "host";
441 };
442
443 &omap_dwc3_2 {
444 extcon = <&extcon_usb2>;
445 };
446
447 &usb2 {
448 extcon = <&extcon_usb2>;
449 dr_mode = "otg";
450 };
451
452 &mmc1 {
453 status = "okay";
454 vmmc-supply = <&v3_3d>;
455 vqmmc-supply = <&ldo1_reg>;
456 bus-width = <4>;
457 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
458 no-1-8-v;
459 };
460
461 &mmc2 {
462 status = "okay";
463 vmmc-supply = <&v3_3d>;
464 vqmmc-supply = <&v3_3d>;
465 bus-width = <8>;
466 non-removable;
467 max-frequency = <96000000>;
468 no-1-8-v;
469 };
470
471 &dcan1 {
472 status = "okay";
473 pinctrl-names = "default", "sleep", "active";
474 pinctrl-0 = <&dcan1_pins_sleep>;
475 pinctrl-1 = <&dcan1_pins_sleep>;
476 pinctrl-2 = <&dcan1_pins_default>;
477 };
478
479 &qspi {
480 status = "okay";
481
482 spi-max-frequency = <76800000>;
483 m25p80@0 {
484 compatible = "s25fl256s1", "jedec,spi-nor";
485 spi-max-frequency = <76800000>;
486 reg = <0>;
487 spi-tx-bus-width = <1>;
488 spi-rx-bus-width = <4>;
489 #address-cells = <1>;
490 #size-cells = <1>;
491
492 /* MTD partition table.
493 * The ROM checks the first four physical blocks
494 * for a valid file to boot and the flash here is
495 * 64KiB block size.
496 */
497 partition@0 {
498 label = "QSPI.SPL";
499 reg = <0x00000000 0x000040000>;
500 };
501 partition@1 {
502 label = "QSPI.u-boot";
503 reg = <0x00040000 0x00100000>;
504 };
505 partition@2 {
506 label = "QSPI.u-boot-spl-os";
507 reg = <0x00140000 0x00080000>;
508 };
509 partition@3 {
510 label = "QSPI.u-boot-env";
511 reg = <0x001c0000 0x00010000>;
512 };
513 partition@4 {
514 label = "QSPI.u-boot-env.backup1";
515 reg = <0x001d0000 0x0010000>;
516 };
517 partition@5 {
518 label = "QSPI.kernel";
519 reg = <0x001e0000 0x0800000>;
520 };
521 partition@6 {
522 label = "QSPI.file-system";
523 reg = <0x009e0000 0x01620000>;
524 };
525 };
526 };
527
528 &cpu0 {
529 vdd-supply = <&smps12_reg>;
530 };
531
532 &hdmi {
533 status = "okay";
534
535 vdda-supply = <&ldo4_reg>;
536
537 port {
538 hdmi_out: endpoint {
539 remote-endpoint = <&tpd12s015_in>;
540 };
541 };
542 };
543
544 &dss {
545 status = "okay";
546 };