arch/arm/boot/dts/armada-375-db.dts

   1 /*
   2  * Device Tree file for Marvell Armada 375 evaluation board
   3  * (DB-88F6720)
   4  *
   5  *  Copyright (C) 2014 Marvell
   6  *
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without any
  12  * warranty of any kind, whether express or implied.
  13  */
  14
  15 /dts-v1/;
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include "armada-375.dtsi"
  18
  19 / {
  20         model = "Marvell Armada 375 Development Board";
  21         compatible = "marvell,a375-db", "marvell,armada375";
  22
  23         chosen {
  24                 bootargs = "console=ttyS0,115200 earlyprintk";
  25         };
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0x00000000 0x40000000>; /* 1 GB */
  30         };
  31
  32         soc {
  33                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  34                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  35
  36                 internal-regs {
  37                         spi@10600 {
  38                                 pinctrl-0 = <&spi0_pins>;
  39                                 pinctrl-names = "default";
  40                                 /*
  41                                  * SPI conflicts with NAND, so we disable it
  42                                  * here, and select NAND as the enabled device
  43                                  * by default.
  44                                  */
  45                                 status = "disabled";
  46
  47                                 spi-flash@0 {
  48                                         #address-cells = <1>;
  49                                         #size-cells = <1>;
  50                                         compatible = "n25q128a13";
  51                                         reg = <0>; /* Chip select 0 */
  52                                         spi-max-frequency = <108000000>;
  53                                 };
  54                         };
  55
  56                         i2c@11000 {
  57                                 status = "okay";
  58                                 clock-frequency = <100000>;
  59                                 pinctrl-0 = <&i2c0_pins>;
  60                                 pinctrl-names = "default";
  61                         };
  62
  63                         i2c@11100 {
  64                                 status = "okay";
  65                                 clock-frequency = <100000>;
  66                                 pinctrl-0 = <&i2c1_pins>;
  67                                 pinctrl-names = "default";
  68                         };
  69
  70                         serial@12000 {
  71                                 clock-frequency = <200000000>;
  72                                 status = "okay";
  73                         };
  74
  75                         pinctrl {
  76                                 sdio_st_pins: sdio-st-pins {
  77                                         marvell,pins = "mpp44", "mpp45";
  78                                         marvell,function = "gpio";
  79                                 };
  80                         };
  81
  82                         sata@a0000 {
  83                                 status = "okay";
  84                                 nr-ports = <2>;
  85                         };
  86
  87                         nand: nand@d0000 {
  88                                 pinctrl-0 = <&nand_pins>;
  89                                 pinctrl-names = "default";
  90                                 status = "okay";
  91                                 num-cs = <1>;
  92                                 marvell,nand-keep-config;
  93                                 marvell,nand-enable-arbiter;
  94                                 nand-on-flash-bbt;
  95
  96                                 partition@0 {
  97                                         label = "U-Boot";
  98                                         reg = <0 0x800000>;
  99                                 };
 100                                 partition@800000 {
 101                                         label = "Linux";
 102                                         reg = <0x800000 0x800000>;
 103                                 };
 104                                 partition@1000000 {
 105                                         label = "Filesystem";
 106                                         reg = <0x1000000 0x3f000000>;
 107                                 };
 108                         };
 109
 110                         mvsdio@d4000 {
 111                                 pinctrl-0 = <&sdio_pins &sdio_st_pins>;
 112                                 pinctrl-names = "default";
 113                                 status = "okay";
 114                                 cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
 115                                 wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 116                         };
 117                 };
 118
 119                 pcie-controller {
 120                         status = "okay";
 121                         /*
 122                          * The two PCIe units are accessible through
 123                          * standard PCIe slots on the board.
 124                          */
 125                         pcie@1,0 {
 126                                 /* Port 0, Lane 0 */
 127                                 status = "okay";
 128                         };
 129                         pcie@2,0 {
 130                                 /* Port 1, Lane 0 */
 131                                 status = "okay";
 132                         };
 133                 };
 134         };
 135 };