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1 /*
2 * Device Tree include file for Armada 385 based Linksys boards
3 *
4 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
42 #include "armada-385.dtsi"
43
44 / {
45 model = "Linksys boards based on Armada 385";
46 compatible = "linksys,armada385", "marvell,armada385",
47 "marvell,armada380";
48
49 chosen {
50 stdout-path = "serial0:115200n8";
51 };
52
53 memory {
54 device_type = "memory";
55 reg = <0x00000000 0x20000000>; /* 512 MB */
56 };
57
58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
61 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63
64 internal-regs {
65 i2c@11000 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&i2c0_pins>;
68 status = "okay";
69
70 tmp421@4c {
71 compatible = "ti,tmp421";
72 reg = <0x4c>;
73 };
74
75 pca9635@68 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "nxp,pca9635";
79 reg = <0x68>;
80 };
81 };
82
83 /* J10: VCC, NC, RX, NC, TX, GND */
84 serial@12000 {
85 status = "okay";
86 };
87
88 ethernet@70000 {
89 status = "okay";
90 phy-mode = "rgmii-id";
91 fixed-link {
92 speed = <1000>;
93 full-duplex;
94 };
95 };
96
97 ethernet@34000 {
98 status = "okay";
99 phy-mode = "sgmii";
100 fixed-link {
101 speed = <1000>;
102 full-duplex;
103 };
104 };
105
106 mdio@72004 {
107 status = "okay";
108
109 switch@0 {
110 compatible = "marvell,mv88e6085";
111 #address-cells = <1>;
112 #size-cells = <0>;
113 reg = <0>;
114
115 ports {
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 port@0 {
120 reg = <0>;
121 label = "lan4";
122 };
123
124 port@1 {
125 reg = <1>;
126 label = "lan3";
127 };
128
129 port@2 {
130 reg = <2>;
131 label = "lan2";
132 };
133
134 port@3 {
135 reg = <3>;
136 label = "lan1";
137 };
138
139 port@4 {
140 reg = <4>;
141 label = "wan";
142 };
143
144 port@5 {
145 reg = <5>;
146 label = "cpu";
147 ethernet = <&eth2>;
148
149 fixed-link {
150 speed = <1000>;
151 full-duplex;
152 };
153 };
154 };
155 };
156 };
157
158 sata@a8000 {
159 status = "okay";
160 };
161
162 /* USB part of the eSATA/USB 2.0 port */
163 usb@58000 {
164 status = "okay";
165 };
166
167 usb3@f8000 {
168 status = "okay";
169 usb-phy = <&usb3_phy>;
170 };
171
172 flash@d0000 {
173 status = "okay";
174 num-cs = <1>;
175 marvell,nand-keep-config;
176 marvell,nand-enable-arbiter;
177 nand-on-flash-bbt;
178
179 partition@0 {
180 label = "u-boot";
181 reg = <0x0000000 0x200000>; /* 2MB */
182 read-only;
183 };
184
185 partition@100000 {
186 label = "u_env";
187 reg = <0x200000 0x40000>; /* 256KB */
188 };
189
190 partition@140000 {
191 label = "s_env";
192 reg = <0x240000 0x40000>; /* 256KB */
193 };
194
195 partition@900000 {
196 label = "devinfo";
197 reg = <0x900000 0x100000>; /* 1MB */
198 read-only;
199 };
200
201 /* kernel1 overlaps with rootfs1 by design */
202 partition@a00000 {
203 label = "kernel1";
204 reg = <0xa00000 0x2800000>; /* 40MB */
205 };
206
207 partition@1000000 {
208 label = "rootfs1";
209 reg = <0x1000000 0x2200000>; /* 34MB */
210 };
211
212 /* kernel2 overlaps with rootfs2 by design */
213 partition@3200000 {
214 label = "kernel2";
215 reg = <0x3200000 0x2800000>; /* 40MB */
216 };
217
218 partition@3800000 {
219 label = "rootfs2";
220 reg = <0x3800000 0x2200000>; /* 34MB */
221 };
222
223 /*
224 * 38MB, last MB is for the BBT, not writable
225 */
226 partition@5a00000 {
227 label = "syscfg";
228 reg = <0x5a00000 0x2600000>;
229 };
230
231 /*
232 * Unused area between "s_env" and "devinfo".
233 * Moved here because otherwise the renumbered
234 * partitions would break the bootloader
235 * supplied bootargs
236 */
237 partition@180000 {
238 label = "unused_area";
239 reg = <0x280000 0x680000>; /* 6.5MB */
240 };
241 };
242 };
243
244 pcie-controller {
245 status = "okay";
246
247 pcie@1,0 {
248 /* Marvell 88W8864, 5GHz-only */
249 status = "okay";
250 };
251
252 pcie@2,0 {
253 /* Marvell 88W8864, 2GHz-only */
254 status = "okay";
255 };
256 };
257 };
258
259 usb3_phy: usb3_phy {
260 compatible = "usb-nop-xceiv";
261 vcc-supply = <&reg_xhci0_vbus>;
262 };
263
264 reg_xhci0_vbus: xhci0-vbus {
265 compatible = "regulator-fixed";
266 pinctrl-names = "default";
267 pinctrl-0 = <&xhci0_vbus_pins>;
268 regulator-name = "xhci0-vbus";
269 regulator-min-microvolt = <5000000>;
270 regulator-max-microvolt = <5000000>;
271 enable-active-high;
272 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
273 };
274
275 gpio_keys {
276 compatible = "gpio-keys";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 pinctrl-0 = <&keys_pin>;
280 pinctrl-names = "default";
281
282 button@1 {
283 label = "WPS";
284 linux,code = <KEY_WPS_BUTTON>;
285 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
286 };
287
288 button@2 {
289 label = "Factory Reset Button";
290 linux,code = <KEY_RESTART>;
291 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
292 };
293 };
294
295 gpio-leds {
296 compatible = "gpio-leds";
297 pinctrl-0 = <&power_led_pin &sata_led_pin>;
298 pinctrl-names = "default";
299
300 power {
301 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
302 default-state = "on";
303 };
304
305 sata {
306 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
307 default-state = "off";
308 };
309 };
310
311 dsa@0 {
312 status = "disabled";
313
314 compatible = "marvell,dsa";
315 #address-cells = <2>;
316 #size-cells = <0>;
317
318 dsa,ethernet = <&eth2>;
319 dsa,mii-bus = <&mdio>;
320
321 switch@0 {
322 #address-cells = <1>;
323 #size-cells = <0>;
324 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
325
326 port@0 {
327 reg = <0>;
328 label = "lan4";
329 };
330
331 port@1 {
332 reg = <1>;
333 label = "lan3";
334 };
335
336 port@2 {
337 reg = <2>;
338 label = "lan2";
339 };
340
341 port@3 {
342 reg = <3>;
343 label = "lan1";
344 };
345
346 port@4 {
347 reg = <4>;
348 label = "wan";
349 };
350
351 port@5 {
352 reg = <5>;
353 label = "cpu";
354 };
355 };
356 };
357 };
358
359 &pinctrl {
360 keys_pin: keys-pin {
361 marvell,pins = "mpp24", "mpp29";
362 marvell,function = "gpio";
363 };
364
365 power_led_pin: power-led-pin {
366 marvell,pins = "mpp55";
367 marvell,function = "gpio";
368 };
369
370 sata_led_pin: sata-led-pin {
371 marvell,pins = "mpp54";
372 marvell,function = "gpio";
373 };
374
375 xhci0_vbus_pins: xhci0-vbus-pins {
376 marvell,pins = "mpp50";
377 marvell,function = "gpio";
378 };
379 };
380
381 &spi0 {
382 status = "disabled";
383 };