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[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / aspeed-bmc-opp-witherspoon.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6
7 / {
8 model = "Witherspoon BMC";
9 compatible = "ibm,witherspoon-bmc", "aspeed,ast2500";
10
11 chosen {
12 stdout-path = &uart5;
13 bootargs = "console=ttyS4,115200 earlyprintk";
14 };
15
16 memory@80000000 {
17 reg = <0x80000000 0x20000000>;
18 };
19
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
23 ranges;
24
25 flash_memory: region@98000000 {
26 no-map;
27 reg = <0x98000000 0x04000000>; /* 64M */
28 };
29 };
30
31 gpio-keys {
32 compatible = "gpio-keys";
33
34 air-water {
35 label = "air-water";
36 gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
37 linux,code = <ASPEED_GPIO(B, 5)>;
38 };
39
40 checkstop {
41 label = "checkstop";
42 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
43 linux,code = <ASPEED_GPIO(J, 2)>;
44 };
45
46 ps0-presence {
47 label = "ps0-presence";
48 gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
49 linux,code = <ASPEED_GPIO(P, 7)>;
50 };
51
52 ps1-presence {
53 label = "ps1-presence";
54 gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
55 linux,code = <ASPEED_GPIO(N, 0)>;
56 };
57 };
58
59 gpio-keys-polled {
60 compatible = "gpio-keys-polled";
61 #address-cells = <1>;
62 #size-cells = <0>;
63 poll-interval = <1000>;
64
65 fan0-presence {
66 label = "fan0-presence";
67 gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
68 linux,code = <4>;
69 };
70
71 fan1-presence {
72 label = "fan1-presence";
73 gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
74 linux,code = <5>;
75 };
76
77 fan2-presence {
78 label = "fan2-presence";
79 gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
80 linux,code = <6>;
81 };
82
83 fan3-presence {
84 label = "fan3-presence";
85 gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
86 linux,code = <7>;
87 };
88 };
89
90 leds {
91 compatible = "gpio-leds";
92
93 fan0 {
94 retain-state-shutdown;
95 default-state = "keep";
96 gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
97 };
98
99 fan1 {
100 retain-state-shutdown;
101 default-state = "keep";
102 gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
103 };
104
105 fan2 {
106 retain-state-shutdown;
107 default-state = "keep";
108 gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
109 };
110
111 fan3 {
112 retain-state-shutdown;
113 default-state = "keep";
114 gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
115 };
116
117 front-fault {
118 retain-state-shutdown;
119 default-state = "keep";
120 gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
121 };
122
123 front-power {
124 retain-state-shutdown;
125 default-state = "keep";
126 gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
127 };
128
129 front-id {
130 retain-state-shutdown;
131 default-state = "keep";
132 gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
133 };
134
135 rear-fault {
136 gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
137 };
138
139 rear-id {
140 gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
141 };
142
143 rear-power {
144 gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
145 };
146
147 power-button {
148 gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
149 };
150 };
151
152 fsi: gpio-fsi {
153 compatible = "fsi-master-gpio", "fsi-master";
154 #address-cells = <2>;
155 #size-cells = <0>;
156
157 clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
158 data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
159 mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
160 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
161 trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
162 };
163
164 iio-hwmon-dps310 {
165 compatible = "iio-hwmon";
166 io-channels = <&dps 0>;
167 };
168
169 iio-hwmon-bmp280 {
170 compatible = "iio-hwmon";
171 io-channels = <&bmp 1>;
172 };
173
174 };
175
176 &fmc {
177 status = "okay";
178
179 flash@0 {
180 status = "okay";
181 label = "bmc";
182 m25p,fast-read;
183 #include "openbmc-flash-layout.dtsi"
184 };
185
186 flash@1 {
187 status = "okay";
188 label = "alt";
189 m25p,fast-read;
190 };
191 };
192
193 &spi1 {
194 status = "okay";
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_spi1_default>;
197
198 flash@0 {
199 status = "okay";
200 label = "pnor";
201 m25p,fast-read;
202 };
203 };
204
205 &uart1 {
206 /* Rear RS-232 connector */
207 status = "okay";
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_txd1_default
210 &pinctrl_rxd1_default
211 &pinctrl_nrts1_default
212 &pinctrl_ndtr1_default
213 &pinctrl_ndsr1_default
214 &pinctrl_ncts1_default
215 &pinctrl_ndcd1_default
216 &pinctrl_nri1_default>;
217 };
218
219 &uart2 {
220 /* APSS */
221 status = "okay";
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
224 };
225
226 &uart5 {
227 status = "okay";
228 };
229
230 &lpc_ctrl {
231 status = "okay";
232 memory-region = <&flash_memory>;
233 flash = <&spi1>;
234 };
235
236 &mac0 {
237 status = "okay";
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_rmii1_default>;
240 use-ncsi;
241 };
242
243 &i2c2 {
244 status = "okay";
245
246 /* MUX ->
247 * Samtec 1
248 * Samtec 2
249 */
250 };
251
252 &i2c3 {
253 status = "okay";
254
255 bmp: bmp280@77 {
256 compatible = "bosch,bmp280";
257 reg = <0x77>;
258 #io-channel-cells = <1>;
259 };
260
261 max31785@52 {
262 compatible = "maxim,max31785a";
263 reg = <0x52>;
264 #address-cells = <1>;
265 #size-cells = <0>;
266 };
267
268 dps: dps310@76 {
269 compatible = "infineon,dps310";
270 reg = <0x76>;
271 #io-channel-cells = <0>;
272 };
273
274 pca0: pca9552@60 {
275 compatible = "nxp,pca9552";
276 reg = <0x60>;
277 #address-cells = <1>;
278 #size-cells = <0>;
279
280 gpio-controller;
281 #gpio-cells = <2>;
282
283 gpio@0 {
284 reg = <0>;
285 type = <PCA955X_TYPE_GPIO>;
286 };
287
288 gpio@1 {
289 reg = <1>;
290 type = <PCA955X_TYPE_GPIO>;
291 };
292
293 gpio@2 {
294 reg = <2>;
295 type = <PCA955X_TYPE_GPIO>;
296 };
297
298 gpio@3 {
299 reg = <3>;
300 type = <PCA955X_TYPE_GPIO>;
301 };
302
303 gpio@4 {
304 reg = <4>;
305 type = <PCA955X_TYPE_GPIO>;
306 };
307
308 gpio@5 {
309 reg = <5>;
310 type = <PCA955X_TYPE_GPIO>;
311 };
312
313 gpio@6 {
314 reg = <6>;
315 type = <PCA955X_TYPE_GPIO>;
316 };
317
318 gpio@7 {
319 reg = <7>;
320 type = <PCA955X_TYPE_GPIO>;
321 };
322
323 gpio@8 {
324 reg = <8>;
325 type = <PCA955X_TYPE_GPIO>;
326 };
327
328 gpio@9 {
329 reg = <9>;
330 type = <PCA955X_TYPE_GPIO>;
331 };
332
333 gpio@10 {
334 reg = <10>;
335 type = <PCA955X_TYPE_GPIO>;
336 };
337
338 gpio@11 {
339 reg = <11>;
340 type = <PCA955X_TYPE_GPIO>;
341 };
342
343 gpio@12 {
344 reg = <12>;
345 type = <PCA955X_TYPE_GPIO>;
346 };
347
348 gpio@13 {
349 reg = <13>;
350 type = <PCA955X_TYPE_GPIO>;
351 };
352
353 gpio@14 {
354 reg = <14>;
355 type = <PCA955X_TYPE_GPIO>;
356 };
357
358 gpio@15 {
359 reg = <15>;
360 type = <PCA955X_TYPE_GPIO>;
361 };
362 };
363
364 power-supply@68 {
365 compatible = "ibm,cffps1";
366 reg = <0x68>;
367 };
368
369 power-supply@69 {
370 compatible = "ibm,cffps1";
371 reg = <0x69>;
372 };
373 };
374
375 &i2c4 {
376 status = "okay";
377
378 tmp423a@4c {
379 compatible = "ti,tmp423";
380 reg = <0x4c>;
381 };
382
383 ir35221@70 {
384 compatible = "infineon,ir35221";
385 reg = <0x70>;
386 };
387
388 ir35221@71 {
389 compatible = "infineon,ir35221";
390 reg = <0x71>;
391 };
392 };
393
394
395 &i2c5 {
396 status = "okay";
397
398 tmp423a@4c {
399 compatible = "ti,tmp423";
400 reg = <0x4c>;
401 };
402
403 ir35221@70 {
404 compatible = "infineon,ir35221";
405 reg = <0x70>;
406 };
407
408 ir35221@71 {
409 compatible = "infineon,ir35221";
410 reg = <0x71>;
411 };
412 };
413
414 &i2c9 {
415 status = "okay";
416
417 tmp275@4a {
418 compatible = "ti,tmp275";
419 reg = <0x4a>;
420 };
421 };
422
423 &i2c10 {
424 /* MUX
425 * -> PCIe Slot 3
426 * -> PCIe Slot 4
427 */
428 status = "okay";
429 };
430
431 &i2c11 {
432 status = "okay";
433
434 pca9552: pca9552@60 {
435 compatible = "nxp,pca9552";
436 reg = <0x60>;
437 #address-cells = <1>;
438 #size-cells = <0>;
439 gpio-controller;
440 #gpio-cells = <2>;
441
442 gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
443 "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
444 "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
445 "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
446 "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
447 "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
448 "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
449 "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
450
451 gpio@0 {
452 reg = <0>;
453 type = <PCA955X_TYPE_GPIO>;
454 };
455
456 gpio@1 {
457 reg = <1>;
458 type = <PCA955X_TYPE_GPIO>;
459 };
460
461 gpio@2 {
462 reg = <2>;
463 type = <PCA955X_TYPE_GPIO>;
464 };
465
466 gpio@3 {
467 reg = <3>;
468 type = <PCA955X_TYPE_GPIO>;
469 };
470
471 gpio@4 {
472 reg = <4>;
473 type = <PCA955X_TYPE_GPIO>;
474 };
475
476 gpio@5 {
477 reg = <5>;
478 type = <PCA955X_TYPE_GPIO>;
479 };
480
481 gpio@6 {
482 reg = <6>;
483 type = <PCA955X_TYPE_GPIO>;
484 };
485
486 gpio@7 {
487 reg = <7>;
488 type = <PCA955X_TYPE_GPIO>;
489 };
490
491 gpio@8 {
492 reg = <8>;
493 type = <PCA955X_TYPE_GPIO>;
494 };
495
496 gpio@9 {
497 reg = <9>;
498 type = <PCA955X_TYPE_GPIO>;
499 };
500
501 gpio@10 {
502 reg = <10>;
503 type = <PCA955X_TYPE_GPIO>;
504 };
505
506 gpio@11 {
507 reg = <11>;
508 type = <PCA955X_TYPE_GPIO>;
509 };
510
511 gpio@12 {
512 reg = <12>;
513 type = <PCA955X_TYPE_GPIO>;
514 };
515
516 gpio@13 {
517 reg = <13>;
518 type = <PCA955X_TYPE_GPIO>;
519 };
520
521 gpio@14 {
522 reg = <14>;
523 type = <PCA955X_TYPE_GPIO>;
524 };
525
526 gpio@15 {
527 reg = <15>;
528 type = <PCA955X_TYPE_GPIO>;
529 };
530 };
531
532 rtc@32 {
533 compatible = "epson,rx8900";
534 reg = <0x32>;
535 };
536
537 eeprom@51 {
538 compatible = "atmel,24c64";
539 reg = <0x51>;
540 };
541
542 ucd90160@64 {
543 compatible = "ti,ucd90160";
544 reg = <0x64>;
545 };
546 };
547
548 &i2c12 {
549 status = "okay";
550 };
551
552 &i2c13 {
553 status = "okay";
554 };
555
556 &vuart {
557 status = "okay";
558 };
559
560 &gfx {
561 status = "okay";
562 };
563
564 &pinctrl {
565 aspeed,external-nodes = <&gfx &lhc>;
566 };
567
568 &wdt1 {
569 aspeed,reset-type = "none";
570 aspeed,external-signal;
571 aspeed,ext-push-pull;
572 aspeed,ext-active-high;
573
574 pinctrl-names = "default";
575 pinctrl-0 = <&pinctrl_wdtrst1_default>;
576 };
577
578 &wdt2 {
579 aspeed,alt-boot;
580 };
581
582 &ibt {
583 status = "okay";
584 };