1 #include "skeleton.dtsi"
5 compatible = "aspeed,ast2500";
8 interrupt-parent = <&vic>;
15 compatible = "arm,arm1176jzf-s";
22 compatible = "simple-bus";
27 vic: interrupt-controller@1e6c0080 {
28 compatible = "aspeed,ast2400-vic";
30 #interrupt-cells = <1>;
31 valid-sources = <0xfefff7ff 0x0807ffff>;
32 reg = <0x1e6c0080 0x80>;
36 compatible = "simple-bus";
41 clk_clkin: clk_clkin@1e6e2070 {
43 compatible = "aspeed,g5-clkin-clock";
44 reg = <0x1e6e2070 0x04>;
47 syscon: syscon@1e6e2000 {
48 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
49 reg = <0x1e6e2000 0x1a8>;
52 compatible = "aspeed,g5-pinctrl";
53 aspeed,external-nodes = <&gfx &lhc>;
55 pinctrl_acpi_default: acpi_default {
60 pinctrl_adc0_default: adc0_default {
65 pinctrl_adc1_default: adc1_default {
70 pinctrl_adc10_default: adc10_default {
75 pinctrl_adc11_default: adc11_default {
80 pinctrl_adc12_default: adc12_default {
85 pinctrl_adc13_default: adc13_default {
90 pinctrl_adc14_default: adc14_default {
95 pinctrl_adc15_default: adc15_default {
100 pinctrl_adc2_default: adc2_default {
105 pinctrl_adc3_default: adc3_default {
110 pinctrl_adc4_default: adc4_default {
115 pinctrl_adc5_default: adc5_default {
120 pinctrl_adc6_default: adc6_default {
125 pinctrl_adc7_default: adc7_default {
130 pinctrl_adc8_default: adc8_default {
135 pinctrl_adc9_default: adc9_default {
140 pinctrl_bmcint_default: bmcint_default {
145 pinctrl_ddcclk_default: ddcclk_default {
150 pinctrl_ddcdat_default: ddcdat_default {
155 pinctrl_espi_default: espi_default {
160 pinctrl_fwspics1_default: fwspics1_default {
161 function = "FWSPICS1";
165 pinctrl_fwspics2_default: fwspics2_default {
166 function = "FWSPICS2";
170 pinctrl_gpid0_default: gpid0_default {
175 pinctrl_gpid2_default: gpid2_default {
180 pinctrl_gpid4_default: gpid4_default {
185 pinctrl_gpid6_default: gpid6_default {
190 pinctrl_gpie0_default: gpie0_default {
195 pinctrl_gpie2_default: gpie2_default {
200 pinctrl_gpie4_default: gpie4_default {
205 pinctrl_gpie6_default: gpie6_default {
210 pinctrl_i2c10_default: i2c10_default {
215 pinctrl_i2c11_default: i2c11_default {
220 pinctrl_i2c12_default: i2c12_default {
225 pinctrl_i2c13_default: i2c13_default {
230 pinctrl_i2c14_default: i2c14_default {
235 pinctrl_i2c3_default: i2c3_default {
240 pinctrl_i2c4_default: i2c4_default {
245 pinctrl_i2c5_default: i2c5_default {
250 pinctrl_i2c6_default: i2c6_default {
255 pinctrl_i2c7_default: i2c7_default {
260 pinctrl_i2c8_default: i2c8_default {
265 pinctrl_i2c9_default: i2c9_default {
270 pinctrl_lad0_default: lad0_default {
275 pinctrl_lad1_default: lad1_default {
280 pinctrl_lad2_default: lad2_default {
285 pinctrl_lad3_default: lad3_default {
290 pinctrl_lclk_default: lclk_default {
295 pinctrl_lframe_default: lframe_default {
300 pinctrl_lpchc_default: lpchc_default {
305 pinctrl_lpcpd_default: lpcpd_default {
310 pinctrl_lpcplus_default: lpcplus_default {
311 function = "LPCPLUS";
315 pinctrl_lpcpme_default: lpcpme_default {
320 pinctrl_lpcrst_default: lpcrst_default {
325 pinctrl_lpcsmi_default: lpcsmi_default {
330 pinctrl_lsirq_default: lsirq_default {
335 pinctrl_mac1link_default: mac1link_default {
336 function = "MAC1LINK";
340 pinctrl_mac2link_default: mac2link_default {
341 function = "MAC2LINK";
345 pinctrl_mdio1_default: mdio1_default {
350 pinctrl_mdio2_default: mdio2_default {
355 pinctrl_ncts1_default: ncts1_default {
360 pinctrl_ncts2_default: ncts2_default {
365 pinctrl_ncts3_default: ncts3_default {
370 pinctrl_ncts4_default: ncts4_default {
375 pinctrl_ndcd1_default: ndcd1_default {
380 pinctrl_ndcd2_default: ndcd2_default {
385 pinctrl_ndcd3_default: ndcd3_default {
390 pinctrl_ndcd4_default: ndcd4_default {
395 pinctrl_ndsr1_default: ndsr1_default {
400 pinctrl_ndsr2_default: ndsr2_default {
405 pinctrl_ndsr3_default: ndsr3_default {
410 pinctrl_ndsr4_default: ndsr4_default {
415 pinctrl_ndtr1_default: ndtr1_default {
420 pinctrl_ndtr2_default: ndtr2_default {
425 pinctrl_ndtr3_default: ndtr3_default {
430 pinctrl_ndtr4_default: ndtr4_default {
435 pinctrl_nri1_default: nri1_default {
440 pinctrl_nri2_default: nri2_default {
445 pinctrl_nri3_default: nri3_default {
450 pinctrl_nri4_default: nri4_default {
455 pinctrl_nrts1_default: nrts1_default {
460 pinctrl_nrts2_default: nrts2_default {
465 pinctrl_nrts3_default: nrts3_default {
470 pinctrl_nrts4_default: nrts4_default {
475 pinctrl_oscclk_default: oscclk_default {
480 pinctrl_pewake_default: pewake_default {
485 pinctrl_pnor_default: pnor_default {
490 pinctrl_pwm0_default: pwm0_default {
495 pinctrl_pwm1_default: pwm1_default {
500 pinctrl_pwm2_default: pwm2_default {
505 pinctrl_pwm3_default: pwm3_default {
510 pinctrl_pwm4_default: pwm4_default {
515 pinctrl_pwm5_default: pwm5_default {
520 pinctrl_pwm6_default: pwm6_default {
525 pinctrl_pwm7_default: pwm7_default {
530 pinctrl_rgmii1_default: rgmii1_default {
535 pinctrl_rgmii2_default: rgmii2_default {
540 pinctrl_rmii1_default: rmii1_default {
545 pinctrl_rmii2_default: rmii2_default {
550 pinctrl_rxd1_default: rxd1_default {
555 pinctrl_rxd2_default: rxd2_default {
560 pinctrl_rxd3_default: rxd3_default {
565 pinctrl_rxd4_default: rxd4_default {
570 pinctrl_salt1_default: salt1_default {
575 pinctrl_salt10_default: salt10_default {
580 pinctrl_salt11_default: salt11_default {
585 pinctrl_salt12_default: salt12_default {
590 pinctrl_salt13_default: salt13_default {
595 pinctrl_salt14_default: salt14_default {
600 pinctrl_salt2_default: salt2_default {
605 pinctrl_salt3_default: salt3_default {
610 pinctrl_salt4_default: salt4_default {
615 pinctrl_salt5_default: salt5_default {
620 pinctrl_salt6_default: salt6_default {
625 pinctrl_salt7_default: salt7_default {
630 pinctrl_salt8_default: salt8_default {
635 pinctrl_salt9_default: salt9_default {
640 pinctrl_scl1_default: scl1_default {
645 pinctrl_scl2_default: scl2_default {
650 pinctrl_sd1_default: sd1_default {
655 pinctrl_sd2_default: sd2_default {
660 pinctrl_sda1_default: sda1_default {
665 pinctrl_sda2_default: sda2_default {
670 pinctrl_sgps1_default: sgps1_default {
675 pinctrl_sgps2_default: sgps2_default {
680 pinctrl_sioonctrl_default: sioonctrl_default {
681 function = "SIOONCTRL";
682 groups = "SIOONCTRL";
685 pinctrl_siopbi_default: siopbi_default {
690 pinctrl_siopbo_default: siopbo_default {
695 pinctrl_siopwreq_default: siopwreq_default {
696 function = "SIOPWREQ";
700 pinctrl_siopwrgd_default: siopwrgd_default {
701 function = "SIOPWRGD";
705 pinctrl_sios3_default: sios3_default {
710 pinctrl_sios5_default: sios5_default {
715 pinctrl_siosci_default: siosci_default {
720 pinctrl_spi1_default: spi1_default {
725 pinctrl_spi1cs1_default: spi1cs1_default {
726 function = "SPI1CS1";
730 pinctrl_spi1debug_default: spi1debug_default {
731 function = "SPI1DEBUG";
732 groups = "SPI1DEBUG";
735 pinctrl_spi1passthru_default: spi1passthru_default {
736 function = "SPI1PASSTHRU";
737 groups = "SPI1PASSTHRU";
740 pinctrl_spi2ck_default: spi2ck_default {
745 pinctrl_spi2cs0_default: spi2cs0_default {
746 function = "SPI2CS0";
750 pinctrl_spi2cs1_default: spi2cs1_default {
751 function = "SPI2CS1";
755 pinctrl_spi2miso_default: spi2miso_default {
756 function = "SPI2MISO";
760 pinctrl_spi2mosi_default: spi2mosi_default {
761 function = "SPI2MOSI";
765 pinctrl_timer3_default: timer3_default {
770 pinctrl_timer4_default: timer4_default {
775 pinctrl_timer5_default: timer5_default {
780 pinctrl_timer6_default: timer6_default {
785 pinctrl_timer7_default: timer7_default {
790 pinctrl_timer8_default: timer8_default {
795 pinctrl_txd1_default: txd1_default {
800 pinctrl_txd2_default: txd2_default {
805 pinctrl_txd3_default: txd3_default {
810 pinctrl_txd4_default: txd4_default {
815 pinctrl_uart6_default: uart6_default {
820 pinctrl_usbcki_default: usbcki_default {
825 pinctrl_vgabiosrom_default: vgabiosrom_default {
826 function = "VGABIOSROM";
827 groups = "VGABIOSROM";
830 pinctrl_vgahs_default: vgahs_default {
835 pinctrl_vgavs_default: vgavs_default {
840 pinctrl_vpi24_default: vpi24_default {
845 pinctrl_vpo_default: vpo_default {
850 pinctrl_wdtrst1_default: wdtrst1_default {
851 function = "WDTRST1";
855 pinctrl_wdtrst2_default: wdtrst2_default {
856 function = "WDTRST2";
863 clk_hpll: clk_hpll@1e6e2024 {
865 compatible = "aspeed,g5-hpll-clock";
866 reg = <0x1e6e2024 0x4>;
867 clocks = <&clk_clkin>;
870 clk_ahb: clk_ahb@1e6e2070 {
872 compatible = "aspeed,g5-ahb-clock";
873 reg = <0x1e6e2070 0x4>;
874 clocks = <&clk_hpll>;
877 clk_apb: clk_apb@1e6e2008 {
879 compatible = "aspeed,g5-apb-clock";
880 reg = <0x1e6e2008 0x4>;
881 clocks = <&clk_hpll>;
884 clk_uart: clk_uart@1e6e2008 {
886 compatible = "aspeed,uart-clock";
887 reg = <0x1e6e202c 0x4>;
890 gfx: display@1e6e6000 {
891 compatible = "aspeed,ast2500-gfx", "syscon";
892 reg = <0x1e6e6000 0x1000>;
897 compatible = "mmio-sram";
898 reg = <0x1e720000 0x9000>; // 36K
901 gpio: gpio@1e780000 {
904 compatible = "aspeed,ast2500-gpio";
905 reg = <0x1e780000 0x1000>;
907 gpio-ranges = <&pinctrl 0 0 220>;
908 interrupt-controller;
911 timer: timer@1e782000 {
912 compatible = "aspeed,ast2400-timer";
913 reg = <0x1e782000 0x90>;
914 // The moxart_timer driver registers only one
915 // interrupt and assumes it's for timer 1
916 //interrupts = <16 17 18 35 36 37 38 39>;
923 compatible = "aspeed,wdt";
924 reg = <0x1e785000 0x1c>;
929 compatible = "aspeed,wdt";
930 reg = <0x1e785020 0x1c>;
936 compatible = "aspeed,wdt";
937 reg = <0x1e785074 0x1c>;
941 uart1: serial@1e783000 {
942 compatible = "ns16550a";
943 reg = <0x1e783000 0x1000>;
946 clocks = <&clk_uart>;
952 compatible = "aspeed,ast2500-lpc", "simple-mfd";
953 reg = <0x1e789000 0x1000>;
955 #address-cells = <1>;
957 ranges = <0 0x1e789000 0x1000>;
960 compatible = "aspeed,ast2500-lpc-bmc";
964 lpc_host: lpc-host@80 {
965 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
968 #address-cells = <1>;
970 ranges = <0 0x80 0x1e0>;
975 compatible = "aspeed,ast2500-lhc";
976 reg = <0x20 0x24 0x48 0x8>;
981 uart2: serial@1e78d000 {
982 compatible = "ns16550a";
983 reg = <0x1e78d000 0x1000>;
986 clocks = <&clk_uart>;
991 uart3: serial@1e78e000 {
992 compatible = "ns16550a";
993 reg = <0x1e78e000 0x1000>;
996 clocks = <&clk_uart>;
1001 uart4: serial@1e78f000 {
1002 compatible = "ns16550a";
1003 reg = <0x1e78f000 0x1000>;
1006 clocks = <&clk_uart>;
1008 status = "disabled";
1011 uart5: serial@1e784000 {
1012 compatible = "ns16550a";
1013 reg = <0x1e784000 0x1000>;
1016 clocks = <&clk_uart>;
1017 current-speed = <38400>;
1019 status = "disabled";
1022 uart6: serial@1e787000 {
1023 compatible = "ns16550a";
1024 reg = <0x1e787000 0x1000>;
1027 clocks = <&clk_uart>;
1029 status = "disabled";