]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/arm/boot/dts/aspeed-g5.dtsi
projects / mirror_ubuntu-bionic-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'imx-drm-fixes-2017-07-18' of git://git.pengutronix.de/git/pza/linux into...
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / aspeed-g5.dtsi
1 #include "skeleton.dtsi"
2
3 / {
4 model = "Aspeed BMC";
5 compatible = "aspeed,ast2500";
6 #address-cells = <1>;
7 #size-cells = <1>;
8 interrupt-parent = <&vic>;
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu@0 {
15 compatible = "arm,arm1176jzf-s";
16 device_type = "cpu";
17 reg = <0>;
18 };
19 };
20
21 ahb {
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
25 ranges;
26
27 fmc: flash-controller@1e620000 {
28 reg = < 0x1e620000 0xc4
29 0x20000000 0x10000000 >;
30 #address-cells = <1>;
31 #size-cells = <0>;
32 compatible = "aspeed,ast2500-fmc";
33 status = "disabled";
34 interrupts = <19>;
35 flash@0 {
36 reg = < 0 >;
37 compatible = "jedec,spi-nor";
38 status = "disabled";
39 };
40 flash@1 {
41 reg = < 1 >;
42 compatible = "jedec,spi-nor";
43 status = "disabled";
44 };
45 flash@2 {
46 reg = < 2 >;
47 compatible = "jedec,spi-nor";
48 status = "disabled";
49 };
50 };
51
52 spi1: flash-controller@1e630000 {
53 reg = < 0x1e630000 0xc4
54 0x30000000 0x08000000 >;
55 #address-cells = <1>;
56 #size-cells = <0>;
57 compatible = "aspeed,ast2500-spi";
58 status = "disabled";
59 flash@0 {
60 reg = < 0 >;
61 compatible = "jedec,spi-nor";
62 status = "disabled";
63 };
64 flash@1 {
65 reg = < 1 >;
66 compatible = "jedec,spi-nor";
67 status = "disabled";
68 };
69 };
70
71 spi2: flash-controller@1e631000 {
72 reg = < 0x1e631000 0xc4
73 0x38000000 0x08000000 >;
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "aspeed,ast2500-spi";
77 status = "disabled";
78 flash@0 {
79 reg = < 0 >;
80 compatible = "jedec,spi-nor";
81 status = "disabled";
82 };
83 flash@1 {
84 reg = < 1 >;
85 compatible = "jedec,spi-nor";
86 status = "disabled";
87 };
88 };
89
90 vic: interrupt-controller@1e6c0080 {
91 compatible = "aspeed,ast2400-vic";
92 interrupt-controller;
93 #interrupt-cells = <1>;
94 valid-sources = <0xfefff7ff 0x0807ffff>;
95 reg = <0x1e6c0080 0x80>;
96 };
97
98 mac0: ethernet@1e660000 {
99 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
100 reg = <0x1e660000 0x180>;
101 interrupts = <2>;
102 status = "disabled";
103 };
104
105 mac1: ethernet@1e680000 {
106 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
107 reg = <0x1e680000 0x180>;
108 interrupts = <3>;
109 status = "disabled";
110 };
111
112 apb {
113 compatible = "simple-bus";
114 #address-cells = <1>;
115 #size-cells = <1>;
116 ranges;
117
118 syscon: syscon@1e6e2000 {
119 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
120 reg = <0x1e6e2000 0x1a8>;
121 #address-cells = <1>;
122 #size-cells = <0>;
123
124 clk_clkin: clk_clkin@70 {
125 #clock-cells = <0>;
126 compatible = "aspeed,g5-clkin-clock", "fixed-clock";
127 reg = <0x70>;
128 clock-frequency = <24000000>;
129 };
130
131 clk_hpll: clk_hpll@24 {
132 #clock-cells = <0>;
133 compatible = "aspeed,g5-hpll-clock", "fixed-clock";
134 reg = <0x24>;
135 clocks = <&clk_clkin>;
136 clock-frequency = <792000000>;
137 };
138
139 clk_ahb: clk_ahb@70 {
140 #clock-cells = <0>;
141 compatible = "aspeed,g5-ahb-clock", "fixed-clock";
142 reg = <0x70>;
143 clocks = <&clk_hpll>;
144 clock-frequency = <198000000>;
145 };
146
147 clk_apb: clk_apb@08 {
148 #clock-cells = <0>;
149 compatible = "aspeed,g5-apb-clock", "fixed-clock";
150 reg = <0x08>;
151 clocks = <&clk_hpll>;
152 clock-frequency = <24750000>;
153 };
154
155 clk_uart: clk_uart@2c {
156 #clock-cells = <0>;
157 compatible = "aspeed,uart-clock", "fixed-clock";
158 reg = <0x2c>;
159 clock-frequency = <24000000>;
160 };
161
162 pinctrl: pinctrl {
163 compatible = "aspeed,g5-pinctrl";
164 aspeed,external-nodes = <&gfx &lhc>;
165
166 pinctrl_acpi_default: acpi_default {
167 function = "ACPI";
168 groups = "ACPI";
169 };
170
171 pinctrl_adc0_default: adc0_default {
172 function = "ADC0";
173 groups = "ADC0";
174 };
175
176 pinctrl_adc1_default: adc1_default {
177 function = "ADC1";
178 groups = "ADC1";
179 };
180
181 pinctrl_adc10_default: adc10_default {
182 function = "ADC10";
183 groups = "ADC10";
184 };
185
186 pinctrl_adc11_default: adc11_default {
187 function = "ADC11";
188 groups = "ADC11";
189 };
190
191 pinctrl_adc12_default: adc12_default {
192 function = "ADC12";
193 groups = "ADC12";
194 };
195
196 pinctrl_adc13_default: adc13_default {
197 function = "ADC13";
198 groups = "ADC13";
199 };
200
201 pinctrl_adc14_default: adc14_default {
202 function = "ADC14";
203 groups = "ADC14";
204 };
205
206 pinctrl_adc15_default: adc15_default {
207 function = "ADC15";
208 groups = "ADC15";
209 };
210
211 pinctrl_adc2_default: adc2_default {
212 function = "ADC2";
213 groups = "ADC2";
214 };
215
216 pinctrl_adc3_default: adc3_default {
217 function = "ADC3";
218 groups = "ADC3";
219 };
220
221 pinctrl_adc4_default: adc4_default {
222 function = "ADC4";
223 groups = "ADC4";
224 };
225
226 pinctrl_adc5_default: adc5_default {
227 function = "ADC5";
228 groups = "ADC5";
229 };
230
231 pinctrl_adc6_default: adc6_default {
232 function = "ADC6";
233 groups = "ADC6";
234 };
235
236 pinctrl_adc7_default: adc7_default {
237 function = "ADC7";
238 groups = "ADC7";
239 };
240
241 pinctrl_adc8_default: adc8_default {
242 function = "ADC8";
243 groups = "ADC8";
244 };
245
246 pinctrl_adc9_default: adc9_default {
247 function = "ADC9";
248 groups = "ADC9";
249 };
250
251 pinctrl_bmcint_default: bmcint_default {
252 function = "BMCINT";
253 groups = "BMCINT";
254 };
255
256 pinctrl_ddcclk_default: ddcclk_default {
257 function = "DDCCLK";
258 groups = "DDCCLK";
259 };
260
261 pinctrl_ddcdat_default: ddcdat_default {
262 function = "DDCDAT";
263 groups = "DDCDAT";
264 };
265
266 pinctrl_espi_default: espi_default {
267 function = "ESPI";
268 groups = "ESPI";
269 };
270
271 pinctrl_fwspics1_default: fwspics1_default {
272 function = "FWSPICS1";
273 groups = "FWSPICS1";
274 };
275
276 pinctrl_fwspics2_default: fwspics2_default {
277 function = "FWSPICS2";
278 groups = "FWSPICS2";
279 };
280
281 pinctrl_gpid0_default: gpid0_default {
282 function = "GPID0";
283 groups = "GPID0";
284 };
285
286 pinctrl_gpid2_default: gpid2_default {
287 function = "GPID2";
288 groups = "GPID2";
289 };
290
291 pinctrl_gpid4_default: gpid4_default {
292 function = "GPID4";
293 groups = "GPID4";
294 };
295
296 pinctrl_gpid6_default: gpid6_default {
297 function = "GPID6";
298 groups = "GPID6";
299 };
300
301 pinctrl_gpie0_default: gpie0_default {
302 function = "GPIE0";
303 groups = "GPIE0";
304 };
305
306 pinctrl_gpie2_default: gpie2_default {
307 function = "GPIE2";
308 groups = "GPIE2";
309 };
310
311 pinctrl_gpie4_default: gpie4_default {
312 function = "GPIE4";
313 groups = "GPIE4";
314 };
315
316 pinctrl_gpie6_default: gpie6_default {
317 function = "GPIE6";
318 groups = "GPIE6";
319 };
320
321 pinctrl_i2c10_default: i2c10_default {
322 function = "I2C10";
323 groups = "I2C10";
324 };
325
326 pinctrl_i2c11_default: i2c11_default {
327 function = "I2C11";
328 groups = "I2C11";
329 };
330
331 pinctrl_i2c12_default: i2c12_default {
332 function = "I2C12";
333 groups = "I2C12";
334 };
335
336 pinctrl_i2c13_default: i2c13_default {
337 function = "I2C13";
338 groups = "I2C13";
339 };
340
341 pinctrl_i2c14_default: i2c14_default {
342 function = "I2C14";
343 groups = "I2C14";
344 };
345
346 pinctrl_i2c3_default: i2c3_default {
347 function = "I2C3";
348 groups = "I2C3";
349 };
350
351 pinctrl_i2c4_default: i2c4_default {
352 function = "I2C4";
353 groups = "I2C4";
354 };
355
356 pinctrl_i2c5_default: i2c5_default {
357 function = "I2C5";
358 groups = "I2C5";
359 };
360
361 pinctrl_i2c6_default: i2c6_default {
362 function = "I2C6";
363 groups = "I2C6";
364 };
365
366 pinctrl_i2c7_default: i2c7_default {
367 function = "I2C7";
368 groups = "I2C7";
369 };
370
371 pinctrl_i2c8_default: i2c8_default {
372 function = "I2C8";
373 groups = "I2C8";
374 };
375
376 pinctrl_i2c9_default: i2c9_default {
377 function = "I2C9";
378 groups = "I2C9";
379 };
380
381 pinctrl_lad0_default: lad0_default {
382 function = "LAD0";
383 groups = "LAD0";
384 };
385 pinctrl_lad1_default: lad1_default {
386 function = "LAD1";
387 groups = "LAD1";
388 };
389
390 pinctrl_lad2_default: lad2_default {
391 function = "LAD2";
392 groups = "LAD2";
393 };
394
395 pinctrl_lad3_default: lad3_default {
396 function = "LAD3";
397 groups = "LAD3";
398 };
399
400 pinctrl_lclk_default: lclk_default {
401 function = "LCLK";
402 groups = "LCLK";
403 };
404
405 pinctrl_lframe_default: lframe_default {
406 function = "LFRAME";
407 groups = "LFRAME";
408 };
409
410 pinctrl_lpchc_default: lpchc_default {
411 function = "LPCHC";
412 groups = "LPCHC";
413 };
414
415 pinctrl_lpcpd_default: lpcpd_default {
416 function = "LPCPD";
417 groups = "LPCPD";
418 };
419
420 pinctrl_lpcplus_default: lpcplus_default {
421 function = "LPCPLUS";
422 groups = "LPCPLUS";
423 };
424
425 pinctrl_lpcpme_default: lpcpme_default {
426 function = "LPCPME";
427 groups = "LPCPME";
428 };
429
430 pinctrl_lpcrst_default: lpcrst_default {
431 function = "LPCRST";
432 groups = "LPCRST";
433 };
434
435 pinctrl_lpcsmi_default: lpcsmi_default {
436 function = "LPCSMI";
437 groups = "LPCSMI";
438 };
439
440 pinctrl_lsirq_default: lsirq_default {
441 function = "LSIRQ";
442 groups = "LSIRQ";
443 };
444
445 pinctrl_mac1link_default: mac1link_default {
446 function = "MAC1LINK";
447 groups = "MAC1LINK";
448 };
449
450 pinctrl_mac2link_default: mac2link_default {
451 function = "MAC2LINK";
452 groups = "MAC2LINK";
453 };
454
455 pinctrl_mdio1_default: mdio1_default {
456 function = "MDIO1";
457 groups = "MDIO1";
458 };
459
460 pinctrl_mdio2_default: mdio2_default {
461 function = "MDIO2";
462 groups = "MDIO2";
463 };
464
465 pinctrl_ncts1_default: ncts1_default {
466 function = "NCTS1";
467 groups = "NCTS1";
468 };
469
470 pinctrl_ncts2_default: ncts2_default {
471 function = "NCTS2";
472 groups = "NCTS2";
473 };
474
475 pinctrl_ncts3_default: ncts3_default {
476 function = "NCTS3";
477 groups = "NCTS3";
478 };
479
480 pinctrl_ncts4_default: ncts4_default {
481 function = "NCTS4";
482 groups = "NCTS4";
483 };
484
485 pinctrl_ndcd1_default: ndcd1_default {
486 function = "NDCD1";
487 groups = "NDCD1";
488 };
489
490 pinctrl_ndcd2_default: ndcd2_default {
491 function = "NDCD2";
492 groups = "NDCD2";
493 };
494
495 pinctrl_ndcd3_default: ndcd3_default {
496 function = "NDCD3";
497 groups = "NDCD3";
498 };
499
500 pinctrl_ndcd4_default: ndcd4_default {
501 function = "NDCD4";
502 groups = "NDCD4";
503 };
504
505 pinctrl_ndsr1_default: ndsr1_default {
506 function = "NDSR1";
507 groups = "NDSR1";
508 };
509
510 pinctrl_ndsr2_default: ndsr2_default {
511 function = "NDSR2";
512 groups = "NDSR2";
513 };
514
515 pinctrl_ndsr3_default: ndsr3_default {
516 function = "NDSR3";
517 groups = "NDSR3";
518 };
519
520 pinctrl_ndsr4_default: ndsr4_default {
521 function = "NDSR4";
522 groups = "NDSR4";
523 };
524
525 pinctrl_ndtr1_default: ndtr1_default {
526 function = "NDTR1";
527 groups = "NDTR1";
528 };
529
530 pinctrl_ndtr2_default: ndtr2_default {
531 function = "NDTR2";
532 groups = "NDTR2";
533 };
534
535 pinctrl_ndtr3_default: ndtr3_default {
536 function = "NDTR3";
537 groups = "NDTR3";
538 };
539
540 pinctrl_ndtr4_default: ndtr4_default {
541 function = "NDTR4";
542 groups = "NDTR4";
543 };
544
545 pinctrl_nri1_default: nri1_default {
546 function = "NRI1";
547 groups = "NRI1";
548 };
549
550 pinctrl_nri2_default: nri2_default {
551 function = "NRI2";
552 groups = "NRI2";
553 };
554
555 pinctrl_nri3_default: nri3_default {
556 function = "NRI3";
557 groups = "NRI3";
558 };
559
560 pinctrl_nri4_default: nri4_default {
561 function = "NRI4";
562 groups = "NRI4";
563 };
564
565 pinctrl_nrts1_default: nrts1_default {
566 function = "NRTS1";
567 groups = "NRTS1";
568 };
569
570 pinctrl_nrts2_default: nrts2_default {
571 function = "NRTS2";
572 groups = "NRTS2";
573 };
574
575 pinctrl_nrts3_default: nrts3_default {
576 function = "NRTS3";
577 groups = "NRTS3";
578 };
579
580 pinctrl_nrts4_default: nrts4_default {
581 function = "NRTS4";
582 groups = "NRTS4";
583 };
584
585 pinctrl_oscclk_default: oscclk_default {
586 function = "OSCCLK";
587 groups = "OSCCLK";
588 };
589
590 pinctrl_pewake_default: pewake_default {
591 function = "PEWAKE";
592 groups = "PEWAKE";
593 };
594
595 pinctrl_pnor_default: pnor_default {
596 function = "PNOR";
597 groups = "PNOR";
598 };
599
600 pinctrl_pwm0_default: pwm0_default {
601 function = "PWM0";
602 groups = "PWM0";
603 };
604
605 pinctrl_pwm1_default: pwm1_default {
606 function = "PWM1";
607 groups = "PWM1";
608 };
609
610 pinctrl_pwm2_default: pwm2_default {
611 function = "PWM2";
612 groups = "PWM2";
613 };
614
615 pinctrl_pwm3_default: pwm3_default {
616 function = "PWM3";
617 groups = "PWM3";
618 };
619
620 pinctrl_pwm4_default: pwm4_default {
621 function = "PWM4";
622 groups = "PWM4";
623 };
624
625 pinctrl_pwm5_default: pwm5_default {
626 function = "PWM5";
627 groups = "PWM5";
628 };
629
630 pinctrl_pwm6_default: pwm6_default {
631 function = "PWM6";
632 groups = "PWM6";
633 };
634
635 pinctrl_pwm7_default: pwm7_default {
636 function = "PWM7";
637 groups = "PWM7";
638 };
639
640 pinctrl_rgmii1_default: rgmii1_default {
641 function = "RGMII1";
642 groups = "RGMII1";
643 };
644
645 pinctrl_rgmii2_default: rgmii2_default {
646 function = "RGMII2";
647 groups = "RGMII2";
648 };
649
650 pinctrl_rmii1_default: rmii1_default {
651 function = "RMII1";
652 groups = "RMII1";
653 };
654
655 pinctrl_rmii2_default: rmii2_default {
656 function = "RMII2";
657 groups = "RMII2";
658 };
659
660 pinctrl_rxd1_default: rxd1_default {
661 function = "RXD1";
662 groups = "RXD1";
663 };
664
665 pinctrl_rxd2_default: rxd2_default {
666 function = "RXD2";
667 groups = "RXD2";
668 };
669
670 pinctrl_rxd3_default: rxd3_default {
671 function = "RXD3";
672 groups = "RXD3";
673 };
674
675 pinctrl_rxd4_default: rxd4_default {
676 function = "RXD4";
677 groups = "RXD4";
678 };
679
680 pinctrl_salt1_default: salt1_default {
681 function = "SALT1";
682 groups = "SALT1";
683 };
684
685 pinctrl_salt10_default: salt10_default {
686 function = "SALT10";
687 groups = "SALT10";
688 };
689
690 pinctrl_salt11_default: salt11_default {
691 function = "SALT11";
692 groups = "SALT11";
693 };
694
695 pinctrl_salt12_default: salt12_default {
696 function = "SALT12";
697 groups = "SALT12";
698 };
699
700 pinctrl_salt13_default: salt13_default {
701 function = "SALT13";
702 groups = "SALT13";
703 };
704
705 pinctrl_salt14_default: salt14_default {
706 function = "SALT14";
707 groups = "SALT14";
708 };
709
710 pinctrl_salt2_default: salt2_default {
711 function = "SALT2";
712 groups = "SALT2";
713 };
714
715 pinctrl_salt3_default: salt3_default {
716 function = "SALT3";
717 groups = "SALT3";
718 };
719
720 pinctrl_salt4_default: salt4_default {
721 function = "SALT4";
722 groups = "SALT4";
723 };
724
725 pinctrl_salt5_default: salt5_default {
726 function = "SALT5";
727 groups = "SALT5";
728 };
729
730 pinctrl_salt6_default: salt6_default {
731 function = "SALT6";
732 groups = "SALT6";
733 };
734
735 pinctrl_salt7_default: salt7_default {
736 function = "SALT7";
737 groups = "SALT7";
738 };
739
740 pinctrl_salt8_default: salt8_default {
741 function = "SALT8";
742 groups = "SALT8";
743 };
744
745 pinctrl_salt9_default: salt9_default {
746 function = "SALT9";
747 groups = "SALT9";
748 };
749
750 pinctrl_scl1_default: scl1_default {
751 function = "SCL1";
752 groups = "SCL1";
753 };
754
755 pinctrl_scl2_default: scl2_default {
756 function = "SCL2";
757 groups = "SCL2";
758 };
759
760 pinctrl_sd1_default: sd1_default {
761 function = "SD1";
762 groups = "SD1";
763 };
764
765 pinctrl_sd2_default: sd2_default {
766 function = "SD2";
767 groups = "SD2";
768 };
769
770 pinctrl_sda1_default: sda1_default {
771 function = "SDA1";
772 groups = "SDA1";
773 };
774
775 pinctrl_sda2_default: sda2_default {
776 function = "SDA2";
777 groups = "SDA2";
778 };
779
780 pinctrl_sgps1_default: sgps1_default {
781 function = "SGPS1";
782 groups = "SGPS1";
783 };
784
785 pinctrl_sgps2_default: sgps2_default {
786 function = "SGPS2";
787 groups = "SGPS2";
788 };
789
790 pinctrl_sioonctrl_default: sioonctrl_default {
791 function = "SIOONCTRL";
792 groups = "SIOONCTRL";
793 };
794
795 pinctrl_siopbi_default: siopbi_default {
796 function = "SIOPBI";
797 groups = "SIOPBI";
798 };
799
800 pinctrl_siopbo_default: siopbo_default {
801 function = "SIOPBO";
802 groups = "SIOPBO";
803 };
804
805 pinctrl_siopwreq_default: siopwreq_default {
806 function = "SIOPWREQ";
807 groups = "SIOPWREQ";
808 };
809
810 pinctrl_siopwrgd_default: siopwrgd_default {
811 function = "SIOPWRGD";
812 groups = "SIOPWRGD";
813 };
814
815 pinctrl_sios3_default: sios3_default {
816 function = "SIOS3";
817 groups = "SIOS3";
818 };
819
820 pinctrl_sios5_default: sios5_default {
821 function = "SIOS5";
822 groups = "SIOS5";
823 };
824
825 pinctrl_siosci_default: siosci_default {
826 function = "SIOSCI";
827 groups = "SIOSCI";
828 };
829
830 pinctrl_spi1_default: spi1_default {
831 function = "SPI1";
832 groups = "SPI1";
833 };
834
835 pinctrl_spi1cs1_default: spi1cs1_default {
836 function = "SPI1CS1";
837 groups = "SPI1CS1";
838 };
839
840 pinctrl_spi1debug_default: spi1debug_default {
841 function = "SPI1DEBUG";
842 groups = "SPI1DEBUG";
843 };
844
845 pinctrl_spi1passthru_default: spi1passthru_default {
846 function = "SPI1PASSTHRU";
847 groups = "SPI1PASSTHRU";
848 };
849
850 pinctrl_spi2ck_default: spi2ck_default {
851 function = "SPI2CK";
852 groups = "SPI2CK";
853 };
854
855 pinctrl_spi2cs0_default: spi2cs0_default {
856 function = "SPI2CS0";
857 groups = "SPI2CS0";
858 };
859
860 pinctrl_spi2cs1_default: spi2cs1_default {
861 function = "SPI2CS1";
862 groups = "SPI2CS1";
863 };
864
865 pinctrl_spi2miso_default: spi2miso_default {
866 function = "SPI2MISO";
867 groups = "SPI2MISO";
868 };
869
870 pinctrl_spi2mosi_default: spi2mosi_default {
871 function = "SPI2MOSI";
872 groups = "SPI2MOSI";
873 };
874
875 pinctrl_timer3_default: timer3_default {
876 function = "TIMER3";
877 groups = "TIMER3";
878 };
879
880 pinctrl_timer4_default: timer4_default {
881 function = "TIMER4";
882 groups = "TIMER4";
883 };
884
885 pinctrl_timer5_default: timer5_default {
886 function = "TIMER5";
887 groups = "TIMER5";
888 };
889
890 pinctrl_timer6_default: timer6_default {
891 function = "TIMER6";
892 groups = "TIMER6";
893 };
894
895 pinctrl_timer7_default: timer7_default {
896 function = "TIMER7";
897 groups = "TIMER7";
898 };
899
900 pinctrl_timer8_default: timer8_default {
901 function = "TIMER8";
902 groups = "TIMER8";
903 };
904
905 pinctrl_txd1_default: txd1_default {
906 function = "TXD1";
907 groups = "TXD1";
908 };
909
910 pinctrl_txd2_default: txd2_default {
911 function = "TXD2";
912 groups = "TXD2";
913 };
914
915 pinctrl_txd3_default: txd3_default {
916 function = "TXD3";
917 groups = "TXD3";
918 };
919
920 pinctrl_txd4_default: txd4_default {
921 function = "TXD4";
922 groups = "TXD4";
923 };
924
925 pinctrl_uart6_default: uart6_default {
926 function = "UART6";
927 groups = "UART6";
928 };
929
930 pinctrl_usbcki_default: usbcki_default {
931 function = "USBCKI";
932 groups = "USBCKI";
933 };
934
935 pinctrl_vgabiosrom_default: vgabiosrom_default {
936 function = "VGABIOSROM";
937 groups = "VGABIOSROM";
938 };
939
940 pinctrl_vgahs_default: vgahs_default {
941 function = "VGAHS";
942 groups = "VGAHS";
943 };
944
945 pinctrl_vgavs_default: vgavs_default {
946 function = "VGAVS";
947 groups = "VGAVS";
948 };
949
950 pinctrl_vpi24_default: vpi24_default {
951 function = "VPI24";
952 groups = "VPI24";
953 };
954
955 pinctrl_vpo_default: vpo_default {
956 function = "VPO";
957 groups = "VPO";
958 };
959
960 pinctrl_wdtrst1_default: wdtrst1_default {
961 function = "WDTRST1";
962 groups = "WDTRST1";
963 };
964
965 pinctrl_wdtrst2_default: wdtrst2_default {
966 function = "WDTRST2";
967 groups = "WDTRST2";
968 };
969
970 };
971
972 };
973
974 gfx: display@1e6e6000 {
975 compatible = "aspeed,ast2500-gfx", "syscon";
976 reg = <0x1e6e6000 0x1000>;
977 reg-io-width = <4>;
978 };
979
980 sram@1e720000 {
981 compatible = "mmio-sram";
982 reg = <0x1e720000 0x9000>; // 36K
983 };
984
985 gpio: gpio@1e780000 {
986 #gpio-cells = <2>;
987 gpio-controller;
988 compatible = "aspeed,ast2500-gpio";
989 reg = <0x1e780000 0x1000>;
990 interrupts = <20>;
991 gpio-ranges = <&pinctrl 0 0 220>;
992 interrupt-controller;
993 };
994
995 timer: timer@1e782000 {
996 /* This timer is a Faraday FTTMR010 derivative */
997 compatible = "aspeed,ast2400-timer";
998 reg = <0x1e782000 0x90>;
999 interrupts = <16 17 18 35 36 37 38 39>;
1000 clocks = <&clk_apb>;
1001 clock-names = "PCLK";
1002 };
1003
1004
1005 wdt1: wdt@1e785000 {
1006 compatible = "aspeed,ast2500-wdt";
1007 reg = <0x1e785000 0x20>;
1008 interrupts = <27>;
1009 };
1010
1011 wdt2: wdt@1e785020 {
1012 compatible = "aspeed,ast2500-wdt";
1013 reg = <0x1e785020 0x20>;
1014 interrupts = <27>;
1015 status = "disabled";
1016 };
1017
1018 wdt3: wdt@1e785040 {
1019 compatible = "aspeed,ast2500-wdt";
1020 reg = <0x1e785040 0x20>;
1021 status = "disabled";
1022 };
1023
1024 uart1: serial@1e783000 {
1025 compatible = "ns16550a";
1026 reg = <0x1e783000 0x1000>;
1027 reg-shift = <2>;
1028 interrupts = <9>;
1029 clocks = <&clk_uart>;
1030 no-loopback-test;
1031 status = "disabled";
1032 };
1033
1034 lpc: lpc@1e789000 {
1035 compatible = "aspeed,ast2500-lpc", "simple-mfd";
1036 reg = <0x1e789000 0x1000>;
1037
1038 #address-cells = <1>;
1039 #size-cells = <1>;
1040 ranges = <0 0x1e789000 0x1000>;
1041
1042 lpc_bmc: lpc-bmc@0 {
1043 compatible = "aspeed,ast2500-lpc-bmc";
1044 reg = <0x0 0x80>;
1045 };
1046
1047 lpc_host: lpc-host@80 {
1048 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
1049 reg = <0x80 0x1e0>;
1050
1051 #address-cells = <1>;
1052 #size-cells = <1>;
1053 ranges = <0 0x80 0x1e0>;
1054
1055 reg-io-width = <4>;
1056
1057 lhc: lhc@20 {
1058 compatible = "aspeed,ast2500-lhc";
1059 reg = <0x20 0x24 0x48 0x8>;
1060 };
1061 };
1062 };
1063
1064 uart2: serial@1e78d000 {
1065 compatible = "ns16550a";
1066 reg = <0x1e78d000 0x1000>;
1067 reg-shift = <2>;
1068 interrupts = <32>;
1069 clocks = <&clk_uart>;
1070 no-loopback-test;
1071 status = "disabled";
1072 };
1073
1074 uart3: serial@1e78e000 {
1075 compatible = "ns16550a";
1076 reg = <0x1e78e000 0x1000>;
1077 reg-shift = <2>;
1078 interrupts = <33>;
1079 clocks = <&clk_uart>;
1080 no-loopback-test;
1081 status = "disabled";
1082 };
1083
1084 uart4: serial@1e78f000 {
1085 compatible = "ns16550a";
1086 reg = <0x1e78f000 0x1000>;
1087 reg-shift = <2>;
1088 interrupts = <34>;
1089 clocks = <&clk_uart>;
1090 no-loopback-test;
1091 status = "disabled";
1092 };
1093
1094 uart5: serial@1e784000 {
1095 compatible = "ns16550a";
1096 reg = <0x1e784000 0x1000>;
1097 reg-shift = <2>;
1098 interrupts = <10>;
1099 clocks = <&clk_uart>;
1100 current-speed = <38400>;
1101 no-loopback-test;
1102 status = "disabled";
1103 };
1104
1105 uart6: serial@1e787000 {
1106 compatible = "ns16550a";
1107 reg = <0x1e787000 0x1000>;
1108 reg-shift = <2>;
1109 interrupts = <10>;
1110 clocks = <&clk_uart>;
1111 no-loopback-test;
1112 status = "disabled";
1113 };
1114
1115 adc: adc@1e6e9000 {
1116 compatible = "aspeed,ast2500-adc";
1117 reg = <0x1e6e9000 0xb0>;
1118 clocks = <&clk_apb>;
1119 #io-channel-cells = <1>;
1120 status = "disabled";
1121 };
1122 };
1123 };
1124 };
ubuntu-bionic-kernel mirror