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Merge branch 'perf/urgent' into perf/core, to pick up fixes
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / at91sam9263.dtsi
1 /*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14
15 / {
16 model = "Atmel AT91SAM9263 family SoC";
17 compatible = "atmel,at91sam9263";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
30 tcb0 = &tcb0;
31 i2c0 = &i2c0;
32 ssc0 = &ssc0;
33 ssc1 = &ssc1;
34 pwm0 = &pwm0;
35 };
36
37 cpus {
38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
44 };
45 };
46
47 memory {
48 reg = <0x20000000 0x08000000>;
49 };
50
51 clocks {
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
57
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63 };
64
65 ahb {
66 compatible = "simple-bus";
67 #address-cells = <1>;
68 #size-cells = <1>;
69 ranges;
70
71 apb {
72 compatible = "simple-bus";
73 #address-cells = <1>;
74 #size-cells = <1>;
75 ranges;
76
77 aic: interrupt-controller@fffff000 {
78 #interrupt-cells = <3>;
79 compatible = "atmel,at91rm9200-aic";
80 interrupt-controller;
81 reg = <0xfffff000 0x200>;
82 atmel,external-irqs = <30 31>;
83 };
84
85 pmc: pmc@fffffc00 {
86 compatible = "atmel,at91rm9200-pmc";
87 reg = <0xfffffc00 0x100>;
88 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
89 interrupt-controller;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 #interrupt-cells = <1>;
93
94 main_osc: main_osc {
95 compatible = "atmel,at91rm9200-clk-main-osc";
96 #clock-cells = <0>;
97 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
98 clocks = <&main_xtal>;
99 };
100
101 main: mainck {
102 compatible = "atmel,at91rm9200-clk-main";
103 #clock-cells = <0>;
104 clocks = <&main_osc>;
105 };
106
107 plla: pllack {
108 compatible = "atmel,at91rm9200-clk-pll";
109 #clock-cells = <0>;
110 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
111 clocks = <&main>;
112 reg = <0>;
113 atmel,clk-input-range = <1000000 32000000>;
114 #atmel,pll-clk-output-range-cells = <4>;
115 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
116 <190000000 240000000 2 1>;
117 };
118
119 pllb: pllbck {
120 compatible = "atmel,at91rm9200-clk-pll";
121 #clock-cells = <0>;
122 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
123 clocks = <&main>;
124 reg = <1>;
125 atmel,clk-input-range = <1000000 32000000>;
126 #atmel,pll-clk-output-range-cells = <4>;
127 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
128 <190000000 240000000 2 1>;
129 };
130
131 mck: masterck {
132 compatible = "atmel,at91rm9200-clk-master";
133 #clock-cells = <0>;
134 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
135 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
136 atmel,clk-output-range = <0 120000000>;
137 atmel,clk-divisors = <1 2 4 0>;
138 };
139
140 usb: usbck {
141 compatible = "atmel,at91rm9200-clk-usb";
142 #clock-cells = <0>;
143 atmel,clk-divisors = <1 2 4 0>;
144 clocks = <&pllb>;
145 };
146
147 prog: progck {
148 compatible = "atmel,at91rm9200-clk-programmable";
149 #address-cells = <1>;
150 #size-cells = <0>;
151 interrupt-parent = <&pmc>;
152 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
153
154 prog0: prog0 {
155 #clock-cells = <0>;
156 reg = <0>;
157 interrupts = <AT91_PMC_PCKRDY(0)>;
158 };
159
160 prog1: prog1 {
161 #clock-cells = <0>;
162 reg = <1>;
163 interrupts = <AT91_PMC_PCKRDY(1)>;
164 };
165
166 prog2: prog2 {
167 #clock-cells = <0>;
168 reg = <2>;
169 interrupts = <AT91_PMC_PCKRDY(2)>;
170 };
171
172 prog3: prog3 {
173 #clock-cells = <0>;
174 reg = <3>;
175 interrupts = <AT91_PMC_PCKRDY(3)>;
176 };
177 };
178
179 systemck {
180 compatible = "atmel,at91rm9200-clk-system";
181 #address-cells = <1>;
182 #size-cells = <0>;
183
184 uhpck: uhpck {
185 #clock-cells = <0>;
186 reg = <6>;
187 clocks = <&usb>;
188 };
189
190 udpck: udpck {
191 #clock-cells = <0>;
192 reg = <7>;
193 clocks = <&usb>;
194 };
195
196 pck0: pck0 {
197 #clock-cells = <0>;
198 reg = <8>;
199 clocks = <&prog0>;
200 };
201
202 pck1: pck1 {
203 #clock-cells = <0>;
204 reg = <9>;
205 clocks = <&prog1>;
206 };
207
208 pck2: pck2 {
209 #clock-cells = <0>;
210 reg = <10>;
211 clocks = <&prog2>;
212 };
213
214 pck3: pck3 {
215 #clock-cells = <0>;
216 reg = <11>;
217 clocks = <&prog3>;
218 };
219 };
220
221 periphck {
222 compatible = "atmel,at91rm9200-clk-peripheral";
223 #address-cells = <1>;
224 #size-cells = <0>;
225 clocks = <&mck>;
226
227 pioA_clk: pioA_clk {
228 #clock-cells = <0>;
229 reg = <2>;
230 };
231
232 pioB_clk: pioB_clk {
233 #clock-cells = <0>;
234 reg = <3>;
235 };
236
237 pioCDE_clk: pioCDE_clk {
238 #clock-cells = <0>;
239 reg = <4>;
240 };
241
242 usart0_clk: usart0_clk {
243 #clock-cells = <0>;
244 reg = <7>;
245 };
246
247 usart1_clk: usart1_clk {
248 #clock-cells = <0>;
249 reg = <8>;
250 };
251
252 usart2_clk: usart2_clk {
253 #clock-cells = <0>;
254 reg = <9>;
255 };
256
257 mci0_clk: mci0_clk {
258 #clock-cells = <0>;
259 reg = <10>;
260 };
261
262 mci1_clk: mci1_clk {
263 #clock-cells = <0>;
264 reg = <11>;
265 };
266
267 can_clk: can_clk {
268 #clock-cells = <0>;
269 reg = <12>;
270 };
271
272 twi0_clk: twi0_clk {
273 #clock-cells = <0>;
274 reg = <13>;
275 };
276
277 spi0_clk: spi0_clk {
278 #clock-cells = <0>;
279 reg = <14>;
280 };
281
282 spi1_clk: spi1_clk {
283 #clock-cells = <0>;
284 reg = <15>;
285 };
286
287 ssc0_clk: ssc0_clk {
288 #clock-cells = <0>;
289 reg = <16>;
290 };
291
292 ssc1_clk: ssc1_clk {
293 #clock-cells = <0>;
294 reg = <17>;
295 };
296
297 ac91_clk: ac97_clk {
298 #clock-cells = <0>;
299 reg = <18>;
300 };
301
302 tcb_clk: tcb_clk {
303 #clock-cells = <0>;
304 reg = <19>;
305 };
306
307 pwm_clk: pwm_clk {
308 #clock-cells = <0>;
309 reg = <20>;
310 };
311
312 macb0_clk: macb0_clk {
313 #clock-cells = <0>;
314 reg = <21>;
315 };
316
317 g2de_clk: g2de_clk {
318 #clock-cells = <0>;
319 reg = <23>;
320 };
321
322 udc_clk: udc_clk {
323 #clock-cells = <0>;
324 reg = <24>;
325 };
326
327 isi_clk: isi_clk {
328 #clock-cells = <0>;
329 reg = <25>;
330 };
331
332 lcd_clk: lcd_clk {
333 #clock-cells = <0>;
334 reg = <26>;
335 };
336
337 dma_clk: dma_clk {
338 #clock-cells = <0>;
339 reg = <27>;
340 };
341
342 ohci_clk: ohci_clk {
343 #clock-cells = <0>;
344 reg = <29>;
345 };
346 };
347 };
348
349 ramc0: ramc@ffffe200 {
350 compatible = "atmel,at91sam9260-sdramc";
351 reg = <0xffffe200 0x200>;
352 };
353
354 ramc1: ramc@ffffe800 {
355 compatible = "atmel,at91sam9260-sdramc";
356 reg = <0xffffe800 0x200>;
357 };
358
359 pit: timer@fffffd30 {
360 compatible = "atmel,at91sam9260-pit";
361 reg = <0xfffffd30 0xf>;
362 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
363 clocks = <&mck>;
364 };
365
366 tcb0: timer@fff7c000 {
367 compatible = "atmel,at91rm9200-tcb";
368 reg = <0xfff7c000 0x100>;
369 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
370 clocks = <&tcb_clk>;
371 clock-names = "t0_clk";
372 };
373
374 rstc@fffffd00 {
375 compatible = "atmel,at91sam9260-rstc";
376 reg = <0xfffffd00 0x10>;
377 };
378
379 shdwc@fffffd10 {
380 compatible = "atmel,at91sam9260-shdwc";
381 reg = <0xfffffd10 0x10>;
382 };
383
384 pinctrl@fffff200 {
385 #address-cells = <1>;
386 #size-cells = <1>;
387 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
388 ranges = <0xfffff200 0xfffff200 0xa00>;
389
390 atmel,mux-mask = <
391 /* A B */
392 0xfffffffb 0xffffe07f /* pioA */
393 0x0007ffff 0x39072fff /* pioB */
394 0xffffffff 0x3ffffff8 /* pioC */
395 0xfffffbff 0xffffffff /* pioD */
396 0xffe00fff 0xfbfcff00 /* pioE */
397 >;
398
399 /* shared pinctrl settings */
400 dbgu {
401 pinctrl_dbgu: dbgu-0 {
402 atmel,pins =
403 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
404 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
405 };
406 };
407
408 usart0 {
409 pinctrl_usart0: usart0-0 {
410 atmel,pins =
411 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
412 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
413 };
414
415 pinctrl_usart0_rts: usart0_rts-0 {
416 atmel,pins =
417 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
418 };
419
420 pinctrl_usart0_cts: usart0_cts-0 {
421 atmel,pins =
422 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
423 };
424 };
425
426 usart1 {
427 pinctrl_usart1: usart1-0 {
428 atmel,pins =
429 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
430 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
431 };
432
433 pinctrl_usart1_rts: usart1_rts-0 {
434 atmel,pins =
435 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
436 };
437
438 pinctrl_usart1_cts: usart1_cts-0 {
439 atmel,pins =
440 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
441 };
442 };
443
444 usart2 {
445 pinctrl_usart2: usart2-0 {
446 atmel,pins =
447 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
448 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
449 };
450
451 pinctrl_usart2_rts: usart2_rts-0 {
452 atmel,pins =
453 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
454 };
455
456 pinctrl_usart2_cts: usart2_cts-0 {
457 atmel,pins =
458 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
459 };
460 };
461
462 nand {
463 pinctrl_nand: nand-0 {
464 atmel,pins =
465 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
466 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
467 };
468 };
469
470 macb {
471 pinctrl_macb_rmii: macb_rmii-0 {
472 atmel,pins =
473 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
474 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
475 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
476 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
477 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
478 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
479 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
480 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
481 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
482 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
483 };
484
485 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
486 atmel,pins =
487 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
488 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
489 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
490 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
491 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
492 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
493 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
494 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
495 };
496 };
497
498 mmc0 {
499 pinctrl_mmc0_clk: mmc0_clk-0 {
500 atmel,pins =
501 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
502 };
503
504 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
505 atmel,pins =
506 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
507 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
508 };
509
510 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
511 atmel,pins =
512 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
513 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
514 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
515 };
516
517 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
518 atmel,pins =
519 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
520 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
521 };
522
523 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
524 atmel,pins =
525 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
526 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
527 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
528 };
529 };
530
531 mmc1 {
532 pinctrl_mmc1_clk: mmc1_clk-0 {
533 atmel,pins =
534 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
535 };
536
537 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
538 atmel,pins =
539 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
540 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
541 };
542
543 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
544 atmel,pins =
545 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
546 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
547 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
548 };
549
550 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
551 atmel,pins =
552 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
553 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
554 };
555
556 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
557 atmel,pins =
558 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
559 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
560 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
561 };
562 };
563
564 ssc0 {
565 pinctrl_ssc0_tx: ssc0_tx-0 {
566 atmel,pins =
567 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
568 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
569 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
570 };
571
572 pinctrl_ssc0_rx: ssc0_rx-0 {
573 atmel,pins =
574 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
575 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
576 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
577 };
578 };
579
580 ssc1 {
581 pinctrl_ssc1_tx: ssc1_tx-0 {
582 atmel,pins =
583 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
584 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
585 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
586 };
587
588 pinctrl_ssc1_rx: ssc1_rx-0 {
589 atmel,pins =
590 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
591 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
592 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
593 };
594 };
595
596 spi0 {
597 pinctrl_spi0: spi0-0 {
598 atmel,pins =
599 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
600 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
601 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
602 };
603 };
604
605 spi1 {
606 pinctrl_spi1: spi1-0 {
607 atmel,pins =
608 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
609 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
610 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
611 };
612 };
613
614 tcb0 {
615 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
616 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
617 };
618
619 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
620 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
621 };
622
623 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
624 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
625 };
626
627 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
628 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
629 };
630
631 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
632 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
633 };
634
635 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
636 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
637 };
638
639 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
640 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
641 };
642
643 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
644 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
645 };
646
647 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
648 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
649 };
650 };
651
652 fb {
653 pinctrl_fb: fb-0 {
654 atmel,pins =
655 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
656 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
657 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
658 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
659 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
660 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
661 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
662 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
663 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
664 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
665 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
666 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
667 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
668 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
669 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
670 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
671 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
672 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
673 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
674 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
675 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
676 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
677 };
678 };
679
680 pioA: gpio@fffff200 {
681 compatible = "atmel,at91rm9200-gpio";
682 reg = <0xfffff200 0x200>;
683 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
684 #gpio-cells = <2>;
685 gpio-controller;
686 interrupt-controller;
687 #interrupt-cells = <2>;
688 clocks = <&pioA_clk>;
689 };
690
691 pioB: gpio@fffff400 {
692 compatible = "atmel,at91rm9200-gpio";
693 reg = <0xfffff400 0x200>;
694 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
695 #gpio-cells = <2>;
696 gpio-controller;
697 interrupt-controller;
698 #interrupt-cells = <2>;
699 clocks = <&pioB_clk>;
700 };
701
702 pioC: gpio@fffff600 {
703 compatible = "atmel,at91rm9200-gpio";
704 reg = <0xfffff600 0x200>;
705 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
706 #gpio-cells = <2>;
707 gpio-controller;
708 interrupt-controller;
709 #interrupt-cells = <2>;
710 clocks = <&pioCDE_clk>;
711 };
712
713 pioD: gpio@fffff800 {
714 compatible = "atmel,at91rm9200-gpio";
715 reg = <0xfffff800 0x200>;
716 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
717 #gpio-cells = <2>;
718 gpio-controller;
719 interrupt-controller;
720 #interrupt-cells = <2>;
721 clocks = <&pioCDE_clk>;
722 };
723
724 pioE: gpio@fffffa00 {
725 compatible = "atmel,at91rm9200-gpio";
726 reg = <0xfffffa00 0x200>;
727 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
728 #gpio-cells = <2>;
729 gpio-controller;
730 interrupt-controller;
731 #interrupt-cells = <2>;
732 clocks = <&pioCDE_clk>;
733 };
734 };
735
736 dbgu: serial@ffffee00 {
737 compatible = "atmel,at91sam9260-usart";
738 reg = <0xffffee00 0x200>;
739 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
740 pinctrl-names = "default";
741 pinctrl-0 = <&pinctrl_dbgu>;
742 clocks = <&mck>;
743 clock-names = "usart";
744 status = "disabled";
745 };
746
747 usart0: serial@fff8c000 {
748 compatible = "atmel,at91sam9260-usart";
749 reg = <0xfff8c000 0x200>;
750 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
751 atmel,use-dma-rx;
752 atmel,use-dma-tx;
753 pinctrl-names = "default";
754 pinctrl-0 = <&pinctrl_usart0>;
755 clocks = <&usart0_clk>;
756 clock-names = "usart";
757 status = "disabled";
758 };
759
760 usart1: serial@fff90000 {
761 compatible = "atmel,at91sam9260-usart";
762 reg = <0xfff90000 0x200>;
763 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
764 atmel,use-dma-rx;
765 atmel,use-dma-tx;
766 pinctrl-names = "default";
767 pinctrl-0 = <&pinctrl_usart1>;
768 clocks = <&usart1_clk>;
769 clock-names = "usart";
770 status = "disabled";
771 };
772
773 usart2: serial@fff94000 {
774 compatible = "atmel,at91sam9260-usart";
775 reg = <0xfff94000 0x200>;
776 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
777 atmel,use-dma-rx;
778 atmel,use-dma-tx;
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_usart2>;
781 clocks = <&usart2_clk>;
782 clock-names = "usart";
783 status = "disabled";
784 };
785
786 ssc0: ssc@fff98000 {
787 compatible = "atmel,at91rm9200-ssc";
788 reg = <0xfff98000 0x4000>;
789 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
790 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
792 clocks = <&ssc0_clk>;
793 clock-names = "pclk";
794 status = "disabled";
795 };
796
797 ssc1: ssc@fff9c000 {
798 compatible = "atmel,at91rm9200-ssc";
799 reg = <0xfff9c000 0x4000>;
800 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
801 pinctrl-names = "default";
802 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
803 clocks = <&ssc1_clk>;
804 clock-names = "pclk";
805 status = "disabled";
806 };
807
808 macb0: ethernet@fffbc000 {
809 compatible = "cdns,at32ap7000-macb", "cdns,macb";
810 reg = <0xfffbc000 0x100>;
811 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&pinctrl_macb_rmii>;
814 clocks = <&macb0_clk>, <&macb0_clk>;
815 clock-names = "hclk", "pclk";
816 status = "disabled";
817 };
818
819 usb1: gadget@fff78000 {
820 compatible = "atmel,at91rm9200-udc";
821 reg = <0xfff78000 0x4000>;
822 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
823 clocks = <&udc_clk>, <&udpck>;
824 clock-names = "pclk", "hclk";
825 status = "disabled";
826 };
827
828 i2c0: i2c@fff88000 {
829 compatible = "atmel,at91sam9260-i2c";
830 reg = <0xfff88000 0x100>;
831 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
832 #address-cells = <1>;
833 #size-cells = <0>;
834 clocks = <&twi0_clk>;
835 status = "disabled";
836 };
837
838 mmc0: mmc@fff80000 {
839 compatible = "atmel,hsmci";
840 reg = <0xfff80000 0x600>;
841 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
842 pinctrl-names = "default";
843 #address-cells = <1>;
844 #size-cells = <0>;
845 clocks = <&mci0_clk>;
846 clock-names = "mci_clk";
847 status = "disabled";
848 };
849
850 mmc1: mmc@fff84000 {
851 compatible = "atmel,hsmci";
852 reg = <0xfff84000 0x600>;
853 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
854 pinctrl-names = "default";
855 #address-cells = <1>;
856 #size-cells = <0>;
857 clocks = <&mci1_clk>;
858 clock-names = "mci_clk";
859 status = "disabled";
860 };
861
862 watchdog@fffffd40 {
863 compatible = "atmel,at91sam9260-wdt";
864 reg = <0xfffffd40 0x10>;
865 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
866 atmel,watchdog-type = "hardware";
867 atmel,reset-type = "all";
868 atmel,dbg-halt;
869 atmel,idle-halt;
870 status = "disabled";
871 };
872
873 spi0: spi@fffa4000 {
874 #address-cells = <1>;
875 #size-cells = <0>;
876 compatible = "atmel,at91rm9200-spi";
877 reg = <0xfffa4000 0x200>;
878 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
879 pinctrl-names = "default";
880 pinctrl-0 = <&pinctrl_spi0>;
881 clocks = <&spi0_clk>;
882 clock-names = "spi_clk";
883 status = "disabled";
884 };
885
886 spi1: spi@fffa8000 {
887 #address-cells = <1>;
888 #size-cells = <0>;
889 compatible = "atmel,at91rm9200-spi";
890 reg = <0xfffa8000 0x200>;
891 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&pinctrl_spi1>;
894 clocks = <&spi1_clk>;
895 clock-names = "spi_clk";
896 status = "disabled";
897 };
898
899 pwm0: pwm@fffb8000 {
900 compatible = "atmel,at91sam9rl-pwm";
901 reg = <0xfffb8000 0x300>;
902 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
903 #pwm-cells = <3>;
904 clocks = <&pwm_clk>;
905 clock-names = "pwm_clk";
906 status = "disabled";
907 };
908 };
909
910 fb0: fb@0x00700000 {
911 compatible = "atmel,at91sam9263-lcdc";
912 reg = <0x00700000 0x1000>;
913 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
914 pinctrl-names = "default";
915 pinctrl-0 = <&pinctrl_fb>;
916 status = "disabled";
917 };
918
919 nand0: nand@40000000 {
920 compatible = "atmel,at91rm9200-nand";
921 #address-cells = <1>;
922 #size-cells = <1>;
923 reg = <0x40000000 0x10000000
924 0xffffe000 0x200
925 >;
926 atmel,nand-addr-offset = <21>;
927 atmel,nand-cmd-offset = <22>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&pinctrl_nand>;
930 gpios = <&pioA 22 GPIO_ACTIVE_HIGH
931 &pioD 15 GPIO_ACTIVE_HIGH
932 0
933 >;
934 status = "disabled";
935 };
936
937 usb0: ohci@00a00000 {
938 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
939 reg = <0x00a00000 0x100000>;
940 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
941 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
942 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
943 status = "disabled";
944 };
945 };
946
947 i2c@0 {
948 compatible = "i2c-gpio";
949 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
950 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
951 >;
952 i2c-gpio,sda-open-drain;
953 i2c-gpio,scl-open-drain;
954 i2c-gpio,delay-us = <2>; /* ~100 kHz */
955 #address-cells = <1>;
956 #size-cells = <0>;
957 status = "disabled";
958 };
959 };
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