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Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / at91sam9263.dtsi
1 /*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14
15 / {
16 model = "Atmel AT91SAM9263 family SoC";
17 compatible = "atmel,at91sam9263";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
30 tcb0 = &tcb0;
31 i2c0 = &i2c0;
32 ssc0 = &ssc0;
33 ssc1 = &ssc1;
34 pwm0 = &pwm0;
35 };
36
37 cpus {
38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
44 };
45 };
46
47 memory {
48 reg = <0x20000000 0x08000000>;
49 };
50
51 clocks {
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
57
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63 };
64
65 ahb {
66 compatible = "simple-bus";
67 #address-cells = <1>;
68 #size-cells = <1>;
69 ranges;
70
71 apb {
72 compatible = "simple-bus";
73 #address-cells = <1>;
74 #size-cells = <1>;
75 ranges;
76
77 aic: interrupt-controller@fffff000 {
78 #interrupt-cells = <3>;
79 compatible = "atmel,at91rm9200-aic";
80 interrupt-controller;
81 reg = <0xfffff000 0x200>;
82 atmel,external-irqs = <30 31>;
83 };
84
85 pmc: pmc@fffffc00 {
86 compatible = "atmel,at91rm9200-pmc";
87 reg = <0xfffffc00 0x100>;
88 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
89 interrupt-controller;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 #interrupt-cells = <1>;
93
94 main_osc: main_osc {
95 compatible = "atmel,at91rm9200-clk-main-osc";
96 #clock-cells = <0>;
97 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
98 clocks = <&main_xtal>;
99 };
100
101 main: mainck {
102 compatible = "atmel,at91rm9200-clk-main";
103 #clock-cells = <0>;
104 clocks = <&main_osc>;
105 };
106
107 plla: pllack {
108 compatible = "atmel,at91rm9200-clk-pll";
109 #clock-cells = <0>;
110 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
111 clocks = <&main>;
112 reg = <0>;
113 atmel,clk-input-range = <1000000 32000000>;
114 #atmel,pll-clk-output-range-cells = <4>;
115 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
116 <190000000 240000000 2 1>;
117 };
118
119 pllb: pllbck {
120 compatible = "atmel,at91rm9200-clk-pll";
121 #clock-cells = <0>;
122 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
123 clocks = <&main>;
124 reg = <1>;
125 atmel,clk-input-range = <1000000 5000000>;
126 #atmel,pll-clk-output-range-cells = <4>;
127 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
128 };
129
130 mck: masterck {
131 compatible = "atmel,at91rm9200-clk-master";
132 #clock-cells = <0>;
133 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
134 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
135 atmel,clk-output-range = <0 120000000>;
136 atmel,clk-divisors = <1 2 4 0>;
137 };
138
139 usb: usbck {
140 compatible = "atmel,at91rm9200-clk-usb";
141 #clock-cells = <0>;
142 atmel,clk-divisors = <1 2 4 0>;
143 clocks = <&pllb>;
144 };
145
146 prog: progck {
147 compatible = "atmel,at91rm9200-clk-programmable";
148 #address-cells = <1>;
149 #size-cells = <0>;
150 interrupt-parent = <&pmc>;
151 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
152
153 prog0: prog0 {
154 #clock-cells = <0>;
155 reg = <0>;
156 interrupts = <AT91_PMC_PCKRDY(0)>;
157 };
158
159 prog1: prog1 {
160 #clock-cells = <0>;
161 reg = <1>;
162 interrupts = <AT91_PMC_PCKRDY(1)>;
163 };
164
165 prog2: prog2 {
166 #clock-cells = <0>;
167 reg = <2>;
168 interrupts = <AT91_PMC_PCKRDY(2)>;
169 };
170
171 prog3: prog3 {
172 #clock-cells = <0>;
173 reg = <3>;
174 interrupts = <AT91_PMC_PCKRDY(3)>;
175 };
176 };
177
178 systemck {
179 compatible = "atmel,at91rm9200-clk-system";
180 #address-cells = <1>;
181 #size-cells = <0>;
182
183 uhpck: uhpck {
184 #clock-cells = <0>;
185 reg = <6>;
186 clocks = <&usb>;
187 };
188
189 udpck: udpck {
190 #clock-cells = <0>;
191 reg = <7>;
192 clocks = <&usb>;
193 };
194
195 pck0: pck0 {
196 #clock-cells = <0>;
197 reg = <8>;
198 clocks = <&prog0>;
199 };
200
201 pck1: pck1 {
202 #clock-cells = <0>;
203 reg = <9>;
204 clocks = <&prog1>;
205 };
206
207 pck2: pck2 {
208 #clock-cells = <0>;
209 reg = <10>;
210 clocks = <&prog2>;
211 };
212
213 pck3: pck3 {
214 #clock-cells = <0>;
215 reg = <11>;
216 clocks = <&prog3>;
217 };
218 };
219
220 periphck {
221 compatible = "atmel,at91rm9200-clk-peripheral";
222 #address-cells = <1>;
223 #size-cells = <0>;
224 clocks = <&mck>;
225
226 pioA_clk: pioA_clk {
227 #clock-cells = <0>;
228 reg = <2>;
229 };
230
231 pioB_clk: pioB_clk {
232 #clock-cells = <0>;
233 reg = <3>;
234 };
235
236 pioCDE_clk: pioCDE_clk {
237 #clock-cells = <0>;
238 reg = <4>;
239 };
240
241 usart0_clk: usart0_clk {
242 #clock-cells = <0>;
243 reg = <7>;
244 };
245
246 usart1_clk: usart1_clk {
247 #clock-cells = <0>;
248 reg = <8>;
249 };
250
251 usart2_clk: usart2_clk {
252 #clock-cells = <0>;
253 reg = <9>;
254 };
255
256 mci0_clk: mci0_clk {
257 #clock-cells = <0>;
258 reg = <10>;
259 };
260
261 mci1_clk: mci1_clk {
262 #clock-cells = <0>;
263 reg = <11>;
264 };
265
266 can_clk: can_clk {
267 #clock-cells = <0>;
268 reg = <12>;
269 };
270
271 twi0_clk: twi0_clk {
272 #clock-cells = <0>;
273 reg = <13>;
274 };
275
276 spi0_clk: spi0_clk {
277 #clock-cells = <0>;
278 reg = <14>;
279 };
280
281 spi1_clk: spi1_clk {
282 #clock-cells = <0>;
283 reg = <15>;
284 };
285
286 ssc0_clk: ssc0_clk {
287 #clock-cells = <0>;
288 reg = <16>;
289 };
290
291 ssc1_clk: ssc1_clk {
292 #clock-cells = <0>;
293 reg = <17>;
294 };
295
296 ac91_clk: ac97_clk {
297 #clock-cells = <0>;
298 reg = <18>;
299 };
300
301 tcb_clk: tcb_clk {
302 #clock-cells = <0>;
303 reg = <19>;
304 };
305
306 pwm_clk: pwm_clk {
307 #clock-cells = <0>;
308 reg = <20>;
309 };
310
311 macb0_clk: macb0_clk {
312 #clock-cells = <0>;
313 reg = <21>;
314 };
315
316 g2de_clk: g2de_clk {
317 #clock-cells = <0>;
318 reg = <23>;
319 };
320
321 udc_clk: udc_clk {
322 #clock-cells = <0>;
323 reg = <24>;
324 };
325
326 isi_clk: isi_clk {
327 #clock-cells = <0>;
328 reg = <25>;
329 };
330
331 lcd_clk: lcd_clk {
332 #clock-cells = <0>;
333 reg = <26>;
334 };
335
336 dma_clk: dma_clk {
337 #clock-cells = <0>;
338 reg = <27>;
339 };
340
341 ohci_clk: ohci_clk {
342 #clock-cells = <0>;
343 reg = <29>;
344 };
345 };
346 };
347
348 ramc0: ramc@ffffe200 {
349 compatible = "atmel,at91sam9260-sdramc";
350 reg = <0xffffe200 0x200>;
351 };
352
353 ramc1: ramc@ffffe800 {
354 compatible = "atmel,at91sam9260-sdramc";
355 reg = <0xffffe800 0x200>;
356 };
357
358 pit: timer@fffffd30 {
359 compatible = "atmel,at91sam9260-pit";
360 reg = <0xfffffd30 0xf>;
361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
362 clocks = <&mck>;
363 };
364
365 tcb0: timer@fff7c000 {
366 compatible = "atmel,at91rm9200-tcb";
367 reg = <0xfff7c000 0x100>;
368 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
369 clocks = <&tcb_clk>;
370 clock-names = "t0_clk";
371 };
372
373 rstc@fffffd00 {
374 compatible = "atmel,at91sam9260-rstc";
375 reg = <0xfffffd00 0x10>;
376 };
377
378 shdwc@fffffd10 {
379 compatible = "atmel,at91sam9260-shdwc";
380 reg = <0xfffffd10 0x10>;
381 };
382
383 pinctrl@fffff200 {
384 #address-cells = <1>;
385 #size-cells = <1>;
386 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
387 ranges = <0xfffff200 0xfffff200 0xa00>;
388
389 atmel,mux-mask = <
390 /* A B */
391 0xfffffffb 0xffffe07f /* pioA */
392 0x0007ffff 0x39072fff /* pioB */
393 0xffffffff 0x3ffffff8 /* pioC */
394 0xfffffbff 0xffffffff /* pioD */
395 0xffe00fff 0xfbfcff00 /* pioE */
396 >;
397
398 /* shared pinctrl settings */
399 dbgu {
400 pinctrl_dbgu: dbgu-0 {
401 atmel,pins =
402 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
403 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
404 };
405 };
406
407 usart0 {
408 pinctrl_usart0: usart0-0 {
409 atmel,pins =
410 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
411 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
412 };
413
414 pinctrl_usart0_rts: usart0_rts-0 {
415 atmel,pins =
416 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
417 };
418
419 pinctrl_usart0_cts: usart0_cts-0 {
420 atmel,pins =
421 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
422 };
423 };
424
425 usart1 {
426 pinctrl_usart1: usart1-0 {
427 atmel,pins =
428 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
429 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
430 };
431
432 pinctrl_usart1_rts: usart1_rts-0 {
433 atmel,pins =
434 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
435 };
436
437 pinctrl_usart1_cts: usart1_cts-0 {
438 atmel,pins =
439 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
440 };
441 };
442
443 usart2 {
444 pinctrl_usart2: usart2-0 {
445 atmel,pins =
446 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
447 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
448 };
449
450 pinctrl_usart2_rts: usart2_rts-0 {
451 atmel,pins =
452 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
453 };
454
455 pinctrl_usart2_cts: usart2_cts-0 {
456 atmel,pins =
457 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
458 };
459 };
460
461 nand {
462 pinctrl_nand: nand-0 {
463 atmel,pins =
464 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
465 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
466 };
467 };
468
469 macb {
470 pinctrl_macb_rmii: macb_rmii-0 {
471 atmel,pins =
472 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
473 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
474 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
475 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
476 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
477 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
478 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
479 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
480 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
481 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
482 };
483
484 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
485 atmel,pins =
486 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
487 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
488 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
489 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
490 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
491 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
492 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
493 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
494 };
495 };
496
497 mmc0 {
498 pinctrl_mmc0_clk: mmc0_clk-0 {
499 atmel,pins =
500 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
501 };
502
503 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
504 atmel,pins =
505 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
506 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
507 };
508
509 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
510 atmel,pins =
511 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
512 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
513 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
514 };
515
516 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
517 atmel,pins =
518 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
519 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
520 };
521
522 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
523 atmel,pins =
524 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
525 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
526 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
527 };
528 };
529
530 mmc1 {
531 pinctrl_mmc1_clk: mmc1_clk-0 {
532 atmel,pins =
533 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
534 };
535
536 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
537 atmel,pins =
538 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
539 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
540 };
541
542 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
543 atmel,pins =
544 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
545 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
546 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
547 };
548
549 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
550 atmel,pins =
551 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
552 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
553 };
554
555 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
556 atmel,pins =
557 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
558 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
559 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
560 };
561 };
562
563 ssc0 {
564 pinctrl_ssc0_tx: ssc0_tx-0 {
565 atmel,pins =
566 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
567 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
568 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
569 };
570
571 pinctrl_ssc0_rx: ssc0_rx-0 {
572 atmel,pins =
573 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
574 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
575 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
576 };
577 };
578
579 ssc1 {
580 pinctrl_ssc1_tx: ssc1_tx-0 {
581 atmel,pins =
582 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
583 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
584 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
585 };
586
587 pinctrl_ssc1_rx: ssc1_rx-0 {
588 atmel,pins =
589 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
590 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
591 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
592 };
593 };
594
595 spi0 {
596 pinctrl_spi0: spi0-0 {
597 atmel,pins =
598 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
599 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
600 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
601 };
602 };
603
604 spi1 {
605 pinctrl_spi1: spi1-0 {
606 atmel,pins =
607 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
608 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
609 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
610 };
611 };
612
613 tcb0 {
614 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
615 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
616 };
617
618 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
619 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
620 };
621
622 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
623 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
624 };
625
626 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
627 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
628 };
629
630 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
631 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
632 };
633
634 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
635 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
636 };
637
638 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
639 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
640 };
641
642 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
643 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
644 };
645
646 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
647 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
648 };
649 };
650
651 fb {
652 pinctrl_fb: fb-0 {
653 atmel,pins =
654 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
655 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
656 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
657 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
658 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
659 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
660 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
661 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
662 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
663 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
664 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
665 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
666 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
667 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
668 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
669 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
670 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
671 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
672 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
673 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
674 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
675 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
676 };
677 };
678
679 pioA: gpio@fffff200 {
680 compatible = "atmel,at91rm9200-gpio";
681 reg = <0xfffff200 0x200>;
682 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
683 #gpio-cells = <2>;
684 gpio-controller;
685 interrupt-controller;
686 #interrupt-cells = <2>;
687 clocks = <&pioA_clk>;
688 };
689
690 pioB: gpio@fffff400 {
691 compatible = "atmel,at91rm9200-gpio";
692 reg = <0xfffff400 0x200>;
693 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
694 #gpio-cells = <2>;
695 gpio-controller;
696 interrupt-controller;
697 #interrupt-cells = <2>;
698 clocks = <&pioB_clk>;
699 };
700
701 pioC: gpio@fffff600 {
702 compatible = "atmel,at91rm9200-gpio";
703 reg = <0xfffff600 0x200>;
704 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
705 #gpio-cells = <2>;
706 gpio-controller;
707 interrupt-controller;
708 #interrupt-cells = <2>;
709 clocks = <&pioCDE_clk>;
710 };
711
712 pioD: gpio@fffff800 {
713 compatible = "atmel,at91rm9200-gpio";
714 reg = <0xfffff800 0x200>;
715 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
716 #gpio-cells = <2>;
717 gpio-controller;
718 interrupt-controller;
719 #interrupt-cells = <2>;
720 clocks = <&pioCDE_clk>;
721 };
722
723 pioE: gpio@fffffa00 {
724 compatible = "atmel,at91rm9200-gpio";
725 reg = <0xfffffa00 0x200>;
726 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
727 #gpio-cells = <2>;
728 gpio-controller;
729 interrupt-controller;
730 #interrupt-cells = <2>;
731 clocks = <&pioCDE_clk>;
732 };
733 };
734
735 dbgu: serial@ffffee00 {
736 compatible = "atmel,at91sam9260-usart";
737 reg = <0xffffee00 0x200>;
738 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_dbgu>;
741 clocks = <&mck>;
742 clock-names = "usart";
743 status = "disabled";
744 };
745
746 usart0: serial@fff8c000 {
747 compatible = "atmel,at91sam9260-usart";
748 reg = <0xfff8c000 0x200>;
749 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
750 atmel,use-dma-rx;
751 atmel,use-dma-tx;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_usart0>;
754 clocks = <&usart0_clk>;
755 clock-names = "usart";
756 status = "disabled";
757 };
758
759 usart1: serial@fff90000 {
760 compatible = "atmel,at91sam9260-usart";
761 reg = <0xfff90000 0x200>;
762 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
763 atmel,use-dma-rx;
764 atmel,use-dma-tx;
765 pinctrl-names = "default";
766 pinctrl-0 = <&pinctrl_usart1>;
767 clocks = <&usart1_clk>;
768 clock-names = "usart";
769 status = "disabled";
770 };
771
772 usart2: serial@fff94000 {
773 compatible = "atmel,at91sam9260-usart";
774 reg = <0xfff94000 0x200>;
775 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
776 atmel,use-dma-rx;
777 atmel,use-dma-tx;
778 pinctrl-names = "default";
779 pinctrl-0 = <&pinctrl_usart2>;
780 clocks = <&usart2_clk>;
781 clock-names = "usart";
782 status = "disabled";
783 };
784
785 ssc0: ssc@fff98000 {
786 compatible = "atmel,at91rm9200-ssc";
787 reg = <0xfff98000 0x4000>;
788 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
789 pinctrl-names = "default";
790 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
791 clocks = <&ssc0_clk>;
792 clock-names = "pclk";
793 status = "disabled";
794 };
795
796 ssc1: ssc@fff9c000 {
797 compatible = "atmel,at91rm9200-ssc";
798 reg = <0xfff9c000 0x4000>;
799 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
800 pinctrl-names = "default";
801 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
802 clocks = <&ssc1_clk>;
803 clock-names = "pclk";
804 status = "disabled";
805 };
806
807 macb0: ethernet@fffbc000 {
808 compatible = "cdns,at32ap7000-macb", "cdns,macb";
809 reg = <0xfffbc000 0x100>;
810 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
811 pinctrl-names = "default";
812 pinctrl-0 = <&pinctrl_macb_rmii>;
813 clocks = <&macb0_clk>, <&macb0_clk>;
814 clock-names = "hclk", "pclk";
815 status = "disabled";
816 };
817
818 usb1: gadget@fff78000 {
819 compatible = "atmel,at91rm9200-udc";
820 reg = <0xfff78000 0x4000>;
821 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
822 clocks = <&udc_clk>, <&udpck>;
823 clock-names = "pclk", "hclk";
824 status = "disabled";
825 };
826
827 i2c0: i2c@fff88000 {
828 compatible = "atmel,at91sam9260-i2c";
829 reg = <0xfff88000 0x100>;
830 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
831 #address-cells = <1>;
832 #size-cells = <0>;
833 clocks = <&twi0_clk>;
834 status = "disabled";
835 };
836
837 mmc0: mmc@fff80000 {
838 compatible = "atmel,hsmci";
839 reg = <0xfff80000 0x600>;
840 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
841 pinctrl-names = "default";
842 #address-cells = <1>;
843 #size-cells = <0>;
844 clocks = <&mci0_clk>;
845 clock-names = "mci_clk";
846 status = "disabled";
847 };
848
849 mmc1: mmc@fff84000 {
850 compatible = "atmel,hsmci";
851 reg = <0xfff84000 0x600>;
852 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
853 pinctrl-names = "default";
854 #address-cells = <1>;
855 #size-cells = <0>;
856 clocks = <&mci1_clk>;
857 clock-names = "mci_clk";
858 status = "disabled";
859 };
860
861 watchdog@fffffd40 {
862 compatible = "atmel,at91sam9260-wdt";
863 reg = <0xfffffd40 0x10>;
864 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
865 atmel,watchdog-type = "hardware";
866 atmel,reset-type = "all";
867 atmel,dbg-halt;
868 atmel,idle-halt;
869 status = "disabled";
870 };
871
872 spi0: spi@fffa4000 {
873 #address-cells = <1>;
874 #size-cells = <0>;
875 compatible = "atmel,at91rm9200-spi";
876 reg = <0xfffa4000 0x200>;
877 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
878 pinctrl-names = "default";
879 pinctrl-0 = <&pinctrl_spi0>;
880 clocks = <&spi0_clk>;
881 clock-names = "spi_clk";
882 status = "disabled";
883 };
884
885 spi1: spi@fffa8000 {
886 #address-cells = <1>;
887 #size-cells = <0>;
888 compatible = "atmel,at91rm9200-spi";
889 reg = <0xfffa8000 0x200>;
890 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
891 pinctrl-names = "default";
892 pinctrl-0 = <&pinctrl_spi1>;
893 clocks = <&spi1_clk>;
894 clock-names = "spi_clk";
895 status = "disabled";
896 };
897
898 pwm0: pwm@fffb8000 {
899 compatible = "atmel,at91sam9rl-pwm";
900 reg = <0xfffb8000 0x300>;
901 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
902 #pwm-cells = <3>;
903 clocks = <&pwm_clk>;
904 clock-names = "pwm_clk";
905 status = "disabled";
906 };
907 };
908
909 fb0: fb@0x00700000 {
910 compatible = "atmel,at91sam9263-lcdc";
911 reg = <0x00700000 0x1000>;
912 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
913 pinctrl-names = "default";
914 pinctrl-0 = <&pinctrl_fb>;
915 status = "disabled";
916 };
917
918 nand0: nand@40000000 {
919 compatible = "atmel,at91rm9200-nand";
920 #address-cells = <1>;
921 #size-cells = <1>;
922 reg = <0x40000000 0x10000000
923 0xffffe000 0x200
924 >;
925 atmel,nand-addr-offset = <21>;
926 atmel,nand-cmd-offset = <22>;
927 pinctrl-names = "default";
928 pinctrl-0 = <&pinctrl_nand>;
929 gpios = <&pioA 22 GPIO_ACTIVE_HIGH
930 &pioD 15 GPIO_ACTIVE_HIGH
931 0
932 >;
933 status = "disabled";
934 };
935
936 usb0: ohci@00a00000 {
937 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
938 reg = <0x00a00000 0x100000>;
939 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
940 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
941 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
942 status = "disabled";
943 };
944 };
945
946 i2c@0 {
947 compatible = "i2c-gpio";
948 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
949 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
950 >;
951 i2c-gpio,sda-open-drain;
952 i2c-gpio,scl-open-drain;
953 i2c-gpio,delay-us = <2>; /* ~100 kHz */
954 #address-cells = <1>;
955 #size-cells = <0>;
956 status = "disabled";
957 };
958 };
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