arch/arm/boot/dts/at91sam9rl.dtsi

   1 /*
   2  * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
   3  *
   4  *  Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
   5  *
   6  * Licensed under GPLv2 or later.
   7  */
   8
   9 #include "skeleton.dtsi"
  10 #include <dt-bindings/pinctrl/at91.h>
  11 #include <dt-bindings/clk/at91.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         model = "Atmel AT91SAM9RL family SoC";
  17         compatible = "atmel,at91sam9rl", "atmel,at91sam9";
  18         interrupt-parent = <&aic>;
  19
  20         aliases {
  21                 serial0 = &dbgu;
  22                 serial1 = &usart0;
  23                 serial2 = &usart1;
  24                 serial3 = &usart2;
  25                 serial4 = &usart3;
  26                 gpio0 = &pioA;
  27                 gpio1 = &pioB;
  28                 gpio2 = &pioC;
  29                 gpio3 = &pioD;
  30                 tcb0 = &tcb0;
  31                 i2c0 = &i2c0;
  32                 i2c1 = &i2c1;
  33                 ssc0 = &ssc0;
  34                 ssc1 = &ssc1;
  35         };
  36
  37         cpus {
  38                 #address-cells = <0>;
  39                 #size-cells = <0>;
  40
  41                 cpu {
  42                         compatible = "arm,arm926ej-s";
  43                         device_type = "cpu";
  44                 };
  45         };
  46
  47         memory {
  48                 reg = <0x20000000 0x04000000>;
  49         };
  50
  51         ahb {
  52                 compatible = "simple-bus";
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 ranges;
  56
  57                 nand0: nand@40000000 {
  58                         compatible = "atmel,at91rm9200-nand";
  59                         #address-cells = <1>;
  60                         #size-cells = <1>;
  61                         reg = <0x40000000 0x10000000>,
  62                               <0xffffe800 0x200>;
  63                         atmel,nand-addr-offset = <21>;
  64                         atmel,nand-cmd-offset = <22>;
  65                         pinctrl-names = "default";
  66                         pinctrl-0 = <&pinctrl_nand>;
  67                         gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
  68                                 <&pioB 6 GPIO_ACTIVE_HIGH>,
  69                                 <0>;
  70                         status = "disabled";
  71                 };
  72
  73                 apb {
  74                         compatible = "simple-bus";
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77                         ranges;
  78
  79                         tcb0: timer@fffa0000 {
  80                                 compatible = "atmel,at91rm9200-tcb";
  81                                 reg = <0xfffa0000 0x100>;
  82                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
  83                                              <17 IRQ_TYPE_LEVEL_HIGH 0>,
  84                                              <18 IRQ_TYPE_LEVEL_HIGH 0>;
  85                                 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
  86                                 clock-names = "t0_clk", "t1_clk", "t2_clk";
  87                         };
  88
  89                         mmc0: mmc@fffa4000 {
  90                                 compatible = "atmel,hsmci";
  91                                 reg = <0xfffa4000 0x600>;
  92                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
  93                                 #address-cells = <1>;
  94                                 #size-cells = <0>;
  95                                 pinctrl-names = "default";
  96                                 clocks = <&mci0_clk>;
  97                                 clock-names = "mci_clk";
  98                                 status = "disabled";
  99                         };
 100
 101                         i2c0: i2c@fffa8000 {
 102                                 compatible = "atmel,at91sam9260-i2c";
 103                                 reg = <0xfffa8000 0x100>;
 104                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 105                                 #address-cells = <1>;
 106                                 #size-cells = <0>;
 107                                 clocks = <&twi0_clk>;
 108                                 status = "disabled";
 109                         };
 110
 111                         i2c1: i2c@fffac000 {
 112                                 compatible = "atmel,at91sam9260-i2c";
 113                                 reg = <0xfffac000 0x100>;
 114                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
 115                                 #address-cells = <1>;
 116                                 #size-cells = <0>;
 117                                 status = "disabled";
 118                         };
 119
 120                         usart0: serial@fffb0000 {
 121                                 compatible = "atmel,at91sam9260-usart";
 122                                 reg = <0xfffb0000 0x200>;
 123                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 124                                 atmel,use-dma-rx;
 125                                 atmel,use-dma-tx;
 126                                 pinctrl-names = "default";
 127                                 pinctrl-0 = <&pinctrl_usart0>;
 128                                 clocks = <&usart0_clk>;
 129                                 clock-names = "usart";
 130                                 status = "disabled";
 131                         };
 132
 133                         usart1: serial@fffb4000 {
 134                                 compatible = "atmel,at91sam9260-usart";
 135                                 reg = <0xfffb4000 0x200>;
 136                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 137                                 atmel,use-dma-rx;
 138                                 atmel,use-dma-tx;
 139                                 pinctrl-names = "default";
 140                                 pinctrl-0 = <&pinctrl_usart1>;
 141                                 clocks = <&usart1_clk>;
 142                                 clock-names = "usart";
 143                                 status = "disabled";
 144                         };
 145
 146                         usart2: serial@fffb8000 {
 147                                 compatible = "atmel,at91sam9260-usart";
 148                                 reg = <0xfffb8000 0x200>;
 149                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 150                                 atmel,use-dma-rx;
 151                                 atmel,use-dma-tx;
 152                                 pinctrl-names = "default";
 153                                 pinctrl-0 = <&pinctrl_usart2>;
 154                                 clocks = <&usart2_clk>;
 155                                 clock-names = "usart";
 156                                 status = "disabled";
 157                         };
 158
 159                         usart3: serial@fffbc000 {
 160                                 compatible = "atmel,at91sam9260-usart";
 161                                 reg = <0xfffbc000 0x200>;
 162                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 163                                 atmel,use-dma-rx;
 164                                 atmel,use-dma-tx;
 165                                 pinctrl-names = "default";
 166                                 pinctrl-0 = <&pinctrl_usart3>;
 167                                 clocks = <&usart3_clk>;
 168                                 clock-names = "usart";
 169                                 status = "disabled";
 170                         };
 171
 172                         ssc0: ssc@fffc0000 {
 173                                 compatible = "atmel,at91rm9200-ssc";
 174                                 reg = <0xfffc0000 0x4000>;
 175                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 176                                 pinctrl-names = "default";
 177                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 178                                 status = "disabled";
 179                         };
 180
 181                         ssc1: ssc@fffc4000 {
 182                                 compatible = "atmel,at91rm9200-ssc";
 183                                 reg = <0xfffc4000 0x4000>;
 184                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 185                                 pinctrl-names = "default";
 186                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 187                                 status = "disabled";
 188                         };
 189
 190                         spi0: spi@fffcc000 {
 191                                 #address-cells = <1>;
 192                                 #size-cells = <0>;
 193                                 compatible = "atmel,at91rm9200-spi";
 194                                 reg = <0xfffcc000 0x200>;
 195                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 196                                 pinctrl-names = "default";
 197                                 pinctrl-0 = <&pinctrl_spi0>;
 198                                 clocks = <&spi0_clk>;
 199                                 clock-names = "spi_clk";
 200                                 status = "disabled";
 201                         };
 202
 203                         ramc0: ramc@ffffea00 {
 204                                 compatible = "atmel,at91sam9260-sdramc";
 205                                 reg = <0xffffea00 0x200>;
 206                         };
 207
 208                         aic: interrupt-controller@fffff000 {
 209                                 #interrupt-cells = <3>;
 210                                 compatible = "atmel,at91rm9200-aic";
 211                                 interrupt-controller;
 212                                 reg = <0xfffff000 0x200>;
 213                                 atmel,external-irqs = <31>;
 214                         };
 215
 216                         dbgu: serial@fffff200 {
 217                                 compatible = "atmel,at91sam9260-usart";
 218                                 reg = <0xfffff200 0x200>;
 219                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 220                                 pinctrl-names = "default";
 221                                 pinctrl-0 = <&pinctrl_dbgu>;
 222                                 clocks = <&mck>;
 223                                 clock-names = "usart";
 224                                 status = "disabled";
 225                         };
 226
 227                         pinctrl@fffff400 {
 228                                 #address-cells = <1>;
 229                                 #size-cells = <1>;
 230                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 231                                 ranges = <0xfffff400 0xfffff400 0x800>;
 232
 233                                 atmel,mux-mask =
 234                                         /*    A         B     */
 235                                         <0xffffffff 0xe05c6738>,  /* pioA */
 236                                         <0xffffffff 0x0000c780>,  /* pioB */
 237                                         <0xffffffff 0xe3ffff0e>,  /* pioC */
 238                                         <0x003fffff 0x0001ff3c>;  /* pioD */
 239
 240                                 /* shared pinctrl settings */
 241                                 dbgu {
 242                                         pinctrl_dbgu: dbgu-0 {
 243                                                 atmel,pins =
 244                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 245                                                         <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 246                                         };
 247                                 };
 248
 249                                 i2c_gpio0 {
 250                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 251                                                 atmel,pins =
 252                                                         <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
 253                                                         <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
 254                                         };
 255                                 };
 256
 257                                 i2c_gpio1 {
 258                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 259                                                 atmel,pins =
 260                                                         <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
 261                                                         <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
 262                                         };
 263                                 };
 264
 265                                 mmc0 {
 266                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 267                                                 atmel,pins =
 268                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 269                                         };
 270
 271                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 272                                                 atmel,pins =
 273                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 274                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 275                                         };
 276
 277                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 278                                                 atmel,pins =
 279                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 280                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 281                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 282                                         };
 283                                 };
 284
 285                                 nand {
 286                                         pinctrl_nand: nand-0 {
 287                                                 atmel,pins =
 288                                                         <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
 289                                                         <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 290                                         };
 291
 292                                         pinctrl_nand0_ale_cle: nand_ale_cle-0 {
 293                                                 atmel,pins =
 294                                                         <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 295                                                         <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 296                                         };
 297
 298                                         pinctrl_nand0_oe_we: nand_oe_we-0 {
 299                                                 atmel,pins =
 300                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 301                                                         <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 302                                         };
 303
 304                                         pinctrl_nand0_cs: nand_cs-0 {
 305                                                 atmel,pins =
 306                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 307                                         };
 308                                 };
 309
 310                                 ssc0 {
 311                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 312                                                 atmel,pins =
 313                                                         <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 314                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 315                                                         <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 316                                         };
 317
 318                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 319                                                 atmel,pins =
 320                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
 321                                                         <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 322                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 323                                         };
 324                                 };
 325
 326                                 ssc1 {
 327                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 328                                                 atmel,pins =
 329                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
 330                                                         <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
 331                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 332                                         };
 333
 334                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 335                                                 atmel,pins =
 336                                                         <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
 337                                                         <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
 338                                                         <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 339                                         };
 340                                 };
 341
 342                                 spi0 {
 343                                         pinctrl_spi0: spi0-0 {
 344                                                 atmel,pins =
 345                                                         <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 346                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 347                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 348                                         };
 349                                 };
 350
 351                                 tcb0 {
 352                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 353                                                 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 354                                         };
 355
 356                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 357                                                 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 358                                         };
 359
 360                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 361                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 362                                         };
 363
 364                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 365                                                 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 366                                         };
 367
 368                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 369                                                 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 370                                         };
 371
 372                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 373                                                 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 374                                         };
 375
 376                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 377                                                 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 378                                         };
 379
 380                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 381                                                 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 382                                         };
 383
 384                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 385                                                 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 386                                         };
 387                                 };
 388
 389                                 usart0 {
 390                                         pinctrl_usart0: usart0-0 {
 391                                                 atmel,pins =
 392                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 393                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 394                                         };
 395
 396                                         pinctrl_usart0_rts: usart0_rts-0 {
 397                                                 atmel,pins =
 398                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 399                                         };
 400
 401                                         pinctrl_usart0_cts: usart0_cts-0 {
 402                                                 atmel,pins =
 403                                                         <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 404                                         };
 405
 406                                         pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
 407                                                 atmel,pins =
 408                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
 409                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 410                                         };
 411
 412                                         pinctrl_usart0_dcd: usart0_dcd-0 {
 413                                                 atmel,pins =
 414                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 415                                         };
 416
 417                                         pinctrl_usart0_ri: usart0_ri-0 {
 418                                                 atmel,pins =
 419                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 420                                         };
 421
 422                                         pinctrl_usart0_sck: usart0_sck-0 {
 423                                                 atmel,pins =
 424                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 425                                         };
 426                                 };
 427
 428                                 usart1 {
 429                                         pinctrl_usart1: usart1-0 {
 430                                                 atmel,pins =
 431                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 432                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 433                                         };
 434
 435                                         pinctrl_usart1_rts: usart1_rts-0 {
 436                                                 atmel,pins =
 437                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 438                                         };
 439
 440                                         pinctrl_usart1_cts: usart1_cts-0 {
 441                                                 atmel,pins =
 442                                                         <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 443                                         };
 444
 445                                         pinctrl_usart1_sck: usart1_sck-0 {
 446                                                 atmel,pins =
 447                                                         <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 448                                         };
 449                                 };
 450
 451                                 usart2 {
 452                                         pinctrl_usart2: usart2-0 {
 453                                                 atmel,pins =
 454                                                         <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 455                                                         <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 456                                         };
 457
 458                                         pinctrl_usart2_rts: usart2_rts-0 {
 459                                                 atmel,pins =
 460                                                         <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 461                                         };
 462
 463                                         pinctrl_usart2_cts: usart2_cts-0 {
 464                                                 atmel,pins =
 465                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 466                                         };
 467
 468                                         pinctrl_usart2_sck: usart2_sck-0 {
 469                                                 atmel,pins =
 470                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 471                                         };
 472                                 };
 473
 474                                 usart3 {
 475                                         pinctrl_usart3: usart3-0 {
 476                                                 atmel,pins =
 477                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
 478                                                         <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 479                                         };
 480
 481                                         pinctrl_usart3_rts: usart3_rts-0 {
 482                                                 atmel,pins =
 483                                                         <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 484                                         };
 485
 486                                         pinctrl_usart3_cts: usart3_cts-0 {
 487                                                 atmel,pins =
 488                                                         <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 489                                         };
 490
 491                                         pinctrl_usart3_sck: usart3_sck-0 {
 492                                                 atmel,pins =
 493                                                         <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 494                                         };
 495                                 };
 496
 497                                 pioA: gpio@fffff400 {
 498                                         compatible = "atmel,at91rm9200-gpio";
 499                                         reg = <0xfffff400 0x200>;
 500                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 501                                         #gpio-cells = <2>;
 502                                         gpio-controller;
 503                                         interrupt-controller;
 504                                         #interrupt-cells = <2>;
 505                                         clocks = <&pioA_clk>;
 506                                 };
 507
 508                                 pioB: gpio@fffff600 {
 509                                         compatible = "atmel,at91rm9200-gpio";
 510                                         reg = <0xfffff600 0x200>;
 511                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 512                                         #gpio-cells = <2>;
 513                                         gpio-controller;
 514                                         interrupt-controller;
 515                                         #interrupt-cells = <2>;
 516                                         clocks = <&pioB_clk>;
 517                                 };
 518
 519                                 pioC: gpio@fffff800 {
 520                                         compatible = "atmel,at91rm9200-gpio";
 521                                         reg = <0xfffff800 0x200>;
 522                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 523                                         #gpio-cells = <2>;
 524                                         gpio-controller;
 525                                         interrupt-controller;
 526                                         #interrupt-cells = <2>;
 527                                         clocks = <&pioC_clk>;
 528                                 };
 529
 530                                 pioD: gpio@fffffa00 {
 531                                         compatible = "atmel,at91rm9200-gpio";
 532                                         reg = <0xfffffa00 0x200>;
 533                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 534                                         #gpio-cells = <2>;
 535                                         gpio-controller;
 536                                         interrupt-controller;
 537                                         #interrupt-cells = <2>;
 538                                         clocks = <&pioD_clk>;
 539                                 };
 540                         };
 541
 542                         pmc: pmc@fffffc00 {
 543                                 compatible = "atmel,at91sam9g45-pmc";
 544                                 reg = <0xfffffc00 0x100>;
 545                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 546                                 interrupt-controller;
 547                                 #address-cells = <1>;
 548                                 #size-cells = <0>;
 549                                 #interrupt-cells = <1>;
 550
 551                                 clk32k: slck {
 552                                         compatible = "fixed-clock";
 553                                         #clock-cells = <0>;
 554                                         clock-frequency = <32768>;
 555                                 };
 556
 557                                 main: mainck {
 558                                         compatible = "atmel,at91rm9200-clk-main";
 559                                         #clock-cells = <0>;
 560                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 561                                         clocks = <&clk32k>;
 562                                 };
 563
 564                                 plla: pllack {
 565                                         compatible = "atmel,at91rm9200-clk-pll";
 566                                         #clock-cells = <0>;
 567                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 568                                         clocks = <&main>;
 569                                         reg = <0>;
 570                                         atmel,clk-input-range = <1000000 32000000>;
 571                                         #atmel,pll-clk-output-range-cells = <4>;
 572                                         atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
 573                                 };
 574
 575                                 utmi: utmick {
 576                                         compatible = "atmel,at91sam9x5-clk-utmi";
 577                                         #clock-cells = <0>;
 578                                         interrupt-parent = <&pmc>;
 579                                         interrupts = <AT91_PMC_LOCKU>;
 580                                         clocks = <&main>;
 581                                 };
 582
 583                                 mck: masterck {
 584                                         compatible = "atmel,at91rm9200-clk-master";
 585                                         #clock-cells = <0>;
 586                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 587                                         clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
 588                                         atmel,clk-output-range = <0 94000000>;
 589                                         atmel,clk-divisors = <1 2 4 3>;
 590                                 };
 591
 592                                 prog: progck {
 593                                         compatible = "atmel,at91rm9200-clk-programmable";
 594                                         #address-cells = <1>;
 595                                         #size-cells = <0>;
 596                                         interrupt-parent = <&pmc>;
 597                                         clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
 598
 599                                         prog0: prog0 {
 600                                                 #clock-cells = <0>;
 601                                                 reg = <0>;
 602                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 603                                         };
 604
 605                                         prog1: prog1 {
 606                                                 #clock-cells = <0>;
 607                                                 reg = <1>;
 608                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 609                                         };
 610                                 };
 611
 612                                 systemck {
 613                                         compatible = "atmel,at91rm9200-clk-system";
 614                                         #address-cells = <1>;
 615                                         #size-cells = <0>;
 616
 617                                         pck0: pck0 {
 618                                                 #clock-cells = <0>;
 619                                                 reg = <8>;
 620                                                 clocks = <&prog0>;
 621                                         };
 622
 623                                         pck1: pck1 {
 624                                                 #clock-cells = <0>;
 625                                                 reg = <9>;
 626                                                 clocks = <&prog1>;
 627                                         };
 628
 629                                 };
 630
 631                                 periphck {
 632                                         compatible = "atmel,at91rm9200-clk-peripheral";
 633                                         #address-cells = <1>;
 634                                         #size-cells = <0>;
 635                                         clocks = <&mck>;
 636
 637                                         pioA_clk: pioA_clk {
 638                                                 #clock-cells = <0>;
 639                                                 reg = <2>;
 640                                         };
 641
 642                                         pioB_clk: pioB_clk {
 643                                                 #clock-cells = <0>;
 644                                                 reg = <3>;
 645                                         };
 646
 647                                         pioC_clk: pioC_clk {
 648                                                 #clock-cells = <0>;
 649                                                 reg = <4>;
 650                                         };
 651
 652                                         pioD_clk: pioD_clk {
 653                                                 #clock-cells = <0>;
 654                                                 reg = <5>;
 655                                         };
 656
 657                                         usart0_clk: usart0_clk {
 658                                                 #clock-cells = <0>;
 659                                                 reg = <6>;
 660                                         };
 661
 662                                         usart1_clk: usart1_clk {
 663                                                 #clock-cells = <0>;
 664                                                 reg = <7>;
 665                                         };
 666
 667                                         usart2_clk: usart2_clk {
 668                                                 #clock-cells = <0>;
 669                                                 reg = <8>;
 670                                         };
 671
 672                                         usart3_clk: usart3_clk {
 673                                                 #clock-cells = <0>;
 674                                                 reg = <9>;
 675                                         };
 676
 677                                         mci0_clk: mci0_clk {
 678                                                 #clock-cells = <0>;
 679                                                 reg = <10>;
 680                                         };
 681
 682                                         twi0_clk: twi0_clk {
 683                                                 #clock-cells = <0>;
 684                                                 reg = <11>;
 685                                         };
 686
 687                                         twi1_clk: twi1_clk {
 688                                                 #clock-cells = <0>;
 689                                                 reg = <12>;
 690                                         };
 691
 692                                         spi0_clk: spi0_clk {
 693                                                 #clock-cells = <0>;
 694                                                 reg = <13>;
 695                                         };
 696
 697                                         ssc0_clk: ssc0_clk {
 698                                                 #clock-cells = <0>;
 699                                                 reg = <14>;
 700                                         };
 701
 702                                         ssc1_clk: ssc1_clk {
 703                                                 #clock-cells = <0>;
 704                                                 reg = <15>;
 705                                         };
 706
 707                                         tc0_clk: tc0_clk {
 708                                                 #clock-cells = <0>;
 709                                                 reg = <16>;
 710                                         };
 711
 712                                         tc1_clk: tc1_clk {
 713                                                 #clock-cells = <0>;
 714                                                 reg = <17>;
 715                                         };
 716
 717                                         tc2_clk: tc2_clk {
 718                                                 #clock-cells = <0>;
 719                                                 reg = <18>;
 720                                         };
 721
 722                                         pwm_clk: pwm_clk {
 723                                                 #clock-cells = <0>;
 724                                                 reg = <19>;
 725                                         };
 726
 727                                         adc_clk: adc_clk {
 728                                                 #clock-cells = <0>;
 729                                                 reg = <20>;
 730                                         };
 731
 732                                         dma0_clk: dma0_clk {
 733                                                 #clock-cells = <0>;
 734                                                 reg = <21>;
 735                                         };
 736
 737                                         udphs_clk: udphs_clk {
 738                                                 #clock-cells = <0>;
 739                                                 reg = <22>;
 740                                         };
 741
 742                                         lcd_clk: lcd_clk {
 743                                                 #clock-cells = <0>;
 744                                                 reg = <23>;
 745                                         };
 746                                 };
 747                         };
 748
 749                         rstc@fffffd00 {
 750                                 compatible = "atmel,at91sam9260-rstc";
 751                                 reg = <0xfffffd00 0x10>;
 752                         };
 753
 754                         shdwc@fffffd10 {
 755                                 compatible = "atmel,at91sam9260-shdwc";
 756                                 reg = <0xfffffd10 0x10>;
 757                         };
 758
 759                         pit: timer@fffffd30 {
 760                                 compatible = "atmel,at91sam9260-pit";
 761                                 reg = <0xfffffd30 0xf>;
 762                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 763                                 clocks = <&mck>;
 764                         };
 765
 766                         watchdog@fffffd40 {
 767                                 compatible = "atmel,at91sam9260-wdt";
 768                                 reg = <0xfffffd40 0x10>;
 769                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 770                                 status = "disabled";
 771                         };
 772                 };
 773         };
 774
 775         i2c@0 {
 776                 compatible = "i2c-gpio";
 777                 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
 778                         <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
 779                 i2c-gpio,sda-open-drain;
 780                 i2c-gpio,scl-open-drain;
 781                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 782                 #address-cells = <1>;
 783                 #size-cells = <0>;
 784                 pinctrl-names = "default";
 785                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
 786                 status = "disabled";
 787         };
 788
 789         i2c@1 {
 790                 compatible = "i2c-gpio";
 791                 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
 792                         <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
 793                 i2c-gpio,sda-open-drain;
 794                 i2c-gpio,scl-open-drain;
 795                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 796                 #address-cells = <1>;
 797                 #size-cells = <0>;
 798                 pinctrl-names = "default";
 799                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
 800                 status = "disabled";
 801         };
 802 };