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1 /*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 i2c0 = &i2c0;
31 i2c1 = &i2c1;
32 i2c2 = &i2c2;
33 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
39
40 memory {
41 reg = <0x20000000 0x10000000>;
42 };
43
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 aic: interrupt-controller@fffff000 {
57 #interrupt-cells = <3>;
58 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
60 reg = <0xfffff000 0x200>;
61 atmel,external-irqs = <31>;
62 };
63
64 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
67 };
68
69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
74 rstc@fffffe00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
77 };
78
79 shdwc@fffffe10 {
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
82 };
83
84 pit: timer@fffffe30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
87 interrupts = <1 4 7>;
88 };
89
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
93 interrupts = <17 4 0>;
94 };
95
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
99 interrupts = <17 4 0>;
100 };
101
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <20 4 0>;
106 };
107
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
111 interrupts = <21 4 0>;
112 };
113
114 pinctrl@fffff400 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
119
120 /* shared pinctrl settings */
121 dbgu {
122 pinctrl_dbgu: dbgu-0 {
123 atmel,pins =
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
126 };
127 };
128
129 usart0 {
130 pinctrl_usart0: usart0-0 {
131 atmel,pins =
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */
134 };
135
136 pinctrl_usart0_rts: usart0_rts-0 {
137 atmel,pins =
138 <0 2 0x1 0x0>; /* PA2 periph A */
139 };
140
141 pinctrl_usart0_cts: usart0_cts-0 {
142 atmel,pins =
143 <0 3 0x1 0x0>; /* PA3 periph A */
144 };
145 };
146
147 usart1 {
148 pinctrl_usart1: usart1-0 {
149 atmel,pins =
150 <0 5 0x1 0x1 /* PA5 periph A with pullup */
151 0 6 0x1 0x0>; /* PA6 periph A */
152 };
153
154 pinctrl_usart1_rts: usart1_rts-0 {
155 atmel,pins =
156 <3 27 0x3 0x0>; /* PC27 periph C */
157 };
158
159 pinctrl_usart1_cts: usart1_cts-0 {
160 atmel,pins =
161 <3 28 0x3 0x0>; /* PC28 periph C */
162 };
163 };
164
165 usart2 {
166 pinctrl_usart2: usart2-0 {
167 atmel,pins =
168 <0 7 0x1 0x1 /* PA7 periph A with pullup */
169 0 8 0x1 0x0>; /* PA8 periph A */
170 };
171
172 pinctrl_uart2_rts: uart2_rts-0 {
173 atmel,pins =
174 <0 0 0x2 0x0>; /* PB0 periph B */
175 };
176
177 pinctrl_uart2_cts: uart2_cts-0 {
178 atmel,pins =
179 <0 1 0x2 0x0>; /* PB1 periph B */
180 };
181 };
182
183 usart3 {
184 pinctrl_uart3: usart3-0 {
185 atmel,pins =
186 <3 23 0x2 0x1 /* PC22 periph B with pullup */
187 3 23 0x2 0x0>; /* PC23 periph B */
188 };
189
190 pinctrl_usart3_rts: usart3_rts-0 {
191 atmel,pins =
192 <3 24 0x2 0x0>; /* PC24 periph B */
193 };
194
195 pinctrl_usart3_cts: usart3_cts-0 {
196 atmel,pins =
197 <3 25 0x2 0x0>; /* PC25 periph B */
198 };
199 };
200
201 uart0 {
202 pinctrl_uart0: uart0-0 {
203 atmel,pins =
204 <3 8 0x3 0x0 /* PC8 periph C */
205 3 9 0x3 0x1>; /* PC9 periph C with pullup */
206 };
207 };
208
209 uart1 {
210 pinctrl_uart1: uart1-0 {
211 atmel,pins =
212 <3 16 0x3 0x0 /* PC16 periph C */
213 3 17 0x3 0x1>; /* PC17 periph C with pullup */
214 };
215 };
216
217 nand {
218 pinctrl_nand: nand-0 {
219 atmel,pins =
220 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
221 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
222 };
223 };
224
225 macb0 {
226 pinctrl_macb0_rmii: macb0_rmii-0 {
227 atmel,pins =
228 <1 0 0x1 0x0 /* PB0 periph A */
229 1 1 0x1 0x0 /* PB1 periph A */
230 1 2 0x1 0x0 /* PB2 periph A */
231 1 3 0x1 0x0 /* PB3 periph A */
232 1 4 0x1 0x0 /* PB4 periph A */
233 1 5 0x1 0x0 /* PB5 periph A */
234 1 6 0x1 0x0 /* PB6 periph A */
235 1 7 0x1 0x0 /* PB7 periph A */
236 1 9 0x1 0x0 /* PB9 periph A */
237 1 10 0x1 0x0>; /* PB10 periph A */
238 };
239
240 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
241 atmel,pins =
242 <1 8 0x1 0x0 /* PA8 periph A */
243 1 11 0x1 0x0 /* PA11 periph A */
244 1 12 0x1 0x0 /* PA12 periph A */
245 1 13 0x1 0x0 /* PA13 periph A */
246 1 14 0x1 0x0 /* PA14 periph A */
247 1 15 0x1 0x0 /* PA15 periph A */
248 1 16 0x1 0x0 /* PA16 periph A */
249 1 17 0x1 0x0>; /* PA17 periph A */
250 };
251 };
252
253 mmc0 {
254 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
255 atmel,pins =
256 <0 17 0x1 0x0 /* PA17 periph A */
257 0 16 0x1 0x1 /* PA16 periph A with pullup */
258 0 15 0x1 0x1>; /* PA15 periph A with pullup */
259 };
260
261 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
262 atmel,pins =
263 <0 18 0x1 0x1 /* PA18 periph A with pullup */
264 0 19 0x1 0x1 /* PA19 periph A with pullup */
265 0 20 0x1 0x1>; /* PA20 periph A with pullup */
266 };
267 };
268
269 mmc1 {
270 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
271 atmel,pins =
272 <0 13 0x2 0x0 /* PA13 periph B */
273 0 12 0x2 0x1 /* PA12 periph B with pullup */
274 0 11 0x2 0x1>; /* PA11 periph B with pullup */
275 };
276
277 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
278 atmel,pins =
279 <0 2 0x2 0x1 /* PA2 periph B with pullup */
280 0 3 0x2 0x1 /* PA3 periph B with pullup */
281 0 4 0x2 0x1>; /* PA4 periph B with pullup */
282 };
283 };
284
285 pioA: gpio@fffff400 {
286 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
287 reg = <0xfffff400 0x200>;
288 interrupts = <2 4 1>;
289 #gpio-cells = <2>;
290 gpio-controller;
291 interrupt-controller;
292 #interrupt-cells = <2>;
293 };
294
295 pioB: gpio@fffff600 {
296 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
297 reg = <0xfffff600 0x200>;
298 interrupts = <2 4 1>;
299 #gpio-cells = <2>;
300 gpio-controller;
301 #gpio-lines = <19>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
304 };
305
306 pioC: gpio@fffff800 {
307 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
308 reg = <0xfffff800 0x200>;
309 interrupts = <3 4 1>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 interrupt-controller;
313 #interrupt-cells = <2>;
314 };
315
316 pioD: gpio@fffffa00 {
317 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
318 reg = <0xfffffa00 0x200>;
319 interrupts = <3 4 1>;
320 #gpio-cells = <2>;
321 gpio-controller;
322 #gpio-lines = <22>;
323 interrupt-controller;
324 #interrupt-cells = <2>;
325 };
326 };
327
328 mmc0: mmc@f0008000 {
329 compatible = "atmel,hsmci";
330 reg = <0xf0008000 0x600>;
331 interrupts = <12 4 0>;
332 #address-cells = <1>;
333 #size-cells = <0>;
334 status = "disabled";
335 };
336
337 mmc1: mmc@f000c000 {
338 compatible = "atmel,hsmci";
339 reg = <0xf000c000 0x600>;
340 interrupts = <26 4 0>;
341 #address-cells = <1>;
342 #size-cells = <0>;
343 status = "disabled";
344 };
345
346 dbgu: serial@fffff200 {
347 compatible = "atmel,at91sam9260-usart";
348 reg = <0xfffff200 0x200>;
349 interrupts = <1 4 7>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&pinctrl_dbgu>;
352 status = "disabled";
353 };
354
355 usart0: serial@f801c000 {
356 compatible = "atmel,at91sam9260-usart";
357 reg = <0xf801c000 0x200>;
358 interrupts = <5 4 5>;
359 atmel,use-dma-rx;
360 atmel,use-dma-tx;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_usart0>;
363 status = "disabled";
364 };
365
366 usart1: serial@f8020000 {
367 compatible = "atmel,at91sam9260-usart";
368 reg = <0xf8020000 0x200>;
369 interrupts = <6 4 5>;
370 atmel,use-dma-rx;
371 atmel,use-dma-tx;
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_usart1>;
374 status = "disabled";
375 };
376
377 usart2: serial@f8024000 {
378 compatible = "atmel,at91sam9260-usart";
379 reg = <0xf8024000 0x200>;
380 interrupts = <7 4 5>;
381 atmel,use-dma-rx;
382 atmel,use-dma-tx;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart2>;
385 status = "disabled";
386 };
387
388 macb0: ethernet@f802c000 {
389 compatible = "cdns,at32ap7000-macb", "cdns,macb";
390 reg = <0xf802c000 0x100>;
391 interrupts = <24 4 3>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_macb0_rmii>;
394 status = "disabled";
395 };
396
397 macb1: ethernet@f8030000 {
398 compatible = "cdns,at32ap7000-macb", "cdns,macb";
399 reg = <0xf8030000 0x100>;
400 interrupts = <27 4 3>;
401 status = "disabled";
402 };
403
404 i2c0: i2c@f8010000 {
405 compatible = "atmel,at91sam9x5-i2c";
406 reg = <0xf8010000 0x100>;
407 interrupts = <9 4 6>;
408 #address-cells = <1>;
409 #size-cells = <0>;
410 status = "disabled";
411 };
412
413 i2c1: i2c@f8014000 {
414 compatible = "atmel,at91sam9x5-i2c";
415 reg = <0xf8014000 0x100>;
416 interrupts = <10 4 6>;
417 #address-cells = <1>;
418 #size-cells = <0>;
419 status = "disabled";
420 };
421
422 i2c2: i2c@f8018000 {
423 compatible = "atmel,at91sam9x5-i2c";
424 reg = <0xf8018000 0x100>;
425 interrupts = <11 4 6>;
426 #address-cells = <1>;
427 #size-cells = <0>;
428 status = "disabled";
429 };
430
431 adc0: adc@f804c000 {
432 compatible = "atmel,at91sam9260-adc";
433 reg = <0xf804c000 0x100>;
434 interrupts = <19 4 0>;
435 atmel,adc-use-external;
436 atmel,adc-channels-used = <0xffff>;
437 atmel,adc-vref = <3300>;
438 atmel,adc-num-channels = <12>;
439 atmel,adc-startup-time = <40>;
440 atmel,adc-channel-base = <0x50>;
441 atmel,adc-drdy-mask = <0x1000000>;
442 atmel,adc-status-register = <0x30>;
443 atmel,adc-trigger-register = <0xc0>;
444
445 trigger@0 {
446 trigger-name = "external-rising";
447 trigger-value = <0x1>;
448 trigger-external;
449 };
450
451 trigger@1 {
452 trigger-name = "external-falling";
453 trigger-value = <0x2>;
454 trigger-external;
455 };
456
457 trigger@2 {
458 trigger-name = "external-any";
459 trigger-value = <0x3>;
460 trigger-external;
461 };
462
463 trigger@3 {
464 trigger-name = "continuous";
465 trigger-value = <0x6>;
466 };
467 };
468 };
469
470 nand0: nand@40000000 {
471 compatible = "atmel,at91rm9200-nand";
472 #address-cells = <1>;
473 #size-cells = <1>;
474 reg = <0x40000000 0x10000000
475 >;
476 atmel,nand-addr-offset = <21>;
477 atmel,nand-cmd-offset = <22>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_nand>;
480 gpios = <&pioD 5 0
481 &pioD 4 0
482 0
483 >;
484 status = "disabled";
485 };
486
487 usb0: ohci@00600000 {
488 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
489 reg = <0x00600000 0x100000>;
490 interrupts = <22 4 2>;
491 status = "disabled";
492 };
493
494 usb1: ehci@00700000 {
495 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
496 reg = <0x00700000 0x100000>;
497 interrupts = <22 4 2>;
498 status = "disabled";
499 };
500 };
501
502 i2c@0 {
503 compatible = "i2c-gpio";
504 gpios = <&pioA 30 0 /* sda */
505 &pioA 31 0 /* scl */
506 >;
507 i2c-gpio,sda-open-drain;
508 i2c-gpio,scl-open-drain;
509 i2c-gpio,delay-us = <2>; /* ~100 kHz */
510 #address-cells = <1>;
511 #size-cells = <0>;
512 status = "disabled";
513 };
514
515 i2c@1 {
516 compatible = "i2c-gpio";
517 gpios = <&pioC 0 0 /* sda */
518 &pioC 1 0 /* scl */
519 >;
520 i2c-gpio,sda-open-drain;
521 i2c-gpio,scl-open-drain;
522 i2c-gpio,delay-us = <2>; /* ~100 kHz */
523 #address-cells = <1>;
524 #size-cells = <0>;
525 status = "disabled";
526 };
527
528 i2c@2 {
529 compatible = "i2c-gpio";
530 gpios = <&pioB 4 0 /* sda */
531 &pioB 5 0 /* scl */
532 >;
533 i2c-gpio,sda-open-drain;
534 i2c-gpio,scl-open-drain;
535 i2c-gpio,delay-us = <2>; /* ~100 kHz */
536 #address-cells = <1>;
537 #size-cells = <0>;
538 status = "disabled";
539 };
540 };