arch/arm/boot/dts/axm55xx.dtsi

   1 /*
   2  * arch/arm/boot/dts/axm55xx.dtsi
   3  *
   4  * Copyright (C) 2013 LSI
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/lsi,axm5516-clks.h>
  14
  15 #include "skeleton64.dtsi"
  16
  17 / {
  18         interrupt-parent = <&gic>;
  19
  20         aliases {
  21                 serial0   = &serial0;
  22                 serial1   = &serial1;
  23                 serial2   = &serial2;
  24                 serial3   = &serial3;
  25                 timer     = &timer0;
  26         };
  27
  28         clocks {
  29                 compatible = "simple-bus";
  30                 #address-cells = <2>;
  31                 #size-cells = <2>;
  32                 ranges;
  33
  34                 clk_ref0: clk_ref0 {
  35                         compatible = "fixed-clock";
  36                         #clock-cells = <0>;
  37                         clock-frequency = <125000000>;
  38                 };
  39
  40                 clk_ref1: clk_ref1 {
  41                         compatible = "fixed-clock";
  42                         #clock-cells = <0>;
  43                         clock-frequency = <125000000>;
  44                 };
  45
  46                 clk_ref2: clk_ref2 {
  47                         compatible = "fixed-clock";
  48                         #clock-cells = <0>;
  49                         clock-frequency = <125000000>;
  50                 };
  51
  52                 clks: clock-controller@2010020000 {
  53                         compatible = "lsi,axm5516-clks";
  54                         #clock-cells = <1>;
  55                         reg = <0x20 0x10020000 0 0x20000>;
  56                 };
  57         };
  58
  59         gic: interrupt-controller@2001001000 {
  60                 compatible = "arm,cortex-a15-gic";
  61                 #interrupt-cells = <3>;
  62                 #address-cells = <0>;
  63                 interrupt-controller;
  64                 reg = <0x20 0x01001000 0 0x1000>,
  65                       <0x20 0x01002000 0 0x1000>,
  66                       <0x20 0x01004000 0 0x2000>,
  67                       <0x20 0x01006000 0 0x2000>;
  68                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  69                                 IRQ_TYPE_LEVEL_HIGH)>;
  70         };
  71
  72         timer {
  73                 compatible = "arm,armv7-timer";
  74                 interrupts =
  75                         <GIC_PPI 13
  76                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  77                         <GIC_PPI 14
  78                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  79                         <GIC_PPI 11
  80                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  81                         <GIC_PPI 10
  82                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  83         };
  84
  85
  86         pmu {
  87                 compatible = "arm,cortex-a15-pmu";
  88                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
  89         };
  90
  91         soc {
  92                 compatible = "simple-bus";
  93                 device_type = "soc";
  94                 #address-cells = <2>;
  95                 #size-cells = <2>;
  96                 interrupt-parent = <&gic>;
  97                 ranges;
  98
  99                 syscon: syscon@2010030000 {
 100                         compatible = "lsi,axxia-syscon", "syscon";
 101                         reg = <0x20 0x10030000 0 0x2000>;
 102                 };
 103
 104                 reset: reset@2010031000 {
 105                         compatible = "lsi,axm55xx-reset";
 106                         syscon = <&syscon>;
 107                 };
 108
 109                 amba {
 110                         compatible = "simple-bus";
 111                         #address-cells = <2>;
 112                         #size-cells = <2>;
 113                         ranges;
 114
 115                         serial0: uart@2010080000 {
 116                                 compatible = "arm,pl011", "arm,primecell";
 117                                 reg = <0x20 0x10080000 0 0x1000>;
 118                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 119                                 clocks = <&clks AXXIA_CLK_PER>;
 120                                 clock-names = "apb_pclk";
 121                                 status = "disabled";
 122                         };
 123
 124                         serial1: uart@2010081000 {
 125                                 compatible = "arm,pl011", "arm,primecell";
 126                                 reg = <0x20 0x10081000 0 0x1000>;
 127                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 128                                 clocks = <&clks AXXIA_CLK_PER>;
 129                                 clock-names = "apb_pclk";
 130                                 status = "disabled";
 131                         };
 132
 133                         serial2: uart@2010082000 {
 134                                 compatible = "arm,pl011", "arm,primecell";
 135                                 reg = <0x20 0x10082000 0 0x1000>;
 136                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 137                                 clocks = <&clks AXXIA_CLK_PER>;
 138                                 clock-names = "apb_pclk";
 139                                 status = "disabled";
 140                         };
 141
 142                         serial3: uart@2010083000 {
 143                                 compatible = "arm,pl011", "arm,primecell";
 144                                 reg = <0x20 0x10083000 0 0x1000>;
 145                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 146                                 clocks = <&clks AXXIA_CLK_PER>;
 147                                 clock-names = "apb_pclk";
 148                                 status = "disabled";
 149                         };
 150
 151                         timer0: timer@2010091000 {
 152                                 compatible = "arm,sp804", "arm,primecell";
 153                                 reg = <0x20 0x10091000 0 0x1000>;
 154                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 155                                              <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 156                                              <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 157                                              <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 158                                              <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 159                                              <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 160                                              <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 161                                              <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 162                                              <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 163                                 clocks = <&clks AXXIA_CLK_PER>;
 164                                 clock-names = "apb_pclk";
 165                                 status = "okay";
 166                         };
 167
 168                         gpio0: gpio@2010092000 {
 169                                 #gpio-cells = <2>;
 170                                 compatible = "arm,pl061", "arm,primecell";
 171                                 gpio-controller;
 172                                 reg = <0x20 0x10092000 0x00 0x1000>;
 173                                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 174                                              <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 175                                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 176                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 177                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 178                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 179                                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 180                                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 181                                 clocks = <&clks AXXIA_CLK_PER>;
 182                                 clock-names = "apb_pclk";
 183                                 status = "disabled";
 184                         };
 185
 186                         gpio1: gpio@2010093000 {
 187                                 #gpio-cells = <2>;
 188                                 compatible = "arm,pl061", "arm,primecell";
 189                                 gpio-controller;
 190                                 reg = <0x20 0x10093000 0x00 0x1000>;
 191                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 192                                 clocks = <&clks AXXIA_CLK_PER>;
 193                                 clock-names = "apb_pclk";
 194                                 status = "disabled";
 195                         };
 196                 };
 197         };
 198 };
 199
 200 /*
 201   Local Variables:
 202   mode: C
 203   End:
 204 */