arch/arm/boot/dts/bcm53573.dtsi

   1 /*
   2  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
   3  *
   4  * Licensed under the ISC license.
   5  */
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include "skeleton.dtsi"
  12
  13 / {
  14         interrupt-parent = <&gic>;
  15
  16         aliases {
  17                 serial0 = &uart0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 cpu@0 {
  29                         device_type = "cpu";
  30                         compatible = "arm,cortex-a7";
  31                         reg = <0x0>;
  32                 };
  33         };
  34
  35         mpcore {
  36                 compatible = "simple-bus";
  37                 ranges = <0x00000000 0x18310000 0x00008000>;
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40
  41                 gic: interrupt-controller@1000 {
  42                         compatible = "arm,cortex-a7-gic";
  43                         #interrupt-cells = <3>;
  44                         #address-cells = <0>;
  45                         interrupt-controller;
  46                         reg = <0x1000 0x1000>,
  47                               <0x2000 0x0100>;
  48                 };
  49         };
  50
  51         clocks {
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 ranges;
  55
  56                 alp: oscillator {
  57                         #clock-cells = <0>;
  58                         compatible = "fixed-clock";
  59                         clock-frequency = <40000000>;
  60                 };
  61         };
  62
  63         axi@18000000 {
  64                 compatible = "brcm,bus-axi";
  65                 reg = <0x18000000 0x1000>;
  66                 ranges = <0x00000000 0x18000000 0x00100000>;
  67                 #address-cells = <1>;
  68                 #size-cells = <1>;
  69
  70                 #interrupt-cells = <1>;
  71                 interrupt-map-mask = <0x000fffff 0xffff>;
  72                 interrupt-map =
  73                         /* ChipCommon */
  74                         <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  75
  76                         /* IEEE 802.11 0 */
  77                         <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  78
  79                         /* PCIe Controller 0 */
  80                         <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  81                         <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  82                         <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  83                         <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  84                         <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  85                         <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  86
  87                         /* USB 2.0 Controller */
  88                         <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  89
  90                         /* Ethernet Controller 0 */
  91                         <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
  92
  93                         /* IEEE 802.11 1 */
  94                         <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
  95
  96                         /* Ethernet Controller 1 */
  97                         <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  98
  99                 chipcommon: chipcommon@0 {
 100                         compatible = "simple-bus";
 101                         reg = <0x00000000 0x1000>;
 102                         ranges;
 103
 104                         #address-cells = <1>;
 105                         #size-cells = <1>;
 106
 107                         gpio-controller;
 108                         #gpio-cells = <2>;
 109
 110                         uart0: serial@300 {
 111                                 compatible = "ns16550a";
 112                                 reg = <0x0300 0x100>;
 113                                 interrupt-parent = <&gic>;
 114                                 interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
 115                                 clocks = <&alp>;
 116                                 status = "okay";
 117                         };
 118                 };
 119
 120                 pcie0: pcie@2000 {
 121                         reg = <0x00002000 0x1000>;
 122                 };
 123
 124                 usb2: usb2@4000 {
 125                         reg = <0x4000 0x1000>;
 126                         ranges;
 127                         #address-cells = <1>;
 128                         #size-cells = <1>;
 129
 130                         ehci: ehci@4000 {
 131                                 compatible = "generic-ehci";
 132                                 reg = <0x4000 0x1000>;
 133                                 interrupt-parent = <&gic>;
 134                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 135
 136                                 #address-cells = <1>;
 137                                 #size-cells = <0>;
 138
 139                                 ehci_port1: port@1 {
 140                                         reg = <1>;
 141                                         #trigger-source-cells = <0>;
 142                                 };
 143
 144                                 ehci_port2: port@2 {
 145                                         reg = <2>;
 146                                         #trigger-source-cells = <0>;
 147                                 };
 148                         };
 149
 150                         ohci: ohci@d000 {
 151                                 #usb-cells = <0>;
 152
 153                                 compatible = "generic-ohci";
 154                                 reg = <0xd000 0x1000>;
 155                                 interrupt-parent = <&gic>;
 156                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 157
 158                                 #address-cells = <1>;
 159                                 #size-cells = <0>;
 160
 161                                 ohci_port1: port@1 {
 162                                         reg = <1>;
 163                                         #trigger-source-cells = <0>;
 164                                 };
 165
 166                                 ohci_port2: port@2 {
 167                                         reg = <2>;
 168                                         #trigger-source-cells = <0>;
 169                                 };
 170                         };
 171                 };
 172
 173                 gmac0: ethernet@5000 {
 174                         reg = <0x5000 0x1000>;
 175                 };
 176
 177                 gmac1: ethernet@b000 {
 178                         reg = <0xb000 0x1000>;
 179                 };
 180
 181                 pmu@12000 {
 182                         compatible = "simple-mfd", "syscon";
 183                         reg = <0x00012000 0x00001000>;
 184
 185                         ilp: ilp {
 186                                 compatible = "brcm,bcm53573-ilp";
 187                                 clocks = <&alp>;
 188                                 #clock-cells = <0>;
 189                                 clock-output-names = "ilp";
 190                         };
 191                 };
 192         };
 193 };