arch/arm/boot/dts/da850-lcdk.dts

   1 /*
   2  * Copyright (c) 2016 BayLibre, Inc.
   3  *
   4  * Licensed under GPLv2.
   5  */
   6 /dts-v1/;
   7 #include "da850.dtsi"
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "DA850/AM1808/OMAP-L138 LCDK";
  13         compatible = "ti,da850-lcdk", "ti,da850";
  14
  15         aliases {
  16                 serial2 = &serial2;
  17                 ethernet0 = &eth0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial2:115200n8";
  22         };
  23
  24         memory {
  25                 device_type = "memory";
  26                 reg = <0xc0000000 0x08000000>;
  27         };
  28
  29         sound {
  30                 compatible = "simple-audio-card";
  31                 simple-audio-card,name = "DA850/OMAP-L138 LCDK";
  32                 simple-audio-card,widgets =
  33                         "Line", "Line In",
  34                         "Line", "Line Out";
  35                 simple-audio-card,routing =
  36                         "LINE1L", "Line In",
  37                         "LINE1R", "Line In",
  38                         "Line Out", "LLOUT",
  39                         "Line Out", "RLOUT";
  40                 simple-audio-card,format = "dsp_b";
  41                 simple-audio-card,bitclock-master = <&link0_codec>;
  42                 simple-audio-card,frame-master = <&link0_codec>;
  43                 simple-audio-card,bitclock-inversion;
  44
  45                 simple-audio-card,cpu {
  46                         sound-dai = <&mcasp0>;
  47                         system-clock-frequency = <24576000>;
  48                 };
  49
  50                 link0_codec: simple-audio-card,codec {
  51                         sound-dai = <&tlv320aic3106>;
  52                         system-clock-frequency = <24576000>;
  53                 };
  54         };
  55
  56         gpio-keys {
  57                 compatible = "gpio-keys";
  58                 autorepeat;
  59
  60                 user1 {
  61                         label = "GPIO Key USER1";
  62                         linux,code = <BTN_0>;
  63                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  64                 };
  65
  66                 user2 {
  67                         label = "GPIO Key USER2";
  68                         linux,code = <BTN_1>;
  69                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  70                 };
  71         };
  72
  73         vga-bridge {
  74                 compatible = "ti,ths8135";
  75                 #address-cells = <1>;
  76                 #size-cells = <0>;
  77
  78                 ports {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81
  82                         port@0 {
  83                                 reg = <0>;
  84
  85                                 vga_bridge_in: endpoint {
  86                                         remote-endpoint = <&lcdc_out_vga>;
  87                                 };
  88                         };
  89
  90                         port@1 {
  91                                 reg = <1>;
  92
  93                                 vga_bridge_out: endpoint {
  94                                         remote-endpoint = <&vga_con_in>;
  95                                 };
  96                         };
  97                 };
  98         };
  99
 100         vga {
 101                 compatible = "vga-connector";
 102
 103                 ddc-i2c-bus = <&i2c0>;
 104
 105                 port {
 106                         vga_con_in: endpoint {
 107                                 remote-endpoint = <&vga_bridge_out>;
 108                         };
 109                 };
 110         };
 111 };
 112
 113 &pmx_core {
 114         status = "okay";
 115
 116         mcasp0_pins: pinmux_mcasp0_pins {
 117                 pinctrl-single,bits = <
 118                         /* AHCLKX AFSX ACLKX */
 119                         0x00 0x00101010 0x00f0f0f0
 120                         /* ARX13 ARX14 */
 121                         0x04 0x00000110 0x00000ff0
 122                 >;
 123         };
 124
 125         nand_pins: nand_pins {
 126                 pinctrl-single,bits = <
 127                         /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
 128                         0x1c 0x10110010  0xf0ff00f0
 129                         /*
 130                          * EMA_D[0], EMA_D[1], EMA_D[2],
 131                          * EMA_D[3], EMA_D[4], EMA_D[5],
 132                          * EMA_D[6], EMA_D[7]
 133                          */
 134                         0x24 0x11111111  0xffffffff
 135                         /*
 136                          * EMA_D[8],  EMA_D[9],  EMA_D[10],
 137                          * EMA_D[11], EMA_D[12], EMA_D[13],
 138                          * EMA_D[14], EMA_D[15]
 139                          */
 140                         0x20 0x11111111  0xffffffff
 141                         /* EMA_A[1], EMA_A[2] */
 142                         0x30 0x01100000  0x0ff00000
 143                 >;
 144         };
 145 };
 146
 147 &serial2 {
 148         pinctrl-names = "default";
 149         pinctrl-0 = <&serial2_rxtx_pins>;
 150         status = "okay";
 151 };
 152
 153 &wdt {
 154         status = "okay";
 155 };
 156
 157 &rtc0 {
 158         status = "okay";
 159 };
 160
 161 &gpio {
 162         status = "okay";
 163 };
 164
 165 &sata {
 166         status = "okay";
 167 };
 168
 169 &mdio {
 170         pinctrl-names = "default";
 171         pinctrl-0 = <&mdio_pins>;
 172         bus_freq = <2200000>;
 173         status = "okay";
 174 };
 175
 176 &eth0 {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&mii_pins>;
 179         status = "okay";
 180 };
 181
 182 &mmc0 {
 183         max-frequency = <50000000>;
 184         bus-width = <4>;
 185         pinctrl-names = "default";
 186         pinctrl-0 = <&mmc0_pins>;
 187         cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
 188         status = "okay";
 189 };
 190
 191 &i2c0 {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&i2c0_pins>;
 194         clock-frequency = <100000>;
 195         status = "okay";
 196
 197         tlv320aic3106: tlv320aic3106@18 {
 198                 #sound-dai-cells = <0>;
 199                 compatible = "ti,tlv320aic3106";
 200                 reg = <0x18>;
 201                 status = "okay";
 202         };
 203 };
 204
 205 &mcasp0 {
 206         #sound-dai-cells = <0>;
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&mcasp0_pins>;
 209         status = "okay";
 210
 211         op-mode = <0>;   /* DAVINCI_MCASP_IIS_MODE */
 212         tdm-slots = <2>;
 213         serial-dir = <   /* 0: INACTIVE, 1: TX, 2: RX */
 214                 0 0 0 0
 215                 0 0 0 0
 216                 0 0 0 0
 217                 0 1 2 0
 218         >;
 219         tx-num-evt = <32>;
 220         rx-num-evt = <32>;
 221 };
 222
 223 &usb_phy {
 224         status = "okay";
 225 };
 226
 227 &usb0 {
 228         status = "okay";
 229 };
 230
 231 &usb1 {
 232         status = "okay";
 233 };
 234
 235 &aemif {
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&nand_pins>;
 238         status = "okay";
 239         cs3 {
 240                 #address-cells = <2>;
 241                 #size-cells = <1>;
 242                 clock-ranges;
 243                 ranges;
 244
 245                 ti,cs-chipselect = <3>;
 246
 247                 nand@2000000,0 {
 248                         compatible = "ti,davinci-nand";
 249                         #address-cells = <1>;
 250                         #size-cells = <1>;
 251                         reg = <0 0x02000000 0x02000000
 252                                1 0x00000000 0x00008000>;
 253
 254                         ti,davinci-chipselect = <1>;
 255                         ti,davinci-mask-ale = <0>;
 256                         ti,davinci-mask-cle = <0>;
 257                         ti,davinci-mask-chipsel = <0>;
 258
 259                         ti,davinci-nand-buswidth = <16>;
 260                         ti,davinci-ecc-mode = "hw";
 261                         ti,davinci-ecc-bits = <4>;
 262                         ti,davinci-nand-use-bbt;
 263
 264                         /*
 265                          * The OMAP-L132/L138 Bootloader doc SPRAB41E reads:
 266                          * "To boot from NAND Flash, the AIS should be written
 267                          * to NAND block 1 (NAND block 0 is not used by default)".
 268                          * The same doc mentions that for ROM "Silicon Revision 2.1",
 269                          * "Updated NAND boot mode to offer boot from block 0 or block 1".
 270                          * However the limitaion is left here by default for compatibility
 271                          * with older silicon and because it needs new boot pin settings
 272                          * not possible in stock LCDK.
 273                          */
 274                         partitions {
 275                                 compatible = "fixed-partitions";
 276                                 #address-cells = <1>;
 277                                 #size-cells = <1>;
 278
 279                                 partition@0 {
 280                                         label = "u-boot env";
 281                                         reg = <0 0x020000>;
 282                                 };
 283                                 partition@0x020000 {
 284                                         /* The LCDK defaults to booting from this partition */
 285                                         label = "u-boot";
 286                                         reg = <0x020000 0x080000>;
 287                                 };
 288                                 partition@0x0a0000 {
 289                                         label = "free space";
 290                                         reg = <0x0a0000 0>;
 291                                 };
 292                         };
 293                 };
 294         };
 295 };
 296
 297 &prictrl {
 298         status = "okay";
 299 };
 300
 301 &memctrl {
 302         status = "okay";
 303 };
 304
 305 &lcdc {
 306         status = "okay";
 307         pinctrl-names = "default";
 308         pinctrl-0 = <&lcd_pins>;
 309
 310         port {
 311                 lcdc_out_vga: endpoint {
 312                         remote-endpoint = <&vga_bridge_in>;
 313                 };
 314         };
 315 };
 316
 317 &vpif {
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&vpif_capture_pins>;
 320         status = "okay";
 321 };