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Merge remote-tracking branch 'asoc/fix/cs4271' into asoc-linus
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / da850.dtsi
1 /*
2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10 #include "skeleton.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12
13 / {
14 arm {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 ranges;
18 intc: interrupt-controller@fffee000 {
19 compatible = "ti,cp-intc";
20 interrupt-controller;
21 #interrupt-cells = <1>;
22 ti,intc-size = <101>;
23 reg = <0xfffee000 0x2000>;
24 };
25 };
26 soc@1c00000 {
27 compatible = "simple-bus";
28 model = "da850";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges = <0x0 0x01c00000 0x400000>;
32 interrupt-parent = <&intc>;
33
34 pmx_core: pinmux@14120 {
35 compatible = "pinctrl-single";
36 reg = <0x14120 0x50>;
37 #address-cells = <1>;
38 #size-cells = <0>;
39 #pinctrl-cells = <2>;
40 pinctrl-single,bit-per-mux;
41 pinctrl-single,register-width = <32>;
42 pinctrl-single,function-mask = <0xf>;
43 status = "disabled";
44
45 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
46 pinctrl-single,bits = <
47 /* UART0_RTS UART0_CTS */
48 0x0c 0x22000000 0xff000000
49 >;
50 };
51 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
52 pinctrl-single,bits = <
53 /* UART0_TXD UART0_RXD */
54 0x0c 0x00220000 0x00ff0000
55 >;
56 };
57 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
58 pinctrl-single,bits = <
59 /* UART1_CTS UART1_RTS */
60 0x00 0x00440000 0x00ff0000
61 >;
62 };
63 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
64 pinctrl-single,bits = <
65 /* UART1_TXD UART1_RXD */
66 0x10 0x22000000 0xff000000
67 >;
68 };
69 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
70 pinctrl-single,bits = <
71 /* UART2_CTS UART2_RTS */
72 0x00 0x44000000 0xff000000
73 >;
74 };
75 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
76 pinctrl-single,bits = <
77 /* UART2_TXD UART2_RXD */
78 0x10 0x00220000 0x00ff0000
79 >;
80 };
81 i2c0_pins: pinmux_i2c0_pins {
82 pinctrl-single,bits = <
83 /* I2C0_SDA,I2C0_SCL */
84 0x10 0x00002200 0x0000ff00
85 >;
86 };
87 i2c1_pins: pinmux_i2c1_pins {
88 pinctrl-single,bits = <
89 /* I2C1_SDA, I2C1_SCL */
90 0x10 0x00440000 0x00ff0000
91 >;
92 };
93 mmc0_pins: pinmux_mmc_pins {
94 pinctrl-single,bits = <
95 /* MMCSD0_DAT[3] MMCSD0_DAT[2]
96 * MMCSD0_DAT[1] MMCSD0_DAT[0]
97 * MMCSD0_CMD MMCSD0_CLK
98 */
99 0x28 0x00222222 0x00ffffff
100 >;
101 };
102 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
103 pinctrl-single,bits = <
104 /* EPWM0A */
105 0xc 0x00000002 0x0000000f
106 >;
107 };
108 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
109 pinctrl-single,bits = <
110 /* EPWM0B */
111 0xc 0x00000020 0x000000f0
112 >;
113 };
114 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
115 pinctrl-single,bits = <
116 /* EPWM1A */
117 0x14 0x00000002 0x0000000f
118 >;
119 };
120 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
121 pinctrl-single,bits = <
122 /* EPWM1B */
123 0x14 0x00000020 0x000000f0
124 >;
125 };
126 ecap0_pins: pinmux_ecap0_pins {
127 pinctrl-single,bits = <
128 /* ECAP0_APWM0 */
129 0x8 0x20000000 0xf0000000
130 >;
131 };
132 ecap1_pins: pinmux_ecap1_pins {
133 pinctrl-single,bits = <
134 /* ECAP1_APWM1 */
135 0x4 0x40000000 0xf0000000
136 >;
137 };
138 ecap2_pins: pinmux_ecap2_pins {
139 pinctrl-single,bits = <
140 /* ECAP2_APWM2 */
141 0x4 0x00000004 0x0000000f
142 >;
143 };
144 spi0_pins: pinmux_spi0_pins {
145 pinctrl-single,bits = <
146 /* SIMO, SOMI, CLK */
147 0xc 0x00001101 0x0000ff0f
148 >;
149 };
150 spi0_cs0_pin: pinmux_spi0_cs0 {
151 pinctrl-single,bits = <
152 /* CS0 */
153 0x10 0x00000010 0x000000f0
154 >;
155 };
156 spi1_pins: pinmux_spi1_pins {
157 pinctrl-single,bits = <
158 /* SIMO, SOMI, CLK */
159 0x14 0x00110100 0x00ff0f00
160 >;
161 };
162 spi1_cs0_pin: pinmux_spi1_cs0 {
163 pinctrl-single,bits = <
164 /* CS0 */
165 0x14 0x00000010 0x000000f0
166 >;
167 };
168 mdio_pins: pinmux_mdio_pins {
169 pinctrl-single,bits = <
170 /* MDIO_CLK, MDIO_D */
171 0x10 0x00000088 0x000000ff
172 >;
173 };
174 mii_pins: pinmux_mii_pins {
175 pinctrl-single,bits = <
176 /*
177 * MII_TXEN, MII_TXCLK, MII_COL
178 * MII_TXD_3, MII_TXD_2, MII_TXD_1
179 * MII_TXD_0
180 */
181 0x8 0x88888880 0xfffffff0
182 /*
183 * MII_RXER, MII_CRS, MII_RXCLK
184 * MII_RXDV, MII_RXD_3, MII_RXD_2
185 * MII_RXD_1, MII_RXD_0
186 */
187 0xc 0x88888888 0xffffffff
188 >;
189 };
190 lcd_pins: pinmux_lcd_pins {
191 pinctrl-single,bits = <
192 /*
193 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
194 * LCD_D[6], LCD_D[7]
195 */
196 0x40 0x22222200 0xffffff00
197 /*
198 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
199 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
200 */
201 0x44 0x22222222 0xffffffff
202 /* LCD_D[8], LCD_D[9] */
203 0x48 0x00000022 0x000000ff
204
205 /* LCD_PCLK */
206 0x48 0x02000000 0x0f000000
207 /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
208 0x4c 0x02000022 0x0f0000ff
209 >;
210 };
211 vpif_capture_pins: vpif_capture_pins {
212 pinctrl-single,bits = <
213 /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
214 0x38 0x11111111 0xffffffff
215 /* VP_DIN[10..15,0..1] */
216 0x3c 0x11111111 0xffffffff
217 /* VP_DIN[8..9] */
218 0x40 0x00000011 0x000000ff
219 /* VP_CLKIN3, VP_CLKIN2 */
220 0x4c 0x00010100 0x000f0f00
221 >;
222 };
223 };
224 prictrl: priority-controller@14110 {
225 compatible = "ti,da850-mstpri";
226 reg = <0x14110 0x0c>;
227 status = "disabled";
228 };
229 cfgchip: chip-controller@1417c {
230 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
231 reg = <0x1417c 0x14>;
232
233 usb_phy: usb-phy {
234 compatible = "ti,da830-usb-phy";
235 #phy-cells = <1>;
236 status = "disabled";
237 };
238 };
239 edma0: edma@0 {
240 compatible = "ti,edma3-tpcc";
241 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
242 reg = <0x0 0x8000>;
243 reg-names = "edma3_cc";
244 interrupts = <11 12>;
245 interrupt-names = "edma3_ccint", "edma3_ccerrint";
246 #dma-cells = <2>;
247
248 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
249 };
250 edma0_tptc0: tptc@8000 {
251 compatible = "ti,edma3-tptc";
252 reg = <0x8000 0x400>;
253 interrupts = <13>;
254 interrupt-names = "edm3_tcerrint";
255 };
256 edma0_tptc1: tptc@8400 {
257 compatible = "ti,edma3-tptc";
258 reg = <0x8400 0x400>;
259 interrupts = <32>;
260 interrupt-names = "edm3_tcerrint";
261 };
262 edma1: edma@230000 {
263 compatible = "ti,edma3-tpcc";
264 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
265 reg = <0x230000 0x8000>;
266 reg-names = "edma3_cc";
267 interrupts = <93 94>;
268 interrupt-names = "edma3_ccint", "edma3_ccerrint";
269 #dma-cells = <2>;
270
271 ti,tptcs = <&edma1_tptc0 7>;
272 };
273 edma1_tptc0: tptc@238000 {
274 compatible = "ti,edma3-tptc";
275 reg = <0x238000 0x400>;
276 interrupts = <95>;
277 interrupt-names = "edm3_tcerrint";
278 };
279 serial0: serial@42000 {
280 compatible = "ti,da830-uart", "ns16550a";
281 reg = <0x42000 0x100>;
282 reg-io-width = <4>;
283 reg-shift = <2>;
284 interrupts = <25>;
285 status = "disabled";
286 };
287 serial1: serial@10c000 {
288 compatible = "ti,da830-uart", "ns16550a";
289 reg = <0x10c000 0x100>;
290 reg-io-width = <4>;
291 reg-shift = <2>;
292 interrupts = <53>;
293 status = "disabled";
294 };
295 serial2: serial@10d000 {
296 compatible = "ti,da830-uart", "ns16550a";
297 reg = <0x10d000 0x100>;
298 reg-io-width = <4>;
299 reg-shift = <2>;
300 interrupts = <61>;
301 status = "disabled";
302 };
303 rtc0: rtc@23000 {
304 compatible = "ti,da830-rtc";
305 reg = <0x23000 0x1000>;
306 interrupts = <19
307 19>;
308 status = "disabled";
309 };
310 i2c0: i2c@22000 {
311 compatible = "ti,davinci-i2c";
312 reg = <0x22000 0x1000>;
313 interrupts = <15>;
314 #address-cells = <1>;
315 #size-cells = <0>;
316 status = "disabled";
317 };
318 i2c1: i2c@228000 {
319 compatible = "ti,davinci-i2c";
320 reg = <0x228000 0x1000>;
321 interrupts = <51>;
322 #address-cells = <1>;
323 #size-cells = <0>;
324 status = "disabled";
325 };
326 wdt: wdt@21000 {
327 compatible = "ti,davinci-wdt";
328 reg = <0x21000 0x1000>;
329 status = "disabled";
330 };
331 mmc0: mmc@40000 {
332 compatible = "ti,da830-mmc";
333 reg = <0x40000 0x1000>;
334 cap-sd-highspeed;
335 cap-mmc-highspeed;
336 interrupts = <16>;
337 dmas = <&edma0 16 0>, <&edma0 17 0>;
338 dma-names = "rx", "tx";
339 status = "disabled";
340 };
341 vpif: video@217000 {
342 compatible = "ti,da850-vpif";
343 reg = <0x217000 0x1000>;
344 interrupts = <92>;
345 status = "disabled";
346
347 /* VPIF capture port */
348 port {
349 #address-cells = <1>;
350 #size-cells = <0>;
351 };
352 };
353 mmc1: mmc@21b000 {
354 compatible = "ti,da830-mmc";
355 reg = <0x21b000 0x1000>;
356 cap-sd-highspeed;
357 cap-mmc-highspeed;
358 interrupts = <72>;
359 dmas = <&edma1 28 0>, <&edma1 29 0>;
360 dma-names = "rx", "tx";
361 status = "disabled";
362 };
363 ehrpwm0: pwm@300000 {
364 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
365 "ti,am33xx-ehrpwm";
366 #pwm-cells = <3>;
367 reg = <0x300000 0x2000>;
368 status = "disabled";
369 };
370 ehrpwm1: pwm@302000 {
371 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
372 "ti,am33xx-ehrpwm";
373 #pwm-cells = <3>;
374 reg = <0x302000 0x2000>;
375 status = "disabled";
376 };
377 ecap0: ecap@306000 {
378 compatible = "ti,da850-ecap", "ti,am3352-ecap",
379 "ti,am33xx-ecap";
380 #pwm-cells = <3>;
381 reg = <0x306000 0x80>;
382 status = "disabled";
383 };
384 ecap1: ecap@307000 {
385 compatible = "ti,da850-ecap", "ti,am3352-ecap",
386 "ti,am33xx-ecap";
387 #pwm-cells = <3>;
388 reg = <0x307000 0x80>;
389 status = "disabled";
390 };
391 ecap2: ecap@308000 {
392 compatible = "ti,da850-ecap", "ti,am3352-ecap",
393 "ti,am33xx-ecap";
394 #pwm-cells = <3>;
395 reg = <0x308000 0x80>;
396 status = "disabled";
397 };
398 spi0: spi@41000 {
399 #address-cells = <1>;
400 #size-cells = <0>;
401 compatible = "ti,da830-spi";
402 reg = <0x41000 0x1000>;
403 num-cs = <6>;
404 ti,davinci-spi-intr-line = <1>;
405 interrupts = <20>;
406 dmas = <&edma0 14 0>, <&edma0 15 0>;
407 dma-names = "rx", "tx";
408 status = "disabled";
409 };
410 spi1: spi@30e000 {
411 #address-cells = <1>;
412 #size-cells = <0>;
413 compatible = "ti,da830-spi";
414 reg = <0x30e000 0x1000>;
415 num-cs = <4>;
416 ti,davinci-spi-intr-line = <1>;
417 interrupts = <56>;
418 dmas = <&edma0 18 0>, <&edma0 19 0>;
419 dma-names = "rx", "tx";
420 status = "disabled";
421 };
422 usb0: usb@200000 {
423 compatible = "ti,da830-musb";
424 reg = <0x200000 0x10000>;
425 interrupts = <58>;
426 interrupt-names = "mc";
427 dr_mode = "otg";
428 phys = <&usb_phy 0>;
429 phy-names = "usb-phy";
430 status = "disabled";
431 };
432 sata: sata@218000 {
433 compatible = "ti,da850-ahci";
434 reg = <0x218000 0x2000>, <0x22c018 0x4>;
435 interrupts = <67>;
436 status = "disabled";
437 };
438 mdio: mdio@224000 {
439 compatible = "ti,davinci_mdio";
440 #address-cells = <1>;
441 #size-cells = <0>;
442 reg = <0x224000 0x1000>;
443 status = "disabled";
444 };
445 eth0: ethernet@220000 {
446 compatible = "ti,davinci-dm6467-emac";
447 reg = <0x220000 0x4000>;
448 ti,davinci-ctrl-reg-offset = <0x3000>;
449 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
450 ti,davinci-ctrl-ram-offset = <0>;
451 ti,davinci-ctrl-ram-size = <0x2000>;
452 local-mac-address = [ 00 00 00 00 00 00 ];
453 interrupts = <33
454 34
455 35
456 36
457 >;
458 status = "disabled";
459 };
460 usb1: usb@225000 {
461 compatible = "ti,da830-ohci";
462 reg = <0x225000 0x1000>;
463 interrupts = <59>;
464 phys = <&usb_phy 1>;
465 phy-names = "usb-phy";
466 status = "disabled";
467 };
468 gpio: gpio@226000 {
469 compatible = "ti,dm6441-gpio";
470 gpio-controller;
471 #gpio-cells = <2>;
472 reg = <0x226000 0x1000>;
473 interrupts = <42 IRQ_TYPE_EDGE_BOTH
474 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
475 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
476 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
477 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
478 ti,ngpio = <144>;
479 ti,davinci-gpio-unbanked = <0>;
480 status = "disabled";
481 };
482 pinconf: pin-controller@22c00c {
483 compatible = "ti,da850-pupd";
484 reg = <0x22c00c 0x8>;
485 status = "disabled";
486 };
487
488 mcasp0: mcasp@100000 {
489 compatible = "ti,da830-mcasp-audio";
490 reg = <0x100000 0x2000>,
491 <0x102000 0x400000>;
492 reg-names = "mpu", "dat";
493 interrupts = <54>;
494 interrupt-names = "common";
495 status = "disabled";
496 dmas = <&edma0 1 1>,
497 <&edma0 0 1>;
498 dma-names = "tx", "rx";
499 };
500
501 lcdc: display@213000 {
502 compatible = "ti,da850-tilcdc";
503 reg = <0x213000 0x1000>;
504 interrupts = <52>;
505 max-pixelclock = <37500>;
506 status = "disabled";
507 };
508 };
509 aemif: aemif@68000000 {
510 compatible = "ti,da850-aemif";
511 #address-cells = <2>;
512 #size-cells = <1>;
513
514 reg = <0x68000000 0x00008000>;
515 ranges = <0 0 0x60000000 0x08000000
516 1 0 0x68000000 0x00008000>;
517 status = "disabled";
518 };
519 memctrl: memory-controller@b0000000 {
520 compatible = "ti,da850-ddr-controller";
521 reg = <0xb0000000 0xe8>;
522 status = "disabled";
523 };
524 };
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