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ARM: dts: da850: Add the usb otg device node
[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / da850.dtsi
1 /*
2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10 #include "skeleton.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12
13 / {
14 arm {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 ranges;
18 intc: interrupt-controller@fffee000 {
19 compatible = "ti,cp-intc";
20 interrupt-controller;
21 #interrupt-cells = <1>;
22 ti,intc-size = <101>;
23 reg = <0xfffee000 0x2000>;
24 };
25 };
26 soc@1c00000 {
27 compatible = "simple-bus";
28 model = "da850";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges = <0x0 0x01c00000 0x400000>;
32 interrupt-parent = <&intc>;
33
34 pmx_core: pinmux@14120 {
35 compatible = "pinctrl-single";
36 reg = <0x14120 0x50>;
37 #address-cells = <1>;
38 #size-cells = <0>;
39 pinctrl-single,bit-per-mux;
40 pinctrl-single,register-width = <32>;
41 pinctrl-single,function-mask = <0xf>;
42 status = "disabled";
43
44 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
45 pinctrl-single,bits = <
46 /* UART0_RTS UART0_CTS */
47 0x0c 0x22000000 0xff000000
48 >;
49 };
50 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
51 pinctrl-single,bits = <
52 /* UART0_TXD UART0_RXD */
53 0x0c 0x00220000 0x00ff0000
54 >;
55 };
56 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
57 pinctrl-single,bits = <
58 /* UART1_CTS UART1_RTS */
59 0x00 0x00440000 0x00ff0000
60 >;
61 };
62 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
63 pinctrl-single,bits = <
64 /* UART1_TXD UART1_RXD */
65 0x10 0x22000000 0xff000000
66 >;
67 };
68 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
69 pinctrl-single,bits = <
70 /* UART2_CTS UART2_RTS */
71 0x00 0x44000000 0xff000000
72 >;
73 };
74 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
75 pinctrl-single,bits = <
76 /* UART2_TXD UART2_RXD */
77 0x10 0x00220000 0x00ff0000
78 >;
79 };
80 i2c0_pins: pinmux_i2c0_pins {
81 pinctrl-single,bits = <
82 /* I2C0_SDA,I2C0_SCL */
83 0x10 0x00002200 0x0000ff00
84 >;
85 };
86 i2c1_pins: pinmux_i2c1_pins {
87 pinctrl-single,bits = <
88 /* I2C1_SDA, I2C1_SCL */
89 0x10 0x00440000 0x00ff0000
90 >;
91 };
92 mmc0_pins: pinmux_mmc_pins {
93 pinctrl-single,bits = <
94 /* MMCSD0_DAT[3] MMCSD0_DAT[2]
95 * MMCSD0_DAT[1] MMCSD0_DAT[0]
96 * MMCSD0_CMD MMCSD0_CLK
97 */
98 0x28 0x00222222 0x00ffffff
99 >;
100 };
101 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
102 pinctrl-single,bits = <
103 /* EPWM0A */
104 0xc 0x00000002 0x0000000f
105 >;
106 };
107 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
108 pinctrl-single,bits = <
109 /* EPWM0B */
110 0xc 0x00000020 0x000000f0
111 >;
112 };
113 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
114 pinctrl-single,bits = <
115 /* EPWM1A */
116 0x14 0x00000002 0x0000000f
117 >;
118 };
119 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
120 pinctrl-single,bits = <
121 /* EPWM1B */
122 0x14 0x00000020 0x000000f0
123 >;
124 };
125 ecap0_pins: pinmux_ecap0_pins {
126 pinctrl-single,bits = <
127 /* ECAP0_APWM0 */
128 0x8 0x20000000 0xf0000000
129 >;
130 };
131 ecap1_pins: pinmux_ecap1_pins {
132 pinctrl-single,bits = <
133 /* ECAP1_APWM1 */
134 0x4 0x40000000 0xf0000000
135 >;
136 };
137 ecap2_pins: pinmux_ecap2_pins {
138 pinctrl-single,bits = <
139 /* ECAP2_APWM2 */
140 0x4 0x00000004 0x0000000f
141 >;
142 };
143 spi0_pins: pinmux_spi0_pins {
144 pinctrl-single,bits = <
145 /* SIMO, SOMI, CLK */
146 0xc 0x00001101 0x0000ff0f
147 >;
148 };
149 spi0_cs0_pin: pinmux_spi0_cs0 {
150 pinctrl-single,bits = <
151 /* CS0 */
152 0x10 0x00000010 0x000000f0
153 >;
154 };
155 spi1_pins: pinmux_spi1_pins {
156 pinctrl-single,bits = <
157 /* SIMO, SOMI, CLK */
158 0x14 0x00110100 0x00ff0f00
159 >;
160 };
161 spi1_cs0_pin: pinmux_spi1_cs0 {
162 pinctrl-single,bits = <
163 /* CS0 */
164 0x14 0x00000010 0x000000f0
165 >;
166 };
167 mdio_pins: pinmux_mdio_pins {
168 pinctrl-single,bits = <
169 /* MDIO_CLK, MDIO_D */
170 0x10 0x00000088 0x000000ff
171 >;
172 };
173 mii_pins: pinmux_mii_pins {
174 pinctrl-single,bits = <
175 /*
176 * MII_TXEN, MII_TXCLK, MII_COL
177 * MII_TXD_3, MII_TXD_2, MII_TXD_1
178 * MII_TXD_0
179 */
180 0x8 0x88888880 0xfffffff0
181 /*
182 * MII_RXER, MII_CRS, MII_RXCLK
183 * MII_RXDV, MII_RXD_3, MII_RXD_2
184 * MII_RXD_1, MII_RXD_0
185 */
186 0xc 0x88888888 0xffffffff
187 >;
188 };
189 lcd_pins: pinmux_lcd_pins {
190 pinctrl-single,bits = <
191 /*
192 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
193 * LCD_D[6], LCD_D[7]
194 */
195 0x40 0x22222200 0xffffff00
196 /*
197 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
198 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
199 */
200 0x44 0x22222222 0xffffffff
201 /* LCD_D[8], LCD_D[9] */
202 0x48 0x00000022 0x000000ff
203
204 /* LCD_PCLK */
205 0x48 0x02000000 0x0f000000
206 /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
207 0x4c 0x02000022 0x0f0000ff
208 >;
209 };
210
211 };
212 prictrl: priority-controller@14110 {
213 compatible = "ti,da850-mstpri";
214 reg = <0x14110 0x0c>;
215 };
216 cfgchip: chip-controller@1417c {
217 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
218 reg = <0x1417c 0x14>;
219
220 usb_phy: usb-phy {
221 compatible = "ti,da830-usb-phy";
222 #phy-cells = <1>;
223 status = "disabled";
224 };
225 };
226 edma0: edma@0 {
227 compatible = "ti,edma3-tpcc";
228 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
229 reg = <0x0 0x8000>;
230 reg-names = "edma3_cc";
231 interrupts = <11 12>;
232 interrupt-names = "edma3_ccint", "edma3_ccerrint";
233 #dma-cells = <2>;
234
235 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
236 };
237 edma0_tptc0: tptc@8000 {
238 compatible = "ti,edma3-tptc";
239 reg = <0x8000 0x400>;
240 interrupts = <13>;
241 interrupt-names = "edm3_tcerrint";
242 };
243 edma0_tptc1: tptc@8400 {
244 compatible = "ti,edma3-tptc";
245 reg = <0x8400 0x400>;
246 interrupts = <32>;
247 interrupt-names = "edm3_tcerrint";
248 };
249 edma1: edma@230000 {
250 compatible = "ti,edma3-tpcc";
251 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
252 reg = <0x230000 0x8000>;
253 reg-names = "edma3_cc";
254 interrupts = <93 94>;
255 interrupt-names = "edma3_ccint", "edma3_ccerrint";
256 #dma-cells = <2>;
257
258 ti,tptcs = <&edma1_tptc0 7>;
259 };
260 edma1_tptc0: tptc@238000 {
261 compatible = "ti,edma3-tptc";
262 reg = <0x238000 0x400>;
263 interrupts = <95>;
264 interrupt-names = "edm3_tcerrint";
265 };
266 serial0: serial@42000 {
267 compatible = "ns16550a";
268 reg = <0x42000 0x100>;
269 reg-shift = <2>;
270 interrupts = <25>;
271 status = "disabled";
272 };
273 serial1: serial@10c000 {
274 compatible = "ns16550a";
275 reg = <0x10c000 0x100>;
276 reg-shift = <2>;
277 interrupts = <53>;
278 status = "disabled";
279 };
280 serial2: serial@10d000 {
281 compatible = "ns16550a";
282 reg = <0x10d000 0x100>;
283 reg-shift = <2>;
284 interrupts = <61>;
285 status = "disabled";
286 };
287 rtc0: rtc@23000 {
288 compatible = "ti,da830-rtc";
289 reg = <0x23000 0x1000>;
290 interrupts = <19
291 19>;
292 status = "disabled";
293 };
294 i2c0: i2c@22000 {
295 compatible = "ti,davinci-i2c";
296 reg = <0x22000 0x1000>;
297 interrupts = <15>;
298 #address-cells = <1>;
299 #size-cells = <0>;
300 status = "disabled";
301 };
302 i2c1: i2c@228000 {
303 compatible = "ti,davinci-i2c";
304 reg = <0x228000 0x1000>;
305 interrupts = <51>;
306 #address-cells = <1>;
307 #size-cells = <0>;
308 status = "disabled";
309 };
310 wdt: wdt@21000 {
311 compatible = "ti,davinci-wdt";
312 reg = <0x21000 0x1000>;
313 status = "disabled";
314 };
315 mmc0: mmc@40000 {
316 compatible = "ti,da830-mmc";
317 reg = <0x40000 0x1000>;
318 interrupts = <16>;
319 dmas = <&edma0 16 0>, <&edma0 17 0>;
320 dma-names = "rx", "tx";
321 status = "disabled";
322 };
323 mmc1: mmc@21b000 {
324 compatible = "ti,da830-mmc";
325 reg = <0x21b000 0x1000>;
326 interrupts = <72>;
327 dmas = <&edma1 28 0>, <&edma1 29 0>;
328 dma-names = "rx", "tx";
329 status = "disabled";
330 };
331 ehrpwm0: pwm@300000 {
332 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
333 "ti,am33xx-ehrpwm";
334 #pwm-cells = <3>;
335 reg = <0x300000 0x2000>;
336 status = "disabled";
337 };
338 ehrpwm1: pwm@302000 {
339 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
340 "ti,am33xx-ehrpwm";
341 #pwm-cells = <3>;
342 reg = <0x302000 0x2000>;
343 status = "disabled";
344 };
345 ecap0: ecap@306000 {
346 compatible = "ti,da850-ecap", "ti,am3352-ecap",
347 "ti,am33xx-ecap";
348 #pwm-cells = <3>;
349 reg = <0x306000 0x80>;
350 status = "disabled";
351 };
352 ecap1: ecap@307000 {
353 compatible = "ti,da850-ecap", "ti,am3352-ecap",
354 "ti,am33xx-ecap";
355 #pwm-cells = <3>;
356 reg = <0x307000 0x80>;
357 status = "disabled";
358 };
359 ecap2: ecap@308000 {
360 compatible = "ti,da850-ecap", "ti,am3352-ecap",
361 "ti,am33xx-ecap";
362 #pwm-cells = <3>;
363 reg = <0x308000 0x80>;
364 status = "disabled";
365 };
366 spi0: spi@41000 {
367 #address-cells = <1>;
368 #size-cells = <0>;
369 compatible = "ti,da830-spi";
370 reg = <0x41000 0x1000>;
371 num-cs = <6>;
372 ti,davinci-spi-intr-line = <1>;
373 interrupts = <20>;
374 dmas = <&edma0 14 0>, <&edma0 15 0>;
375 dma-names = "rx", "tx";
376 status = "disabled";
377 };
378 spi1: spi@30e000 {
379 #address-cells = <1>;
380 #size-cells = <0>;
381 compatible = "ti,da830-spi";
382 reg = <0x30e000 0x1000>;
383 num-cs = <4>;
384 ti,davinci-spi-intr-line = <1>;
385 interrupts = <56>;
386 dmas = <&edma0 18 0>, <&edma0 19 0>;
387 dma-names = "rx", "tx";
388 status = "disabled";
389 };
390 usb0: usb@200000 {
391 compatible = "ti,da830-musb";
392 reg = <0x200000 0x10000>;
393 interrupts = <58>;
394 interrupt-names = "mc";
395 dr_mode = "otg";
396 phys = <&usb_phy 0>;
397 phy-names = "usb-phy";
398 status = "disabled";
399 };
400 mdio: mdio@224000 {
401 compatible = "ti,davinci_mdio";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 reg = <0x224000 0x1000>;
405 status = "disabled";
406 };
407 eth0: ethernet@220000 {
408 compatible = "ti,davinci-dm6467-emac";
409 reg = <0x220000 0x4000>;
410 ti,davinci-ctrl-reg-offset = <0x3000>;
411 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
412 ti,davinci-ctrl-ram-offset = <0>;
413 ti,davinci-ctrl-ram-size = <0x2000>;
414 local-mac-address = [ 00 00 00 00 00 00 ];
415 interrupts = <33
416 34
417 35
418 36
419 >;
420 status = "disabled";
421 };
422 gpio: gpio@226000 {
423 compatible = "ti,dm6441-gpio";
424 gpio-controller;
425 #gpio-cells = <2>;
426 reg = <0x226000 0x1000>;
427 interrupts = <42 IRQ_TYPE_EDGE_BOTH
428 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
429 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
430 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
431 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
432 ti,ngpio = <144>;
433 ti,davinci-gpio-unbanked = <0>;
434 status = "disabled";
435 };
436
437 mcasp0: mcasp@100000 {
438 compatible = "ti,da830-mcasp-audio";
439 reg = <0x100000 0x2000>,
440 <0x102000 0x400000>;
441 reg-names = "mpu", "dat";
442 interrupts = <54>;
443 interrupt-names = "common";
444 status = "disabled";
445 dmas = <&edma0 1 1>,
446 <&edma0 0 1>;
447 dma-names = "tx", "rx";
448 };
449
450 display: display@213000 {
451 compatible = "ti,da850-tilcdc";
452 reg = <0x213000 0x1000>;
453 interrupts = <52>;
454 status = "disabled";
455 };
456 };
457 aemif: aemif@68000000 {
458 compatible = "ti,da850-aemif";
459 #address-cells = <2>;
460 #size-cells = <1>;
461
462 reg = <0x68000000 0x00008000>;
463 ranges = <0 0 0x60000000 0x08000000
464 1 0 0x68000000 0x00008000>;
465 status = "disabled";
466 };
467 memctrl: memory-controller@b0000000 {
468 compatible = "ti,da850-ddr-controller";
469 reg = <0xb0000000 0xe8>;
470 };
471 };
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