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Merge tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / da850.dtsi
1 /*
2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10 #include "skeleton.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12
13 / {
14 arm {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 ranges;
18 intc: interrupt-controller@fffee000 {
19 compatible = "ti,cp-intc";
20 interrupt-controller;
21 #interrupt-cells = <1>;
22 ti,intc-size = <101>;
23 reg = <0xfffee000 0x2000>;
24 };
25 };
26 soc@1c00000 {
27 compatible = "simple-bus";
28 model = "da850";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges = <0x0 0x01c00000 0x400000>;
32 interrupt-parent = <&intc>;
33
34 pmx_core: pinmux@14120 {
35 compatible = "pinctrl-single";
36 reg = <0x14120 0x50>;
37 #address-cells = <1>;
38 #size-cells = <0>;
39 pinctrl-single,bit-per-mux;
40 pinctrl-single,register-width = <32>;
41 pinctrl-single,function-mask = <0xf>;
42 status = "disabled";
43
44 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
45 pinctrl-single,bits = <
46 /* UART0_RTS UART0_CTS */
47 0x0c 0x22000000 0xff000000
48 >;
49 };
50 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
51 pinctrl-single,bits = <
52 /* UART0_TXD UART0_RXD */
53 0x0c 0x00220000 0x00ff0000
54 >;
55 };
56 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
57 pinctrl-single,bits = <
58 /* UART1_CTS UART1_RTS */
59 0x00 0x00440000 0x00ff0000
60 >;
61 };
62 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
63 pinctrl-single,bits = <
64 /* UART1_TXD UART1_RXD */
65 0x10 0x22000000 0xff000000
66 >;
67 };
68 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
69 pinctrl-single,bits = <
70 /* UART2_CTS UART2_RTS */
71 0x00 0x44000000 0xff000000
72 >;
73 };
74 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
75 pinctrl-single,bits = <
76 /* UART2_TXD UART2_RXD */
77 0x10 0x00220000 0x00ff0000
78 >;
79 };
80 i2c0_pins: pinmux_i2c0_pins {
81 pinctrl-single,bits = <
82 /* I2C0_SDA,I2C0_SCL */
83 0x10 0x00002200 0x0000ff00
84 >;
85 };
86 i2c1_pins: pinmux_i2c1_pins {
87 pinctrl-single,bits = <
88 /* I2C1_SDA, I2C1_SCL */
89 0x10 0x00440000 0x00ff0000
90 >;
91 };
92 mmc0_pins: pinmux_mmc_pins {
93 pinctrl-single,bits = <
94 /* MMCSD0_DAT[3] MMCSD0_DAT[2]
95 * MMCSD0_DAT[1] MMCSD0_DAT[0]
96 * MMCSD0_CMD MMCSD0_CLK
97 */
98 0x28 0x00222222 0x00ffffff
99 >;
100 };
101 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
102 pinctrl-single,bits = <
103 /* EPWM0A */
104 0xc 0x00000002 0x0000000f
105 >;
106 };
107 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
108 pinctrl-single,bits = <
109 /* EPWM0B */
110 0xc 0x00000020 0x000000f0
111 >;
112 };
113 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
114 pinctrl-single,bits = <
115 /* EPWM1A */
116 0x14 0x00000002 0x0000000f
117 >;
118 };
119 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
120 pinctrl-single,bits = <
121 /* EPWM1B */
122 0x14 0x00000020 0x000000f0
123 >;
124 };
125 ecap0_pins: pinmux_ecap0_pins {
126 pinctrl-single,bits = <
127 /* ECAP0_APWM0 */
128 0x8 0x20000000 0xf0000000
129 >;
130 };
131 ecap1_pins: pinmux_ecap1_pins {
132 pinctrl-single,bits = <
133 /* ECAP1_APWM1 */
134 0x4 0x40000000 0xf0000000
135 >;
136 };
137 ecap2_pins: pinmux_ecap2_pins {
138 pinctrl-single,bits = <
139 /* ECAP2_APWM2 */
140 0x4 0x00000004 0x0000000f
141 >;
142 };
143 spi0_pins: pinmux_spi0_pins {
144 pinctrl-single,bits = <
145 /* SIMO, SOMI, CLK */
146 0xc 0x00001101 0x0000ff0f
147 >;
148 };
149 spi0_cs0_pin: pinmux_spi0_cs0 {
150 pinctrl-single,bits = <
151 /* CS0 */
152 0x10 0x00000010 0x000000f0
153 >;
154 };
155 spi1_pins: pinmux_spi1_pins {
156 pinctrl-single,bits = <
157 /* SIMO, SOMI, CLK */
158 0x14 0x00110100 0x00ff0f00
159 >;
160 };
161 spi1_cs0_pin: pinmux_spi1_cs0 {
162 pinctrl-single,bits = <
163 /* CS0 */
164 0x14 0x00000010 0x000000f0
165 >;
166 };
167 mdio_pins: pinmux_mdio_pins {
168 pinctrl-single,bits = <
169 /* MDIO_CLK, MDIO_D */
170 0x10 0x00000088 0x000000ff
171 >;
172 };
173 mii_pins: pinmux_mii_pins {
174 pinctrl-single,bits = <
175 /*
176 * MII_TXEN, MII_TXCLK, MII_COL
177 * MII_TXD_3, MII_TXD_2, MII_TXD_1
178 * MII_TXD_0
179 */
180 0x8 0x88888880 0xfffffff0
181 /*
182 * MII_RXER, MII_CRS, MII_RXCLK
183 * MII_RXDV, MII_RXD_3, MII_RXD_2
184 * MII_RXD_1, MII_RXD_0
185 */
186 0xc 0x88888888 0xffffffff
187 >;
188 };
189 lcd_pins: pinmux_lcd_pins {
190 pinctrl-single,bits = <
191 /*
192 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
193 * LCD_D[6], LCD_D[7]
194 */
195 0x40 0x22222200 0xffffff00
196 /*
197 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
198 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
199 */
200 0x44 0x22222222 0xffffffff
201 /* LCD_D[8], LCD_D[9] */
202 0x48 0x00000022 0x000000ff
203
204 /* LCD_PCLK */
205 0x48 0x02000000 0x0f000000
206 /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
207 0x4c 0x02000022 0x0f0000ff
208 >;
209 };
210
211 };
212 cfgchip: chip-controller@1417c {
213 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
214 reg = <0x1417c 0x14>;
215
216 usb_phy: usb-phy {
217 compatible = "ti,da830-usb-phy";
218 #phy-cells = <1>;
219 status = "disabled";
220 };
221 };
222 edma0: edma@0 {
223 compatible = "ti,edma3-tpcc";
224 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
225 reg = <0x0 0x8000>;
226 reg-names = "edma3_cc";
227 interrupts = <11 12>;
228 interrupt-names = "edma3_ccint", "edma3_ccerrint";
229 #dma-cells = <2>;
230
231 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
232 };
233 edma0_tptc0: tptc@8000 {
234 compatible = "ti,edma3-tptc";
235 reg = <0x8000 0x400>;
236 interrupts = <13>;
237 interrupt-names = "edm3_tcerrint";
238 };
239 edma0_tptc1: tptc@8400 {
240 compatible = "ti,edma3-tptc";
241 reg = <0x8400 0x400>;
242 interrupts = <32>;
243 interrupt-names = "edm3_tcerrint";
244 };
245 edma1: edma@230000 {
246 compatible = "ti,edma3-tpcc";
247 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
248 reg = <0x230000 0x8000>;
249 reg-names = "edma3_cc";
250 interrupts = <93 94>;
251 interrupt-names = "edma3_ccint", "edma3_ccerrint";
252 #dma-cells = <2>;
253
254 ti,tptcs = <&edma1_tptc0 7>;
255 };
256 edma1_tptc0: tptc@238000 {
257 compatible = "ti,edma3-tptc";
258 reg = <0x238000 0x400>;
259 interrupts = <95>;
260 interrupt-names = "edm3_tcerrint";
261 };
262 serial0: serial@42000 {
263 compatible = "ns16550a";
264 reg = <0x42000 0x100>;
265 reg-shift = <2>;
266 interrupts = <25>;
267 status = "disabled";
268 };
269 serial1: serial@10c000 {
270 compatible = "ns16550a";
271 reg = <0x10c000 0x100>;
272 reg-shift = <2>;
273 interrupts = <53>;
274 status = "disabled";
275 };
276 serial2: serial@10d000 {
277 compatible = "ns16550a";
278 reg = <0x10d000 0x100>;
279 reg-shift = <2>;
280 interrupts = <61>;
281 status = "disabled";
282 };
283 rtc0: rtc@23000 {
284 compatible = "ti,da830-rtc";
285 reg = <0x23000 0x1000>;
286 interrupts = <19
287 19>;
288 status = "disabled";
289 };
290 i2c0: i2c@22000 {
291 compatible = "ti,davinci-i2c";
292 reg = <0x22000 0x1000>;
293 interrupts = <15>;
294 #address-cells = <1>;
295 #size-cells = <0>;
296 status = "disabled";
297 };
298 i2c1: i2c@228000 {
299 compatible = "ti,davinci-i2c";
300 reg = <0x228000 0x1000>;
301 interrupts = <51>;
302 #address-cells = <1>;
303 #size-cells = <0>;
304 status = "disabled";
305 };
306 wdt: wdt@21000 {
307 compatible = "ti,davinci-wdt";
308 reg = <0x21000 0x1000>;
309 status = "disabled";
310 };
311 mmc0: mmc@40000 {
312 compatible = "ti,da830-mmc";
313 reg = <0x40000 0x1000>;
314 interrupts = <16>;
315 dmas = <&edma0 16 0>, <&edma0 17 0>;
316 dma-names = "rx", "tx";
317 status = "disabled";
318 };
319 mmc1: mmc@21b000 {
320 compatible = "ti,da830-mmc";
321 reg = <0x21b000 0x1000>;
322 interrupts = <72>;
323 dmas = <&edma1 28 0>, <&edma1 29 0>;
324 dma-names = "rx", "tx";
325 status = "disabled";
326 };
327 ehrpwm0: pwm@300000 {
328 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
329 "ti,am33xx-ehrpwm";
330 #pwm-cells = <3>;
331 reg = <0x300000 0x2000>;
332 status = "disabled";
333 };
334 ehrpwm1: pwm@302000 {
335 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
336 "ti,am33xx-ehrpwm";
337 #pwm-cells = <3>;
338 reg = <0x302000 0x2000>;
339 status = "disabled";
340 };
341 ecap0: ecap@306000 {
342 compatible = "ti,da850-ecap", "ti,am3352-ecap",
343 "ti,am33xx-ecap";
344 #pwm-cells = <3>;
345 reg = <0x306000 0x80>;
346 status = "disabled";
347 };
348 ecap1: ecap@307000 {
349 compatible = "ti,da850-ecap", "ti,am3352-ecap",
350 "ti,am33xx-ecap";
351 #pwm-cells = <3>;
352 reg = <0x307000 0x80>;
353 status = "disabled";
354 };
355 ecap2: ecap@308000 {
356 compatible = "ti,da850-ecap", "ti,am3352-ecap",
357 "ti,am33xx-ecap";
358 #pwm-cells = <3>;
359 reg = <0x308000 0x80>;
360 status = "disabled";
361 };
362 spi0: spi@41000 {
363 #address-cells = <1>;
364 #size-cells = <0>;
365 compatible = "ti,da830-spi";
366 reg = <0x41000 0x1000>;
367 num-cs = <6>;
368 ti,davinci-spi-intr-line = <1>;
369 interrupts = <20>;
370 dmas = <&edma0 14 0>, <&edma0 15 0>;
371 dma-names = "rx", "tx";
372 status = "disabled";
373 };
374 spi1: spi@30e000 {
375 #address-cells = <1>;
376 #size-cells = <0>;
377 compatible = "ti,da830-spi";
378 reg = <0x30e000 0x1000>;
379 num-cs = <4>;
380 ti,davinci-spi-intr-line = <1>;
381 interrupts = <56>;
382 dmas = <&edma0 18 0>, <&edma0 19 0>;
383 dma-names = "rx", "tx";
384 status = "disabled";
385 };
386 mdio: mdio@224000 {
387 compatible = "ti,davinci_mdio";
388 #address-cells = <1>;
389 #size-cells = <0>;
390 reg = <0x224000 0x1000>;
391 status = "disabled";
392 };
393 eth0: ethernet@220000 {
394 compatible = "ti,davinci-dm6467-emac";
395 reg = <0x220000 0x4000>;
396 ti,davinci-ctrl-reg-offset = <0x3000>;
397 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
398 ti,davinci-ctrl-ram-offset = <0>;
399 ti,davinci-ctrl-ram-size = <0x2000>;
400 local-mac-address = [ 00 00 00 00 00 00 ];
401 interrupts = <33
402 34
403 35
404 36
405 >;
406 status = "disabled";
407 };
408 gpio: gpio@226000 {
409 compatible = "ti,dm6441-gpio";
410 gpio-controller;
411 #gpio-cells = <2>;
412 reg = <0x226000 0x1000>;
413 interrupts = <42 IRQ_TYPE_EDGE_BOTH
414 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
415 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
416 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
417 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
418 ti,ngpio = <144>;
419 ti,davinci-gpio-unbanked = <0>;
420 status = "disabled";
421 };
422
423 mcasp0: mcasp@100000 {
424 compatible = "ti,da830-mcasp-audio";
425 reg = <0x100000 0x2000>,
426 <0x102000 0x400000>;
427 reg-names = "mpu", "dat";
428 interrupts = <54>;
429 interrupt-names = "common";
430 status = "disabled";
431 dmas = <&edma0 1 1>,
432 <&edma0 0 1>;
433 dma-names = "tx", "rx";
434 };
435
436 display: display@213000 {
437 compatible = "ti,da850-tilcdc";
438 reg = <0x213000 0x1000>;
439 interrupts = <52>;
440 status = "disabled";
441 };
442 };
443 aemif: aemif@68000000 {
444 compatible = "ti,da850-aemif";
445 #address-cells = <2>;
446 #size-cells = <1>;
447
448 reg = <0x68000000 0x00008000>;
449 ranges = <0 0 0x60000000 0x08000000
450 1 0 0x68000000 0x00008000>;
451 status = "disabled";
452 };
453 };
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