arch/arm/boot/dts/dm8168-evm.dts

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  */
   6 /dts-v1/;
   7
   8 #include "dm816x.dtsi"
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10
  11 / {
  12         model = "DM8168 EVM";
  13         compatible = "ti,dm8168-evm", "ti,dm8168";
  14
  15         memory@80000000 {
  16                 device_type = "memory";
  17                 reg = <0x80000000 0x40000000    /* 1 GB */
  18                        0xc0000000 0x40000000>;  /* 1 GB */
  19         };
  20
  21         /* FDC6331L controlled by SD_POW pin */
  22         vmmcsd_fixed: fixedregulator0 {
  23                 compatible = "regulator-fixed";
  24                 regulator-name = "vmmcsd_fixed";
  25                 regulator-min-microvolt = <3300000>;
  26                 regulator-max-microvolt = <3300000>;
  27         };
  28
  29         sata_refclk: fixedclock0 {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <100000000>;
  33         };
  34 };
  35
  36 &dm816x_pinmux {
  37         mcspi1_pins: pinmux_mcspi1_pins {
  38                 pinctrl-single,pins = <
  39                         DM816X_IOPAD(0x0a94, MUX_MODE0)                 /* SPI_SCLK */
  40                         DM816X_IOPAD(0x0a98, MUX_MODE0)                 /* SPI_SCS0 */
  41                         DM816X_IOPAD(0x0aa8, MUX_MODE0)                 /* SPI_D0 */
  42                         DM816X_IOPAD(0x0aac, MUX_MODE0)                 /* SPI_D1 */
  43                 >;
  44         };
  45
  46         mmc_pins: pinmux_mmc_pins {
  47                 pinctrl-single,pins = <
  48                         DM816X_IOPAD(0x0a70, MUX_MODE0)                 /* SD_POW */
  49                         DM816X_IOPAD(0x0a74, MUX_MODE0)                 /* SD_CLK */
  50                         DM816X_IOPAD(0x0a78, MUX_MODE0)                 /* SD_CMD */
  51                         DM816X_IOPAD(0x0a7C, MUX_MODE0)                 /* SD_DAT0 */
  52                         DM816X_IOPAD(0x0a80, MUX_MODE0)                 /* SD_DAT1 */
  53                         DM816X_IOPAD(0x0a84, MUX_MODE0)                 /* SD_DAT2 */
  54                         DM816X_IOPAD(0x0a88, MUX_MODE0)                 /* SD_DAT2 */
  55                         DM816X_IOPAD(0x0a8c, MUX_MODE2)                 /* GP1[7] */
  56                         DM816X_IOPAD(0x0a90, MUX_MODE2)                 /* GP1[8] */
  57                 >;
  58         };
  59
  60         usb0_pins: pinmux_usb0_pins {
  61                 pinctrl-single,pins = <
  62                         DM816X_IOPAD(0x0d04, MUX_MODE0)                 /* USB0_DRVVBUS */
  63                 >;
  64         };
  65
  66         usb1_pins: pinmux_usb1_pins {
  67                 pinctrl-single,pins = <
  68                         DM816X_IOPAD(0x0d08, MUX_MODE0)                 /* USB1_DRVVBUS */
  69                 >;
  70         };
  71
  72         nandflash_pins: nandflash_pins {
  73                 pinctrl-single,pins = <
  74                         DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0)               /* PINCTRL207 GPMC_CS0*/
  75                         DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0)              /* PINCTRL217 GPMC_ADV_ALE */
  76                         DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0)    /* PINCTRL214 GPMC_OE_RE */
  77                         DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0)              /* PINCTRL215 GPMC_BE0_CLE */
  78                         DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0)               /* PINCTRL213 GPMC_WE */
  79                         DM816X_IOPAD(0x0b6c, MUX_MODE0)                         /* PINCTRL220 GPMC_WAIT */
  80                         DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0)              /* PINCTRL250 GPMC_CLK */
  81                         DM816X_IOPAD(0x0ba4, MUX_MODE0)                         /* PINCTRL234 GPMC_D0 */
  82                         DM816X_IOPAD(0x0ba8, MUX_MODE0)                         /* PINCTRL234 GPMC_D1 */
  83                         DM816X_IOPAD(0x0bac, MUX_MODE0)                         /* PINCTRL234 GPMC_D2 */
  84                         DM816X_IOPAD(0x0bb0, MUX_MODE0)                         /* PINCTRL234 GPMC_D3 */
  85                         DM816X_IOPAD(0x0bb4, MUX_MODE0)                         /* PINCTRL234 GPMC_D4 */
  86                         DM816X_IOPAD(0x0bb8, MUX_MODE0)                         /* PINCTRL234 GPMC_D5 */
  87                         DM816X_IOPAD(0x0bbc, MUX_MODE0)                         /* PINCTRL234 GPMC_D6 */
  88                         DM816X_IOPAD(0x0bc0, MUX_MODE0)                         /* PINCTRL234 GPMC_D7 */
  89                         DM816X_IOPAD(0x0bc4, MUX_MODE0)                         /* PINCTRL234 GPMC_D8 */
  90                         DM816X_IOPAD(0x0bc8, MUX_MODE0)                         /* PINCTRL234 GPMC_D9 */
  91                         DM816X_IOPAD(0x0bcc, MUX_MODE0)                         /* PINCTRL234 GPMC_D10 */
  92                         DM816X_IOPAD(0x0bd0, MUX_MODE0)                         /* PINCTRL234 GPMC_D11 */
  93                         DM816X_IOPAD(0x0bd4, MUX_MODE0)                         /* PINCTRL234 GPMC_D12 */
  94                         DM816X_IOPAD(0x0bd8, MUX_MODE0)                         /* PINCTRL234 GPMC_D13 */
  95                         DM816X_IOPAD(0x0bdc, MUX_MODE0)                         /* PINCTRL234 GPMC_D14 */
  96                         DM816X_IOPAD(0x0be0, MUX_MODE0)                         /* PINCTRL234 GPMC_D15 */
  97                 >;
  98         };
  99 };
 100
 101 &i2c1 {
 102         extgpio0: pcf8575@20 {
 103                 compatible = "nxp,pcf8575";
 104                 reg = <0x20>;
 105                 gpio-controller;
 106                 #gpio-cells = <2>;
 107         };
 108 };
 109
 110 &i2c2 {
 111         extgpio1: pcf8575@20 {
 112                 compatible = "nxp,pcf8575";
 113                 reg = <0x20>;
 114                 gpio-controller;
 115                 #gpio-cells = <2>;
 116         };
 117 };
 118
 119 &gpmc {
 120         ranges = <0 0 0x04000000 0x01000000>;   /* CS0: 16MB for NAND */
 121         pinctrl-names = "default";
 122         pinctrl-0 = <&nandflash_pins>;
 123
 124         nand@0,0 {
 125                 compatible = "ti,omap2-nand";
 126                 linux,mtd-name= "micron,mt29f2g16aadwp";
 127                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 128                 interrupt-parent = <&gpmc>;
 129                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 130                              <1 IRQ_TYPE_NONE>; /* termcount */
 131                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 132                 #address-cells = <1>;
 133                 #size-cells = <1>;
 134                 ti,nand-ecc-opt = "bch8";
 135                 ti,elm-id = <&elm>;
 136                 nand-bus-width = <16>;
 137                 gpmc,device-width = <2>;
 138                 gpmc,sync-clk-ps = <0>;
 139                 gpmc,cs-on-ns = <0>;
 140                 gpmc,cs-rd-off-ns = <44>;
 141                 gpmc,cs-wr-off-ns = <44>;
 142                 gpmc,adv-on-ns = <6>;
 143                 gpmc,adv-rd-off-ns = <34>;
 144                 gpmc,adv-wr-off-ns = <44>;
 145                 gpmc,we-on-ns = <0>;
 146                 gpmc,we-off-ns = <40>;
 147                 gpmc,oe-on-ns = <0>;
 148                 gpmc,oe-off-ns = <54>;
 149                 gpmc,access-ns = <64>;
 150                 gpmc,rd-cycle-ns = <82>;
 151                 gpmc,wr-cycle-ns = <82>;
 152                 gpmc,bus-turnaround-ns = <0>;
 153                 gpmc,cycle2cycle-delay-ns = <0>;
 154                 gpmc,clk-activation-ns = <0>;
 155                 gpmc,wr-access-ns = <40>;
 156                 gpmc,wr-data-mux-bus-ns = <0>;
 157                 partition@0 {
 158                         label = "X-Loader";
 159                         reg = <0 0x80000>;
 160                 };
 161                 partition@0x80000 {
 162                         label = "U-Boot";
 163                         reg = <0x80000 0x1c0000>;
 164                 };
 165                 partition@0x1c0000 {
 166                         label = "Environment";
 167                         reg = <0x240000 0x40000>;
 168                 };
 169                 partition@0x280000 {
 170                         label = "Kernel";
 171                         reg = <0x280000 0x500000>;
 172                 };
 173                 partition@0x780000 {
 174                         label = "Filesystem";
 175                         reg = <0x780000 0xf880000>;
 176                 };
 177         };
 178 };
 179
 180 &mcspi1 {
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&mcspi1_pins>;
 183
 184         m25p80@0 {
 185                 compatible = "w25x32";
 186                 spi-max-frequency = <48000000>;
 187                 reg = <0>;
 188                 #address-cells = <1>;
 189                 #size-cells = <1>;
 190         };
 191 };
 192
 193 &mmc1 {
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&mmc_pins>;
 196         vmmc-supply = <&vmmcsd_fixed>;
 197         bus-width = <4>;
 198         cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
 199         wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
 200 };
 201
 202 /* At least dm8168-evm rev c won't support multipoint, later may */
 203 &usb0 {
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&usb0_pins>;
 206         mentor,multipoint = <0>;
 207 };
 208
 209 &usb1 {
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&usb1_pins>;
 212         mentor,multipoint = <0>;
 213 };
 214
 215 &sata {
 216         clocks = <&sysclk5_ck>, <&sata_refclk>;
 217 };