arch/arm/boot/dts/efm32gg.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device tree for Energy Micro EFM32 Giant Gecko SoC.
   4  *
   5  * Documentation available from
   6  * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
   7  */
   8
   9 #include "armv7-m.dtsi"
  10 #include "dt-bindings/clock/efm32-cmu.h"
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         aliases {
  17                 i2c0 = &i2c0;
  18                 i2c1 = &i2c1;
  19                 serial0 = &uart0;
  20                 serial1 = &uart1;
  21                 serial2 = &uart2;
  22                 serial3 = &uart3;
  23                 serial4 = &uart4;
  24                 spi0 = &spi0;
  25                 spi1 = &spi1;
  26                 spi2 = &spi2;
  27         };
  28
  29         soc {
  30                 adc: adc@40002000 {
  31                         compatible = "energymicro,efm32-adc";
  32                         reg = <0x40002000 0x400>;
  33                         interrupts = <7>;
  34                         clocks = <&cmu clk_HFPERCLKADC0>;
  35                         status = "disabled";
  36                 };
  37
  38                 gpio: gpio@40006000 {
  39                         compatible = "energymicro,efm32-gpio";
  40                         reg = <0x40006000 0x1000>;
  41                         interrupts = <1 11>;
  42                         gpio-controller;
  43                         #gpio-cells = <2>;
  44                         interrupt-controller;
  45                         #interrupt-cells = <1>;
  46                         clocks = <&cmu clk_HFPERCLKGPIO>;
  47                         status = "ok";
  48                 };
  49
  50                 i2c0: i2c@4000a000 {
  51                         #address-cells = <1>;
  52                         #size-cells = <0>;
  53                         compatible = "energymicro,efm32-i2c";
  54                         reg = <0x4000a000 0x400>;
  55                         interrupts = <9>;
  56                         clocks = <&cmu clk_HFPERCLKI2C0>;
  57                         clock-frequency = <100000>;
  58                         status = "disabled";
  59                 };
  60
  61                 i2c1: i2c@4000a400 {
  62                         #address-cells = <1>;
  63                         #size-cells = <0>;
  64                         compatible = "energymicro,efm32-i2c";
  65                         reg = <0x4000a400 0x400>;
  66                         interrupts = <10>;
  67                         clocks = <&cmu clk_HFPERCLKI2C1>;
  68                         clock-frequency = <100000>;
  69                         status = "disabled";
  70                 };
  71
  72                 spi0: spi@4000c000 { /* USART0 */
  73                         #address-cells = <1>;
  74                         #size-cells = <0>;
  75                         compatible = "energymicro,efm32-spi";
  76                         reg = <0x4000c000 0x400>;
  77                         interrupts = <3 4>;
  78                         clocks = <&cmu clk_HFPERCLKUSART0>;
  79                         status = "disabled";
  80                 };
  81
  82                 spi1: spi@4000c400 { /* USART1 */
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         compatible = "energymicro,efm32-spi";
  86                         reg = <0x4000c400 0x400>;
  87                         interrupts = <15 16>;
  88                         clocks = <&cmu clk_HFPERCLKUSART1>;
  89                         status = "disabled";
  90                 };
  91
  92                 spi2: spi@4000c800 { /* USART2 */
  93                         #address-cells = <1>;
  94                         #size-cells = <0>;
  95                         compatible = "energymicro,efm32-spi";
  96                         reg = <0x4000c800 0x400>;
  97                         interrupts = <18 19>;
  98                         clocks = <&cmu clk_HFPERCLKUSART2>;
  99                         status = "disabled";
 100                 };
 101
 102                 uart0: uart@4000c000 { /* USART0 */
 103                         compatible = "energymicro,efm32-uart";
 104                         reg = <0x4000c000 0x400>;
 105                         interrupts = <3 4>;
 106                         clocks = <&cmu clk_HFPERCLKUSART0>;
 107                         status = "disabled";
 108                 };
 109
 110                 uart1: uart@4000c400 { /* USART1 */
 111                         compatible = "energymicro,efm32-uart";
 112                         reg = <0x4000c400 0x400>;
 113                         interrupts = <15 16>;
 114                         clocks = <&cmu clk_HFPERCLKUSART1>;
 115                         status = "disabled";
 116                 };
 117
 118                 uart2: uart@4000c800 { /* USART2 */
 119                         compatible = "energymicro,efm32-uart";
 120                         reg = <0x4000c800 0x400>;
 121                         interrupts = <18 19>;
 122                         clocks = <&cmu clk_HFPERCLKUSART2>;
 123                         status = "disabled";
 124                 };
 125
 126                 uart3: uart@4000e000 { /* UART0 */
 127                         compatible = "energymicro,efm32-uart";
 128                         reg = <0x4000e000 0x400>;
 129                         interrupts = <20 21>;
 130                         clocks = <&cmu clk_HFPERCLKUART0>;
 131                         status = "disabled";
 132                 };
 133
 134                 uart4: uart@4000e400 { /* UART1 */
 135                         compatible = "energymicro,efm32-uart";
 136                         reg = <0x4000e400 0x400>;
 137                         interrupts = <22 23>;
 138                         clocks = <&cmu clk_HFPERCLKUART1>;
 139                         status = "disabled";
 140                 };
 141
 142                 timer0: timer@40010000 {
 143                         compatible = "energymicro,efm32-timer";
 144                         reg = <0x40010000 0x400>;
 145                         interrupts = <2>;
 146                         clocks = <&cmu clk_HFPERCLKTIMER0>;
 147                 };
 148
 149                 timer1: timer@40010400 {
 150                         compatible = "energymicro,efm32-timer";
 151                         reg = <0x40010400 0x400>;
 152                         interrupts = <12>;
 153                         clocks = <&cmu clk_HFPERCLKTIMER1>;
 154                 };
 155
 156                 timer2: timer@40010800 {
 157                         compatible = "energymicro,efm32-timer";
 158                         reg = <0x40010800 0x400>;
 159                         interrupts = <13>;
 160                         clocks = <&cmu clk_HFPERCLKTIMER2>;
 161                 };
 162
 163                 timer3: timer@40010c00 {
 164                         compatible = "energymicro,efm32-timer";
 165                         reg = <0x40010c00 0x400>;
 166                         interrupts = <14>;
 167                         clocks = <&cmu clk_HFPERCLKTIMER3>;
 168                 };
 169
 170                 cmu: cmu@400c8000 {
 171                         compatible = "efm32gg,cmu";
 172                         reg = <0x400c8000 0x400>;
 173                         interrupts = <32>;
 174                         #clock-cells = <1>;
 175                 };
 176         };
 177 };