arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 i2c8 = &i2c_8;
  42                 csis0 = &csis_0;
  43                 csis1 = &csis_1;
  44                 fimc0 = &fimc_0;
  45                 fimc1 = &fimc_1;
  46                 fimc2 = &fimc_2;
  47                 fimc3 = &fimc_3;
  48                 serial0 = &serial_0;
  49                 serial1 = &serial_1;
  50                 serial2 = &serial_2;
  51                 serial3 = &serial_3;
  52         };
  53
  54         clock_audss: clock-controller@03810000 {
  55                 compatible = "samsung,exynos4210-audss-clock";
  56                 reg = <0x03810000 0x0C>;
  57                 #clock-cells = <1>;
  58         };
  59
  60         i2s0: i2s@03830000 {
  61                 compatible = "samsung,s5pv210-i2s";
  62                 reg = <0x03830000 0x100>;
  63                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  64                 clock-names = "iis";
  65                 #clock-cells = <1>;
  66                 clock-output-names = "i2s_cdclk0";
  67                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  68                 dma-names = "tx", "rx", "tx-sec";
  69                 samsung,idma-addr = <0x03000000>;
  70                 #sound-dai-cells = <1>;
  71                 status = "disabled";
  72         };
  73
  74         chipid@10000000 {
  75                 compatible = "samsung,exynos4210-chipid";
  76                 reg = <0x10000000 0x100>;
  77         };
  78
  79         mipi_phy: video-phy@10020710 {
  80                 compatible = "samsung,s5pv210-mipi-video-phy";
  81                 reg = <0x10020710 8>;
  82                 #phy-cells = <1>;
  83                 syscon = <&pmu_system_controller>;
  84         };
  85
  86         pd_mfc: mfc-power-domain@10023C40 {
  87                 compatible = "samsung,exynos4210-pd";
  88                 reg = <0x10023C40 0x20>;
  89                 #power-domain-cells = <0>;
  90         };
  91
  92         pd_g3d: g3d-power-domain@10023C60 {
  93                 compatible = "samsung,exynos4210-pd";
  94                 reg = <0x10023C60 0x20>;
  95                 #power-domain-cells = <0>;
  96         };
  97
  98         pd_lcd0: lcd0-power-domain@10023C80 {
  99                 compatible = "samsung,exynos4210-pd";
 100                 reg = <0x10023C80 0x20>;
 101                 #power-domain-cells = <0>;
 102         };
 103
 104         pd_tv: tv-power-domain@10023C20 {
 105                 compatible = "samsung,exynos4210-pd";
 106                 reg = <0x10023C20 0x20>;
 107                 #power-domain-cells = <0>;
 108                 power-domains = <&pd_lcd0>;
 109         };
 110
 111         pd_cam: cam-power-domain@10023C00 {
 112                 compatible = "samsung,exynos4210-pd";
 113                 reg = <0x10023C00 0x20>;
 114                 #power-domain-cells = <0>;
 115         };
 116
 117         pd_gps: gps-power-domain@10023CE0 {
 118                 compatible = "samsung,exynos4210-pd";
 119                 reg = <0x10023CE0 0x20>;
 120                 #power-domain-cells = <0>;
 121         };
 122
 123         pd_gps_alive: gps-alive-power-domain@10023D00 {
 124                 compatible = "samsung,exynos4210-pd";
 125                 reg = <0x10023D00 0x20>;
 126                 #power-domain-cells = <0>;
 127         };
 128
 129         gic: interrupt-controller@10490000 {
 130                 compatible = "arm,cortex-a9-gic";
 131                 #interrupt-cells = <3>;
 132                 interrupt-controller;
 133                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
 134         };
 135
 136         combiner: interrupt-controller@10440000 {
 137                 compatible = "samsung,exynos4210-combiner";
 138                 #interrupt-cells = <2>;
 139                 interrupt-controller;
 140                 reg = <0x10440000 0x1000>;
 141         };
 142
 143         pmu {
 144                 compatible = "arm,cortex-a9-pmu";
 145                 interrupt-parent = <&combiner>;
 146                 interrupts = <2 2>, <3 2>;
 147         };
 148
 149         sys_reg: syscon@10010000 {
 150                 compatible = "samsung,exynos4-sysreg", "syscon";
 151                 reg = <0x10010000 0x400>;
 152         };
 153
 154         pmu_system_controller: system-controller@10020000 {
 155                 compatible = "samsung,exynos4210-pmu", "syscon";
 156                 reg = <0x10020000 0x4000>;
 157         };
 158
 159         dsi_0: dsi@11C80000 {
 160                 compatible = "samsung,exynos4210-mipi-dsi";
 161                 reg = <0x11C80000 0x10000>;
 162                 interrupts = <0 79 0>;
 163                 power-domains = <&pd_lcd0>;
 164                 phys = <&mipi_phy 1>;
 165                 phy-names = "dsim";
 166                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 167                 clock-names = "bus_clk", "pll_clk";
 168                 status = "disabled";
 169                 #address-cells = <1>;
 170                 #size-cells = <0>;
 171         };
 172
 173         camera {
 174                 compatible = "samsung,fimc", "simple-bus";
 175                 status = "disabled";
 176                 #address-cells = <1>;
 177                 #size-cells = <1>;
 178                 #clock-cells = <1>;
 179                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 180                 ranges;
 181
 182                 fimc_0: fimc@11800000 {
 183                         compatible = "samsung,exynos4210-fimc";
 184                         reg = <0x11800000 0x1000>;
 185                         interrupts = <0 84 0>;
 186                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 187                         clock-names = "fimc", "sclk_fimc";
 188                         power-domains = <&pd_cam>;
 189                         samsung,sysreg = <&sys_reg>;
 190                         status = "disabled";
 191                 };
 192
 193                 fimc_1: fimc@11810000 {
 194                         compatible = "samsung,exynos4210-fimc";
 195                         reg = <0x11810000 0x1000>;
 196                         interrupts = <0 85 0>;
 197                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 198                         clock-names = "fimc", "sclk_fimc";
 199                         power-domains = <&pd_cam>;
 200                         samsung,sysreg = <&sys_reg>;
 201                         status = "disabled";
 202                 };
 203
 204                 fimc_2: fimc@11820000 {
 205                         compatible = "samsung,exynos4210-fimc";
 206                         reg = <0x11820000 0x1000>;
 207                         interrupts = <0 86 0>;
 208                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 209                         clock-names = "fimc", "sclk_fimc";
 210                         power-domains = <&pd_cam>;
 211                         samsung,sysreg = <&sys_reg>;
 212                         status = "disabled";
 213                 };
 214
 215                 fimc_3: fimc@11830000 {
 216                         compatible = "samsung,exynos4210-fimc";
 217                         reg = <0x11830000 0x1000>;
 218                         interrupts = <0 87 0>;
 219                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 220                         clock-names = "fimc", "sclk_fimc";
 221                         power-domains = <&pd_cam>;
 222                         samsung,sysreg = <&sys_reg>;
 223                         status = "disabled";
 224                 };
 225
 226                 csis_0: csis@11880000 {
 227                         compatible = "samsung,exynos4210-csis";
 228                         reg = <0x11880000 0x4000>;
 229                         interrupts = <0 78 0>;
 230                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 231                         clock-names = "csis", "sclk_csis";
 232                         bus-width = <4>;
 233                         power-domains = <&pd_cam>;
 234                         phys = <&mipi_phy 0>;
 235                         phy-names = "csis";
 236                         status = "disabled";
 237                         #address-cells = <1>;
 238                         #size-cells = <0>;
 239                 };
 240
 241                 csis_1: csis@11890000 {
 242                         compatible = "samsung,exynos4210-csis";
 243                         reg = <0x11890000 0x4000>;
 244                         interrupts = <0 80 0>;
 245                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 246                         clock-names = "csis", "sclk_csis";
 247                         bus-width = <2>;
 248                         power-domains = <&pd_cam>;
 249                         phys = <&mipi_phy 2>;
 250                         phy-names = "csis";
 251                         status = "disabled";
 252                         #address-cells = <1>;
 253                         #size-cells = <0>;
 254                 };
 255         };
 256
 257         watchdog@10060000 {
 258                 compatible = "samsung,s3c2410-wdt";
 259                 reg = <0x10060000 0x100>;
 260                 interrupts = <0 43 0>;
 261                 clocks = <&clock CLK_WDT>;
 262                 clock-names = "watchdog";
 263                 status = "disabled";
 264         };
 265
 266         rtc@10070000 {
 267                 compatible = "samsung,s3c6410-rtc";
 268                 reg = <0x10070000 0x100>;
 269                 interrupts = <0 44 0>, <0 45 0>;
 270                 clocks = <&clock CLK_RTC>;
 271                 clock-names = "rtc";
 272                 status = "disabled";
 273         };
 274
 275         keypad@100A0000 {
 276                 compatible = "samsung,s5pv210-keypad";
 277                 reg = <0x100A0000 0x100>;
 278                 interrupts = <0 109 0>;
 279                 clocks = <&clock CLK_KEYIF>;
 280                 clock-names = "keypad";
 281                 status = "disabled";
 282         };
 283
 284         sdhci@12510000 {
 285                 compatible = "samsung,exynos4210-sdhci";
 286                 reg = <0x12510000 0x100>;
 287                 interrupts = <0 73 0>;
 288                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 289                 clock-names = "hsmmc", "mmc_busclk.2";
 290                 status = "disabled";
 291         };
 292
 293         sdhci@12520000 {
 294                 compatible = "samsung,exynos4210-sdhci";
 295                 reg = <0x12520000 0x100>;
 296                 interrupts = <0 74 0>;
 297                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 298                 clock-names = "hsmmc", "mmc_busclk.2";
 299                 status = "disabled";
 300         };
 301
 302         sdhci@12530000 {
 303                 compatible = "samsung,exynos4210-sdhci";
 304                 reg = <0x12530000 0x100>;
 305                 interrupts = <0 75 0>;
 306                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 307                 clock-names = "hsmmc", "mmc_busclk.2";
 308                 status = "disabled";
 309         };
 310
 311         sdhci@12540000 {
 312                 compatible = "samsung,exynos4210-sdhci";
 313                 reg = <0x12540000 0x100>;
 314                 interrupts = <0 76 0>;
 315                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 316                 clock-names = "hsmmc", "mmc_busclk.2";
 317                 status = "disabled";
 318         };
 319
 320         exynos_usbphy: exynos-usbphy@125B0000 {
 321                 compatible = "samsung,exynos4210-usb2-phy";
 322                 reg = <0x125B0000 0x100>;
 323                 samsung,pmureg-phandle = <&pmu_system_controller>;
 324                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 325                 clock-names = "phy", "ref";
 326                 #phy-cells = <1>;
 327                 status = "disabled";
 328         };
 329
 330         hsotg@12480000 {
 331                 compatible = "samsung,s3c6400-hsotg";
 332                 reg = <0x12480000 0x20000>;
 333                 interrupts = <0 71 0>;
 334                 clocks = <&clock CLK_USB_DEVICE>;
 335                 clock-names = "otg";
 336                 phys = <&exynos_usbphy 0>;
 337                 phy-names = "usb2-phy";
 338                 status = "disabled";
 339         };
 340
 341         ehci@12580000 {
 342                 compatible = "samsung,exynos4210-ehci";
 343                 reg = <0x12580000 0x100>;
 344                 interrupts = <0 70 0>;
 345                 clocks = <&clock CLK_USB_HOST>;
 346                 clock-names = "usbhost";
 347                 status = "disabled";
 348                 #address-cells = <1>;
 349                 #size-cells = <0>;
 350                 port@0 {
 351                     reg = <0>;
 352                     phys = <&exynos_usbphy 1>;
 353                     status = "disabled";
 354                 };
 355                 port@1 {
 356                     reg = <1>;
 357                     phys = <&exynos_usbphy 2>;
 358                     status = "disabled";
 359                 };
 360                 port@2 {
 361                     reg = <2>;
 362                     phys = <&exynos_usbphy 3>;
 363                     status = "disabled";
 364                 };
 365         };
 366
 367         ohci@12590000 {
 368                 compatible = "samsung,exynos4210-ohci";
 369                 reg = <0x12590000 0x100>;
 370                 interrupts = <0 70 0>;
 371                 clocks = <&clock CLK_USB_HOST>;
 372                 clock-names = "usbhost";
 373                 status = "disabled";
 374                 #address-cells = <1>;
 375                 #size-cells = <0>;
 376                 port@0 {
 377                     reg = <0>;
 378                     phys = <&exynos_usbphy 1>;
 379                     status = "disabled";
 380                 };
 381         };
 382
 383         i2s1: i2s@13960000 {
 384                 compatible = "samsung,s3c6410-i2s";
 385                 reg = <0x13960000 0x100>;
 386                 clocks = <&clock CLK_I2S1>;
 387                 clock-names = "iis";
 388                 #clock-cells = <1>;
 389                 clock-output-names = "i2s_cdclk1";
 390                 dmas = <&pdma1 12>, <&pdma1 11>;
 391                 dma-names = "tx", "rx";
 392                 #sound-dai-cells = <1>;
 393                 status = "disabled";
 394         };
 395
 396         i2s2: i2s@13970000 {
 397                 compatible = "samsung,s3c6410-i2s";
 398                 reg = <0x13970000 0x100>;
 399                 clocks = <&clock CLK_I2S2>;
 400                 clock-names = "iis";
 401                 #clock-cells = <1>;
 402                 clock-output-names = "i2s_cdclk2";
 403                 dmas = <&pdma0 14>, <&pdma0 13>;
 404                 dma-names = "tx", "rx";
 405                 #sound-dai-cells = <1>;
 406                 status = "disabled";
 407         };
 408
 409         mfc: codec@13400000 {
 410                 compatible = "samsung,mfc-v5";
 411                 reg = <0x13400000 0x10000>;
 412                 interrupts = <0 94 0>;
 413                 power-domains = <&pd_mfc>;
 414                 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
 415                 clock-names = "mfc", "sclk_mfc";
 416                 status = "disabled";
 417         };
 418
 419         serial_0: serial@13800000 {
 420                 compatible = "samsung,exynos4210-uart";
 421                 reg = <0x13800000 0x100>;
 422                 interrupts = <0 52 0>;
 423                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 424                 clock-names = "uart", "clk_uart_baud0";
 425                 status = "disabled";
 426         };
 427
 428         serial_1: serial@13810000 {
 429                 compatible = "samsung,exynos4210-uart";
 430                 reg = <0x13810000 0x100>;
 431                 interrupts = <0 53 0>;
 432                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 433                 clock-names = "uart", "clk_uart_baud0";
 434                 status = "disabled";
 435         };
 436
 437         serial_2: serial@13820000 {
 438                 compatible = "samsung,exynos4210-uart";
 439                 reg = <0x13820000 0x100>;
 440                 interrupts = <0 54 0>;
 441                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 442                 clock-names = "uart", "clk_uart_baud0";
 443                 status = "disabled";
 444         };
 445
 446         serial_3: serial@13830000 {
 447                 compatible = "samsung,exynos4210-uart";
 448                 reg = <0x13830000 0x100>;
 449                 interrupts = <0 55 0>;
 450                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 451                 clock-names = "uart", "clk_uart_baud0";
 452                 status = "disabled";
 453         };
 454
 455         i2c_0: i2c@13860000 {
 456                 #address-cells = <1>;
 457                 #size-cells = <0>;
 458                 compatible = "samsung,s3c2440-i2c";
 459                 reg = <0x13860000 0x100>;
 460                 interrupts = <0 58 0>;
 461                 clocks = <&clock CLK_I2C0>;
 462                 clock-names = "i2c";
 463                 pinctrl-names = "default";
 464                 pinctrl-0 = <&i2c0_bus>;
 465                 status = "disabled";
 466         };
 467
 468         i2c_1: i2c@13870000 {
 469                 #address-cells = <1>;
 470                 #size-cells = <0>;
 471                 compatible = "samsung,s3c2440-i2c";
 472                 reg = <0x13870000 0x100>;
 473                 interrupts = <0 59 0>;
 474                 clocks = <&clock CLK_I2C1>;
 475                 clock-names = "i2c";
 476                 pinctrl-names = "default";
 477                 pinctrl-0 = <&i2c1_bus>;
 478                 status = "disabled";
 479         };
 480
 481         i2c_2: i2c@13880000 {
 482                 #address-cells = <1>;
 483                 #size-cells = <0>;
 484                 compatible = "samsung,s3c2440-i2c";
 485                 reg = <0x13880000 0x100>;
 486                 interrupts = <0 60 0>;
 487                 clocks = <&clock CLK_I2C2>;
 488                 clock-names = "i2c";
 489                 pinctrl-names = "default";
 490                 pinctrl-0 = <&i2c2_bus>;
 491                 status = "disabled";
 492         };
 493
 494         i2c_3: i2c@13890000 {
 495                 #address-cells = <1>;
 496                 #size-cells = <0>;
 497                 compatible = "samsung,s3c2440-i2c";
 498                 reg = <0x13890000 0x100>;
 499                 interrupts = <0 61 0>;
 500                 clocks = <&clock CLK_I2C3>;
 501                 clock-names = "i2c";
 502                 pinctrl-names = "default";
 503                 pinctrl-0 = <&i2c3_bus>;
 504                 status = "disabled";
 505         };
 506
 507         i2c_4: i2c@138A0000 {
 508                 #address-cells = <1>;
 509                 #size-cells = <0>;
 510                 compatible = "samsung,s3c2440-i2c";
 511                 reg = <0x138A0000 0x100>;
 512                 interrupts = <0 62 0>;
 513                 clocks = <&clock CLK_I2C4>;
 514                 clock-names = "i2c";
 515                 pinctrl-names = "default";
 516                 pinctrl-0 = <&i2c4_bus>;
 517                 status = "disabled";
 518         };
 519
 520         i2c_5: i2c@138B0000 {
 521                 #address-cells = <1>;
 522                 #size-cells = <0>;
 523                 compatible = "samsung,s3c2440-i2c";
 524                 reg = <0x138B0000 0x100>;
 525                 interrupts = <0 63 0>;
 526                 clocks = <&clock CLK_I2C5>;
 527                 clock-names = "i2c";
 528                 pinctrl-names = "default";
 529                 pinctrl-0 = <&i2c5_bus>;
 530                 status = "disabled";
 531         };
 532
 533         i2c_6: i2c@138C0000 {
 534                 #address-cells = <1>;
 535                 #size-cells = <0>;
 536                 compatible = "samsung,s3c2440-i2c";
 537                 reg = <0x138C0000 0x100>;
 538                 interrupts = <0 64 0>;
 539                 clocks = <&clock CLK_I2C6>;
 540                 clock-names = "i2c";
 541                 pinctrl-names = "default";
 542                 pinctrl-0 = <&i2c6_bus>;
 543                 status = "disabled";
 544         };
 545
 546         i2c_7: i2c@138D0000 {
 547                 #address-cells = <1>;
 548                 #size-cells = <0>;
 549                 compatible = "samsung,s3c2440-i2c";
 550                 reg = <0x138D0000 0x100>;
 551                 interrupts = <0 65 0>;
 552                 clocks = <&clock CLK_I2C7>;
 553                 clock-names = "i2c";
 554                 pinctrl-names = "default";
 555                 pinctrl-0 = <&i2c7_bus>;
 556                 status = "disabled";
 557         };
 558
 559         i2c_8: i2c@138E0000 {
 560                 #address-cells = <1>;
 561                 #size-cells = <0>;
 562                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 563                 reg = <0x138E0000 0x100>;
 564                 interrupts = <0 93 0>;
 565                 clocks = <&clock CLK_I2C_HDMI>;
 566                 clock-names = "i2c";
 567                 status = "disabled";
 568
 569                 hdmi_i2c_phy: hdmiphy@38 {
 570                         compatible = "exynos4210-hdmiphy";
 571                         reg = <0x38>;
 572                 };
 573         };
 574
 575         spi_0: spi@13920000 {
 576                 compatible = "samsung,exynos4210-spi";
 577                 reg = <0x13920000 0x100>;
 578                 interrupts = <0 66 0>;
 579                 dmas = <&pdma0 7>, <&pdma0 6>;
 580                 dma-names = "tx", "rx";
 581                 #address-cells = <1>;
 582                 #size-cells = <0>;
 583                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 584                 clock-names = "spi", "spi_busclk0";
 585                 pinctrl-names = "default";
 586                 pinctrl-0 = <&spi0_bus>;
 587                 status = "disabled";
 588         };
 589
 590         spi_1: spi@13930000 {
 591                 compatible = "samsung,exynos4210-spi";
 592                 reg = <0x13930000 0x100>;
 593                 interrupts = <0 67 0>;
 594                 dmas = <&pdma1 7>, <&pdma1 6>;
 595                 dma-names = "tx", "rx";
 596                 #address-cells = <1>;
 597                 #size-cells = <0>;
 598                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 599                 clock-names = "spi", "spi_busclk0";
 600                 pinctrl-names = "default";
 601                 pinctrl-0 = <&spi1_bus>;
 602                 status = "disabled";
 603         };
 604
 605         spi_2: spi@13940000 {
 606                 compatible = "samsung,exynos4210-spi";
 607                 reg = <0x13940000 0x100>;
 608                 interrupts = <0 68 0>;
 609                 dmas = <&pdma0 9>, <&pdma0 8>;
 610                 dma-names = "tx", "rx";
 611                 #address-cells = <1>;
 612                 #size-cells = <0>;
 613                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 614                 clock-names = "spi", "spi_busclk0";
 615                 pinctrl-names = "default";
 616                 pinctrl-0 = <&spi2_bus>;
 617                 status = "disabled";
 618         };
 619
 620         pwm@139D0000 {
 621                 compatible = "samsung,exynos4210-pwm";
 622                 reg = <0x139D0000 0x1000>;
 623                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 624                 clocks = <&clock CLK_PWM>;
 625                 clock-names = "timers";
 626                 #pwm-cells = <3>;
 627                 status = "disabled";
 628         };
 629
 630         amba {
 631                 #address-cells = <1>;
 632                 #size-cells = <1>;
 633                 compatible = "arm,amba-bus";
 634                 interrupt-parent = <&gic>;
 635                 ranges;
 636
 637                 pdma0: pdma@12680000 {
 638                         compatible = "arm,pl330", "arm,primecell";
 639                         reg = <0x12680000 0x1000>;
 640                         interrupts = <0 35 0>;
 641                         clocks = <&clock CLK_PDMA0>;
 642                         clock-names = "apb_pclk";
 643                         #dma-cells = <1>;
 644                         #dma-channels = <8>;
 645                         #dma-requests = <32>;
 646                 };
 647
 648                 pdma1: pdma@12690000 {
 649                         compatible = "arm,pl330", "arm,primecell";
 650                         reg = <0x12690000 0x1000>;
 651                         interrupts = <0 36 0>;
 652                         clocks = <&clock CLK_PDMA1>;
 653                         clock-names = "apb_pclk";
 654                         #dma-cells = <1>;
 655                         #dma-channels = <8>;
 656                         #dma-requests = <32>;
 657                 };
 658
 659                 mdma1: mdma@12850000 {
 660                         compatible = "arm,pl330", "arm,primecell";
 661                         reg = <0x12850000 0x1000>;
 662                         interrupts = <0 34 0>;
 663                         clocks = <&clock CLK_MDMA>;
 664                         clock-names = "apb_pclk";
 665                         #dma-cells = <1>;
 666                         #dma-channels = <8>;
 667                         #dma-requests = <1>;
 668                 };
 669         };
 670
 671         fimd: fimd@11c00000 {
 672                 compatible = "samsung,exynos4210-fimd";
 673                 interrupt-parent = <&combiner>;
 674                 reg = <0x11c00000 0x20000>;
 675                 interrupt-names = "fifo", "vsync", "lcd_sys";
 676                 interrupts = <11 0>, <11 1>, <11 2>;
 677                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 678                 clock-names = "sclk_fimd", "fimd";
 679                 power-domains = <&pd_lcd0>;
 680                 samsung,sysreg = <&sys_reg>;
 681                 status = "disabled";
 682         };
 683
 684         tmu: tmu@100C0000 {
 685                 #include "exynos4412-tmu-sensor-conf.dtsi"
 686         };
 687
 688         hdmi: hdmi@12D00000 {
 689                 compatible = "samsung,exynos4210-hdmi";
 690                 reg = <0x12D00000 0x70000>;
 691                 interrupts = <0 92 0>;
 692                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
 693                         "mout_hdmi";
 694                 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
 695                         <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
 696                         <&clock CLK_MOUT_HDMI>;
 697                 phy = <&hdmi_i2c_phy>;
 698                 power-domains = <&pd_tv>;
 699                 samsung,syscon-phandle = <&pmu_system_controller>;
 700                 status = "disabled";
 701         };
 702
 703         mixer: mixer@12C10000 {
 704                 compatible = "samsung,exynos4210-mixer";
 705                 interrupts = <0 91 0>;
 706                 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
 707                 power-domains = <&pd_tv>;
 708                 status = "disabled";
 709         };
 710
 711         ppmu_dmc0: ppmu_dmc0@106a0000 {
 712                 compatible = "samsung,exynos-ppmu";
 713                 reg = <0x106a0000 0x2000>;
 714                 clocks = <&clock CLK_PPMUDMC0>;
 715                 clock-names = "ppmu";
 716                 status = "disabled";
 717         };
 718
 719         ppmu_dmc1: ppmu_dmc1@106b0000 {
 720                 compatible = "samsung,exynos-ppmu";
 721                 reg = <0x106b0000 0x2000>;
 722                 clocks = <&clock CLK_PPMUDMC1>;
 723                 clock-names = "ppmu";
 724                 status = "disabled";
 725         };
 726
 727         ppmu_cpu: ppmu_cpu@106c0000 {
 728                 compatible = "samsung,exynos-ppmu";
 729                 reg = <0x106c0000 0x2000>;
 730                 clocks = <&clock CLK_PPMUCPU>;
 731                 clock-names = "ppmu";
 732                 status = "disabled";
 733         };
 734
 735         ppmu_acp: ppmu_acp@10ae0000 {
 736                 compatible = "samsung,exynos-ppmu";
 737                 reg = <0x106e0000 0x2000>;
 738                 status = "disabled";
 739         };
 740
 741         ppmu_rightbus: ppmu_rightbus@112a0000 {
 742                 compatible = "samsung,exynos-ppmu";
 743                 reg = <0x112a0000 0x2000>;
 744                 clocks = <&clock CLK_PPMURIGHT>;
 745                 clock-names = "ppmu";
 746                 status = "disabled";
 747         };
 748
 749         ppmu_leftbus: ppmu_leftbus0@116a0000 {
 750                 compatible = "samsung,exynos-ppmu";
 751                 reg = <0x116a0000 0x2000>;
 752                 clocks = <&clock CLK_PPMULEFT>;
 753                 clock-names = "ppmu";
 754                 status = "disabled";
 755         };
 756
 757         ppmu_camif: ppmu_camif@11ac0000 {
 758                 compatible = "samsung,exynos-ppmu";
 759                 reg = <0x11ac0000 0x2000>;
 760                 clocks = <&clock CLK_PPMUCAMIF>;
 761                 clock-names = "ppmu";
 762                 status = "disabled";
 763         };
 764
 765         ppmu_lcd0: ppmu_lcd0@11e40000 {
 766                 compatible = "samsung,exynos-ppmu";
 767                 reg = <0x11e40000 0x2000>;
 768                 clocks = <&clock CLK_PPMULCD0>;
 769                 clock-names = "ppmu";
 770                 status = "disabled";
 771         };
 772
 773         ppmu_fsys: ppmu_g3d@12630000 {
 774                 compatible = "samsung,exynos-ppmu";
 775                 reg = <0x12630000 0x2000>;
 776                 status = "disabled";
 777         };
 778
 779         ppmu_image: ppmu_image@12aa0000 {
 780                 compatible = "samsung,exynos-ppmu";
 781                 reg = <0x12aa0000 0x2000>;
 782                 clocks = <&clock CLK_PPMUIMAGE>;
 783                 clock-names = "ppmu";
 784                 status = "disabled";
 785         };
 786
 787         ppmu_tv: ppmu_tv@12e40000 {
 788                 compatible = "samsung,exynos-ppmu";
 789                 reg = <0x12e40000 0x2000>;
 790                 clocks = <&clock CLK_PPMUTV>;
 791                 clock-names = "ppmu";
 792                 status = "disabled";
 793         };
 794
 795         ppmu_g3d: ppmu_g3d@13220000 {
 796                 compatible = "samsung,exynos-ppmu";
 797                 reg = <0x13220000 0x2000>;
 798                 clocks = <&clock CLK_PPMUG3D>;
 799                 clock-names = "ppmu";
 800                 status = "disabled";
 801         };
 802
 803         ppmu_mfc_left: ppmu_mfc_left@13660000 {
 804                 compatible = "samsung,exynos-ppmu";
 805                 reg = <0x13660000 0x2000>;
 806                 clocks = <&clock CLK_PPMUMFC_L>;
 807                 clock-names = "ppmu";
 808                 status = "disabled";
 809         };
 810
 811         ppmu_mfc_right: ppmu_mfc_right@13670000 {
 812                 compatible = "samsung,exynos-ppmu";
 813                 reg = <0x13670000 0x2000>;
 814                 clocks = <&clock CLK_PPMUMFC_R>;
 815                 clock-names = "ppmu";
 816                 status = "disabled";
 817         };
 818 };