]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - arch/arm/boot/dts/exynos4412-odroid-common.dtsi
Merge branches 'clk-stm32mp1', 'clk-samsung', 'clk-uniphier-mpeg', 'clk-stratix10...
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / exynos4412-odroid-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5 */
6
7 #include <dt-bindings/sound/samsung-i2s.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include "exynos4412.dtsi"
11 #include "exynos4412-ppmu-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include "exynos-mfc-reserved-memory.dtsi"
14
15 / {
16 chosen {
17 stdout-path = &serial_1;
18 };
19
20 firmware@204f000 {
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
23 };
24
25 gpio_keys {
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
29
30 power_key {
31 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_POWER>;
33 label = "power key";
34 debounce-interval = <10>;
35 wakeup-source;
36 };
37 };
38
39 sound: sound {
40 compatible = "simple-audio-card";
41
42 simple-audio-card,format = "i2s";
43 simple-audio-card,bitclock-master = <&link0_codec>;
44 simple-audio-card,frame-master = <&link0_codec>;
45
46 simple-audio-card,cpu {
47 sound-dai = <&i2s0 0>;
48 system-clock-frequency = <19200000>;
49 };
50
51 link0_codec: simple-audio-card,codec {
52 sound-dai = <&max98090>;
53 clocks = <&i2s0 CLK_I2S_CDCLK>;
54 };
55 };
56
57 emmc_pwrseq: pwrseq {
58 pinctrl-0 = <&sd1_cd>;
59 pinctrl-names = "default";
60 compatible = "mmc-pwrseq-emmc";
61 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
62 };
63
64 fixed-rate-clocks {
65 xxti {
66 compatible = "samsung,clock-xxti";
67 clock-frequency = <0>;
68 };
69
70 xusbxti {
71 compatible = "samsung,clock-xusbxti";
72 clock-frequency = <24000000>;
73 };
74 };
75
76 thermal-zones {
77 cpu_thermal: cpu-thermal {
78 cooling-maps {
79 cooling_map0: map0 {
80 /* Corresponds to 800MHz at freq_table */
81 cooling-device = <&cpu0 7 7>;
82 };
83 cooling_map1: map1 {
84 /* Corresponds to 200MHz at freq_table */
85 cooling-device = <&cpu0 13 13>;
86 };
87 };
88 };
89 };
90 };
91
92 &bus_dmc {
93 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
94 vdd-supply = <&buck1_reg>;
95 status = "okay";
96 };
97
98 &bus_acp {
99 devfreq = <&bus_dmc>;
100 status = "okay";
101 };
102
103 &bus_c2c {
104 devfreq = <&bus_dmc>;
105 status = "okay";
106 };
107
108 &bus_leftbus {
109 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
110 vdd-supply = <&buck3_reg>;
111 status = "okay";
112 };
113
114 &bus_rightbus {
115 devfreq = <&bus_leftbus>;
116 status = "okay";
117 };
118
119 &bus_display {
120 devfreq = <&bus_leftbus>;
121 status = "okay";
122 };
123
124 &bus_fsys {
125 devfreq = <&bus_leftbus>;
126 status = "okay";
127 };
128
129 &bus_peri {
130 devfreq = <&bus_leftbus>;
131 status = "okay";
132 };
133
134 &bus_mfc {
135 devfreq = <&bus_leftbus>;
136 status = "okay";
137 };
138
139 &camera {
140 status = "okay";
141 pinctrl-names = "default";
142 pinctrl-0 = <>;
143 };
144
145 &clock_audss {
146 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
147 <&clock_audss EXYNOS_MOUT_I2S>,
148 <&clock_audss EXYNOS_DOUT_SRP>,
149 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
150 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
151 <&clock_audss EXYNOS_MOUT_AUDSS>;
152 assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
153 };
154
155 &cpu0 {
156 cpu0-supply = <&buck2_reg>;
157 };
158
159 /* RSTN signal for eMMC */
160 &sd1_cd {
161 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
162 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163 };
164
165 &pinctrl_1 {
166 gpio_power_key: power_key {
167 samsung,pins = "gpx1-3";
168 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
169 };
170
171 max77686_irq: max77686-irq {
172 samsung,pins = "gpx3-2";
173 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
174 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
175 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
176 };
177
178 hdmi_hpd: hdmi-hpd {
179 samsung,pins = "gpx3-7";
180 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
181 };
182 };
183
184 &ehci {
185 status = "okay";
186 };
187
188 &exynos_usbphy {
189 status = "okay";
190 };
191
192 &fimc_0 {
193 status = "okay";
194 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
195 <&clock CLK_SCLK_FIMC0>;
196 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
197 assigned-clock-rates = <0>, <176000000>;
198 };
199
200 &fimc_1 {
201 status = "okay";
202 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
203 <&clock CLK_SCLK_FIMC1>;
204 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
205 assigned-clock-rates = <0>, <176000000>;
206 };
207
208 &fimc_2 {
209 status = "okay";
210 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
211 <&clock CLK_SCLK_FIMC2>;
212 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
213 assigned-clock-rates = <0>, <176000000>;
214 };
215
216 &fimc_3 {
217 status = "okay";
218 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
219 <&clock CLK_SCLK_FIMC3>;
220 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221 assigned-clock-rates = <0>, <176000000>;
222 };
223
224 &hdmi {
225 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&hdmi_hpd>;
228 vdd-supply = <&ldo8_reg>;
229 vdd_osc-supply = <&ldo10_reg>;
230 vdd_pll-supply = <&ldo8_reg>;
231 ddc = <&i2c_2>;
232 status = "okay";
233 };
234
235 &hdmicec {
236 status = "okay";
237 };
238
239 &hsotg {
240 dr_mode = "peripheral";
241 status = "okay";
242 vusb_d-supply = <&ldo15_reg>;
243 vusb_a-supply = <&ldo12_reg>;
244 };
245
246 &i2c_0 {
247 samsung,i2c-sda-delay = <100>;
248 samsung,i2c-max-bus-freq = <400000>;
249 status = "okay";
250
251 usb3503: usb3503@8 {
252 compatible = "smsc,usb3503";
253 reg = <0x08>;
254
255 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
256 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
257 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
258 initial-mode = <1>;
259 };
260
261 max77686: pmic@9 {
262 compatible = "maxim,max77686";
263 interrupt-parent = <&gpx3>;
264 interrupts = <2 IRQ_TYPE_NONE>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&max77686_irq>;
267 reg = <0x09>;
268 #clock-cells = <1>;
269
270 voltage-regulators {
271 ldo1_reg: LDO1 {
272 regulator-name = "VDD_ALIVE_1.0V";
273 regulator-min-microvolt = <1000000>;
274 regulator-max-microvolt = <1000000>;
275 regulator-always-on;
276 };
277
278 ldo2_reg: LDO2 {
279 regulator-name = "VDDQ_M1_2_1.8V";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
282 regulator-always-on;
283 };
284
285 ldo3_reg: LDO3 {
286 regulator-name = "VDDQ_EXT_1.8V";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-always-on;
290 };
291
292 ldo4_reg: LDO4 {
293 regulator-name = "VDDQ_MMC2_2.8V";
294 regulator-min-microvolt = <2800000>;
295 regulator-max-microvolt = <2800000>;
296 regulator-boot-on;
297 };
298
299 ldo5_reg: LDO5 {
300 regulator-name = "VDDQ_MMC1_3_1.8V";
301 regulator-min-microvolt = <1800000>;
302 regulator-max-microvolt = <1800000>;
303 regulator-always-on;
304 regulator-boot-on;
305 };
306
307 ldo6_reg: LDO6 {
308 regulator-name = "VDD10_MPLL_1.0V";
309 regulator-min-microvolt = <1000000>;
310 regulator-max-microvolt = <1000000>;
311 regulator-always-on;
312 };
313
314 ldo7_reg: LDO7 {
315 regulator-name = "VDD10_XPLL_1.0V";
316 regulator-min-microvolt = <1000000>;
317 regulator-max-microvolt = <1000000>;
318 regulator-always-on;
319 };
320
321 ldo8_reg: LDO8 {
322 regulator-name = "VDD10_HDMI_1.0V";
323 regulator-min-microvolt = <1000000>;
324 regulator-max-microvolt = <1000000>;
325 };
326
327 ldo10_reg: LDO10 {
328 regulator-name = "VDDQ_MIPIHSI_1.8V";
329 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <1800000>;
331 };
332
333 ldo11_reg: LDO11 {
334 regulator-name = "VDD18_ABB1_1.8V";
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-always-on;
338 };
339
340 ldo12_reg: LDO12 {
341 regulator-name = "VDD33_USB_3.3V";
342 regulator-min-microvolt = <3300000>;
343 regulator-max-microvolt = <3300000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldo13_reg: LDO13 {
349 regulator-name = "VDDQ_C2C_W_1.8V";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-always-on;
353 regulator-boot-on;
354 };
355
356 ldo14_reg: LDO14 {
357 regulator-name = "VDD18_ABB0_2_1.8V";
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-always-on;
361 regulator-boot-on;
362 };
363
364 ldo15_reg: LDO15 {
365 regulator-name = "VDD10_HSIC_1.0V";
366 regulator-min-microvolt = <1000000>;
367 regulator-max-microvolt = <1000000>;
368 regulator-always-on;
369 regulator-boot-on;
370 };
371
372 ldo16_reg: LDO16 {
373 regulator-name = "VDD18_HSIC_1.8V";
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-always-on;
377 regulator-boot-on;
378 };
379
380 ldo20_reg: LDO20 {
381 regulator-name = "LDO20_1.8V";
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <1800000>;
384 regulator-boot-on;
385 };
386
387 ldo21_reg: LDO21 {
388 regulator-name = "TFLASH_2.8V";
389 regulator-min-microvolt = <2800000>;
390 regulator-max-microvolt = <2800000>;
391 regulator-boot-on;
392 };
393
394 ldo22_reg: LDO22 {
395 /*
396 * Only U3 uses it, so let it define the
397 * constraints
398 */
399 regulator-name = "LDO22";
400 regulator-boot-on;
401 };
402
403 ldo25_reg: LDO25 {
404 regulator-name = "VDDQ_LCD_1.8V";
405 regulator-min-microvolt = <1800000>;
406 regulator-max-microvolt = <1800000>;
407 regulator-always-on;
408 regulator-boot-on;
409 };
410
411 buck1_reg: BUCK1 {
412 regulator-name = "vdd_mif";
413 regulator-min-microvolt = <900000>;
414 regulator-max-microvolt = <1100000>;
415 regulator-always-on;
416 regulator-boot-on;
417 };
418
419 buck2_reg: BUCK2 {
420 regulator-name = "vdd_arm";
421 regulator-min-microvolt = <900000>;
422 regulator-max-microvolt = <1350000>;
423 regulator-always-on;
424 regulator-boot-on;
425 };
426
427 buck3_reg: BUCK3 {
428 regulator-name = "vdd_int";
429 regulator-min-microvolt = <900000>;
430 regulator-max-microvolt = <1050000>;
431 regulator-always-on;
432 regulator-boot-on;
433 };
434
435 buck4_reg: BUCK4 {
436 regulator-name = "vdd_g3d";
437 regulator-min-microvolt = <900000>;
438 regulator-max-microvolt = <1100000>;
439 regulator-microvolt-offset = <50000>;
440 };
441
442 buck5_reg: BUCK5 {
443 regulator-name = "VDDQ_CKEM1_2_1.2V";
444 regulator-min-microvolt = <1200000>;
445 regulator-max-microvolt = <1200000>;
446 regulator-always-on;
447 regulator-boot-on;
448 };
449
450 buck6_reg: BUCK6 {
451 regulator-name = "BUCK6_1.35V";
452 regulator-min-microvolt = <1350000>;
453 regulator-max-microvolt = <1350000>;
454 regulator-always-on;
455 regulator-boot-on;
456 };
457
458 buck7_reg: BUCK7 {
459 regulator-name = "BUCK7_2.0V";
460 regulator-min-microvolt = <2000000>;
461 regulator-max-microvolt = <2000000>;
462 regulator-always-on;
463 };
464
465 buck8_reg: BUCK8 {
466 /*
467 * Constraints set by specific board: X,
468 * X2 and U3.
469 */
470 regulator-name = "BUCK8_2.8V";
471 };
472 };
473 };
474 };
475
476 &i2c_1 {
477 status = "okay";
478 max98090: max98090@10 {
479 compatible = "maxim,max98090";
480 reg = <0x10>;
481 interrupt-parent = <&gpx0>;
482 interrupts = <0 IRQ_TYPE_NONE>;
483 clocks = <&i2s0 CLK_I2S_CDCLK>;
484 clock-names = "mclk";
485 #sound-dai-cells = <0>;
486 };
487 };
488
489 &i2c_2 {
490 status = "okay";
491 };
492
493 &i2c_8 {
494 status = "okay";
495 };
496
497 &i2s0 {
498 pinctrl-0 = <&i2s0_bus>;
499 pinctrl-names = "default";
500 status = "okay";
501 };
502
503 &mixer {
504 status = "okay";
505 };
506
507 &mshc_0 {
508 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
509 pinctrl-names = "default";
510 vmmc-supply = <&ldo20_reg>;
511 mmc-pwrseq = <&emmc_pwrseq>;
512 status = "okay";
513
514 broken-cd;
515 card-detect-delay = <200>;
516 samsung,dw-mshc-ciu-div = <3>;
517 samsung,dw-mshc-sdr-timing = <2 3>;
518 samsung,dw-mshc-ddr-timing = <1 2>;
519 bus-width = <8>;
520 cap-mmc-highspeed;
521 };
522
523 &rtc {
524 status = "okay";
525 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
526 clock-names = "rtc", "rtc_src";
527 };
528
529 &sdhci_2 {
530 bus-width = <4>;
531 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
532 pinctrl-names = "default";
533 vmmc-supply = <&ldo21_reg>;
534 vqmmc-supply = <&ldo4_reg>;
535 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
536 cd-inverted;
537 status = "okay";
538 };
539
540 &serial_0 {
541 status = "okay";
542 };
543
544 &serial_1 {
545 status = "okay";
546 };
547
548 &tmu {
549 vtmu-supply = <&ldo10_reg>;
550 status = "okay";
551 };