arch/arm/boot/dts/exynos5410-smdk5410.dts

   1 /*
   2  * SAMSUNG SMDK5410 board device tree source
   3  *
   4  * Copyright (c) 2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 /dts-v1/;
  13 #include "exynos5410.dtsi"
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 / {
  16         model = "Samsung SMDK5410 board based on EXYNOS5410";
  17         compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
  18
  19         memory@40000000 {
  20                 device_type = "memory";
  21                 reg = <0x40000000 0x80000000>;
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttySAC2,115200";
  26         };
  27
  28         fin_pll: xxti {
  29                 compatible = "fixed-clock";
  30                 clock-frequency = <24000000>;
  31                 clock-output-names = "fin_pll";
  32                 #clock-cells = <0>;
  33         };
  34
  35         firmware@02037000 {
  36                 compatible = "samsung,secure-firmware";
  37                 reg = <0x02037000 0x1000>;
  38         };
  39
  40 };
  41
  42 &mmc_0 {
  43         status = "okay";
  44         num-slots = <1>;
  45         cap-mmc-highspeed;
  46         broken-cd;
  47         card-detect-delay = <200>;
  48         samsung,dw-mshc-ciu-div = <3>;
  49         samsung,dw-mshc-sdr-timing = <2 3>;
  50         samsung,dw-mshc-ddr-timing = <1 2>;
  51         bus-width = <8>;
  52 };
  53
  54 &mmc_2 {
  55         status = "okay";
  56         num-slots = <1>;
  57         cap-sd-highspeed;
  58         card-detect-delay = <200>;
  59         samsung,dw-mshc-ciu-div = <3>;
  60         samsung,dw-mshc-sdr-timing = <2 3>;
  61         samsung,dw-mshc-ddr-timing = <1 2>;
  62         bus-width = <4>;
  63         disable-wp;
  64 };
  65
  66 &pinctrl_0 {
  67         srom_ctl: srom-ctl {
  68                 samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
  69                                "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
  70                 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  71                 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  72         };
  73
  74         srom_ebi: srom-ebi {
  75                 samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
  76                                "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
  77                                "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
  78                                "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
  79                                "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
  80                                "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
  81                 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  82                 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  83                 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  84         };
  85 };
  86
  87 &sromc {
  88         pinctrl-names = "default";
  89         pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
  90
  91         ethernet@3,0 {
  92                 compatible = "smsc,lan9115";
  93                 reg = <3 0 0x10000>;
  94                 phy-mode = "mii";
  95                 interrupt-parent = <&gpx0>;
  96                 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
  97                 reg-io-width = <2>;
  98                 smsc,irq-push-pull;
  99                 smsc,force-internal-phy;
 100
 101                 samsung,srom-page-mode;
 102                 samsung,srom-timing = <9 12 1 9 1 1>;
 103         };
 104 };
 105
 106 &serial_0 {
 107         status = "okay";
 108 };
 109
 110 &serial_1 {
 111         status = "okay";
 112 };
 113
 114 &serial_2 {
 115         status = "okay";
 116 };