2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /include/ "skeleton.dtsi"
15 interrupt-parent = <&icoll>;
27 compatible = "arm,arm926ejs";
32 compatible = "simple-bus";
35 reg = <0x80000000 0x80000>;
39 compatible = "simple-bus";
42 reg = <0x80000000 0x40000>;
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx23-icoll", "fsl,icoll";
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
53 compatible = "fsl,imx23-dma-apbh";
54 reg = <0x80004000 0x2000>;
59 reg = <0x80008000 0x2000>;
64 compatible = "fsl,imx23-gpmi-nand";
67 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
68 reg-names = "gpmi-nand", "bch";
69 interrupts = <13>, <56>;
70 interrupt-names = "gpmi-dma", "bch";
72 fsl,gpmi-dma-channel = <4>;
77 reg = <0x80010000 0x2000>;
80 fsl,ssp-dma-channel = <1>;
85 reg = <0x80014000 0x2000>;
92 compatible = "fsl,imx23-pinctrl", "simple-bus";
93 reg = <0x80018000 0x2000>;
96 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
100 interrupt-controller;
101 #interrupt-cells = <2>;
105 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
109 interrupt-controller;
110 #interrupt-cells = <2>;
114 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
118 interrupt-controller;
119 #interrupt-cells = <2>;
122 duart_pins_a: duart@0 {
125 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
126 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
128 fsl,drive-strength = <0>;
133 auart0_pins_a: auart0@0 {
136 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
137 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
138 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
139 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
141 fsl,drive-strength = <0>;
146 auart0_2pins_a: auart0-2pins@0 {
149 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
150 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
152 fsl,drive-strength = <0>;
157 gpmi_pins_a: gpmi-nand@0 {
160 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
161 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
162 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
163 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
164 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
165 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
166 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
167 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
168 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
169 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
170 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
171 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
172 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
173 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
174 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
175 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
176 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
178 fsl,drive-strength = <0>;
183 gpmi_pins_fixup: gpmi-pins-fixup {
185 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
186 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
187 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
189 fsl,drive-strength = <2>;
192 mmc0_4bit_pins_a: mmc0-4bit@0 {
195 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
196 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
197 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
198 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
199 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
200 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
202 fsl,drive-strength = <1>;
207 mmc0_8bit_pins_a: mmc0-8bit@0 {
210 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
211 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
212 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
213 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
214 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
215 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
216 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
217 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
218 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
219 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
220 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
222 fsl,drive-strength = <1>;
227 mmc0_pins_fixup: mmc0-pins-fixup {
229 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
230 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
235 pwm2_pins_a: pwm2@0 {
238 0x11c0 /* MX23_PAD_PWM2__PWM2 */
240 fsl,drive-strength = <0>;
245 lcdif_24bit_pins_a: lcdif-24bit@0 {
248 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
249 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
250 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
251 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
252 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
253 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
254 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
255 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
256 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
257 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
258 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
259 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
260 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
261 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
262 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
263 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
264 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
265 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
266 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
267 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
268 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
269 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
270 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
271 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
272 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
273 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
274 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
275 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
277 fsl,drive-strength = <0>;
284 reg = <0x8001c000 2000>;
289 reg = <0x80020000 0x2000>;
294 compatible = "fsl,imx23-dma-apbx";
295 reg = <0x80024000 0x2000>;
300 reg = <0x80028000 0x2000>;
305 reg = <0x8002a000 0x2000>;
310 reg = <0x8002c000 0x2000>;
315 reg = <0x8002e000 0x2000>;
320 compatible = "fsl,imx23-lcdif";
321 reg = <0x80030000 2000>;
322 interrupts = <46 45>;
328 reg = <0x80034000 0x2000>;
331 fsl,ssp-dma-channel = <2>;
336 reg = <0x80038000 0x2000>;
342 compatible = "simple-bus";
343 #address-cells = <1>;
345 reg = <0x80040000 0x40000>;
348 clks: clkctrl@80040000 {
349 compatible = "fsl,imx23-clkctrl";
350 reg = <0x80040000 0x2000>;
354 saif0: saif@80042000 {
355 reg = <0x80042000 0x2000>;
360 reg = <0x80044000 0x2000>;
364 saif1: saif@80046000 {
365 reg = <0x80046000 0x2000>;
370 reg = <0x80048000 0x2000>;
375 reg = <0x8004c000 0x2000>;
380 reg = <0x80050000 0x2000>;
385 reg = <0x80054000 2000>;
390 reg = <0x80058000 0x2000>;
395 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
396 reg = <0x8005c000 0x2000>;
401 compatible = "fsl,imx23-pwm";
402 reg = <0x80064000 0x2000>;
405 fsl,pwm-number = <5>;
410 compatible = "fsl,imx23-timrot", "fsl,timrot";
411 reg = <0x80068000 0x2000>;
412 interrupts = <28 29 30 31>;
415 auart0: serial@8006c000 {
416 compatible = "fsl,imx23-auart";
417 reg = <0x8006c000 0x2000>;
418 interrupts = <24 25 23>;
423 auart1: serial@8006e000 {
424 compatible = "fsl,imx23-auart";
425 reg = <0x8006e000 0x2000>;
426 interrupts = <59 60 58>;
431 duart: serial@80070000 {
432 compatible = "arm,pl011", "arm,primecell";
433 reg = <0x80070000 0x2000>;
435 clocks = <&clks 32>, <&clks 16>;
436 clock-names = "uart", "apb_pclk";
440 usbphy0: usbphy@8007c000 {
441 compatible = "fsl,imx23-usbphy";
442 reg = <0x8007c000 0x2000>;
450 compatible = "simple-bus";
451 #address-cells = <1>;
453 reg = <0x80080000 0x80000>;
457 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
458 reg = <0x80080000 0x40000>;
460 fsl,usbphy = <&usbphy0>;