1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
12 * The decompressor and also some bootloaders rely on a
13 * pre-existing /chosen node to be available to insert the
14 * command line and merge other ATAGS info.
15 * Also for U-Boot there must be a pre-existing /memory node.
18 memory { device_type = "memory"; };
52 compatible = "arm,arm926ej-s";
58 asic: asic-interrupt-controller@68000000 {
59 compatible = "fsl,imx25-asic", "fsl,avic";
61 #interrupt-cells = <1>;
62 reg = <0x68000000 0x8000000>;
67 compatible = "fsl,imx-osc", "fixed-clock";
69 clock-frequency = <24000000>;
76 compatible = "simple-bus";
77 interrupt-parent = <&asic>;
80 aips@43f00000 { /* AIPS1 */
81 compatible = "fsl,aips-bus", "simple-bus";
84 reg = <0x43f00000 0x100000>;
87 aips1: bridge@43f00000 {
88 compatible = "fsl,imx25-aips";
89 reg = <0x43f00000 0x4000>;
95 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
96 reg = <0x43f80000 0x4000>;
104 #address-cells = <1>;
106 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
107 reg = <0x43f84000 0x4000>;
115 compatible = "fsl,imx25-flexcan";
116 reg = <0x43f88000 0x4000>;
118 clocks = <&clks 75>, <&clks 75>;
119 clock-names = "ipg", "per";
124 compatible = "fsl,imx25-flexcan";
125 reg = <0x43f8c000 0x4000>;
127 clocks = <&clks 76>, <&clks 76>;
128 clock-names = "ipg", "per";
132 uart1: serial@43f90000 {
133 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
134 reg = <0x43f90000 0x4000>;
136 clocks = <&clks 120>, <&clks 57>;
137 clock-names = "ipg", "per";
141 uart2: serial@43f94000 {
142 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
143 reg = <0x43f94000 0x4000>;
145 clocks = <&clks 121>, <&clks 57>;
146 clock-names = "ipg", "per";
151 #address-cells = <1>;
153 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
154 reg = <0x43f98000 0x4000>;
162 #address-cells = <1>;
164 reg = <0x43f9c000 0x4000>;
171 spi1: cspi@43fa4000 {
172 #address-cells = <1>;
174 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
175 reg = <0x43fa4000 0x4000>;
176 clocks = <&clks 78>, <&clks 78>;
177 clock-names = "ipg", "per";
183 #address-cells = <1>;
185 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
186 reg = <0x43fa8000 0x4000>;
187 clocks = <&clks 102>;
193 iomuxc: iomuxc@43fac000 {
194 compatible = "fsl,imx25-iomuxc";
195 reg = <0x43fac000 0x4000>;
198 audmux: audmux@43fb0000 {
199 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
200 reg = <0x43fb0000 0x4000>;
206 compatible = "fsl,spba-bus", "simple-bus";
207 #address-cells = <1>;
209 reg = <0x50000000 0x40000>;
212 spi3: cspi@50004000 {
213 #address-cells = <1>;
215 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
216 reg = <0x50004000 0x4000>;
218 clocks = <&clks 80>, <&clks 80>;
219 clock-names = "ipg", "per";
223 uart4: serial@50008000 {
224 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
225 reg = <0x50008000 0x4000>;
227 clocks = <&clks 123>, <&clks 57>;
228 clock-names = "ipg", "per";
232 uart3: serial@5000c000 {
233 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
234 reg = <0x5000c000 0x4000>;
236 clocks = <&clks 122>, <&clks 57>;
237 clock-names = "ipg", "per";
241 spi2: cspi@50010000 {
242 #address-cells = <1>;
244 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
245 reg = <0x50010000 0x4000>;
246 clocks = <&clks 79>, <&clks 79>;
247 clock-names = "ipg", "per";
253 #sound-dai-cells = <0>;
254 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
255 reg = <0x50014000 0x4000>;
257 clocks = <&clks 118>;
259 dmas = <&sdma 24 1 0>,
261 dma-names = "rx", "tx";
262 fsl,fifo-depth = <15>;
267 reg = <0x50018000 0x4000>;
271 uart5: serial@5002c000 {
272 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
273 reg = <0x5002c000 0x4000>;
275 clocks = <&clks 124>, <&clks 57>;
276 clock-names = "ipg", "per";
280 tscadc: tscadc@50030000 {
281 compatible = "fsl,imx25-tsadc";
282 reg = <0x50030000 0xc>;
284 clocks = <&clks 119>;
286 interrupt-controller;
287 #interrupt-cells = <1>;
288 #address-cells = <1>;
294 compatible = "fsl,imx25-gcq";
295 reg = <0x50030800 0x60>;
296 interrupt-parent = <&tscadc>;
298 #address-cells = <1>;
304 compatible = "fsl,imx25-tcq";
305 reg = <0x50030400 0x60>;
306 interrupt-parent = <&tscadc>;
314 #sound-dai-cells = <0>;
315 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
316 reg = <0x50034000 0x4000>;
318 clocks = <&clks 117>;
320 dmas = <&sdma 28 1 0>,
322 dma-names = "rx", "tx";
323 fsl,fifo-depth = <15>;
327 fec: ethernet@50038000 {
328 compatible = "fsl,imx25-fec";
329 reg = <0x50038000 0x4000>;
331 clocks = <&clks 88>, <&clks 65>;
332 clock-names = "ipg", "ahb";
337 aips@53f00000 { /* AIPS2 */
338 compatible = "fsl,aips-bus", "simple-bus";
339 #address-cells = <1>;
341 reg = <0x53f00000 0x100000>;
344 aips2: bridge@53f00000 {
345 compatible = "fsl,imx25-aips";
346 reg = <0x53f00000 0x4000>;
350 compatible = "fsl,imx25-ccm";
351 reg = <0x53f80000 0x4000>;
356 gpt4: timer@53f84000 {
357 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
358 reg = <0x53f84000 0x4000>;
359 clocks = <&clks 95>, <&clks 47>;
360 clock-names = "ipg", "per";
364 gpt3: timer@53f88000 {
365 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
366 reg = <0x53f88000 0x4000>;
367 clocks = <&clks 94>, <&clks 47>;
368 clock-names = "ipg", "per";
372 gpt2: timer@53f8c000 {
373 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
374 reg = <0x53f8c000 0x4000>;
375 clocks = <&clks 93>, <&clks 47>;
376 clock-names = "ipg", "per";
380 gpt1: timer@53f90000 {
381 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
382 reg = <0x53f90000 0x4000>;
383 clocks = <&clks 92>, <&clks 47>;
384 clock-names = "ipg", "per";
388 epit1: timer@53f94000 {
389 compatible = "fsl,imx25-epit";
390 reg = <0x53f94000 0x4000>;
394 epit2: timer@53f98000 {
395 compatible = "fsl,imx25-epit";
396 reg = <0x53f98000 0x4000>;
400 gpio4: gpio@53f9c000 {
401 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
402 reg = <0x53f9c000 0x4000>;
406 interrupt-controller;
407 #interrupt-cells = <2>;
411 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
413 reg = <0x53fa0000 0x4000>;
414 clocks = <&clks 106>, <&clks 52>;
415 clock-names = "ipg", "per";
419 gpio3: gpio@53fa4000 {
420 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
421 reg = <0x53fa4000 0x4000>;
425 interrupt-controller;
426 #interrupt-cells = <2>;
430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
432 reg = <0x53fa8000 0x4000>;
433 clocks = <&clks 107>, <&clks 52>;
434 clock-names = "ipg", "per";
438 scc: crypto@53fac000 {
439 compatible = "fsl,imx25-scc";
440 reg = <0x53fac000 0x4000>;
441 clocks = <&clks 111>;
443 interrupts = <49>, <50>;
444 interrupt-names = "scm", "smn";
447 rngb: rngb@53fb0000 {
448 compatible = "fsl,imx25-rngb";
449 reg = <0x53fb0000 0x4000>;
450 clocks = <&clks 109>;
454 esdhc1: esdhc@53fb4000 {
455 compatible = "fsl,imx25-esdhc";
456 reg = <0x53fb4000 0x4000>;
458 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
459 clock-names = "ipg", "ahb", "per";
463 esdhc2: esdhc@53fb8000 {
464 compatible = "fsl,imx25-esdhc";
465 reg = <0x53fb8000 0x4000>;
467 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
468 clock-names = "ipg", "ahb", "per";
472 lcdc: lcdc@53fbc000 {
473 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
474 reg = <0x53fbc000 0x4000>;
476 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
477 clock-names = "ipg", "ahb", "per";
482 reg = <0x53fc0000 0x4000>;
488 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
490 reg = <0x53fc8000 0x4000>;
491 clocks = <&clks 108>, <&clks 52>;
492 clock-names = "ipg", "per";
496 gpio1: gpio@53fcc000 {
497 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
498 reg = <0x53fcc000 0x4000>;
502 interrupt-controller;
503 #interrupt-cells = <2>;
506 gpio2: gpio@53fd0000 {
507 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
508 reg = <0x53fd0000 0x4000>;
512 interrupt-controller;
513 #interrupt-cells = <2>;
516 sdma: sdma@53fd4000 {
517 compatible = "fsl,imx25-sdma";
518 reg = <0x53fd4000 0x4000>;
519 clocks = <&clks 112>, <&clks 68>;
520 clock-names = "ipg", "ahb";
523 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
527 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
528 reg = <0x53fdc000 0x4000>;
529 clocks = <&clks 126>;
535 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
537 reg = <0x53fe0000 0x4000>;
538 clocks = <&clks 105>, <&clks 52>;
539 clock-names = "ipg", "per";
544 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
545 reg = <0x53ff0000 0x4000>;
550 usbotg: usb@53ff4000 {
551 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
552 reg = <0x53ff4000 0x0200>;
554 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
555 clock-names = "ipg", "ahb", "per";
556 fsl,usbmisc = <&usbmisc 0>;
557 fsl,usbphy = <&usbphy0>;
563 usbhost1: usb@53ff4400 {
564 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
565 reg = <0x53ff4400 0x0200>;
567 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
568 clock-names = "ipg", "ahb", "per";
569 fsl,usbmisc = <&usbmisc 1>;
570 fsl,usbphy = <&usbphy1>;
574 usbmisc: usbmisc@53ff4600 {
576 compatible = "fsl,imx25-usbmisc";
577 reg = <0x53ff4600 0x00f>;
581 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
582 reg = <0x53ffc000 0x4000>;
585 interrupts = <25 56>;
589 iram: sram@78000000 {
590 compatible = "mmio-sram";
591 reg = <0x78000000 0x20000>;
595 compatible = "fsl,emi-bus", "simple-bus";
596 #address-cells = <1>;
598 reg = <0x80000000 0x3b002000>;
602 #address-cells = <1>;
605 compatible = "fsl,imx25-nand";
606 reg = <0xbb000000 0x2000>;
616 compatible = "simple-bus";
617 #address-cells = <1>;
622 compatible = "usb-nop-xceiv";
628 compatible = "usb-nop-xceiv";