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1 /*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include <dt-bindings/gpio/gpio.h>
13 #include "imx25-pinfunc.h"
14
15 / {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 /*
19 * The decompressor and also some bootloaders rely on a
20 * pre-existing /chosen node to be available to insert the
21 * command line and merge other ATAGS info.
22 * Also for U-Boot there must be a pre-existing /memory node.
23 */
24 chosen {};
25 memory { device_type = "memory"; reg = <0 0>; };
26
27 aliases {
28 ethernet0 = &fec;
29 gpio0 = &gpio1;
30 gpio1 = &gpio2;
31 gpio2 = &gpio3;
32 gpio3 = &gpio4;
33 i2c0 = &i2c1;
34 i2c1 = &i2c2;
35 i2c2 = &i2c3;
36 mmc0 = &esdhc1;
37 mmc1 = &esdhc2;
38 pwm0 = &pwm1;
39 pwm1 = &pwm2;
40 pwm2 = &pwm3;
41 pwm3 = &pwm4;
42 serial0 = &uart1;
43 serial1 = &uart2;
44 serial2 = &uart3;
45 serial3 = &uart4;
46 serial4 = &uart5;
47 spi0 = &spi1;
48 spi1 = &spi2;
49 spi2 = &spi3;
50 usb0 = &usbotg;
51 usb1 = &usbhost1;
52 };
53
54 cpus {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 cpu@0 {
59 compatible = "arm,arm926ej-s";
60 device_type = "cpu";
61 reg = <0>;
62 };
63 };
64
65 asic: asic-interrupt-controller@68000000 {
66 compatible = "fsl,imx25-asic", "fsl,avic";
67 interrupt-controller;
68 #interrupt-cells = <1>;
69 reg = <0x68000000 0x8000000>;
70 };
71
72 clocks {
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 osc {
77 compatible = "fsl,imx-osc", "fixed-clock";
78 #clock-cells = <0>;
79 clock-frequency = <24000000>;
80 };
81 };
82
83 soc {
84 #address-cells = <1>;
85 #size-cells = <1>;
86 compatible = "simple-bus";
87 interrupt-parent = <&asic>;
88 ranges;
89
90 aips@43f00000 { /* AIPS1 */
91 compatible = "fsl,aips-bus", "simple-bus";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 reg = <0x43f00000 0x100000>;
95 ranges;
96
97 aips1: bridge@43f00000 {
98 compatible = "fsl,imx25-aips";
99 reg = <0x43f00000 0x4000>;
100 };
101
102 i2c1: i2c@43f80000 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
106 reg = <0x43f80000 0x4000>;
107 clocks = <&clks 48>;
108 clock-names = "";
109 interrupts = <3>;
110 status = "disabled";
111 };
112
113 i2c3: i2c@43f84000 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
117 reg = <0x43f84000 0x4000>;
118 clocks = <&clks 48>;
119 clock-names = "";
120 interrupts = <10>;
121 status = "disabled";
122 };
123
124 can1: can@43f88000 {
125 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
126 reg = <0x43f88000 0x4000>;
127 interrupts = <43>;
128 clocks = <&clks 75>, <&clks 75>;
129 clock-names = "ipg", "per";
130 status = "disabled";
131 };
132
133 can2: can@43f8c000 {
134 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
135 reg = <0x43f8c000 0x4000>;
136 interrupts = <44>;
137 clocks = <&clks 76>, <&clks 76>;
138 clock-names = "ipg", "per";
139 status = "disabled";
140 };
141
142 uart1: serial@43f90000 {
143 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
144 reg = <0x43f90000 0x4000>;
145 interrupts = <45>;
146 clocks = <&clks 120>, <&clks 57>;
147 clock-names = "ipg", "per";
148 status = "disabled";
149 };
150
151 uart2: serial@43f94000 {
152 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
153 reg = <0x43f94000 0x4000>;
154 interrupts = <32>;
155 clocks = <&clks 121>, <&clks 57>;
156 clock-names = "ipg", "per";
157 status = "disabled";
158 };
159
160 i2c2: i2c@43f98000 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
164 reg = <0x43f98000 0x4000>;
165 clocks = <&clks 48>;
166 clock-names = "";
167 interrupts = <4>;
168 status = "disabled";
169 };
170
171 owire@43f9c000 {
172 #address-cells = <1>;
173 #size-cells = <0>;
174 reg = <0x43f9c000 0x4000>;
175 clocks = <&clks 51>;
176 clock-names = "";
177 interrupts = <2>;
178 status = "disabled";
179 };
180
181 spi1: cspi@43fa4000 {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
185 reg = <0x43fa4000 0x4000>;
186 clocks = <&clks 78>, <&clks 78>;
187 clock-names = "ipg", "per";
188 interrupts = <14>;
189 status = "disabled";
190 };
191
192 kpp: kpp@43fa8000 {
193 #address-cells = <1>;
194 #size-cells = <0>;
195 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
196 reg = <0x43fa8000 0x4000>;
197 clocks = <&clks 102>;
198 clock-names = "";
199 interrupts = <24>;
200 status = "disabled";
201 };
202
203 iomuxc: iomuxc@43fac000 {
204 compatible = "fsl,imx25-iomuxc";
205 reg = <0x43fac000 0x4000>;
206 };
207
208 audmux: audmux@43fb0000 {
209 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
210 reg = <0x43fb0000 0x4000>;
211 status = "disabled";
212 };
213 };
214
215 spba@50000000 {
216 compatible = "fsl,spba-bus", "simple-bus";
217 #address-cells = <1>;
218 #size-cells = <1>;
219 reg = <0x50000000 0x40000>;
220 ranges;
221
222 spi3: cspi@50004000 {
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
226 reg = <0x50004000 0x4000>;
227 interrupts = <0>;
228 clocks = <&clks 80>, <&clks 80>;
229 clock-names = "ipg", "per";
230 status = "disabled";
231 };
232
233 uart4: serial@50008000 {
234 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
235 reg = <0x50008000 0x4000>;
236 interrupts = <5>;
237 clocks = <&clks 123>, <&clks 57>;
238 clock-names = "ipg", "per";
239 status = "disabled";
240 };
241
242 uart3: serial@5000c000 {
243 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
244 reg = <0x5000c000 0x4000>;
245 interrupts = <18>;
246 clocks = <&clks 122>, <&clks 57>;
247 clock-names = "ipg", "per";
248 status = "disabled";
249 };
250
251 spi2: cspi@50010000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
255 reg = <0x50010000 0x4000>;
256 clocks = <&clks 79>, <&clks 79>;
257 clock-names = "ipg", "per";
258 interrupts = <13>;
259 status = "disabled";
260 };
261
262 ssi2: ssi@50014000 {
263 #sound-dai-cells = <0>;
264 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
265 reg = <0x50014000 0x4000>;
266 interrupts = <11>;
267 clocks = <&clks 118>;
268 clock-names = "ipg";
269 dmas = <&sdma 24 1 0>,
270 <&sdma 25 1 0>;
271 dma-names = "rx", "tx";
272 status = "disabled";
273 };
274
275 esai@50018000 {
276 reg = <0x50018000 0x4000>;
277 interrupts = <7>;
278 };
279
280 uart5: serial@5002c000 {
281 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
282 reg = <0x5002c000 0x4000>;
283 interrupts = <40>;
284 clocks = <&clks 124>, <&clks 57>;
285 clock-names = "ipg", "per";
286 status = "disabled";
287 };
288
289 tscadc: tscadc@50030000 {
290 compatible = "fsl,imx25-tsadc";
291 reg = <0x50030000 0xc>;
292 interrupts = <46>;
293 clocks = <&clks 119>;
294 clock-names = "ipg";
295 interrupt-controller;
296 #interrupt-cells = <1>;
297 #address-cells = <1>;
298 #size-cells = <1>;
299 status = "disabled";
300
301 adc: adc@50030800 {
302 compatible = "fsl,imx25-gcq";
303 reg = <0x50030800 0x60>;
304 interrupt-parent = <&tscadc>;
305 interrupts = <1>;
306 #address-cells = <1>;
307 #size-cells = <0>;
308 status = "disabled";
309 };
310
311 tsc: tcq@50030400 {
312 compatible = "fsl,imx25-tcq";
313 reg = <0x50030400 0x60>;
314 interrupt-parent = <&tscadc>;
315 interrupts = <0>;
316 fsl,wires = <4>;
317 status = "disabled";
318 };
319 };
320
321 ssi1: ssi@50034000 {
322 #sound-dai-cells = <0>;
323 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
324 reg = <0x50034000 0x4000>;
325 interrupts = <12>;
326 clocks = <&clks 117>;
327 clock-names = "ipg";
328 dmas = <&sdma 28 1 0>,
329 <&sdma 29 1 0>;
330 dma-names = "rx", "tx";
331 status = "disabled";
332 };
333
334 fec: ethernet@50038000 {
335 compatible = "fsl,imx25-fec";
336 reg = <0x50038000 0x4000>;
337 interrupts = <57>;
338 clocks = <&clks 88>, <&clks 65>;
339 clock-names = "ipg", "ahb";
340 status = "disabled";
341 };
342 };
343
344 aips@53f00000 { /* AIPS2 */
345 compatible = "fsl,aips-bus", "simple-bus";
346 #address-cells = <1>;
347 #size-cells = <1>;
348 reg = <0x53f00000 0x100000>;
349 ranges;
350
351 aips2: bridge@53f00000 {
352 compatible = "fsl,imx25-aips";
353 reg = <0x53f00000 0x4000>;
354 };
355
356 clks: ccm@53f80000 {
357 compatible = "fsl,imx25-ccm";
358 reg = <0x53f80000 0x4000>;
359 interrupts = <31>;
360 #clock-cells = <1>;
361 };
362
363 gpt4: timer@53f84000 {
364 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
365 reg = <0x53f84000 0x4000>;
366 clocks = <&clks 95>, <&clks 47>;
367 clock-names = "ipg", "per";
368 interrupts = <1>;
369 };
370
371 gpt3: timer@53f88000 {
372 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
373 reg = <0x53f88000 0x4000>;
374 clocks = <&clks 94>, <&clks 47>;
375 clock-names = "ipg", "per";
376 interrupts = <29>;
377 };
378
379 gpt2: timer@53f8c000 {
380 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
381 reg = <0x53f8c000 0x4000>;
382 clocks = <&clks 93>, <&clks 47>;
383 clock-names = "ipg", "per";
384 interrupts = <53>;
385 };
386
387 gpt1: timer@53f90000 {
388 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
389 reg = <0x53f90000 0x4000>;
390 clocks = <&clks 92>, <&clks 47>;
391 clock-names = "ipg", "per";
392 interrupts = <54>;
393 };
394
395 epit1: timer@53f94000 {
396 compatible = "fsl,imx25-epit";
397 reg = <0x53f94000 0x4000>;
398 interrupts = <28>;
399 };
400
401 epit2: timer@53f98000 {
402 compatible = "fsl,imx25-epit";
403 reg = <0x53f98000 0x4000>;
404 interrupts = <27>;
405 };
406
407 gpio4: gpio@53f9c000 {
408 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
409 reg = <0x53f9c000 0x4000>;
410 interrupts = <23>;
411 gpio-controller;
412 #gpio-cells = <2>;
413 interrupt-controller;
414 #interrupt-cells = <2>;
415 };
416
417 pwm2: pwm@53fa0000 {
418 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
419 #pwm-cells = <2>;
420 reg = <0x53fa0000 0x4000>;
421 clocks = <&clks 106>, <&clks 52>;
422 clock-names = "ipg", "per";
423 interrupts = <36>;
424 };
425
426 gpio3: gpio@53fa4000 {
427 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
428 reg = <0x53fa4000 0x4000>;
429 interrupts = <16>;
430 gpio-controller;
431 #gpio-cells = <2>;
432 interrupt-controller;
433 #interrupt-cells = <2>;
434 };
435
436 pwm3: pwm@53fa8000 {
437 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
438 #pwm-cells = <2>;
439 reg = <0x53fa8000 0x4000>;
440 clocks = <&clks 107>, <&clks 52>;
441 clock-names = "ipg", "per";
442 interrupts = <41>;
443 };
444
445 scc: crypto@53fac000 {
446 compatible = "fsl,imx25-scc";
447 reg = <0x53fac000 0x4000>;
448 clocks = <&clks 111>;
449 clock-names = "ipg";
450 interrupts = <49>, <50>;
451 interrupt-names = "scm", "smn";
452 };
453
454 esdhc1: esdhc@53fb4000 {
455 compatible = "fsl,imx25-esdhc";
456 reg = <0x53fb4000 0x4000>;
457 interrupts = <9>;
458 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
459 clock-names = "ipg", "ahb", "per";
460 status = "disabled";
461 };
462
463 esdhc2: esdhc@53fb8000 {
464 compatible = "fsl,imx25-esdhc";
465 reg = <0x53fb8000 0x4000>;
466 interrupts = <8>;
467 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
468 clock-names = "ipg", "ahb", "per";
469 status = "disabled";
470 };
471
472 lcdc: lcdc@53fbc000 {
473 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
474 reg = <0x53fbc000 0x4000>;
475 interrupts = <39>;
476 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
477 clock-names = "ipg", "ahb", "per";
478 status = "disabled";
479 };
480
481 slcdc@53fc0000 {
482 reg = <0x53fc0000 0x4000>;
483 interrupts = <38>;
484 status = "disabled";
485 };
486
487 pwm4: pwm@53fc8000 {
488 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
489 #pwm-cells = <2>;
490 reg = <0x53fc8000 0x4000>;
491 clocks = <&clks 108>, <&clks 52>;
492 clock-names = "ipg", "per";
493 interrupts = <42>;
494 };
495
496 gpio1: gpio@53fcc000 {
497 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
498 reg = <0x53fcc000 0x4000>;
499 interrupts = <52>;
500 gpio-controller;
501 #gpio-cells = <2>;
502 interrupt-controller;
503 #interrupt-cells = <2>;
504 };
505
506 gpio2: gpio@53fd0000 {
507 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
508 reg = <0x53fd0000 0x4000>;
509 interrupts = <51>;
510 gpio-controller;
511 #gpio-cells = <2>;
512 interrupt-controller;
513 #interrupt-cells = <2>;
514 };
515
516 sdma: sdma@53fd4000 {
517 compatible = "fsl,imx25-sdma";
518 reg = <0x53fd4000 0x4000>;
519 clocks = <&clks 112>, <&clks 68>;
520 clock-names = "ipg", "ahb";
521 #dma-cells = <3>;
522 interrupts = <34>;
523 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
524 };
525
526 wdog@53fdc000 {
527 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
528 reg = <0x53fdc000 0x4000>;
529 clocks = <&clks 126>;
530 clock-names = "";
531 interrupts = <55>;
532 };
533
534 pwm1: pwm@53fe0000 {
535 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
536 #pwm-cells = <2>;
537 reg = <0x53fe0000 0x4000>;
538 clocks = <&clks 105>, <&clks 52>;
539 clock-names = "ipg", "per";
540 interrupts = <26>;
541 };
542
543 iim: iim@53ff0000 {
544 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
545 reg = <0x53ff0000 0x4000>;
546 interrupts = <19>;
547 clocks = <&clks 99>;
548 };
549
550 usbotg: usb@53ff4000 {
551 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
552 reg = <0x53ff4000 0x0200>;
553 interrupts = <37>;
554 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
555 clock-names = "ipg", "ahb", "per";
556 fsl,usbmisc = <&usbmisc 0>;
557 fsl,usbphy = <&usbphy0>;
558 phy_type = "utmi";
559 dr_mode = "otg";
560 status = "disabled";
561 };
562
563 usbhost1: usb@53ff4400 {
564 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
565 reg = <0x53ff4400 0x0200>;
566 interrupts = <35>;
567 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
568 clock-names = "ipg", "ahb", "per";
569 fsl,usbmisc = <&usbmisc 1>;
570 fsl,usbphy = <&usbphy1>;
571 status = "disabled";
572 };
573
574 usbmisc: usbmisc@53ff4600 {
575 #index-cells = <1>;
576 compatible = "fsl,imx25-usbmisc";
577 reg = <0x53ff4600 0x00f>;
578 };
579
580 dryice@53ffc000 {
581 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
582 reg = <0x53ffc000 0x4000>;
583 clocks = <&clks 81>;
584 clock-names = "ipg";
585 interrupts = <25 56>;
586 };
587 };
588
589 iram: sram@78000000 {
590 compatible = "mmio-sram";
591 reg = <0x78000000 0x20000>;
592 };
593
594 emi@80000000 {
595 compatible = "fsl,emi-bus", "simple-bus";
596 #address-cells = <1>;
597 #size-cells = <1>;
598 reg = <0x80000000 0x3b002000>;
599 ranges;
600
601 nfc: nand@bb000000 {
602 #address-cells = <1>;
603 #size-cells = <1>;
604
605 compatible = "fsl,imx25-nand";
606 reg = <0xbb000000 0x2000>;
607 clocks = <&clks 50>;
608 clock-names = "";
609 interrupts = <33>;
610 status = "disabled";
611 };
612 };
613 };
614
615 usbphy {
616 compatible = "simple-bus";
617 #address-cells = <1>;
618 #size-cells = <0>;
619
620 usbphy0: usb-phy@0 {
621 reg = <0>;
622 compatible = "usb-nop-xceiv";
623 };
624
625 usbphy1: usb-phy@1 {
626 reg = <1>;
627 compatible = "usb-nop-xceiv";
628 };
629 };
630 };