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1 /*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include "skeleton.dtsi"
13 #include "imx25-pinfunc.h"
14
15 / {
16 aliases {
17 ethernet0 = &fec;
18 gpio0 = &gpio1;
19 gpio1 = &gpio2;
20 gpio2 = &gpio3;
21 gpio3 = &gpio4;
22 i2c0 = &i2c1;
23 i2c1 = &i2c2;
24 i2c2 = &i2c3;
25 mmc0 = &esdhc1;
26 mmc1 = &esdhc2;
27 pwm0 = &pwm1;
28 pwm1 = &pwm2;
29 pwm2 = &pwm3;
30 pwm3 = &pwm4;
31 serial0 = &uart1;
32 serial1 = &uart2;
33 serial2 = &uart3;
34 serial3 = &uart4;
35 serial4 = &uart5;
36 spi0 = &spi1;
37 spi1 = &spi2;
38 spi2 = &spi3;
39 usb0 = &usbotg;
40 usb1 = &usbhost1;
41 };
42
43 cpus {
44 #address-cells = <0>;
45 #size-cells = <0>;
46
47 cpu {
48 compatible = "arm,arm926ej-s";
49 device_type = "cpu";
50 };
51 };
52
53 asic: asic-interrupt-controller@68000000 {
54 compatible = "fsl,imx25-asic", "fsl,avic";
55 interrupt-controller;
56 #interrupt-cells = <1>;
57 reg = <0x68000000 0x8000000>;
58 };
59
60 clocks {
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 osc {
65 compatible = "fsl,imx-osc", "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <24000000>;
68 };
69 };
70
71 soc {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "simple-bus";
75 interrupt-parent = <&asic>;
76 ranges;
77
78 aips@43f00000 { /* AIPS1 */
79 compatible = "fsl,aips-bus", "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 reg = <0x43f00000 0x100000>;
83 ranges;
84
85 i2c1: i2c@43f80000 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
89 reg = <0x43f80000 0x4000>;
90 clocks = <&clks 48>;
91 clock-names = "";
92 interrupts = <3>;
93 status = "disabled";
94 };
95
96 i2c3: i2c@43f84000 {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
100 reg = <0x43f84000 0x4000>;
101 clocks = <&clks 48>;
102 clock-names = "";
103 interrupts = <10>;
104 status = "disabled";
105 };
106
107 can1: can@43f88000 {
108 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
109 reg = <0x43f88000 0x4000>;
110 interrupts = <43>;
111 clocks = <&clks 75>, <&clks 75>;
112 clock-names = "ipg", "per";
113 status = "disabled";
114 };
115
116 can2: can@43f8c000 {
117 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
118 reg = <0x43f8c000 0x4000>;
119 interrupts = <44>;
120 clocks = <&clks 76>, <&clks 76>;
121 clock-names = "ipg", "per";
122 status = "disabled";
123 };
124
125 uart1: serial@43f90000 {
126 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
127 reg = <0x43f90000 0x4000>;
128 interrupts = <45>;
129 clocks = <&clks 120>, <&clks 57>;
130 clock-names = "ipg", "per";
131 status = "disabled";
132 };
133
134 uart2: serial@43f94000 {
135 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
136 reg = <0x43f94000 0x4000>;
137 interrupts = <32>;
138 clocks = <&clks 121>, <&clks 57>;
139 clock-names = "ipg", "per";
140 status = "disabled";
141 };
142
143 i2c2: i2c@43f98000 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
147 reg = <0x43f98000 0x4000>;
148 clocks = <&clks 48>;
149 clock-names = "";
150 interrupts = <4>;
151 status = "disabled";
152 };
153
154 owire@43f9c000 {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 reg = <0x43f9c000 0x4000>;
158 clocks = <&clks 51>;
159 clock-names = "";
160 interrupts = <2>;
161 status = "disabled";
162 };
163
164 spi1: cspi@43fa4000 {
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
168 reg = <0x43fa4000 0x4000>;
169 clocks = <&clks 78>, <&clks 78>;
170 clock-names = "ipg", "per";
171 interrupts = <14>;
172 status = "disabled";
173 };
174
175 kpp: kpp@43fa8000 {
176 #address-cells = <1>;
177 #size-cells = <0>;
178 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
179 reg = <0x43fa8000 0x4000>;
180 clocks = <&clks 102>;
181 clock-names = "";
182 interrupts = <24>;
183 status = "disabled";
184 };
185
186 iomuxc: iomuxc@43fac000 {
187 compatible = "fsl,imx25-iomuxc";
188 reg = <0x43fac000 0x4000>;
189 };
190
191 audmux: audmux@43fb0000 {
192 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
193 reg = <0x43fb0000 0x4000>;
194 status = "disabled";
195 };
196 };
197
198 spba@50000000 {
199 compatible = "fsl,spba-bus", "simple-bus";
200 #address-cells = <1>;
201 #size-cells = <1>;
202 reg = <0x50000000 0x40000>;
203 ranges;
204
205 spi3: cspi@50004000 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
209 reg = <0x50004000 0x4000>;
210 interrupts = <0>;
211 clocks = <&clks 80>, <&clks 80>;
212 clock-names = "ipg", "per";
213 status = "disabled";
214 };
215
216 uart4: serial@50008000 {
217 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
218 reg = <0x50008000 0x4000>;
219 interrupts = <5>;
220 clocks = <&clks 123>, <&clks 57>;
221 clock-names = "ipg", "per";
222 status = "disabled";
223 };
224
225 uart3: serial@5000c000 {
226 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
227 reg = <0x5000c000 0x4000>;
228 interrupts = <18>;
229 clocks = <&clks 122>, <&clks 57>;
230 clock-names = "ipg", "per";
231 status = "disabled";
232 };
233
234 spi2: cspi@50010000 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
238 reg = <0x50010000 0x4000>;
239 clocks = <&clks 79>, <&clks 79>;
240 clock-names = "ipg", "per";
241 interrupts = <13>;
242 status = "disabled";
243 };
244
245 ssi2: ssi@50014000 {
246 #sound-dai-cells = <0>;
247 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
248 reg = <0x50014000 0x4000>;
249 interrupts = <11>;
250 clocks = <&clks 118>;
251 clock-names = "ipg";
252 dmas = <&sdma 24 1 0>,
253 <&sdma 25 1 0>;
254 dma-names = "rx", "tx";
255 status = "disabled";
256 };
257
258 esai@50018000 {
259 reg = <0x50018000 0x4000>;
260 interrupts = <7>;
261 };
262
263 uart5: serial@5002c000 {
264 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
265 reg = <0x5002c000 0x4000>;
266 interrupts = <40>;
267 clocks = <&clks 124>, <&clks 57>;
268 clock-names = "ipg", "per";
269 status = "disabled";
270 };
271
272 tsc: tsc@50030000 {
273 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
274 reg = <0x50030000 0x4000>;
275 interrupts = <46>;
276 clocks = <&clks 119>;
277 clock-names = "ipg";
278 status = "disabled";
279 };
280
281 ssi1: ssi@50034000 {
282 #sound-dai-cells = <0>;
283 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
284 reg = <0x50034000 0x4000>;
285 interrupts = <12>;
286 clocks = <&clks 117>;
287 clock-names = "ipg";
288 dmas = <&sdma 28 1 0>,
289 <&sdma 29 1 0>;
290 dma-names = "rx", "tx";
291 status = "disabled";
292 };
293
294 fec: ethernet@50038000 {
295 compatible = "fsl,imx25-fec";
296 reg = <0x50038000 0x4000>;
297 interrupts = <57>;
298 clocks = <&clks 88>, <&clks 65>;
299 clock-names = "ipg", "ahb";
300 status = "disabled";
301 };
302 };
303
304 aips@53f00000 { /* AIPS2 */
305 compatible = "fsl,aips-bus", "simple-bus";
306 #address-cells = <1>;
307 #size-cells = <1>;
308 reg = <0x53f00000 0x100000>;
309 ranges;
310
311 clks: ccm@53f80000 {
312 compatible = "fsl,imx25-ccm";
313 reg = <0x53f80000 0x4000>;
314 interrupts = <31>;
315 #clock-cells = <1>;
316 };
317
318 gpt4: timer@53f84000 {
319 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
320 reg = <0x53f84000 0x4000>;
321 clocks = <&clks 95>, <&clks 47>;
322 clock-names = "ipg", "per";
323 interrupts = <1>;
324 };
325
326 gpt3: timer@53f88000 {
327 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
328 reg = <0x53f88000 0x4000>;
329 clocks = <&clks 94>, <&clks 47>;
330 clock-names = "ipg", "per";
331 interrupts = <29>;
332 };
333
334 gpt2: timer@53f8c000 {
335 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
336 reg = <0x53f8c000 0x4000>;
337 clocks = <&clks 93>, <&clks 47>;
338 clock-names = "ipg", "per";
339 interrupts = <53>;
340 };
341
342 gpt1: timer@53f90000 {
343 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
344 reg = <0x53f90000 0x4000>;
345 clocks = <&clks 92>, <&clks 47>;
346 clock-names = "ipg", "per";
347 interrupts = <54>;
348 };
349
350 epit1: timer@53f94000 {
351 compatible = "fsl,imx25-epit";
352 reg = <0x53f94000 0x4000>;
353 interrupts = <28>;
354 };
355
356 epit2: timer@53f98000 {
357 compatible = "fsl,imx25-epit";
358 reg = <0x53f98000 0x4000>;
359 interrupts = <27>;
360 };
361
362 gpio4: gpio@53f9c000 {
363 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
364 reg = <0x53f9c000 0x4000>;
365 interrupts = <23>;
366 gpio-controller;
367 #gpio-cells = <2>;
368 interrupt-controller;
369 #interrupt-cells = <2>;
370 };
371
372 pwm2: pwm@53fa0000 {
373 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
374 #pwm-cells = <2>;
375 reg = <0x53fa0000 0x4000>;
376 clocks = <&clks 106>, <&clks 52>;
377 clock-names = "ipg", "per";
378 interrupts = <36>;
379 };
380
381 gpio3: gpio@53fa4000 {
382 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
383 reg = <0x53fa4000 0x4000>;
384 interrupts = <16>;
385 gpio-controller;
386 #gpio-cells = <2>;
387 interrupt-controller;
388 #interrupt-cells = <2>;
389 };
390
391 pwm3: pwm@53fa8000 {
392 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
393 #pwm-cells = <2>;
394 reg = <0x53fa8000 0x4000>;
395 clocks = <&clks 107>, <&clks 52>;
396 clock-names = "ipg", "per";
397 interrupts = <41>;
398 };
399
400 esdhc1: esdhc@53fb4000 {
401 compatible = "fsl,imx25-esdhc";
402 reg = <0x53fb4000 0x4000>;
403 interrupts = <9>;
404 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
405 clock-names = "ipg", "ahb", "per";
406 status = "disabled";
407 };
408
409 esdhc2: esdhc@53fb8000 {
410 compatible = "fsl,imx25-esdhc";
411 reg = <0x53fb8000 0x4000>;
412 interrupts = <8>;
413 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
414 clock-names = "ipg", "ahb", "per";
415 status = "disabled";
416 };
417
418 lcdc: lcdc@53fbc000 {
419 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
420 reg = <0x53fbc000 0x4000>;
421 interrupts = <39>;
422 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
423 clock-names = "ipg", "ahb", "per";
424 status = "disabled";
425 };
426
427 slcdc@53fc0000 {
428 reg = <0x53fc0000 0x4000>;
429 interrupts = <38>;
430 status = "disabled";
431 };
432
433 pwm4: pwm@53fc8000 {
434 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
435 #pwm-cells = <2>;
436 reg = <0x53fc8000 0x4000>;
437 clocks = <&clks 108>, <&clks 52>;
438 clock-names = "ipg", "per";
439 interrupts = <42>;
440 };
441
442 gpio1: gpio@53fcc000 {
443 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
444 reg = <0x53fcc000 0x4000>;
445 interrupts = <52>;
446 gpio-controller;
447 #gpio-cells = <2>;
448 interrupt-controller;
449 #interrupt-cells = <2>;
450 };
451
452 gpio2: gpio@53fd0000 {
453 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
454 reg = <0x53fd0000 0x4000>;
455 interrupts = <51>;
456 gpio-controller;
457 #gpio-cells = <2>;
458 interrupt-controller;
459 #interrupt-cells = <2>;
460 };
461
462 sdma: sdma@53fd4000 {
463 compatible = "fsl,imx25-sdma";
464 reg = <0x53fd4000 0x4000>;
465 clocks = <&clks 112>, <&clks 68>;
466 clock-names = "ipg", "ahb";
467 #dma-cells = <3>;
468 interrupts = <34>;
469 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
470 };
471
472 wdog@53fdc000 {
473 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
474 reg = <0x53fdc000 0x4000>;
475 clocks = <&clks 126>;
476 clock-names = "";
477 interrupts = <55>;
478 };
479
480 pwm1: pwm@53fe0000 {
481 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
482 #pwm-cells = <2>;
483 reg = <0x53fe0000 0x4000>;
484 clocks = <&clks 105>, <&clks 52>;
485 clock-names = "ipg", "per";
486 interrupts = <26>;
487 };
488
489 iim: iim@53ff0000 {
490 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
491 reg = <0x53ff0000 0x4000>;
492 interrupts = <19>;
493 clocks = <&clks 99>;
494 };
495
496 usbotg: usb@53ff4000 {
497 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
498 reg = <0x53ff4000 0x0200>;
499 interrupts = <37>;
500 clocks = <&clks 70>;
501 fsl,usbmisc = <&usbmisc 0>;
502 fsl,usbphy = <&usbphy0>;
503 status = "disabled";
504 };
505
506 usbhost1: usb@53ff4400 {
507 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
508 reg = <0x53ff4400 0x0200>;
509 interrupts = <35>;
510 clocks = <&clks 70>;
511 fsl,usbmisc = <&usbmisc 1>;
512 fsl,usbphy = <&usbphy1>;
513 status = "disabled";
514 };
515
516 usbmisc: usbmisc@53ff4600 {
517 #index-cells = <1>;
518 compatible = "fsl,imx25-usbmisc";
519 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
520 clock-names = "ipg", "ahb", "per";
521 reg = <0x53ff4600 0x00f>;
522 };
523
524 dryice@53ffc000 {
525 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
526 reg = <0x53ffc000 0x4000>;
527 clocks = <&clks 81>;
528 clock-names = "ipg";
529 interrupts = <25>;
530 };
531 };
532
533 iram: sram@78000000 {
534 compatible = "mmio-sram";
535 reg = <0x78000000 0x20000>;
536 };
537
538 emi@80000000 {
539 compatible = "fsl,emi-bus", "simple-bus";
540 #address-cells = <1>;
541 #size-cells = <1>;
542 reg = <0x80000000 0x3b002000>;
543 ranges;
544
545 nfc: nand@bb000000 {
546 #address-cells = <1>;
547 #size-cells = <1>;
548
549 compatible = "fsl,imx25-nand";
550 reg = <0xbb000000 0x2000>;
551 clocks = <&clks 50>;
552 clock-names = "";
553 interrupts = <33>;
554 status = "disabled";
555 };
556 };
557 };
558
559 usbphy {
560 compatible = "simple-bus";
561 #address-cells = <1>;
562 #size-cells = <0>;
563
564 usbphy0: usb-phy@0 {
565 reg = <0>;
566 compatible = "usb-nop-xceiv";
567 };
568
569 usbphy1: usb-phy@1 {
570 reg = <1>;
571 compatible = "usb-nop-xceiv";
572 };
573 };
574 };