]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - arch/arm/boot/dts/imx27.dtsi
projects / mirror_ubuntu-eoan-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ARM: dts: imx27: use label to override osc26m clock setting
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / imx27.dtsi
1 /*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include "imx27-pinfunc.h"
13
14 #include <dt-bindings/clock/imx27-clock.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18
19 / {
20 #address-cells = <1>;
21 #size-cells = <1>;
22 /*
23 * The decompressor and also some bootloaders rely on a
24 * pre-existing /chosen node to be available to insert the
25 * command line and merge other ATAGS info.
26 * Also for U-Boot there must be a pre-existing /memory node.
27 */
28 chosen {};
29 memory { device_type = "memory"; };
30
31 aliases {
32 ethernet0 = &fec;
33 gpio0 = &gpio1;
34 gpio1 = &gpio2;
35 gpio2 = &gpio3;
36 gpio3 = &gpio4;
37 gpio4 = &gpio5;
38 gpio5 = &gpio6;
39 i2c0 = &i2c1;
40 i2c1 = &i2c2;
41 serial0 = &uart1;
42 serial1 = &uart2;
43 serial2 = &uart3;
44 serial3 = &uart4;
45 serial4 = &uart5;
46 serial5 = &uart6;
47 spi0 = &cspi1;
48 spi1 = &cspi2;
49 spi2 = &cspi3;
50 };
51
52 aitc: aitc-interrupt-controller@e0000000 {
53 compatible = "fsl,imx27-aitc", "fsl,avic";
54 interrupt-controller;
55 #interrupt-cells = <1>;
56 reg = <0x10040000 0x1000>;
57 };
58
59 clocks {
60 clk_osc26m: osc26m {
61 compatible = "fsl,imx-osc26m", "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <26000000>;
64 };
65 };
66
67 cpus {
68 #size-cells = <0>;
69 #address-cells = <1>;
70
71 cpu: cpu@0 {
72 device_type = "cpu";
73 reg = <0>;
74 compatible = "arm,arm926ej-s";
75 operating-points = <
76 /* kHz uV */
77 266000 1300000
78 399000 1450000
79 >;
80 clock-latency = <62500>;
81 clocks = <&clks IMX27_CLK_CPU_DIV>;
82 voltage-tolerance = <5>;
83 };
84 };
85
86 soc {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "simple-bus";
90 interrupt-parent = <&aitc>;
91 ranges;
92
93 aipi@10000000 { /* AIPI1 */
94 compatible = "fsl,aipi-bus", "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 reg = <0x10000000 0x20000>;
98 ranges;
99
100 dma: dma@10001000 {
101 compatible = "fsl,imx27-dma";
102 reg = <0x10001000 0x1000>;
103 interrupts = <32>;
104 clocks = <&clks IMX27_CLK_DMA_IPG_GATE>,
105 <&clks IMX27_CLK_DMA_AHB_GATE>;
106 clock-names = "ipg", "ahb";
107 #dma-cells = <1>;
108 #dma-channels = <16>;
109 };
110
111 wdog: wdog@10002000 {
112 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
113 reg = <0x10002000 0x1000>;
114 interrupts = <27>;
115 clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
116 };
117
118 gpt1: timer@10003000 {
119 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
120 reg = <0x10003000 0x1000>;
121 interrupts = <26>;
122 clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
123 <&clks IMX27_CLK_PER1_GATE>;
124 clock-names = "ipg", "per";
125 };
126
127 gpt2: timer@10004000 {
128 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
129 reg = <0x10004000 0x1000>;
130 interrupts = <25>;
131 clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
132 <&clks IMX27_CLK_PER1_GATE>;
133 clock-names = "ipg", "per";
134 };
135
136 gpt3: timer@10005000 {
137 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
138 reg = <0x10005000 0x1000>;
139 interrupts = <24>;
140 clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
141 <&clks IMX27_CLK_PER1_GATE>;
142 clock-names = "ipg", "per";
143 };
144
145 pwm: pwm@10006000 {
146 #pwm-cells = <2>;
147 compatible = "fsl,imx27-pwm";
148 reg = <0x10006000 0x1000>;
149 interrupts = <23>;
150 clocks = <&clks IMX27_CLK_PWM_IPG_GATE>,
151 <&clks IMX27_CLK_PER1_GATE>;
152 clock-names = "ipg", "per";
153 };
154
155 rtc: rtc@10007000 {
156 compatible = "fsl,imx21-rtc";
157 reg = <0x10007000 0x1000>;
158 interrupts = <22>;
159 clocks = <&clks IMX27_CLK_CKIL>,
160 <&clks IMX27_CLK_RTC_IPG_GATE>;
161 clock-names = "ref", "ipg";
162 };
163
164 kpp: kpp@10008000 {
165 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
166 reg = <0x10008000 0x1000>;
167 interrupts = <21>;
168 clocks = <&clks IMX27_CLK_KPP_IPG_GATE>;
169 status = "disabled";
170 };
171
172 owire: owire@10009000 {
173 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
174 reg = <0x10009000 0x1000>;
175 clocks = <&clks IMX27_CLK_OWIRE_IPG_GATE>;
176 status = "disabled";
177 };
178
179 uart1: serial@1000a000 {
180 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
181 reg = <0x1000a000 0x1000>;
182 interrupts = <20>;
183 clocks = <&clks IMX27_CLK_UART1_IPG_GATE>,
184 <&clks IMX27_CLK_PER1_GATE>;
185 clock-names = "ipg", "per";
186 status = "disabled";
187 };
188
189 uart2: serial@1000b000 {
190 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
191 reg = <0x1000b000 0x1000>;
192 interrupts = <19>;
193 clocks = <&clks IMX27_CLK_UART2_IPG_GATE>,
194 <&clks IMX27_CLK_PER1_GATE>;
195 clock-names = "ipg", "per";
196 status = "disabled";
197 };
198
199 uart3: serial@1000c000 {
200 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
201 reg = <0x1000c000 0x1000>;
202 interrupts = <18>;
203 clocks = <&clks IMX27_CLK_UART3_IPG_GATE>,
204 <&clks IMX27_CLK_PER1_GATE>;
205 clock-names = "ipg", "per";
206 status = "disabled";
207 };
208
209 uart4: serial@1000d000 {
210 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
211 reg = <0x1000d000 0x1000>;
212 interrupts = <17>;
213 clocks = <&clks IMX27_CLK_UART4_IPG_GATE>,
214 <&clks IMX27_CLK_PER1_GATE>;
215 clock-names = "ipg", "per";
216 status = "disabled";
217 };
218
219 cspi1: cspi@1000e000 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,imx27-cspi";
223 reg = <0x1000e000 0x1000>;
224 interrupts = <16>;
225 clocks = <&clks IMX27_CLK_CSPI1_IPG_GATE>,
226 <&clks IMX27_CLK_PER2_GATE>;
227 clock-names = "ipg", "per";
228 status = "disabled";
229 };
230
231 cspi2: cspi@1000f000 {
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "fsl,imx27-cspi";
235 reg = <0x1000f000 0x1000>;
236 interrupts = <15>;
237 clocks = <&clks IMX27_CLK_CSPI2_IPG_GATE>,
238 <&clks IMX27_CLK_PER2_GATE>;
239 clock-names = "ipg", "per";
240 status = "disabled";
241 };
242
243 ssi1: ssi@10010000 {
244 #sound-dai-cells = <0>;
245 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
246 reg = <0x10010000 0x1000>;
247 interrupts = <14>;
248 clocks = <&clks IMX27_CLK_SSI1_IPG_GATE>;
249 dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
250 dma-names = "rx0", "tx0", "rx1", "tx1";
251 fsl,fifo-depth = <8>;
252 status = "disabled";
253 };
254
255 ssi2: ssi@10011000 {
256 #sound-dai-cells = <0>;
257 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
258 reg = <0x10011000 0x1000>;
259 interrupts = <13>;
260 clocks = <&clks IMX27_CLK_SSI2_IPG_GATE>;
261 dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
262 dma-names = "rx0", "tx0", "rx1", "tx1";
263 fsl,fifo-depth = <8>;
264 status = "disabled";
265 };
266
267 i2c1: i2c@10012000 {
268 #address-cells = <1>;
269 #size-cells = <0>;
270 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
271 reg = <0x10012000 0x1000>;
272 interrupts = <12>;
273 clocks = <&clks IMX27_CLK_I2C1_IPG_GATE>;
274 status = "disabled";
275 };
276
277 sdhci1: sdhci@10013000 {
278 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
279 reg = <0x10013000 0x1000>;
280 interrupts = <11>;
281 clocks = <&clks IMX27_CLK_SDHC1_IPG_GATE>,
282 <&clks IMX27_CLK_PER2_GATE>;
283 clock-names = "ipg", "per";
284 dmas = <&dma 7>;
285 dma-names = "rx-tx";
286 status = "disabled";
287 };
288
289 sdhci2: sdhci@10014000 {
290 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
291 reg = <0x10014000 0x1000>;
292 interrupts = <10>;
293 clocks = <&clks IMX27_CLK_SDHC2_IPG_GATE>,
294 <&clks IMX27_CLK_PER2_GATE>;
295 clock-names = "ipg", "per";
296 dmas = <&dma 6>;
297 dma-names = "rx-tx";
298 status = "disabled";
299 };
300
301 iomuxc: iomuxc@10015000 {
302 compatible = "fsl,imx27-iomuxc";
303 reg = <0x10015000 0x600>;
304 #address-cells = <1>;
305 #size-cells = <1>;
306 ranges;
307
308 gpio1: gpio@10015000 {
309 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
310 reg = <0x10015000 0x100>;
311 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
312 interrupts = <8>;
313 gpio-controller;
314 #gpio-cells = <2>;
315 interrupt-controller;
316 #interrupt-cells = <2>;
317 };
318
319 gpio2: gpio@10015100 {
320 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
321 reg = <0x10015100 0x100>;
322 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
323 interrupts = <8>;
324 gpio-controller;
325 #gpio-cells = <2>;
326 interrupt-controller;
327 #interrupt-cells = <2>;
328 };
329
330 gpio3: gpio@10015200 {
331 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
332 reg = <0x10015200 0x100>;
333 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
334 interrupts = <8>;
335 gpio-controller;
336 #gpio-cells = <2>;
337 interrupt-controller;
338 #interrupt-cells = <2>;
339 };
340
341 gpio4: gpio@10015300 {
342 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
343 reg = <0x10015300 0x100>;
344 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
345 interrupts = <8>;
346 gpio-controller;
347 #gpio-cells = <2>;
348 interrupt-controller;
349 #interrupt-cells = <2>;
350 };
351
352 gpio5: gpio@10015400 {
353 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
354 reg = <0x10015400 0x100>;
355 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
356 interrupts = <8>;
357 gpio-controller;
358 #gpio-cells = <2>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
361 };
362
363 gpio6: gpio@10015500 {
364 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
365 reg = <0x10015500 0x100>;
366 clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
367 interrupts = <8>;
368 gpio-controller;
369 #gpio-cells = <2>;
370 interrupt-controller;
371 #interrupt-cells = <2>;
372 };
373 };
374
375 audmux: audmux@10016000 {
376 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
377 reg = <0x10016000 0x1000>;
378 clocks = <&clks IMX27_CLK_DUMMY>;
379 clock-names = "audmux";
380 status = "disabled";
381 };
382
383 cspi3: cspi@10017000 {
384 #address-cells = <1>;
385 #size-cells = <0>;
386 compatible = "fsl,imx27-cspi";
387 reg = <0x10017000 0x1000>;
388 interrupts = <6>;
389 clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>,
390 <&clks IMX27_CLK_PER2_GATE>;
391 clock-names = "ipg", "per";
392 status = "disabled";
393 };
394
395 gpt4: timer@10019000 {
396 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
397 reg = <0x10019000 0x1000>;
398 interrupts = <4>;
399 clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
400 <&clks IMX27_CLK_PER1_GATE>;
401 clock-names = "ipg", "per";
402 };
403
404 gpt5: timer@1001a000 {
405 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
406 reg = <0x1001a000 0x1000>;
407 interrupts = <3>;
408 clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
409 <&clks IMX27_CLK_PER1_GATE>;
410 clock-names = "ipg", "per";
411 };
412
413 uart5: serial@1001b000 {
414 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
415 reg = <0x1001b000 0x1000>;
416 interrupts = <49>;
417 clocks = <&clks IMX27_CLK_UART5_IPG_GATE>,
418 <&clks IMX27_CLK_PER1_GATE>;
419 clock-names = "ipg", "per";
420 status = "disabled";
421 };
422
423 uart6: serial@1001c000 {
424 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
425 reg = <0x1001c000 0x1000>;
426 interrupts = <48>;
427 clocks = <&clks IMX27_CLK_UART6_IPG_GATE>,
428 <&clks IMX27_CLK_PER1_GATE>;
429 clock-names = "ipg", "per";
430 status = "disabled";
431 };
432
433 i2c2: i2c@1001d000 {
434 #address-cells = <1>;
435 #size-cells = <0>;
436 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
437 reg = <0x1001d000 0x1000>;
438 interrupts = <1>;
439 clocks = <&clks IMX27_CLK_I2C2_IPG_GATE>;
440 status = "disabled";
441 };
442
443 sdhci3: sdhci@1001e000 {
444 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
445 reg = <0x1001e000 0x1000>;
446 interrupts = <9>;
447 clocks = <&clks IMX27_CLK_SDHC3_IPG_GATE>,
448 <&clks IMX27_CLK_PER2_GATE>;
449 clock-names = "ipg", "per";
450 dmas = <&dma 36>;
451 dma-names = "rx-tx";
452 status = "disabled";
453 };
454
455 gpt6: timer@1001f000 {
456 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
457 reg = <0x1001f000 0x1000>;
458 interrupts = <2>;
459 clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,
460 <&clks IMX27_CLK_PER1_GATE>;
461 clock-names = "ipg", "per";
462 };
463 };
464
465 aipi@10020000 { /* AIPI2 */
466 compatible = "fsl,aipi-bus", "simple-bus";
467 #address-cells = <1>;
468 #size-cells = <1>;
469 reg = <0x10020000 0x20000>;
470 ranges;
471
472 fb: fb@10021000 {
473 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
474 interrupts = <61>;
475 reg = <0x10021000 0x1000>;
476 clocks = <&clks IMX27_CLK_LCDC_IPG_GATE>,
477 <&clks IMX27_CLK_LCDC_AHB_GATE>,
478 <&clks IMX27_CLK_PER3_GATE>;
479 clock-names = "ipg", "ahb", "per";
480 status = "disabled";
481 };
482
483 coda: coda@10023000 {
484 compatible = "fsl,imx27-vpu", "cnm,codadx6";
485 reg = <0x10023000 0x0200>;
486 interrupts = <53>;
487 clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>,
488 <&clks IMX27_CLK_VPU_AHB_GATE>;
489 clock-names = "per", "ahb";
490 iram = <&iram>;
491 };
492
493 usbotg: usb@10024000 {
494 compatible = "fsl,imx27-usb";
495 reg = <0x10024000 0x200>;
496 interrupts = <56>;
497 clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
498 <&clks IMX27_CLK_USB_AHB_GATE>,
499 <&clks IMX27_CLK_USB_DIV>;
500 clock-names = "ipg", "ahb", "per";
501 fsl,usbmisc = <&usbmisc 0>;
502 status = "disabled";
503 };
504
505 usbh1: usb@10024200 {
506 compatible = "fsl,imx27-usb";
507 reg = <0x10024200 0x200>;
508 interrupts = <54>;
509 clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
510 <&clks IMX27_CLK_USB_AHB_GATE>,
511 <&clks IMX27_CLK_USB_DIV>;
512 clock-names = "ipg", "ahb", "per";
513 fsl,usbmisc = <&usbmisc 1>;
514 dr_mode = "host";
515 status = "disabled";
516 };
517
518 usbh2: usb@10024400 {
519 compatible = "fsl,imx27-usb";
520 reg = <0x10024400 0x200>;
521 interrupts = <55>;
522 clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
523 <&clks IMX27_CLK_USB_AHB_GATE>,
524 <&clks IMX27_CLK_USB_DIV>;
525 clock-names = "ipg", "ahb", "per";
526 fsl,usbmisc = <&usbmisc 2>;
527 dr_mode = "host";
528 status = "disabled";
529 };
530
531 usbmisc: usbmisc@10024600 {
532 #index-cells = <1>;
533 compatible = "fsl,imx27-usbmisc";
534 reg = <0x10024600 0x200>;
535 };
536
537 sahara2: sahara@10025000 {
538 compatible = "fsl,imx27-sahara";
539 reg = <0x10025000 0x1000>;
540 interrupts = <59>;
541 clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
542 <&clks IMX27_CLK_SAHARA_AHB_GATE>;
543 clock-names = "ipg", "ahb";
544 };
545
546 clks: ccm@10027000{
547 compatible = "fsl,imx27-ccm";
548 reg = <0x10027000 0x1000>;
549 #clock-cells = <1>;
550 };
551
552 iim: iim@10028000 {
553 compatible = "fsl,imx27-iim";
554 reg = <0x10028000 0x1000>;
555 interrupts = <62>;
556 clocks = <&clks IMX27_CLK_IIM_IPG_GATE>;
557 };
558
559 fec: ethernet@1002b000 {
560 compatible = "fsl,imx27-fec";
561 reg = <0x1002b000 0x1000>;
562 interrupts = <50>;
563 clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
564 <&clks IMX27_CLK_FEC_AHB_GATE>;
565 clock-names = "ipg", "ahb";
566 status = "disabled";
567 };
568 };
569
570 nfc: nand@d8000000 {
571 #address-cells = <1>;
572 #size-cells = <1>;
573 compatible = "fsl,imx27-nand";
574 reg = <0xd8000000 0x1000>;
575 interrupts = <29>;
576 clocks = <&clks IMX27_CLK_NFC_BAUD_GATE>;
577 status = "disabled";
578 };
579
580 weim: weim@d8002000 {
581 #address-cells = <2>;
582 #size-cells = <1>;
583 compatible = "fsl,imx27-weim";
584 reg = <0xd8002000 0x1000>;
585 clocks = <&clks IMX27_CLK_EMI_AHB_GATE>;
586 ranges = <
587 0 0 0xc0000000 0x08000000
588 1 0 0xc8000000 0x08000000
589 2 0 0xd0000000 0x02000000
590 3 0 0xd2000000 0x02000000
591 4 0 0xd4000000 0x02000000
592 5 0 0xd6000000 0x02000000
593 >;
594 status = "disabled";
595 };
596
597 iram: iram@ffff4c00 {
598 compatible = "mmio-sram";
599 reg = <0xffff4c00 0xb400>;
600 };
601 };
602 };
Ubuntu Eoan Linux kernel mirror