arch/arm/boot/dts/imx31.dtsi

   1 /*
   2  * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         aliases {
  17                 serial0 = &uart1;
  18                 serial1 = &uart2;
  19                 serial2 = &uart3;
  20                 serial3 = &uart4;
  21                 serial4 = &uart5;
  22         };
  23
  24         cpus {
  25                 #address-cells = <0>;
  26                 #size-cells = <0>;
  27
  28                 cpu {
  29                         compatible = "arm,arm1136jf-s";
  30                         device_type = "cpu";
  31                 };
  32         };
  33
  34         avic: avic-interrupt-controller@60000000 {
  35                 compatible = "fsl,imx31-avic", "fsl,avic";
  36                 interrupt-controller;
  37                 #interrupt-cells = <1>;
  38                 reg = <0x60000000 0x100000>;
  39         };
  40
  41         soc {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 compatible = "simple-bus";
  45                 interrupt-parent = <&avic>;
  46                 ranges;
  47
  48                 aips@43f00000 { /* AIPS1 */
  49                         compatible = "fsl,aips-bus", "simple-bus";
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52                         reg = <0x43f00000 0x100000>;
  53                         ranges;
  54
  55                         uart1: serial@43f90000 {
  56                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
  57                                 reg = <0x43f90000 0x4000>;
  58                                 interrupts = <45>;
  59                                 clocks = <&clks 10>, <&clks 30>;
  60                                 clock-names = "ipg", "per";
  61                                 status = "disabled";
  62                         };
  63
  64                         uart2: serial@43f94000 {
  65                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
  66                                 reg = <0x43f94000 0x4000>;
  67                                 interrupts = <32>;
  68                                 clocks = <&clks 10>, <&clks 31>;
  69                                 clock-names = "ipg", "per";
  70                                 status = "disabled";
  71                         };
  72
  73                         kpp: kpp@43fa8000 {
  74                                 compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
  75                                 reg = <0x43fa8000 0x4000>;
  76                                 interrupts = <24>;
  77                                 clocks = <&clks 46>;
  78                                 status = "disabled";
  79                         };
  80
  81                         uart4: serial@43fb0000 {
  82                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
  83                                 reg = <0x43fb0000 0x4000>;
  84                                 clocks = <&clks 10>, <&clks 49>;
  85                                 clock-names = "ipg", "per";
  86                                 interrupts = <46>;
  87                                 status = "disabled";
  88                         };
  89
  90                         uart5: serial@43fb4000 {
  91                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
  92                                 reg = <0x43fb4000 0x4000>;
  93                                 interrupts = <47>;
  94                                 clocks = <&clks 10>, <&clks 50>;
  95                                 clock-names = "ipg", "per";
  96                                 status = "disabled";
  97                         };
  98                 };
  99
 100                 spba@50000000 {
 101                         compatible = "fsl,spba-bus", "simple-bus";
 102                         #address-cells = <1>;
 103                         #size-cells = <1>;
 104                         reg = <0x50000000 0x100000>;
 105                         ranges;
 106
 107                         uart3: serial@5000c000 {
 108                                 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
 109                                 reg = <0x5000c000 0x4000>;
 110                                 interrupts = <18>;
 111                                 clocks = <&clks 10>, <&clks 48>;
 112                                 clock-names = "ipg", "per";
 113                                 status = "disabled";
 114                         };
 115
 116                         iim: iim@5001c000 {
 117                                 compatible = "fsl,imx31-iim", "fsl,imx27-iim";
 118                                 reg = <0x5001c000 0x1000>;
 119                                 interrupts = <19>;
 120                                 clocks = <&clks 25>;
 121                         };
 122                 };
 123
 124                 aips@53f00000 { /* AIPS2 */
 125                         compatible = "fsl,aips-bus", "simple-bus";
 126                         #address-cells = <1>;
 127                         #size-cells = <1>;
 128                         reg = <0x53f00000 0x100000>;
 129                         ranges;
 130
 131                         clks: ccm@53f80000{
 132                                 compatible = "fsl,imx31-ccm";
 133                                 reg = <0x53f80000 0x4000>;
 134                                 interrupts = <31>, <53>;
 135                                 #clock-cells = <1>;
 136                         };
 137
 138                         gpt: timer@53f90000 {
 139                                 compatible = "fsl,imx31-gpt";
 140                                 reg = <0x53f90000 0x4000>;
 141                                 interrupts = <29>;
 142                                 clocks = <&clks 10>, <&clks 22>;
 143                                 clock-names = "ipg", "per";
 144                         };
 145                 };
 146         };
 147 };