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ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
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1 /*
2 * Copyright 2012 Steffen Trumtrar, Pengutronix
3 *
4 * based on imx27.dtsi
5 *
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation.
9 */
10
11 #include "imx35-pinfunc.h"
12
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 /*
17 * The decompressor and also some bootloaders rely on a
18 * pre-existing /chosen node to be available to insert the
19 * command line and merge other ATAGS info.
20 * Also for U-Boot there must be a pre-existing /memory node.
21 */
22 chosen {};
23 memory { device_type = "memory"; reg = <0 0>; };
24
25 aliases {
26 ethernet0 = &fec;
27 gpio0 = &gpio1;
28 gpio1 = &gpio2;
29 gpio2 = &gpio3;
30 serial0 = &uart1;
31 serial1 = &uart2;
32 serial2 = &uart3;
33 spi0 = &spi1;
34 spi1 = &spi2;
35 };
36
37 cpus {
38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm1136jf-s";
43 device_type = "cpu";
44 };
45 };
46
47 avic: avic-interrupt-controller@68000000 {
48 compatible = "fsl,imx35-avic", "fsl,avic";
49 interrupt-controller;
50 #interrupt-cells = <1>;
51 reg = <0x68000000 0x10000000>;
52 };
53
54 soc {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
58 interrupt-parent = <&avic>;
59 ranges;
60
61 L2: l2-cache@30000000 {
62 compatible = "arm,l210-cache";
63 reg = <0x30000000 0x1000>;
64 cache-unified;
65 cache-level = <2>;
66 };
67
68 aips1: aips@43f00000 {
69 compatible = "fsl,aips", "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 reg = <0x43f00000 0x100000>;
73 ranges;
74
75 i2c1: i2c@43f80000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
79 reg = <0x43f80000 0x4000>;
80 clocks = <&clks 51>;
81 clock-names = "ipg_per";
82 interrupts = <10>;
83 status = "disabled";
84 };
85
86 i2c3: i2c@43f84000 {
87 #address-cells = <1>;
88 #size-cells = <0>;
89 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
90 reg = <0x43f84000 0x4000>;
91 clocks = <&clks 53>;
92 clock-names = "ipg_per";
93 interrupts = <3>;
94 status = "disabled";
95 };
96
97 uart1: serial@43f90000 {
98 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
99 reg = <0x43f90000 0x4000>;
100 clocks = <&clks 9>, <&clks 70>;
101 clock-names = "ipg", "per";
102 interrupts = <45>;
103 status = "disabled";
104 };
105
106 uart2: serial@43f94000 {
107 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
108 reg = <0x43f94000 0x4000>;
109 clocks = <&clks 9>, <&clks 71>;
110 clock-names = "ipg", "per";
111 interrupts = <32>;
112 status = "disabled";
113 };
114
115 i2c2: i2c@43f98000 {
116 #address-cells = <1>;
117 #size-cells = <0>;
118 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
119 reg = <0x43f98000 0x4000>;
120 clocks = <&clks 52>;
121 clock-names = "ipg_per";
122 interrupts = <4>;
123 status = "disabled";
124 };
125
126 ssi1: ssi@43fa0000 {
127 #sound-dai-cells = <0>;
128 compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
129 reg = <0x43fa0000 0x4000>;
130 interrupts = <11>;
131 clocks = <&clks 68>;
132 dmas = <&sdma 28 0 0>,
133 <&sdma 29 0 0>;
134 dma-names = "rx", "tx";
135 fsl,fifo-depth = <15>;
136 status = "disabled";
137 };
138
139 spi1: cspi@43fa4000 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 35 &clks 35>;
145 clock-names = "ipg", "per";
146 interrupts = <14>;
147 status = "disabled";
148 };
149
150 kpp: kpp@43fa8000 {
151 compatible = "fsl,imx35-kpp", "fsl,imx21-kpp";
152 reg = <0x43fa8000 0x4000>;
153 interrupts = <24>;
154 clocks = <&clks 56>;
155 status = "disabled";
156 };
157
158 iomuxc: iomuxc@43fac000 {
159 compatible = "fsl,imx35-iomuxc";
160 reg = <0x43fac000 0x4000>;
161 };
162 };
163
164 spba: spba-bus@50000000 {
165 compatible = "fsl,spba-bus", "simple-bus";
166 #address-cells = <1>;
167 #size-cells = <1>;
168 reg = <0x50000000 0x100000>;
169 ranges;
170
171 uart3: serial@5000c000 {
172 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
173 reg = <0x5000c000 0x4000>;
174 clocks = <&clks 9>, <&clks 72>;
175 clock-names = "ipg", "per";
176 interrupts = <18>;
177 status = "disabled";
178 };
179
180 spi2: cspi@50010000 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "fsl,imx35-cspi";
184 reg = <0x50010000 0x4000>;
185 interrupts = <13>;
186 clocks = <&clks 36 &clks 36>;
187 clock-names = "ipg", "per";
188 status = "disabled";
189 };
190
191 fec: fec@50038000 {
192 compatible = "fsl,imx35-fec", "fsl,imx27-fec";
193 reg = <0x50038000 0x4000>;
194 clocks = <&clks 46>, <&clks 8>;
195 clock-names = "ipg", "ahb";
196 interrupts = <57>;
197 status = "disabled";
198 };
199 };
200
201 aips2: aips@53f00000 {
202 compatible = "fsl,aips", "simple-bus";
203 #address-cells = <1>;
204 #size-cells = <1>;
205 reg = <0x53f00000 0x100000>;
206 ranges;
207
208 clks: ccm@53f80000 {
209 compatible = "fsl,imx35-ccm";
210 reg = <0x53f80000 0x4000>;
211 interrupts = <31>;
212 #clock-cells = <1>;
213 };
214
215 gpt: timer@53f90000 {
216 compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
217 reg = <0x53f90000 0x4000>;
218 interrupts = <29>;
219 clocks = <&clks 9>, <&clks 50>;
220 clock-names = "ipg", "per";
221 };
222
223 gpio3: gpio@53fa4000 {
224 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
225 reg = <0x53fa4000 0x4000>;
226 interrupts = <56>;
227 gpio-controller;
228 #gpio-cells = <2>;
229 interrupt-controller;
230 #interrupt-cells = <2>;
231 };
232
233 esdhc1: esdhc@53fb4000 {
234 compatible = "fsl,imx35-esdhc";
235 reg = <0x53fb4000 0x4000>;
236 interrupts = <7>;
237 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
238 clock-names = "ipg", "ahb", "per";
239 status = "disabled";
240 };
241
242 esdhc2: esdhc@53fb8000 {
243 compatible = "fsl,imx35-esdhc";
244 reg = <0x53fb8000 0x4000>;
245 interrupts = <8>;
246 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
247 clock-names = "ipg", "ahb", "per";
248 status = "disabled";
249 };
250
251 esdhc3: esdhc@53fbc000 {
252 compatible = "fsl,imx35-esdhc";
253 reg = <0x53fbc000 0x4000>;
254 interrupts = <9>;
255 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
256 clock-names = "ipg", "ahb", "per";
257 status = "disabled";
258 };
259
260 audmux: audmux@53fc4000 {
261 compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
262 reg = <0x53fc4000 0x4000>;
263 status = "disabled";
264 };
265
266 gpio1: gpio@53fcc000 {
267 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
268 reg = <0x53fcc000 0x4000>;
269 interrupts = <52>;
270 gpio-controller;
271 #gpio-cells = <2>;
272 interrupt-controller;
273 #interrupt-cells = <2>;
274 };
275
276 gpio2: gpio@53fd0000 {
277 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
278 reg = <0x53fd0000 0x4000>;
279 interrupts = <51>;
280 gpio-controller;
281 #gpio-cells = <2>;
282 interrupt-controller;
283 #interrupt-cells = <2>;
284 };
285
286 sdma: sdma@53fd4000 {
287 compatible = "fsl,imx35-sdma";
288 reg = <0x53fd4000 0x4000>;
289 clocks = <&clks 9>, <&clks 65>;
290 clock-names = "ipg", "ahb";
291 #dma-cells = <3>;
292 interrupts = <34>;
293 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
294 };
295
296 wdog: wdog@53fdc000 {
297 compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
298 reg = <0x53fdc000 0x4000>;
299 clocks = <&clks 74>;
300 clock-names = "";
301 interrupts = <55>;
302 };
303
304 can1: can@53fe4000 {
305 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
306 reg = <0x53fe4000 0x1000>;
307 clocks = <&clks 33>, <&clks 33>;
308 clock-names = "ipg", "per";
309 interrupts = <43>;
310 status = "disabled";
311 };
312
313 can2: can@53fe8000 {
314 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
315 reg = <0x53fe8000 0x1000>;
316 clocks = <&clks 34>, <&clks 34>;
317 clock-names = "ipg", "per";
318 interrupts = <44>;
319 status = "disabled";
320 };
321
322 iim@53ff0000 {
323 compatible = "fsl,imx35-iim";
324 reg = <0x53ff0000 0x4000>;
325 interrupts = <19>;
326 clocks = <&clks 80>;
327 };
328
329 usbotg: usb@53ff4000 {
330 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
331 reg = <0x53ff4000 0x0200>;
332 interrupts = <37>;
333 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
334 clock-names = "ipg", "ahb", "per";
335 fsl,usbmisc = <&usbmisc 0>;
336 fsl,usbphy = <&usbphy0>;
337 status = "disabled";
338 };
339
340 usbhost1: usb@53ff4400 {
341 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
342 reg = <0x53ff4400 0x0200>;
343 interrupts = <35>;
344 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
345 clock-names = "ipg", "ahb", "per";
346 fsl,usbmisc = <&usbmisc 1>;
347 fsl,usbphy = <&usbphy1>;
348 dr_mode = "host";
349 status = "disabled";
350 };
351
352 usbmisc: usbmisc@53ff4600 {
353 #index-cells = <1>;
354 compatible = "fsl,imx35-usbmisc";
355 reg = <0x53ff4600 0x00f>;
356 };
357 };
358
359 emi@80000000 { /* External Memory Interface */
360 compatible = "fsl,emi", "simple-bus";
361 #address-cells = <1>;
362 #size-cells = <1>;
363 reg = <0x80000000 0x40000000>;
364 ranges;
365
366 nfc: nand@bb000000 {
367 #address-cells = <1>;
368 #size-cells = <1>;
369 compatible = "fsl,imx35-nand", "fsl,imx25-nand";
370 reg = <0xbb000000 0x2000>;
371 clocks = <&clks 29>;
372 clock-names = "";
373 interrupts = <33>;
374 status = "disabled";
375 };
376
377 weim: weim@b8002000 {
378 #address-cells = <2>;
379 #size-cells = <1>;
380 clocks = <&clks 0>;
381 compatible = "fsl,imx35-weim", "fsl,imx27-weim";
382 reg = <0xb8002000 0x1000>;
383 ranges = <
384 0 0 0xa0000000 0x8000000
385 1 0 0xa8000000 0x8000000
386 2 0 0xb0000000 0x2000000
387 3 0 0xb2000000 0x2000000
388 4 0 0xb4000000 0x2000000
389 5 0 0xb6000000 0x2000000
390 >;
391 status = "disabled";
392 };
393 };
394 };
395
396 usbphy {
397 compatible = "simple-bus";
398 #address-cells = <1>;
399 #size-cells = <0>;
400
401 usbphy0: usb-phy@0 {
402 reg = <0>;
403 compatible = "usb-nop-xceiv";
404 };
405
406 usbphy1: usb-phy@1 {
407 reg = <1>;
408 compatible = "usb-nop-xceiv";
409 };
410 };
411 };